FUJITSU SEMICONDUCTOR DATA SHEET DS501-00015-4v0-E Memory FRAM × 64 K (8 K 8) Bit SPI MB85RS64V ■ DESCRIPTION MB85RS64V is a FRAM (Ferroelectric Random Access Memory) chip in a configuration of 8,192 words × 8 bits, using the ferroelectric process and silicon gate CMOS process technologies for forming the nonvolatile memory cells. MB85RS64V adopts the Serial Peripheral Interface (SPI). The MB85RS64V is able to retain data without using a back-up battery, as is needed for SRAM. The memory cells used in the MB85RS64V can be used for 1012 read/write operations, which is a significant improvement over the number of read and write operations supported by Flash memory and E2PROM. MB85RS64V does not take long time to write data like Flash memories or E2PROM, and MB85RS64V takes no wait time. ■ FEATURES • Bit configuration : 8,192 words × 8 bits (cid:129) Serial Peripheral Interface : SPI (Serial Peripheral Interface) Correspondent to SPI mode 0 (0, 0) and mode 3 (1, 1) (cid:129) Operating frequency : 20 MHz (Max) (cid:129) High endurance : 1012 times / byte (cid:129) Data retention : 10 years ( + 85 °C), 95 years ( + 55 °C), over 200 years ( + 35 °C) (cid:129) Operating power supply voltage : 3.0 V to 5.5 V (cid:129) Low power consumption : Operating power supply current 1.5 mA (Typ@20 MHz) Standby current 10 μA (Typ) (cid:129) Operation ambient temperature range : − 40 °C to + 85 °C (cid:129) Package : 8-pin plastic SOP (FPT-8P-M02) RoHS compliant Copyright©2012-2013 FUJITSU SEMICONDUCTOR LIMITED All rights reserved 2013.9

MB85RS64V ■ PIN ASSIGNMENT (TOP VIEW) CS 1 8 VDD SO 2 7 HOLD WP 3 6 SCK GND 4 5 SI (FPT-8P-M02) ■ PIN FUNCTIONAL DESCRIPTIONS Pin No. Pin Name Functional description Chip Select pin This is an input pin to make chip select. When CS is the “H” level, device is in deselect 1 CS (standby) status and SO becomes High-Z. Inputs from other pins are ignored at this time. When CS is the “L” level, device is in select (active) status. CS has to be the “L” level before inputting op-code. The Chip Select pin is pulled up internally to the VDD pin. Write Protect pin This is a pin to control writing to a status register. The writing of status register (see “■ 3 WP STATUS REGISTER”) is protected in related with WP and WPEN. See “■WRITING PROTECT” for detail. Hold pin This pin is used to interrupt serial input/output without making chip deselect. When 7 HOLD HOLD is the “L” level, hold operation is activated, SO becomes High-Z, and SCK and SI become don’t care. While the hold operation, CS shall be retained the “L” level. Serial Clock pin 6 SCK This is a clock input pin to input/output serial data. SI is loaded synchronously to a rising edge, SO is output synchronously to a falling edge. Serial Data Input pin 5 SI This is an input pin of serial data. This inputs op-code, address, and writing data. Serial Data Output pin 2 SO This is an output pin of serial data. Reading data of FRAM memory cell array and status register are output. This is High-Z during standby. 8 VDD Supply Voltage pin 4 GND Ground pin 2 DS501-00015-4v0-E

MB85RS64V ■ BLOCK DIAGRAM SI Serial-Parallel Converter r e d o ec FRAM Cell Array D 8,192 ✕ 8 w r o CS nte R u o C FRAM SCK cuit ss Status Register r e Ci dr ol Ad r HOLD ont Column Decoder/Sense Amp/ C Write Amp WP Data Register SO Parallel-Serial Converter DS501-00015-4v0-E 3

MB85RS64V ■ SPI MODE MB85RS64V corresponds to the SPI mode 0 (CPOL = 0, CPHA = 0) , and SPI mode 3 (CPOL = 1, CPHA = 1) . CS SCK SI 7 6 5 43 2 1 0 MSB LSB SPI Mode 0 CS SCK SI 7 6 5 43 2 1 0 MSB LSB SPI Mode 3 4 DS501-00015-4v0-E

MB85RS64V ■ SERIAL PERIPHERAL INTERFACE (SPI) MB85RS64V works as a slave of SPI. More than 2 devices can be connected by using microcontroller equipped with SPI port. By using a microcontroller not equipped with SPI port, SI and SO can be bus connected to use. SCK MOSI MISO SO SI SCK SO SI SCK SPI MB85RS64V MB85RS64V Microcontroller CS HOLD CS HOLD SS1 SS2 HOLD1 HOLD2 MOSI : Master Out Slave In MISO : Master In Slave Out SS : Slave Select System Configuration with SPI Port SO SI SCK Microcontroller MB85RS64V CS HOLD System Configuration without SPI Port DS501-00015-4v0-E 5

MB85RS64V ■ STATUS REGISTER Bit No. Bit Name Function Status Register Write Protect This is a bit composed of nonvolatile memories (FRAM). WPEN protects 7 WPEN writing to a status register (see “■ WRITING PROTECT”) relating with WP input. Writing with the WRSR command and reading with the RDSR com- mand are possible. Not Used Bits These are bits composed of nonvolatile memories, writing with the WRSR 6 to 4 ⎯ command is possible. These bits are not used but they are read with the RDSR command. Block Protect 3 BP1 This is a bit composed of nonvolatile memory. This defines size of write protect block for the WRITE command (see “■ BLOCK PROTECT”). Writ- 2 BP0 ing with the WRSR command and reading with the RDSR command are possible. Write Enable Latch This indicates FRAM Array and status register are writable. The WREN command is for setting, and the WRDI command is for resetting. With the RDSR command, reading is possible but writing is not possible with the 1 WEL WRSR command. WEL is reset after the following operations. After power ON. After WRDI command recognition. At the rising edge of CS after WRSR command recognition. At the rising edge of CS after WRITE command recognition. 0 0 This is a bit fixed to “0”. ■ OP-CODE MB85RS64V accepts 7 kinds of command specified in op-code. Op-code is a code composed of 8 bits shown in the table below. Do not input invalid codes other than those codes. If CS is risen while inputting op-code, the command are not performed. Name Description Op-code WREN Set Write Enable Latch 0000 0110 B WRDI Reset Write Enable Latch 0000 0100 B RDSR Read Status Register 0000 0101 B WRSR Write Status Register 0000 0001 B READ Read Memory Code 0000 0011 B WRITE Write Memory Code 0000 0010 B RDID Read Device ID 1001 1111 B 6 DS501-00015-4v0-E

MB85RS64V ■ COMMAND • WREN The WREN command sets WEL (Write Enable Latch) . WEL shall be set with the WREN command before writing operation (WRSR command and WRITE command) . CS 0 1 2 3 4 5 6 7 SCK SI Invalid 0 0 0 0 0 1 1 0 Invalid High-Z SO • WRDI The WRDI command resets WEL (Write Enable Latch) . Writing operation (WRITE command and WRSR command) are not performed when WEL is reset. CS 0 1 2 3 4 5 6 7 SCK SI Invalid 0 0 0 0 0 1 0 0 Invalid High-Z SO DS501-00015-4v0-E 7

MB85RS64V • RDSR The RDSR command reads status register data. After op-code of RDSR is input to SI, 8-cycle clock is input to SCK. The SI value is invalid during this time. SO is output synchronously to a falling edge of SCK. In the RDSR command, repeated reading of status register is enabled by sending SCK continuously before rising of CS. CS 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 SCK SI 0 0 0 0 0 1 0 1 Invalid Data Out High-Z SO Invalid MSB LSB • WRSR The WRSR command writes data to the nonvolatile memory bit of status register. After performing WRSR op-code to a SI pin, 8 bits writing data is input. WEL (Write Enable Latch) is not able to be written with WRSR command. A SI value correspondent to bit 1 is ignored. Bit 0 of the status register is fixed to “0” and cannot be written. The SI value corresponding to bit 0 is ignored. The WP signal level shall be fixed before performing the WRSR command, and do not change the WP signal level until the end of command sequence. CS 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 SCK Instruction Data In SI 0 0 0 0 0 0 0 1 7 6 5 4 3 2 1 0 MSB LSB High-Z SO 8 DS501-00015-4v0-E

MB85RS64V • READ The READ command reads FRAM memory cell array data. Arbitrary 16 bits address and op-code of READ are input to SI. The 3-bit upper address bit is invalid. Then, 8-cycle clock is input to SCK. SO is output synchronously to the falling edge of SCK. While reading, the SI value is invalid. When CS is risen, the READ command is completed, but keeps on reading with automatic address increment which is enabled by con- tinuously sending clocks to SCK in unit of 8 cycles before CS rising. When it reaches the most significant address, it rolls over to the starting address, and reading cycle keeps on infinitely. CS 0 1 2 3 4 5 6 7 8 9 10 11 12 13 18 19 20 21 22 23 24 25 26 27 28 29 30 31 SCK 16-bit Address OP-CODE SI 0 0 0 0 0 0 1 1 X X X 12 11 10 5 4 3 2 1 0 Invalid MSB LSBMSB Data Out LSB High-Z SO 7 6 5 4 3 2 1 0 Invalid • WRITE The WRITE command writes data to FRAM memory cell array. WRITE op-code, arbitrary 16 bits of address and 8 bits of writing data are input to SI. The 3-bit upper address bit is invalid. When 8 bits of writing data is input, data is written to FRAM memory cell array. Risen CS will terminate the WRITE command. However, if you continue sending the writing data for 8 bits each before CS rising, it is possible to continue writing with automatic address increment. When it reaches the most significant address, it rolls over to the starting address, and writing cycle keeps on infinitely. CS 0 1 2 3 4 5 6 7 8 9 10 11 12 13 18 19 20 21 22 23 24 25 26 27 28 29 30 31 SCK 16-bit Address Data In OP-CODE SI 0 0 0 0 0 0 1 0 X X X 12 11 10 5 4 3 2 1 0 7 6 5 4 3 2 1 0 MSB LSB MSB LSB High-Z SO DS501-00015-4v0-E 9

MB85RS64V • RDID The RDID command reads fixed Device ID. After performing RDID op-code to SI, 32-cycle clock is input to SCK. The SI value is invalid during this time. SO is output synchronously to a falling edge of SCK. The output is in order of Manufacturer ID (8bit)/Continuation code (8bit)/Product ID (1st Byte)/ Product ID (2nd Byte). In the RDID command, SO holds the output state of the last bit in 32-bit Device ID until CS is risen. CS 0 1 2 3 4 5 6 7 8 9 10 11 31 32 33 34 35 36 37 38 39 SCK SI 1 0 0 1 1 1 1 1 Invalid Data Out Data Out High-Z SO 31 30 29 28 8 7 6 5 4 3 2 1 0 MSB LSB bit 7 6 5 4 3 2 1 0 Hex Manufacturer ID 0 0 0 0 0 1 0 0 04 Fujitsu H Continuation code 0 1 1 1 1 1 1 1 7F H Proprietary use Density Hex Product ID (1st Byte) 0 0 0 0 0 0 1 1 03 Density: 00011 = 64kbit H B Proprietary use Hex Product ID (2nd Byte) 0 0 0 0 0 0 1 0 02 H 10 DS501-00015-4v0-E

MB85RS64V ■ BLOCK PROTECT Writing protect block for WRITE command is configured by the value of BP0 and BP1 in the status register. BP1 BP0 Protected Block 0 0 None 0 1 1800 to 1FFF (upper 1/4) H H 1 0 1000 to 1FFF (upper 1/2) H H 1 1 0000 to 1FFF (all) H H ■ WRITING PROTECT Writing operation of the WRITE command and the WRSR command are protected with the value of WEL, WPEN, WP as shown in the table. WEL WPEN WP Protected Blocks Unprotected Blocks Status Register 0 X X Protected Protected Protected 1 0 X Protected Unprotected Unprotected 1 1 0 Protected Unprotected Protected 1 1 1 Protected Unprotected Unprotected ■ HOLD OPERATION Hold status is retained without aborting a command if HOLD is the “L” level while CS is the “L” level. The timing for starting and ending hold status depends on the SCK to be the “H” level or the “L” level when a HOLD pin input is transited to the hold condition as shown in the diagram below. In case the HOLD pin transited to “L” level when SCK is “L” level, return the HOLD pin to “H” level at SCK being “L” level. In the same manner, in case the HOLD pin transited to “L” level when SCK is “H” level, return the HOLD pin to “H” level at SCK being “H” level. Arbitrary command operation is interrupted in hold status, SCK and SI inputs become don’t care. And, SO becomes High-Z while reading command (RDSR, READ). If CS is rising during hold status, a command is aborted. In case the command is aborted before its recognition, WEL holds the value before transition to HOLD status. CS SCK HOLD Hold Condition Hold Condition DS501-00015-4v0-E 11

MB85RS64V ■ ABSOLUTE MAXIMUM RATINGS Rating Parameter Symbol Unit Min Max Power supply voltage* V − 0.5 + 6.0 V DD Input voltage* V − 0.5 V + 0.5 ( ≤ 6.0) V IN DD Output voltage* V − 0.5 V + 0.5 ( ≤ 6.0) V OUT DD Operation ambient temperature T − 40 + 85 °C A Storage temperature Tstg − 55 + 125 °C *:These parameters are based on the condition that V is 0 V. SS WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings. ■ RECOMMENDED OPERATING CONDITIONS Value Parameter Symbol Unit Min Typ Max Power supply voltage* V 3.0 ⎯ 5.5 V DD Input high voltage* V V × 0.8 ⎯ V + 0.3 V IH DD DD Input low voltage* V − 0.3 ⎯ V × 0.2 V IL DD Operation ambient temperature T − 40 ⎯ + 85 °C A *:These parameters are based on the condition that V is 0 V. SS WARNING: The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device's electrical characteristics are warranted when the device is operated within these ranges. Always use semiconductor devices within their recommended operating condition ranges. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their representatives beforehand. 12 DS501-00015-4v0-E

MB85RS64V ■ ELECTRICAL CHARACTERISTICS 1. DC Characteristics (within recommended operating conditions) Value Parameter Symbol Condition Unit Min Typ Max 0 ≤ CS < V ⎯ ⎯ 200 DD CS = V ⎯ ⎯ 10 Input leakage current |I | DD μA LI WP, HOLD, SCK, ⎯ ⎯ 10 SI = 0 V to V DD Output leakage current |I | SO = 0 V to V ⎯ ⎯ 10 μA LO DD Operating power supply current I SCK = 20 MHz ⎯ 1.5 2.5 mA DD Standby current I SCK = SI = CS = V ⎯ 10 20 μA SB DD Output high voltage V I = −2 mA V − 0.5 ⎯ V V OH OH DD DD Output low voltage V I = 2 mA V ⎯ 0.4 V OL OL SS Pull up resistance for CS R ⎯ 28 50 180 kΩ P DS501-00015-4v0-E 13

MB85RS64V 2. AC Characteristics Value Parameter Symbol Unit Min Max SCK clock frequency f 0 20 MHz CK Clock high time t 25 ⎯ ns CH Clock low time t 25 ⎯ ns CL Chip select set up time t 10 ⎯ ns CSU Chip select hold time t 10 ⎯ ns CSH Output disable time t ⎯ 20 ns OD Output data valid time t ⎯ 20 ns ODV Output hold time t 0 ⎯ ns OH Deselect time t 60 ⎯ ns D Data rising time t ⎯ 50 ns R Data falling time t ⎯ 50 ns F Data set up time t 5 ⎯ ns SU Data hold time t 5 ⎯ ns H HOLD set up time t 10 ⎯ ns HS HOLD hold time t 10 ⎯ ns HH HOLD output floating time t ⎯ 20 ns HZ HOLD output active time t ⎯ 20 ns LZ AC Test Condition Power supply voltage : 3.0 V to 5.5 V Operation ambient temperature : − 40 °C to + 85 °C Input voltage magnitude : V × 0.1 to V × 0.9 DD DD Input rising time : 5 ns Input falling time : 5 ns Input judge level : V /2 DD Output judge level : V /2 DD 14 DS501-00015-4v0-E

MB85RS64V AC Load Equivalent Circuit 5.5 V Output 30 pF 3. Pin Capacitance Value Parameter Symbol Conditions Unit Min Max Output capacitance CO VDD = VIN = VOUT = 0 V ⎯ 10 pF Input capacitance CI f = 1 MHz, TA = + 25 °C ⎯ 10 pF DS501-00015-4v0-E 15

MB85RS64V ■ TIMING DIAGRAM • Serial Data Timing tD CS tCSH tCSU tCH tCL tCH SCK tSU tH SI Valid in tODV tOH tOD High-Z High-Z SO : H or L • Hold Timing CS SCK tHS tHS tHS tHS tHH tHH tHH tHH HOLD High-Z High-Z SO tHZ tLZ tHZ tLZ 16 DS501-00015-4v0-E

MB85RS64V ■ POWER ON/OFF SEQUENCE tpd tf tr tpu VDD VDD 3.0 V 3.0 V VIH (Min) VIH (Min) 1.2 V 1.2 V VIL (Max) VIL (Max) GND GND CS CS >VDD × 0.8 * CS : don't care CS >VDD × 0.8 * CS * : CS (Max) < V + 0.3 V DD Value Parameter Symbol Unit Condition Min Max CS level hold time at power OFF tpd 400 ⎯ ns ⎯ 0.1 ⎯ V = 5.0V ± 0.5V Operation DD CS level hold time at power ON tpu ms 0.6 ⎯ V = 3.3V ± 0.3V Operation DD Power supply falling time tf 200 ⎯ μs/V ⎯ 100 ⎯ V = 5.0V ± 0.5V Operation DD Power supply rising time tr μs/V 1 ⎯ V = 3.3V ± 0.3V Operation DD If the device does not operate within the specified conditions of read cycle, write cycle or power on/off sequence, memory data can not be guaranteed. ■ FRAM CHARACTERISTICS Item Min Max Unit Parameter Read/Write Endurance*1 1012 ⎯ Times/byte Operation Ambient Temperature TA = + 85 °C 10 ⎯ Operation Ambient Temperature T = + 85 °C A Data Retention*2 95 ⎯ Years Operation Ambient Temperature TA = + 55 °C ≥ 200 ⎯ Operation Ambient Temperature T = + 35 °C A *1 : Total number of reading and writing defines the minimum value of endurance, as an FRAM memory operates with destructive readout mechanism. *2 : Minimun values define retention time of the first reading/writing data right after shipment, and these values are calculated by qualification results. DS501-00015-4v0-E 17

MB85RS64V ■ NOTE ON USE We recommend programming of the device after reflow. Data written before reflow cannot be guaranteed. ■ ESD AND LATCH-UP Test DUT Value ESD HBM (Human Body Model) ≥ |2000 V| JESD22-A114 compliant ESD MM (Machine Model) ≥ |200 V| JESD22-A115 compliant ESD CDM (Charged Device Model) ≥ |1000 V| JESD22-C101 compliant Latch-Up (I-test) MB85RS64VPNF-G-JNE1 ⎯ JESD78 compliant Latch-Up (V overvoltage test) supply ⎯ JESD78 compliant Latch-Up (Current Method) ⎯ Proprietary method Latch-Up (C-V Method) ≥ |200 V| Proprietary method (cid:129) Current method of Latch-Up Resistance Test Protection Resistor A IIN Test terminal VDD VDD (Max.Rating) DUT + VIN V - VSS Reference terminal Note : The voltage V is increased gradually and the current I of 300 mA at maximum shall flow. IN IN Confirm the latch up does not occur under I = ± 300 mA. IN In case the specific requirement is specified for I/O and I cannot be 300 mA, the voltage shall be IN increased to the level that meets the specific requirement. 18 DS501-00015-4v0-E

MB85RS64V (cid:129) C-V method of Latch-Up Resistance Test Protection Resistor A Test 1 2 terminal VDD SW DUT VDD + (Max.Rating) VIN V C - 200pF VSS Reference terminal Note : Charge voltage alternately switching 1 and 2 approximately 2 sec interval. This switching process is considered as one cycle. Repeat this process 5 times. However, if the latch-up condition occurs before completing 5 times, this test must be stopped immediately. ■ REFLOW CONDITIONS AND FLOOR LIFE [ JEDEC MSL ] : Moisture Sensitivity Level 3 (ISP/JEDEC J-STD-020D) ■ CURRENT STATUS ON CONTAINED RESTRICTED SUBSTANCES This product complies with the regulations of REACH Regulations, EU RoHS Directive and China RoHS. Please refer to the following web site for more details of current status on contained restricted substances in our products. http://www.fujitsu.com/global/services/microelectronics/environment/products/ DS501-00015-4v0-E 19

MB85RS64V ■ ORDERING INFORMATION Minimum shipping Part number Package Shipping form quantity 8-pin plastic SOP MB85RS64VPNF-G-JNE1 Tube ⎯* (FPT-8P-M02) 8-pin plastic SOP MB85RS64VPNF-G-JNERE1 Embossed Carrier tape 1500 (FPT-8P-M02) *: Please contact our sales office about minimum shipping quantity. 20 DS501-00015-4v0-E

MB85RS64V ■ PACKAGE DIMENSION 8-pin plastic SOP Lead pitch 1.27 mm Package width × 3.9 mm × 5.05 mm package length Lead shape Gullwing Sealing method Plastic mold Mounting height 1.75 mm MAX Weight 0.06 g (FPT-8P-M02) 8-pin plastic SOP Note 1)*1 : These dimensions include resin protrusion. (FPT-8P-M02) Note 2)*2 : These dimensions do not include resin protrusion. Note 3)Pins width and pins thickness include plating thickness. Note 4)Pins width do not include tie bar cutting remainder. *15.05–+00..2205 .199–+..000180 0.22–+00..0073 .009+–..000031 8 5 *23.90±0.30 6.00±0.20 (.154±.012) (.236±.008) Details of "A" part 45° 1.55±0.20 (Mounting height) (.061±.008) 0.25(.010) 0.40(.016) "A" 0~8° 1 4 1.27(.050) 0.44±0.08 (.017±.003) 0.13(.005)M 0.50±0.20 0.15±0.10 (.020±.008) (.006±.004) 0.60±0.15 (Stand off) (.024±.006) 00..1100((..000044)) Dimensions in mm (inches). C 2002-2012 FUJITSUSEMICONDUCTOR LIMITED F08004S-c-5-10 Note: The values in parentheses are reference values. Please check the latest package dimension at the following URL. http://edevice.fujitsu.com/package/en-search/ DS501-00015-4v0-E 21

MB85RS64V ■ MARKING [MB85RS64VPNF-G-JNE1] [MB85RS64VPNF-G-JNERE1] RS64V E11200 300 [FPT-8P-M02] 22 DS501-00015-4v0-E

MB85RS64V ■ PACKING INFORMATION 1. Tube 1.1 Tube Dimensions (cid:129) Tube/stopper shape Tube Transparent polyethylene terephthalate (treated to antistatic) Stopper (treated to antistatic) Tube length: 520 mm Tube cross-sections and Maximum quantity Maximum quantity Package form Package code pcs/ pcs/inner pcs/outer tube box box SOP, 8, plastic (2) FPT-8P-M02 95 7600 30400 7.4 6.4 8 1. 2.6 4.4 ©2006-2010 FUJITSU SEMICONDUCTOR LIMITED CF028000068 -FSUEJTI1T-SPUE T L:FIMJ9IT9ELD-0 0 F2028-E00080-0S8E-1T-1K--P3ET:FJ99L-0022-E0008-1-K-1 t = 0.5 Transparent polyethylene terephthalate (Dimensions in mm) DS501-00015-4v0-E 23

MB85RS64V 1.2 Tube Dry pack packing specifications IC Tube Stopper For SOP Index mark Label I *1*3 Aluminum Iaminated bag Heat seal Dry pack Desiccant Humidity indicator Aluminum Iaminated bag (tubes inside) Inner box Cushioning material Inner box Label I *1*3 Cushioning material Outer box*2 Outer box Use adhesive tapes. Label II-A *3 Label II-B *3 *1:For a product of witch part number is suffixed with “E1”, a “ G Pb ” marks is display to the moisture barrier bag and the inner boxes. *2:The space in the outer box will be filled with empty inner boxes, or cushions, etc. *3:Please refer to an attached sheet about the indication label. Note: The packing specifications may not be applied when the product is delivered via a distributor. 24 DS501-00015-4v0-E

MB85RS64V 1.3 Product label indicators Label I: Label on Inner box/Moisture Barrier Bag/ (It sticks it on the reel for the emboss taping) [C-3 Label (50mm × 100mm) Supplemental Label (20mm × 100mm)] XXXXXXXXXXXXXX (Customer part number or FJ part number) C-3 Label (3N)1 XXXXXXXXXXXXXXXXX (LEAD FREE mark) (Part number and quantity) QC PASS (3N)2 XXXXXXXXXX XXXXXX (FJ control number) XXX pcs (Quantity) XXXXXXXXXXXXXX (Customer part number or FJ part number) (Customer part number or FJ part number bar code) XXXX/XX/XX (Packed years/month/day) ASSEMBLED IN xxxx Perforated line XXXXXXXXXXXXXX (Customer part number or FJ part number) (FJ control number bar code) Supplemental Label XX/XX XXXX-XXX XXX (Package count) XXXX-XXX XXX XXXXXXXXXX (FJ control number ) (Lot Number and quantity) XXXXXXXXXXXXXX (Comment) Label II-A: Label on Outer box [D Label] (100mm × 100mm) D Label XXXXXXXXXXXXX (Customer Name) (CUST.) XXXXXXXXX (Delivery Address) (DELIVERY POINT) XXX (FJ control number) XXXXXXXXXXXXXX XXX (FJ control number) (TRANS.NO.) (FJ control number) XXX (FJ control number) XXXXXXXXXXXXXX XXXXXXXXXXXXXX (PART NO.) (Customer part number or (Part number) FJ part number) (PART NAME) XXXXXXXXXXXXXX (Part number) XXX/XXX XX (Q’TY/TOTAL Q’TY) (UNIT) (CUSTOMER'S (PACKAGE COUNT) REMARKS) XXX/XXX XXXXXXXXXXXXXXXXXXXX (3N)3 XXXXXXXXXXXXXX XXX (FJ control number + Product quantity) (FJ control number + Product quantity bar code) (3N)4 XXXXXXXXXXXXXX XXX (Part number + Product quantity) (Part number + Product quantity bar code) (3N)5 XXXXXXXXXX (FJ control number) (FJ control number bar code) Label II-B: Outer boxes product indicate XXXXXXXXXXXXXX (Part number) (Lot Number) (Count) (Quantity) XXXX-XXX X XXX X XXX XXXX-XXX XXX Note: Depending on shipment state, “Label II-A” and “Label II-B” on the external boxes might not be printed. DS501-00015-4v0-E 25

MB85RS64V 1.4 Dimensions for Containers (1) Dimensions for inner box H W L L W H 540 125 75 (Dimensions in mm) (2) Dimensions for outer box H W L L W H 565 270 180 (Dimensions in mm) 26 DS501-00015-4v0-E

MB85RS64V 2. Emboss Tape 2.1 Tape Dimensions Maximum storage capacity PKG code Reel No pcs/reel pcs/inner box pcs/outer box FPT-8P-M02 3 1500 1500 10500 2±0.05 1 ø1.5+–00.1 8±0.1 4±0.1 ±0. 0.3±0.05 5 7 B 1. ø1.5+–00.1 5 0 0. ± 5.5 +0.312–0.1 5±0.1 5. A B A SEC.B-B 6.4±0.1 1 0. 3.9±0.2 ± 1 2. 4 0. SEC.A-A C 2012 FUJITSU SEMICONDUCTOR LIMITED SOL8-EMBOSSTAPE9 : NFME-EMB-X0084-1-P-1 (Dimensions in mm) Material : Conductive polystyrene Heat proof temperature : No heat resistance. Package should not be baked by using tape and reel. DS501-00015-4v0-E 27

MB85RS64V 2.2 IC orientation (cid:129) ER type Index mark (User Direction of Feed) (Reel side) (User Direction of Feed) 2.3 Reel dimensions Reel cutout dimensions E ∗ W1 B A C D W2 r W3 ∗: Hub unit width dimensions Dimensions in mm Reel No 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Tape width 8 12 16 24 32 44 56 12 16 24 Symbol A 254 ± 2 254 ± 2 330 ± 2 254 ± 2 330 ± 2 254 ± 2 330 ± 2 330 ± 2 B 100+2 100+2 150+2 100+2 150+2 100+2 100 ± 2 -0 -0 -0 -0 -0 -0 C 13 ± 0.2 13+0.5 -0.2 D 21 ± 0.8 20.5+1 -0.2 E 2 ± 0.5 W1 8.4+2 12.4+2 16.4+2 24.4+2 32.4+2 44.4+2 56.4+2 12.4+1 16.4+1 24.4+0.1 -0 -0 -0 -0 -0 -0 -0 -0 -0 -0 W2 less than less than 18.4 less than 22.4 less than 30.4 less than 38.4 less than 50.4 less than less than less than less than 14.4 62.4 18.4 22.4 30.4 55.9 ~ 12.4 ~ 16.4 ~ 24.4 ~ W3 7.9 ~ 10.9 11.9 ~ 15.4 15.9 ~ 19.4 23.9 ~ 27.4 31.9 ~ 35.4 43.9 ~ 47.4 59.4 14.4 18.4 26.4 r 1.0 28 DS501-00015-4v0-E

MB85RS64V 2.4 Taping (φ330mm Reel) Dry Pack Packing Specifications Outside diameter: φ 330mm reel Label I *1, *4 Embossed tapes Label I *1, *4 Desiccant Humidity indicator Dry pack Aluminum laminated bag Label I *1, *4 Heat seal Inner box Inner box Label I *1, *4 Taping Outer box *2, *3 Outer box Use adhesive tapes. Label II-A *4 Label II-B *4 *1:For a product of witch part number is suffixed with “E1”, a “ G Pb ” marks is display to the moisture barrier bag and the inner boxes. *2:The size of the outer box may be changed depending on the quantity of inner boxes. *3:The space in the outer box will be filled with empty inner boxes, or cushions, etc. *4:Please refer to an attached sheet about the indication label. Note: The packing specifications may not be applied when the product is delivered via a distributor. DS501-00015-4v0-E 29

MB85RS64V 2.5 Product label indicators Label I: Label on Inner box/Moisture Barrier Bag/ (It sticks it on the reel for the emboss taping) [C-3 Label (50mm × 100mm) Supplemental Label (20mm × 100mm)] XXXXXXXXXXXXXX (Customer part number or FJ part number) C-3 Label (3N)1 XXXXXXXXXXXXXXXXX (LEAD FREE mark) (Part number and quantity) QC PASS (3N)2 XXXXXXXXXX XXXXXX (FJ control number) XXX pcs (Quantity) XXXXXXXXXXXXXX (Customer part number or FJ part number) (Customer part number or FJ part number bar code) XXXX/XX/XX (Packed years/month/day) ASSEMBLED IN xxxx Perforated line XXXXXXXXXXXXXX (Customer part number or FJ part number) (FJ control number bar code) Supplemental Label XX/XX XXXX-XXX XXX (Package count) XXXX-XXX XXX XXXXXXXXXX (FJ control number ) (Lot Number and quantity) XXXXXXXXXXXXXX (Comment) Label II-A: Label on Outer box [D Label] (100mm × 100mm) D Label XXXXXXXXXXXXX (Customer Name) (CUST.) XXXXXXXXX (Delivery Address) (DELIVERY POINT) XXX (FJ control number) XXXXXXXXXXXXXX XXX (FJ control number) (TRANS.NO.) (FJ control number) XXX (FJ control number) XXXXXXXXXXXXXX XXXXXXXXXXXXXX (PART NO.) (Customer part number or (Part number) FJ part number) (PART NAME) XXXXXXXXXXXXXX (Part number) XXX/XXX XX (Q’TY/TOTAL Q’TY) (UNIT) (CUSTOMER'S (PACKAGE COUNT) REMARKS) XXX/XXX XXXXXXXXXXXXXXXXXXXX (3N)3 XXXXXXXXXXXXXX XXX (FJ control number + Product quantity) (FJ control number + Product quantity bar code) (3N)4 XXXXXXXXXXXXXX XXX (Part number + Product quantity) (Part number + Product quantity bar code) (3N)5 XXXXXXXXXX (FJ control number) (FJ control number bar code) Label II-B: Outer boxes product indicate XXXXXXXXXXXXXX (Part number) (Lot Number) (Count) (Quantity) XXXX-XXX X XXX X XXX XXXX-XXX XXX Note: Depending on shipment state, “Label II-A” and “Label II-B” on the external boxes might not be printed. 30 DS501-00015-4v0-E

MB85RS64V 2.6 Dimensions for Containers (1) Dimensions for inner box H W L Tape width L W H 12, 16 40 24, 32 50 365 345 44 65 56 75 (Dimensions in mm) (2) Dimensions for outer box H W L L W H 415 400 315 (Dimensions in mm) DS501-00015-4v0-E 31

MB85RS64V ■ MAJOR CHANGES IN THIS EDITION A change on a page is indicated by a vertical line drawn on the left side of that page. Page Section Change Results • RDID Revised the following description. “In the RDID command, SO holds the output state of the last bit after 32-bit Device ID output by continuously sending 10 SCK clock before CS is risen.” →“In the RDID command, SO holds the output state of the last bit in 32-bit Device ID until /CS is risen.” ■ POWER ON/OFF SEQUENCE Defined values of tpu and tr at operation voltage. Min Max Unit Condition tpu 0.1 ⎯ ms V = 5.0 V ± 0.5 V Operation 17 DD 0.6 ⎯ ms V = 3.3 V ± 0.3 V Operation DD tr 100 ⎯ ms/V V = 5.0 V ± 0.5 V Operation DD 1 ⎯ ms/V V = 3.3 V ± 0.3 V Operation DD ■ NOTE ON USE Revised the following description. “Data written before performing IR reflow is not guaranteed 18 after IR reflow.” →“We recommend programming of the device after reflow. Data written before reflow cannot be guaranteed.” ■ REFLOW CONDITIONS AND Revised to following description. FLOOR LIFE [ JEDEC MSL ] : Moisture Sensitivity Level 3 (ISP/JEDEC J- STD-020D) 19 ■ CURRENT STATUS ON Changed the title and revised the description which refers to CONTAINED RESTRICTED a website. SUBSTANCES ■ ORDERING INFORMATION Changed the Minimum shipping quantity. 1 → ⎯* 20 Added the following note below table. *: Please contact our sales office about minimum shipping quantity. 1.2 Tube Dry pack packing specifica- Changed the location of humidity indicator. 24 tions 32 DS501-00015-4v0-E

MB85RS64V MEMO DS501-00015-4v0-E 33

MB85RS64V MEMO 34 DS501-00015-4v0-E

MB85RS64V MEMO DS501-00015-4v0-E 35

MB85RS64V FUJITSU SEMICONDUCTOR LIMITED Nomura Fudosan Shin-yokohama Bldg. 10-23, Shin-yokohama 2-Chome, Kohoku-ku Yokohama Kanagawa 222-0033, Japan http://jp.fujitsu.com/fsl/en/ For further information please contact: North and South America Asia Pacific FUJITSU SEMICONDUCTOR AMERICA, INC. FUJITSU SEMICONDUCTOR ASIA PTE. LTD. 1250 E. Arques Avenue, M/S 333 151 Lorong Chuan, Sunnyvale, CA 94085-5401, U.S.A. #05-08 New Tech Park 556741 Singapore Tel: +1-408-737-5600 Fax: +1-408-737-5999 Tel : +65-6281-0770 Fax : +65-6281-0220 http://us.fujitsu.com/micro/ http://sg.fujitsu.com/semiconductor/ Europe FUJITSU SEMICONDUCTOR SHANGHAI CO., LTD. FUJITSU SEMICONDUCTOR EUROPE GmbH 30F, Kerry Parkside, 1155 Fang Dian Road, Pudong District, Pittlerstrasse 47, 63225 Langen, Germany Shanghai 201204, China Tel: +49-6103-690-0 Fax: +49-6103-690-122 Tel : +86-21-6146-3688 Fax : +86-21-6146-3660 http://emea.fujitsu.com/semiconductor/ http://cn.fujitsu.com/fss/ Korea FUJITSU SEMICONDUCTOR PACIFIC ASIA LTD. FUJITSU SEMICONDUCTOR KOREA LTD. 2/F, Green 18 Building, Hong Kong Science Park, 902 Kosmo Tower Building, 1002 Daechi-Dong, Shatin, N.T., Hong Kong Gangnam-Gu, Seoul 135-280, Republic of Korea Tel : +852-2736-3232 Fax : +852-2314-4207 Tel: +82-2-3484-7100 Fax: +82-2-3484-7111 http://cn.fujitsu.com/fsp/ http://www.fujitsu.com/kr/fsk/ All Rights Reserved. FUJITSU SEMICONDUCTOR LIMITED, its subsidiaries and affiliates (collectively, "FUJITSU SEMICONDUCTOR") reserves the right to make changes to the information contained in this document without notice. Please contact your FUJITSU SEMICONDUCTOR sales representatives before order of FUJITSU SEMICONDUCTOR device. Information contained in this document, such as descriptions of function and application circuit examples is presented solely for reference to examples of operations and uses of FUJITSU SEMICONDUCTOR device. FUJITSU SEMICONDUCTOR disclaims any and all warranties of any kind, whether express or implied, related to such information, including, without limitation, quality, accuracy, performance, proper operation of the device or non-infringement. If you develop equipment or product incorporating the FUJITSU SEMICONDUCTOR device based on such information, you must assume any responsibility or liability arising out of or in connection with such information or any use thereof. FUJITSU SEMICONDUCTOR assumes no responsibility or liability for any damages whatsoever arising out of or in connection with such information or any use thereof. Nothing contained in this document shall be construed as granting or conferring any right under any patents, copyrights, or any other intellectual property rights of FUJITSU SEMICONDUCTOR or any third party by license or otherwise, express or implied. FUJITSU SEMICONDUCTOR assumes no responsibility or liability for any infringement of any intellectual property rights or other rights of third parties resulting from or in connection with the information contained herein or use thereof. The products described in this document are designed, developed and manufactured as contemplated for general use including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high levels of safety is secured, could lead directly to death, personal injury, severe physical damage or other loss (including, without limitation, use in nuclear facility, aircraft flight control system, air traffic control system, mass transport control system, medical life support system and military application), or (2) for use requiring extremely high level of reliability (including, without limitation, submersible repeater and artificial satellite). FUJITSU SEMICONDUCTOR shall not be liable for you and/or any third party for any claims or damages arising out of or in connection with above-mentioned uses of the products. Any semiconductor devices fail or malfunction with some probability. You are responsible for providing adequate designs and safeguards against injury, damage or loss from such failures or malfunctions, by incorporating safety design measures into your facility, equipments and products such as redundancy, fire protection, and prevention of overcurrent levels and other abnormal operating conditions. The products and technical information described in this document are subject to the Foreign Exchange and Foreign Trade Control Law of Japan, and may be subject to export or import laws or regulations in U.S. or other countries. You are responsible for ensuring compliance with such laws and regulations relating to export or re-export of the products and technical information described herein. All company names, brand names and trademarks herein are property of their respective owners. Edited: Corporate Planning Department