(cid:31) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:4)(cid:6) (cid:4)(cid:7)(cid:8) (cid:9)(cid:10) (cid:11)(cid:12)(cid:11)(cid:7)(cid:8) (cid:1)(cid:13)(cid:14)(cid:9)(cid:15)(cid:16)(cid:17)(cid:2)(cid:18)(cid:18)(cid:19)(cid:14) (cid:20)(cid:21)(cid:7)(cid:5)(cid:4)(cid:5) (cid:14)(cid:15)(cid:18)(cid:19) (cid:22)(cid:20)(cid:15)(cid:8)(cid:19)(cid:20)(cid:23)(cid:20)(cid:19)(cid:16)(cid:19)(cid:15)(cid:8)(cid:19)(cid:20) (cid:24)(cid:15)(cid:9)(cid:17) ±(cid:25)(cid:11)(cid:7)(cid:26)(cid:8) (cid:19)(cid:21)(cid:22) (cid:27)(cid:17)(cid:28)(cid:1)(cid:29) (cid:30)(cid:20)(cid:10)(cid:9)(cid:19)(cid:16)(cid:9)(cid:15)(cid:10)(cid:18) SLLS349J − JUNE 1999 − REVISED MARCH 2004 (cid:1) RS-232 Bus-Pin ESD Protection Exceeds DB OR PW PACKAGE ±15 kV Using Human-Body Model (HBM) (TOP VIEW) (cid:1) Meets or Exceeds the Requirements of C2+ 1 28 C1+ TIA/EIA-232-F and ITU v.28 Standards GND 2 27 V+ (cid:1) Operates With 3-V to 5.5-V VCC Supply C2− 3 26 VCC (cid:1) Operates Up To 250 kbit/s V− 4 25 C1− (cid:1) Five Drivers and Three Receivers DOUT1 5 24 DIN1 (cid:1) Low Standby Current...1 µA Typical DOUT2 6 23 DIN2 DOUT3 7 22 DIN3 (cid:1) External Capacitors...4 × 0.1 µF RIN1 8 21 ROUT1 (cid:1) Accepts 5-V Logic Input With 3.3-V Supply RIN2 9 20 ROUT2 (cid:1) Always-Active Noninverting Receiver DOUT4 10 19 DIN4 Output (ROUT1B) RIN3 11 18 ROUT3 (cid:1) Alternative High-Speed Pin-Compatible DOUT5 12 17 DIN5 Device (1 Mbit/s) FORCEON 13 16 ROUT1B − SNx5C3238 FORCEOFF 14 15 INVALID (cid:1) Applications − Battery-Powered Systems, PDAs, Notebooks, Subnotebooks, Laptops, Palmtop PCs, Hand-Held Equipment, Modems, and Printers description/ordering information The MAX3238 consists of five line drivers, three line receivers, and a dual charge-pump circuit with ±15-kV ESD (HBM) protection pin to pin (serial-port connection pins, including GND). The device meets the requirements of TIA/EIA-232-F and provides the electrical interface between notebook and subnotebook computer applications. The charge pump and four small external capacitors allow operation from a single 3-V to 5.5-V supply. In addition, the device includes an always-active noninverting output (ROUT1B), which allows applications using the ring indicator to transmit data while the device is powered down. These devices operate at data signaling rates up to 250 kbit/s and a maximum of 30-V/µs driver output slew rate. ORDERING INFORMATION ORDERABLE TOP-SIDE TA PACKAGE† PART NUMBER MARKING Tube of 50 MAX3238CDB SSSSOOPP ((DDBB)) MMAAXX33223388CC Reel of 2000 MAX3238CDBR −−00°°CC ttoo 7700°°CC Tube of 50 MAX3238CPW TTSSSSOOPP ((PPWW)) MMAA33223388CC Reel of 2000 MAX3238CPWR Tube of 50 MAX3238IDB SSSSOOPP ((DDBB)) MMAAXX33223388II Reel of 2000 MAX3238IDBR −−4400°°CC ttoo 8855°°CC Tube of 50 MAX3238IPW TTSSSSOOPP ((PPWW)) MMBB33223388II Reel of 2000 MAX3238IPWR †Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet. (cid:30)(cid:20)(cid:10)(cid:22)(cid:13)(cid:16)(cid:9)(cid:15)(cid:10)(cid:18) (cid:22)(cid:2)(cid:9)(cid:2) !"#$%&’(!$" !) *+%%,"( ’) $# -+./!*’(!$" 0’(,(cid:12) Copyright  2004, Texas Instruments Incorporated (cid:30)%$0+*() *$"#$%& ($ )-,*!#!*’(!$") -,% (1, (,%&) $# (cid:9),2’) (cid:15)")(%+&,"() )(’"0’%0 3’%%’"(4(cid:12) (cid:30)%$0+*(!$" -%$*,))!"5 0$,) "$( ",*,))’%!/4 !"*/+0, (,)(!"5 $# ’// -’%’&,(,%)(cid:12) POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1

(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:4)(cid:6) (cid:31) (cid:4)(cid:7)(cid:8) (cid:9)(cid:10) (cid:11)(cid:12)(cid:11)(cid:7)(cid:8) (cid:1)(cid:13)(cid:14)(cid:9)(cid:15)(cid:16)(cid:17)(cid:2)(cid:18)(cid:18)(cid:19)(cid:14) (cid:20)(cid:21)(cid:7)(cid:5)(cid:4)(cid:5) (cid:14)(cid:15)(cid:18)(cid:19) (cid:22)(cid:20)(cid:15)(cid:8)(cid:19)(cid:20)(cid:23)(cid:20)(cid:19)(cid:16)(cid:19)(cid:15)(cid:8)(cid:19)(cid:20) (cid:24)(cid:15)(cid:9)(cid:17) ±(cid:25)(cid:11)(cid:7)(cid:26)(cid:8) (cid:19)(cid:21)(cid:22) (cid:27)(cid:17)(cid:28)(cid:1)(cid:29) (cid:30)(cid:20)(cid:10)(cid:9)(cid:19)(cid:16)(cid:9)(cid:15)(cid:10)(cid:18) SLLS349J − JUNE 1999 − REVISED MARCH 2004 description/ordering information (continued) Flexible control options for power management are featured when the serial port and driver inputs are inactive. The auto-powerdown plus feature functions when FORCEON is low and FORCEOFF is high. During this mode of operation, if the device does not sense valid signal transitions on all receiver and driver inputs for approximately 30 s, the built-in charge pump and drivers are powered down, reducing the supply current to 1 µA. By disconnecting the serial port or placing the peripheral drivers off, auto-powerdown plus occurs if there is no activity in the logic levels for the driver inputs. Auto-powerdown plus can be disabled when FORCEON and FORCEOFF are high. With auto-powerdown plus enabled, the device activates automatically when a valid signal is applied to any receiver or driver input. INVALID is high (valid data) if any receiver input voltage is greater than 2.7 V or less than −2.7 V, or has been between −0.3 V and 0.3 V for less than 30 µs. INVALID is low (invalid data) if all receiver input voltages are between −0.3 V and 0.3 V for more than 30 µs. Refer to Figure 5 for receiver input levels. Function Tables EACH DRIVER INPUTS OOUUTTPPUUTT TIME ELAPSED SINCE LAST DRIVER STATUS DIN FORCEON FORCEOFF DOUT RIN OR DIN TRANSITION X X L X Z Powered off L H H X H NNoorrmmaall ooppeerraattiioonn wwiitthh H H H X L auto-powerdown plus disabled L L H <30 s H NNoorrmmaall ooppeerraattiioonn wwiitthh H L H <30 s L auto-powerdown plus enabled L L H >30 s Z PPoowweerreedd ooffff bbyy H L H >30 s Z auto-powerdown plus feature H = high level, L = low level, X = irrelevant, Z = high impedance EACH RECEIVER INPUTS OUTPUTS TIME ELAPSED SINCE LAST RIN RECEIVER STATUS RIN1 RIN2−RIN3 FORCEOFF ROUT1B ROUT OR DIN TRANSITION L X L X L Z PPoowweerreedd ooffff wwhhiillee H X L X H Z ROUT1B is active L L H <30 s L H L H H <30 s L L NNoorrmmaall ooppeerraattiioonn wwiitthh H L H <30 s H H aauuttoo--ppoowweerrddoowwnn pplluuss ddiissaabblleedd//eennaabblleedd H H H <30 s H L Open Open H >30 s L H H = high level, L = low level, X = irrelevant, Z = high impedance (off), Open = input disconnected or connected driver off 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

(cid:31) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:4)(cid:6) (cid:4)(cid:7)(cid:8) (cid:9)(cid:10) (cid:11)(cid:12)(cid:11)(cid:7)(cid:8) (cid:1)(cid:13)(cid:14)(cid:9)(cid:15)(cid:16)(cid:17)(cid:2)(cid:18)(cid:18)(cid:19)(cid:14) (cid:20)(cid:21)(cid:7)(cid:5)(cid:4)(cid:5) (cid:14)(cid:15)(cid:18)(cid:19) (cid:22)(cid:20)(cid:15)(cid:8)(cid:19)(cid:20)(cid:23)(cid:20)(cid:19)(cid:16)(cid:19)(cid:15)(cid:8)(cid:19)(cid:20) (cid:24)(cid:15)(cid:9)(cid:17) ±(cid:25)(cid:11)(cid:7)(cid:26)(cid:8) (cid:19)(cid:21)(cid:22) (cid:27)(cid:17)(cid:28)(cid:1)(cid:29) (cid:30)(cid:20)(cid:10)(cid:9)(cid:19)(cid:16)(cid:9)(cid:15)(cid:10)(cid:18) SLLS349J − JUNE 1999 − REVISED MARCH 2004 logic diagram (positive logic) 24 5 DIN1 DOUT1 23 6 DIN2 DOUT2 22 7 DIN3 DOUT3 19 10 DIN4 DOUT4 17 12 DIN5 DOUT5 14 FORCEOFF Auto-powerdown 15 INVALID 13 Plus FORCEON 16 ROUT1B 21 8 ROUT1 RIN1 20 9 ROUT2 RIN2 18 11 ROUT3 RIN3 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3

(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:4)(cid:6) (cid:31) (cid:4)(cid:7)(cid:8) (cid:9)(cid:10) (cid:11)(cid:12)(cid:11)(cid:7)(cid:8) (cid:1)(cid:13)(cid:14)(cid:9)(cid:15)(cid:16)(cid:17)(cid:2)(cid:18)(cid:18)(cid:19)(cid:14) (cid:20)(cid:21)(cid:7)(cid:5)(cid:4)(cid:5) (cid:14)(cid:15)(cid:18)(cid:19) (cid:22)(cid:20)(cid:15)(cid:8)(cid:19)(cid:20)(cid:23)(cid:20)(cid:19)(cid:16)(cid:19)(cid:15)(cid:8)(cid:19)(cid:20) (cid:24)(cid:15)(cid:9)(cid:17) ±(cid:25)(cid:11)(cid:7)(cid:26)(cid:8) (cid:19)(cid:21)(cid:22) (cid:27)(cid:17)(cid:28)(cid:1)(cid:29) (cid:30)(cid:20)(cid:10)(cid:9)(cid:19)(cid:16)(cid:9)(cid:15)(cid:10)(cid:18) SLLS349J − JUNE 1999 − REVISED MARCH 2004 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 6 V CC Positive output supply voltage range, V+ (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 7 V Negative output supply voltage range, V− (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to −7 V Supply voltage difference, V+ − V− (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 V Input voltage range, V: Driver (FORCEOFF, FORCEON) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 6 V I Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −25 V to 25 V Output voltage range, V : Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −13.2 V to 13.2 V O Receiver (INVALID) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to V + 0.3 V CC Package thermal impedance, θ (see Notes 2 and 3): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . 62°C/W JA PW package . . . . . . . . . . . . . . . . . . . . . . . . . . 62°C/W Operating virtual junction temperature, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C J Storage temperature range, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C stg †Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltages are with respect to network GND. 2. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable ambient temperature is PD = (TJ(max) − TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability. 3. The package thermal impedance is calculated in accordance with JESD 51-7. recommended operating conditions (see Note 4 and Figure 6) MIN NOM MAX UNIT VCC = 3.3 V 3 3.3 3.6 SSuuppppllyy vvoollttaaggee VV VCC = 5 V 4.5 5 5.5 VCC = 3.3 V 2 VVIIHH DDrriivveerr aanndd ccoonnttrrooll hhiigghh--lleevveell iinnppuutt vvoollttaaggee DDIINN,, FFOORRCCEEOOFFFF,, FFOORRCCEEOONN VV VCC = 5 V 2.4 VIL Driver and control low-level input voltage DIN, FORCEOFF, FORCEON 0.8 V VI Driver and control input voltage DIN, FORCEOFF, FORCEON 0 5.5 V VI Receiver input voltage −25 25 V MAX3238C 0 70 TTAA OOppeerraattiinngg ffrreeee--aaiirr tteemmppeerraattuurree °°CC MAX3238I −40 85 NOTE 4: Testing supply conditions are C1−C4 = 0.1 µF at VCC = 3.3 V ±0.15 V; C1−C4 = 0.22 µF at VCC = 3.3 V ±0.3 V; and C1 = 0.047 µF and C2−C4 = 0.33 µF at VCC = 5 V ±0.5 V. electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Note 4 and Figure 6) PARAMETER TEST CONDITIONS MIN TYP‡ MAX UNIT II Input leakage current FORCEOFF, FORCEON ±0.01 ±1 µA Auto-powerdown plus No load, 0.5 2 mA disabled FORCEOFF and FORCEON at VCC SSuuppppllyy ccuurrrreenntt Powered off No load, FORCEOFF at GND 1 10 IICCCC ((TTA == 2255°CC)) Auto-powerdown plus No load, FORCEOFF at VCC, µA FORCEON at GND, 1 10 enabled All RIN are open or grounded ‡All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C. NOTE 4: Testing supply conditions are C1−C4 = 0.1 µF at VCC = 3.3 V ±0.15 V; C1−C4 = 0.22 µF at VCC = 3.3 V ±0.3 V; and C1 = 0.047 µF and C2−C4 = 0.33 µF at VCC = 5 V ±0.5 V. 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

(cid:31) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:4)(cid:6) (cid:4)(cid:7)(cid:8) (cid:9)(cid:10) (cid:11)(cid:12)(cid:11)(cid:7)(cid:8) (cid:1)(cid:13)(cid:14)(cid:9)(cid:15)(cid:16)(cid:17)(cid:2)(cid:18)(cid:18)(cid:19)(cid:14) (cid:20)(cid:21)(cid:7)(cid:5)(cid:4)(cid:5) (cid:14)(cid:15)(cid:18)(cid:19) (cid:22)(cid:20)(cid:15)(cid:8)(cid:19)(cid:20)(cid:23)(cid:20)(cid:19)(cid:16)(cid:19)(cid:15)(cid:8)(cid:19)(cid:20) (cid:24)(cid:15)(cid:9)(cid:17) ±(cid:25)(cid:11)(cid:7)(cid:26)(cid:8) (cid:19)(cid:21)(cid:22) (cid:27)(cid:17)(cid:28)(cid:1)(cid:29) (cid:30)(cid:20)(cid:10)(cid:9)(cid:19)(cid:16)(cid:9)(cid:15)(cid:10)(cid:18) SLLS349J − JUNE 1999 − REVISED MARCH 2004 DRIVER SECTION electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Note 4 and Figure 6) PARAMETER TEST CONDITIONS MIN TYP† MAX UNIT VOH High-level output voltage All DOUT at RL = 3 kΩ to GND 5 5.4 V VOL Low-level output voltage All DOUT at RL = 3 kΩ to GND −5 −5.4 V IIH High-level input current VI = VCC ±0.01 ±1 µA IIL Low-level input current VI at GND ±0.01 ±1 µA VCC = 3.6 V, VO = 0 V ±35 ±60 IIOOSS SShhoorrtt--cciirrccuuiitt oouuttppuutt ccuurrrreenntt‡‡ VCC = 5.5 V, VO = 0 V ±40 ±100 mmAA ro Output resistance VCC, V+, and V− = 0 V, VO = ±2 V 300 10M Ω VO = ±12 V, VCC = 3 V to 3.6 V ±25 IIooffff OOuuttppuutt lleeaakkaaggee ccuurrrreenntt FFOORRCCEEOOFFFF == GGNNDD VO = ±10 V, VCC = 4.5 V to 5.5 V ±25 µµAA †All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C. ‡Short-circuit durations should be controlled to prevent exceeding the device absolute power-dissipation ratings, and not more than one output should be shorted at a time. NOTE 4: Testing supply conditions are C1−C4 = 0.1 µF at VCC = 3.3 V ±0.15 V; C1−C4 = 0.22 µF at VCC = 3.3 V ±0.3 V; and C1 = 0.047 µF and C2−C4 = 0.33 µF at VCC = 5 V ±0.5 V. switching characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Note 4 and Figure 6) PARAMETER TEST CONDITIONS MIN TYP† MAX UNIT CL = 1000 pF, RL = 3 kΩ, Maximum data rate 150 250 kbit/s One DOUT switching, See Figure 1 tsk(p) Pulse skew§ CL = 150 pF to 2500 pF RSeLe = F 3ig kuΩre t o2 7 kΩ, 100 ns SSRR((ttrr)) SSlleeww rraattee,, ttrraannssiittiioonn rreeggiioonn VVCCCC == 33..33 VV,, CL = 150 pF to 1000 pF 6 30 VV//µµss (see Figure 1) RL = 3 kΩ to 7 kΩ CL = 150 pF to 2500 pF 4 30 †All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C. §Pulse skew is defined as |tPLH − tPHL| of each channel of the same device. NOTE 4: Testing supply conditions are C1−C4 = 0.1 µF at VCC = 3.3 V ±0.15 V; C1−C4 = 0.22 µF at VCC = 3.3 V ±0.3 V; and C1 = 0.047 µF and C2−C4 = 0.33 µF at VCC = 5 V ±0.5 V. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5

(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:4)(cid:6) (cid:31) (cid:4)(cid:7)(cid:8) (cid:9)(cid:10) (cid:11)(cid:12)(cid:11)(cid:7)(cid:8) (cid:1)(cid:13)(cid:14)(cid:9)(cid:15)(cid:16)(cid:17)(cid:2)(cid:18)(cid:18)(cid:19)(cid:14) (cid:20)(cid:21)(cid:7)(cid:5)(cid:4)(cid:5) (cid:14)(cid:15)(cid:18)(cid:19) (cid:22)(cid:20)(cid:15)(cid:8)(cid:19)(cid:20)(cid:23)(cid:20)(cid:19)(cid:16)(cid:19)(cid:15)(cid:8)(cid:19)(cid:20) (cid:24)(cid:15)(cid:9)(cid:17) ±(cid:25)(cid:11)(cid:7)(cid:26)(cid:8) (cid:19)(cid:21)(cid:22) (cid:27)(cid:17)(cid:28)(cid:1)(cid:29) (cid:30)(cid:20)(cid:10)(cid:9)(cid:19)(cid:16)(cid:9)(cid:15)(cid:10)(cid:18) SLLS349J − JUNE 1999 − REVISED MARCH 2004 RECEIVER SECTION electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Note 4 and Figure 6) PARAMETER TEST CONDITIONS MIN TYP† MAX UNIT VOH High-level output voltage IOH = −1 mA VCC−0.6 V VCC−0.1 V V VOL Low-level output voltage IOL = 1.6 mA 0.4 V VCC = 3.3 V 1.5 2.4 VVIITT++ PPoossiittiivvee--ggooiinngg iinnppuutt tthhrreesshhoolldd vvoollttaaggee VV VCC = 5 V 1.8 2.4 VCC = 3.3 V 0.6 1.2 VVIITT−− NNeeggaattiivvee--ggooiinngg iinnppuutt tthhrreesshhoolldd vvoollttaaggee VV VCC = 5 V 0.8 1.5 Vhys Input hysteresis (VIT+ − VIT−) 0.3 V Ioff Output leakage current (except ROUT1B) FORCEOFF = 0 V ±0.05 ±10 µA ri Input resistance VI = ±3 V to ±25 V 3 5 7 kΩ †All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C. NOTE 4: Testing supply conditions are C1−C4 = 0.1 µF at VCC = 3.3 V ±0.15 V; C1−C4 = 0.22 µF at VCC = 3.3 V ±0.3 V; and C1 = 0.047 µF and C2−C4 = 0.33 µF at VCC = 5 V ±0.5 V. switching characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Note 4) PARAMETER TEST CONDITIONS MIN TYP† MAX UNIT tPLH Propagation delay time, low- to high-level output 150 ns CCLL == 115500 ppFF,, SSeeee FFiigguurree 33 tPHL Propagation delay time, high- to low-level output 150 ns ten Output enable time 200 ns CCLL == 115500 ppFF,, RRLL == 33 kkΩΩ, SSeeee FFiigguurree 44 tdis Output disable time 200 ns tsk(p) Pulse skew‡ See Figure 3 50 ns †All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C. ‡Pulse skew is defined as |tPLH − tPHL| of each channel of the same device. NOTE 4: Testing supply conditions are C1−C4 = 0.1 µF at VCC = 3.3 V ±0.15 V; C1−C4 = 0.22 µF at VCC = 3.3 V ±0.3 V; and C1 = 0.047 µF and C2−C4 = 0.33 µF at VCC = 5 V ±0.5 V. 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

(cid:31) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:4)(cid:6) (cid:4)(cid:7)(cid:8) (cid:9)(cid:10) (cid:11)(cid:12)(cid:11)(cid:7)(cid:8) (cid:1)(cid:13)(cid:14)(cid:9)(cid:15)(cid:16)(cid:17)(cid:2)(cid:18)(cid:18)(cid:19)(cid:14) (cid:20)(cid:21)(cid:7)(cid:5)(cid:4)(cid:5) (cid:14)(cid:15)(cid:18)(cid:19) (cid:22)(cid:20)(cid:15)(cid:8)(cid:19)(cid:20)(cid:23)(cid:20)(cid:19)(cid:16)(cid:19)(cid:15)(cid:8)(cid:19)(cid:20) (cid:24)(cid:15)(cid:9)(cid:17) ±(cid:25)(cid:11)(cid:7)(cid:26)(cid:8) (cid:19)(cid:21)(cid:22) (cid:27)(cid:17)(cid:28)(cid:1)(cid:29) (cid:30)(cid:20)(cid:10)(cid:9)(cid:19)(cid:16)(cid:9)(cid:15)(cid:10)(cid:18) SLLS349J − JUNE 1999 − REVISED MARCH 2004 AUTO-POWERDOWN PLUS SECTION electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 5) PARAMETER TEST CONDITIONS MIN TYP† MAX UNIT Receiver input threshold FORCEON = GND, VT+(valid) for INVALID high-level output voltage FORCEOFF = VCC 2.7 V Receiver input threshold FORCEON = GND, VT−(valid) for INVALID high-level output voltage FORCEOFF = VCC −2.7 V Receiver input threshold FORCEON = GND, VT(invalid) for INVALID low-level output voltage FORCEOFF = VCC −0.3 0.3 V IOH = −1 mA, FORCEON = GND, VOH INVALID high-level output voltage FORCEOFF = VCC VCC−0.6 V IOL = 1.6 mA, FORCEON = GND, VOL INVALID low-level output voltage FORCEOFF = VCC 0.4 V †All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C. switching characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 5) PARAMETER MIN TYP† MAX UNIT tvalid Propagation delay time, low- to high-level output 0.1 µs tinvalid Propagation delay time, high- to low-level output 50 µs ten Supply enable time 25 µs tdis Receiver or driver edge to auto-powerdown plus 15 30 60 s †All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C. PARAMETER MEASUREMENT INFORMATION 3 V Input RS-232 0 V Output Generator (see Note B) 50 Ω CL tTHL tTLH RL (see Note A) VOH 3 V 3 V 3 V Output FORCEOFF −3 V −3 V VOL SR(tr)(cid:1) 6V t ort TEST CIRCUIT THL TLH VOLTAGE WAVEFORMS NOTES: A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: PRR = 250 kbit/s, ZO = 50 Ω, 50% duty cycle, tr ≤10 ns, tf ≤ 10 ns. Figure 1. Driver Slew Rate POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7

(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:4)(cid:6) (cid:31) (cid:4)(cid:7)(cid:8) (cid:9)(cid:10) (cid:11)(cid:12)(cid:11)(cid:7)(cid:8) (cid:1)(cid:13)(cid:14)(cid:9)(cid:15)(cid:16)(cid:17)(cid:2)(cid:18)(cid:18)(cid:19)(cid:14) (cid:20)(cid:21)(cid:7)(cid:5)(cid:4)(cid:5) (cid:14)(cid:15)(cid:18)(cid:19) (cid:22)(cid:20)(cid:15)(cid:8)(cid:19)(cid:20)(cid:23)(cid:20)(cid:19)(cid:16)(cid:19)(cid:15)(cid:8)(cid:19)(cid:20) (cid:24)(cid:15)(cid:9)(cid:17) ±(cid:25)(cid:11)(cid:7)(cid:26)(cid:8) (cid:19)(cid:21)(cid:22) (cid:27)(cid:17)(cid:28)(cid:1)(cid:29) (cid:30)(cid:20)(cid:10)(cid:9)(cid:19)(cid:16)(cid:9)(cid:15)(cid:10)(cid:18) SLLS349J − JUNE 1999 − REVISED MARCH 2004 PARAMETER MEASUREMENT INFORMATION 3 V RS-232 Input 1.5 V 1.5 V Output 0 V Generator 50 Ω (see Note B) CL tPHL tPLH RL (see Note A) VOH 3 V Output 50% 50% FORCEOFF VOL TEST CIRCUIT VOLTAGE WAVEFORMS NOTES: A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: PRR = 250 kbit/s, ZO = 50 Ω, 50% duty cycle, tr ≤10 ns, tf ≤ 10 ns. Figure 2. Driver Pulse Skew 3 V or 0 V 3 V FORCEON Input 1.5 V 1.5 V −3 V Output Generator 50 Ω tPHL tPLH (see Note B) CL (see Note A) 3 V VOH FORCEOFF Output 50% 50% VOL TEST CIRCUIT VOLTAGE WAVEFORMS NOTES: A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. Figure 3. Receiver Propagation Delay Times 3 V Input VCC GND 1.5 V 1.5 V 3 V or 0 V S1 0 V FORCEON tPHZ RL (S1 at GND) 3 V or 0 V Output VOH Output 50% CL 0.3 V (see Note A) FORCEOFF tPLZ tPZL Generator (S1 at VCC) (S1 at VCC) 50 Ω (see Note B) 0.3 V Output 50% VOL TEST CIRCUIT VOLTAGE WAVEFORMS NOTES: A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. C. tPLZ and tPHZ are the same as tdis. D. tPZL and tPZH are the same as ten. Figure 4. Receiver Enable and Disable Times 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

(cid:31) (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:4)(cid:6) (cid:4)(cid:7)(cid:8) (cid:9)(cid:10) (cid:11)(cid:12)(cid:11)(cid:7)(cid:8) (cid:1)(cid:13)(cid:14)(cid:9)(cid:15)(cid:16)(cid:17)(cid:2)(cid:18)(cid:18)(cid:19)(cid:14) (cid:20)(cid:21)(cid:7)(cid:5)(cid:4)(cid:5) (cid:14)(cid:15)(cid:18)(cid:19) (cid:22)(cid:20)(cid:15)(cid:8)(cid:19)(cid:20)(cid:23)(cid:20)(cid:19)(cid:16)(cid:19)(cid:15)(cid:8)(cid:19)(cid:20) (cid:24)(cid:15)(cid:9)(cid:17) ±(cid:25)(cid:11)(cid:7)(cid:26)(cid:8) (cid:19)(cid:21)(cid:22) (cid:27)(cid:17)(cid:28)(cid:1)(cid:29) (cid:30)(cid:20)(cid:10)(cid:9)(cid:19)(cid:16)(cid:9)(cid:15)(cid:10)(cid:18) SLLS349J − JUNE 1999 − REVISED MARCH 2004 PARAMETER MEASUREMENT INFORMATION Valid RS-232 Level, INVALID High ÎÎÎÎÎÎÎÎÎÎÎÎ ROUT 2.7 V Generator ÎÎÎÎÎÎÎÎÎÎÎÎ (see Note B) 50 Ω Indeterminate ÎÎÎÎÎÎÎÎÎÎÎÎ 0.3 V If Signal Remains Within This Region 0 V For More Than 30 µs, INVALID Is Low† −0.3 VÎÎÎÎÎÎÎÎÎÎÎÎ Auto- ÎÎÎÎInÎdetÎermÎinateÎÎÎÎÎ INVALID powerdown −2.7 VÎÎÎÎÎÎÎÎÎÎÎÎ Plus CL = 30 pF Valid RS-232 Level, INVALID High (see Note A) FORCEOFF †Auto-powerdown plus disables drivers and reduces supply current to 1 µA. DIN DOUT FORCEON TEST CIRCUIT NOTES: A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: PRR = 5 kbit/s, ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. 3 V 2.7 V Receiver 0 V Input 0 V −2.7 V −3 V tinvalid tvalid INVALID VCC Output 50% 50% 0 V 3 V to 5 V Driver Input 50% 50% 0 V ≈5.5 V Driver Output ≈ −5.5 V tdis ten tdis ten V+ V+ V+ −0.3 V Supply Voltages V− +0.3 V V− V− Voltage Waveforms and Timing Diagrams Figure 5. INVALID Propagation-Delay Times and Supply-Enabling Time POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9

(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:4)(cid:6) (cid:31) (cid:4)(cid:7)(cid:8) (cid:9)(cid:10) (cid:11)(cid:12)(cid:11)(cid:7)(cid:8) (cid:1)(cid:13)(cid:14)(cid:9)(cid:15)(cid:16)(cid:17)(cid:2)(cid:18)(cid:18)(cid:19)(cid:14) (cid:20)(cid:21)(cid:7)(cid:5)(cid:4)(cid:5) (cid:14)(cid:15)(cid:18)(cid:19) (cid:22)(cid:20)(cid:15)(cid:8)(cid:19)(cid:20)(cid:23)(cid:20)(cid:19)(cid:16)(cid:19)(cid:15)(cid:8)(cid:19)(cid:20) (cid:24)(cid:15)(cid:9)(cid:17) ±(cid:25)(cid:11)(cid:7)(cid:26)(cid:8) (cid:19)(cid:21)(cid:22) (cid:27)(cid:17)(cid:28)(cid:1)(cid:29) (cid:30)(cid:20)(cid:10)(cid:9)(cid:19)(cid:16)(cid:9)(cid:15)(cid:10)(cid:18) SLLS349J − JUNE 1999 − REVISED MARCH 2004 APPLICATION INFORMATION + CBYPASS = 0.1 µF − 28 1 C1+ C2+ 27 V+ + 2 + C2 − GND − C3† + C1 3 C2− VCC 26 − 4 − V− C1− 25 C4 + 5 24 DOUT1 DIN1 6 23 DOUT2 DIN2 7 22 DOUT3 DIN3 8 21 RIN1 ROUT1 RS-232 Port 9 20 RIN2 ROUT2 Logic I/Os 5 kΩ 10 19 DOUT4 DIN4 11 18 RIN3 ROUT3 5 kΩ 12 17 DOUT5 DIN5 16 ROUT1B 5 kΩ Auto- 13 powerdown 15 FORCEON 14 Plus INVALID FORCEOFF VCC vs CAPACITOR VALUES VCC C1 C2, C3, and C4 †C3 can be connected to VCC or GND. NOTES: A. Resistor values shown are nominal. 3.3 V ± 0.15 V 0.1 µF 0.1 µF B. Nonpolarized ceramic capacitors are acceptable. If polarized 3.3 V ± 0.3 V 0.22 µF 0.22 µF tantalum or electrolytic capacitors are used, they should be connected 5 V ± 0.5 V 0.047 µF 0.33 µF as shown. 3 V to 5.5 V 0.22 µF 1 µF Figure 6. Typical Operating Circuit and Capacitor Values 10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PACKAGE OPTION ADDENDUM www.ti.com 24-Aug-2018 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) MAX3238CDB ACTIVE SSOP DB 28 50 Green (RoHS CU NIPDAU Level-1-260C-UNLIM 0 to 70 MAX3238C & no Sb/Br) MAX3238CDBR ACTIVE SSOP DB 28 2000 Green (RoHS CU NIPDAU Level-1-260C-UNLIM 0 to 70 MAX3238C & no Sb/Br) MAX3238CDBRE4 ACTIVE SSOP DB 28 2000 Green (RoHS CU NIPDAU Level-1-260C-UNLIM 0 to 70 MAX3238C & no Sb/Br) MAX3238CPW ACTIVE TSSOP PW 28 50 Green (RoHS CU NIPDAU Level-1-260C-UNLIM 0 to 70 MA3238C & no Sb/Br) MAX3238CPWR ACTIVE TSSOP PW 28 2000 Green (RoHS CU NIPDAU Level-1-260C-UNLIM 0 to 70 MA3238C & no Sb/Br) MAX3238CPWRG4 ACTIVE TSSOP PW 28 2000 Green (RoHS CU NIPDAU Level-1-260C-UNLIM 0 to 70 MA3238C & no Sb/Br) MAX3238IDB ACTIVE SSOP DB 28 50 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 MAX3238I & no Sb/Br) MAX3238IDBR ACTIVE SSOP DB 28 2000 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 MAX3238I & no Sb/Br) MAX3238IPW ACTIVE TSSOP PW 28 50 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 MB3238I & no Sb/Br) MAX3238IPWR ACTIVE TSSOP PW 28 2000 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 MB3238I & no Sb/Br) MAX3238IPWRG4 ACTIVE TSSOP PW 28 2000 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 MB3238I & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 24-Aug-2018 (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF MAX3238 : •Automotive: MAX3238-Q1 NOTE: Qualified Version Definitions: •Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 15-Jul-2018 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) MAX3238CDBR SSOP DB 28 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1 MAX3238CPWR TSSOP PW 28 2000 330.0 16.4 6.9 10.2 1.8 12.0 16.0 Q1 MAX3238IDBR SSOP DB 28 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1 MAX3238IPWR TSSOP PW 28 2000 330.0 16.4 6.9 10.2 1.8 12.0 16.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 15-Jul-2018 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) MAX3238CDBR SSOP DB 28 2000 367.0 367.0 38.0 MAX3238CPWR TSSOP PW 28 2000 367.0 367.0 38.0 MAX3238IDBR SSOP DB 28 2000 367.0 367.0 38.0 MAX3238IPWR TSSOP PW 28 2000 367.0 367.0 38.0 PackMaterials-Page2

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PACKAGE OUTLINE DB0028A SSOP - 2 mm max height SCALE 1.500 SMALL OUTLINE PACKAGE C 8.2 TYP 7.4 A 0.1 C PIN 1 INDEX AREA SEATING PLANE 26X 0.65 28 1 2X 10.5 8.45 9.9 NOTE 3 14 15 0.38 28X 0.22 5.6 0.15 C A B B 5.0 NOTE 4 2 MAX 0.25 (0.15) TYP SEE DETAIL A GAGE PLANE 0 -8 0.95 0.05 MIN 0.55 DETA 15AIL A TYPICAL 4214853/B 03/2018 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side. 5. Reference JEDEC registration MO-150. www.ti.com

EXAMPLE BOARD LAYOUT DB0028A SSOP - 2 mm max height SMALL OUTLINE PACKAGE 28X (1.85) SYMM (R0.05) TYP 1 28X (0.45) 28 26X (0.65) SYMM 14 15 (7) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE: 10X SOLDER MASK METAL METAL UNDER SOLDER MASK OPENING SOLDER MASK OPENING EXPOSED METAL EXPOSED METAL 0.07 MAX 0.07 MIN ALL AROUND ALL AROUND NON-SOLDER MASK SOLDER MASK DEFINED DEFINED (PREFERRED) SOLDE15.000 R MASK DETAILS 4214853/B 03/2018 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN DB0028A SSOP - 2 mm max height SMALL OUTLINE PACKAGE 28X (1.85) SYMM (R0.05) TYP 1 28X (0.45) 28 26X (0.65) SYMM 14 15 (7) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE: 10X 4214853/B 03/2018 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com

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