Product Sample & Technical Tools & Support & Folder Buy Documents Software Community MAX202 SLLS576F–JULY2003–REVISEDSETPEMBER2016 MAX202 5-V Dual RS-232 Line Driver and Receiver With ±15-kV ESD Protection 1 Features 3 Description • MeetsorExceedstheRequirementsof The MAX202 device consists of two line drivers, two 1 line receivers, and a dual charge-pump circuit with TIA/EIA-232-FandITUv.28Standards ±15-kV ESD protection pin to pin (serial-port • ESDProtectionforRS-232BusPins: ±15-kV connection pins, including GND). The device meets Human-BodyModel the requirements of TIA/EIA-232-F and provides the • Operatesat5-VV Supply electrical interface between an asynchronous CC communication controller and the serial-port • OperatesUpto120kbit/s connector. The charge pump and four small external • TwoDriversandTwoReceivers capacitors allow operation from a single 5-V supply. • Latch-UpPerformanceExceeds100mAPer The device operates at data signaling rates up to JESD78,ClassII 120 kbit/s and a maximum of 30-V/µs driver output slewrate. 2 Applications DeviceInformation(1) • Battery-PoweredSystems PARTNUMBER PACKAGE BODYSIZE(NOM) • Notebooks MAX202CD SOIC(16) 9.90mm×3.91mm • Laptops MAX202ID • PalmtopPCs MAX202CDW SOICWIDE(16) 10.30mm×7.50mm MAX202IDW • Hand-HeldEquipment MAX202CPW TSSOP(16) 5.00mmx4.40mm MAX202IPW (1) For all available packages, see the orderable addendum at theendofthedatasheet. BlockDiagram 5 V POWER 2 2 DOUT DIN TX RS-232 120 kb/s 15 kV HBM 2 2 RIN ROUT RX RS-232 Copyright © 2016,Texas Instruments Incorporated 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA.

MAX202 SLLS576F–JULY2003–REVISEDSETPEMBER2016 www.ti.com Table of Contents 1 Features.................................................................. 1 8.3 FeatureDescription...................................................8 2 Applications........................................................... 1 8.4 DeviceFunctionalModes..........................................8 3 Description............................................................. 1 9 ApplicationandImplementation........................ 10 4 RevisionHistory..................................................... 2 9.1 ApplicationInformation............................................10 9.2 TypicalApplication..................................................10 5 PinConfigurationandFunctions......................... 3 10 PowerSupplyRecommendations..................... 13 6 Specifications......................................................... 4 11 Layout................................................................... 13 6.1 AbsoluteMaximumRatings......................................4 6.2 ESDRatings..............................................................4 11.1 LayoutGuidelines ................................................13 6.3 RecommendedOperatingConditions.......................4 11.2 LayoutExample....................................................13 6.4 ThermalInformation..................................................4 12 DeviceandDocumentationSupport................. 14 6.5 ElectricalCharacteristics...........................................5 12.1 ReceivingNotificationofDocumentationUpdates14 6.6 SwitchingCharacteristics..........................................5 12.2 CommunityResources..........................................14 6.7 TypicalCharacteristics .............................................6 12.3 Trademarks...........................................................14 7 ParameterMeasurementInformation..................7 12.4 ElectrostaticDischargeCaution............................14 12.5 Glossary................................................................14 8 DetailedDescription.............................................. 8 13 Mechanical,Packaging,andOrderable 8.1 Overview...................................................................8 Information........................................................... 14 8.2 FunctionalBlockDiagram.........................................8 4 Revision History NOTE:Pagenumbersforpreviousrevisionsmaydifferfrompagenumbersinthecurrentversion. ChangesfromRevisionE(April2007)toRevisionF Page • AddedESDRatingstable,FeatureDescriptionsection,DeviceFunctionalModes,ApplicationandImplementation section,PowerSupplyRecommendationssection,Layoutsection,DeviceandDocumentationSupportsection,and Mechanical,Packaging,andOrderableInformationsection.................................................................................................. 1 • RemovedtheOrderingInformationtable;seePOAattheendofthedatasheet................................................................. 1 • ChangedvaluesintheThermalInformationtabletoalignwithJEDECstandards................................................................ 4 2 SubmitDocumentationFeedback Copyright©2003–2016,TexasInstrumentsIncorporated ProductFolderLinks:MAX202

MAX202 www.ti.com SLLS576F–JULY2003–REVISEDSETPEMBER2016 5 Pin Configuration and Functions D,DW,orPWPackage 16-PinSOICorTSSOP TopView C1+ 1 16 VCC V+ 2 15 GND C1– 3 14 DOUT1 C2+ 4 13 RIN1 C2– 5 12 ROUT1 V– 6 11 DIN1 DOUT2 7 10 DIN2 RIN2 8 9 ROUT2 Not to scale PinFunctions PIN I/O DESCRIPTION NO. NAME 1 C1+ — PositiveleadofC1capacitor 2 V+ O Positivechargepumpoutputforstoragecapacitoronly 3 C1– — NegativeleadofC1capacitor 4 C2+ — PositiveleadofC2capacitor 5 C2– — NegativeleadofC2capacitor 6 V– O Negativechargepumpoutputforstoragecapacitoronly 7 DOUT2 O RS-232linedataoutput(toremoteRS-232system) 8 RIN2 I RS-232linedatainput(fromremoteRS-232system) 9 ROUT2 O Logicdataoutput(toUART) 10 DIN2 I Logicdatainput(fromUART) 11 DIN1 I Logicdatainput(fromUART) 12 ROUT1 O Logicdataoutput(toUART) 13 RIN1 I RS-232linedatainput(fromremoteRS-232system) 14 DOUT1 O RS-232linedataoutput(toremoteRS-232system) 15 GND — Ground 16 V — Supplyvoltage,connecttoexternal5-Vpowersupply CC Copyright©2003–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:MAX202

MAX202 SLLS576F–JULY2003–REVISEDSETPEMBER2016 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings overoperatingfree-airtemperaturerange(unlessotherwisenoted)(1) MIN MAX UNIT Supplyvoltage,V (2) –0.3 6 V CC Positivechargepumpvoltage,V+(2) V –0.3 14 V CC Negativechargepumpvoltage,V–(2) –14 0.3 V Drivers –0.3 V++0.3 Inputvoltage,V V I Receivers ±30 Drivers V––0.3 V++0.3 Outputvoltage,V V O Receivers –0.3 V +0.3 CC Short-circuitduration,D Continuous OUT Operatingjunctiontemperature,T 150 °C J Storagetemperature,T –65 150 °C stg (1) StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thesearestressratings only,whichdonotimplyfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderRecommended OperatingConditions.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. (2) AllvoltagesarewithrespecttonetworkGND. 6.2 ESD Ratings VALUE UNIT Pins7,8,13,and14 ±15000 Electrostatic Human-bodymodel(HBM),perANSI/ESDA/JEDECJS-001(1) V Allotherpins ±2000 V (ESD) discharge Charged-devicemodel(CDM),perJEDECspecificationJESD22-C101(2) ±1500 (1) JEDECdocumentJEP155statesthat500-VHBMallowssafemanufacturingwithastandardESDcontrolprocess. (2) JEDECdocumentJEP157statesthat250-VCDMallowssafemanufacturingwithastandardESDcontrolprocess. 6.3 Recommended Operating Conditions overoperatingfree-airtemperaturerange(unlessotherwisenoted(1);seeFigure10) MIN NOM MAX UNIT Supplyvoltage 4.5 5 5.5 V V Driverhigh-levelinputvoltage(D ) 2 V IH IN V Driverlow-levelinputvoltage(D ) 0.8 V IL IN Driverinputvoltage(D ) 0 5.5 IN V V I Receiverinputvoltage –30 30 MAX202C 0 70 T Operatingfree-airtemperature °C A MAX202I –40 85 (1) TestconditionsareC1–C4=0.1µFatV =5V±0.5V. CC 6.4 Thermal Information MAX202 THERMALMETRIC(1) D(SOIC) DW(SOIC) PW(TSSOP) UNIT 16PINS 16PINS 16PINS R Junction-to-ambientthermalresistance 76.2 76.8 101 °C/W θJA R Junction-to-case(top)thermalresistance 36.8 39.6 36.4 °C/W θJC(top) R Junction-to-boardthermalresistance 33.9 41.5 45.9 °C/W θJB ψ Junction-to-topcharacterizationparameter 6.7 12.6 2.7 °C/W JT ψ Junction-to-boardcharacterizationparameter 33.6 40.9 45.3 °C/W JB (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheSemiconductorandICPackageThermalMetricsapplication report. 4 SubmitDocumentationFeedback Copyright©2003–2016,TexasInstrumentsIncorporated ProductFolderLinks:MAX202

MAX202 www.ti.com SLLS576F–JULY2003–REVISEDSETPEMBER2016 6.5 Electrical Characteristics overrecommendedrangesofsupplyvoltageandoperatingfree-airtemperature(unlessotherwisenoted;seeFigure10)(1) PARAMETER TESTCONDITIONS MIN TYP(2) MAX UNIT I Supplycurrent Noload,V =5V 8 15 mA CC CC DRIVERSECTION V High-leveloutputvoltage D atR =3kΩtoGND,D =GND 5 9 V OH OUT L IN V Low-leveloutputvoltage D atR =3kΩtoGND,D =V –5 –9 V OL OUT L IN CC I High-levelinputcurrent V =V 0 200 µA IH I CC I Low-levelinputcurrent V at0V 0 –200 µA IL I I (3) Short-circuitoutputcurrent V =5.5V,V =0V ±10 ±60 mA OS CC O r Outputresistance V ,V+,andV–=0V,V =±2V 300 Ω O CC O RECEIVERSECTION V High-leveloutputvoltage I =–1mA 3.5 V –0.4 V OH OH CC V Low-leveloutputvoltage I =1.6mA 0.4 V OL OL V Positive-goinginputthresholdvoltage V =5V,T =25°C 1.7 2.4 V IT+ CC A V Negative-goinginputthresholdvoltage V =5V,T =25°C 0.8 1.2 V IT– CC A V Inputhysteresis(V –V ) 0.2 0.5 1 V hys IT+ IT– r Inputresistance V =±3Vto±25V 3 5 7 kΩ i I (1) TestconditionsareC1–C4=0.1µFatV =5V±0.5V. CC (2) AlltypicalvaluesareatV =5V,andT =25°C. CC A (3) Short-circuitdurationsshouldbecontrolledtopreventexceedingthedeviceabsolutepower-dissipationratings,andnotmorethanone outputshouldbeshortedatatime. 6.6 Switching Characteristics overrecommendedrangesofsuplyvoltageandoperatingfree-airtemperature(unlessotherwisenoted;seeFigure10)(1) PARAMETER TESTCONDITIONS MIN TYP(2) MAX UNIT DRIVERSECTION C =50pFto1000pF,R =3kΩto7kΩ Maximumdatarate L L 120 kbit/s oneD switching,seeFigure6 OUT Propagationdelaytime, C =2500pF,R =3kΩ,alldriversloaded, t L L 2 µs PLH(D) low-tohigh-leveloutput seeFigure6 Propagationdelaytime, C =2500pF,R =3kΩ,alldriversloaded, t L L 2 µs PHL(D) high-tolow-leveloutput seeFigure6 t Pulseskew(3) CL=150to2500pF,RL=3kΩto7kΩ, 300 ns sk(p) seeFigure7 C =50to1000pF,R =3kΩto7kΩ, SR(tr) Slewrate,transitionregion L L 3 6 30 V/µs V =5V,seeFigure6 CC RECEIVERSECTION(SEEFigure8) Propagationdelaytime, t C =150pF 0.5 10 µs PLH(R) low-tohigh-leveloutput L Propagationdelaytime, t C =150pF 0.5 10 µs PHL(R) high-tolow-leveloutput L t Pulseskew(3) C =150pF 300 ns sk(p) L (1) TestconditionsareC1–C4=0.1µFatV =5V±0.5V. CC (2) AlltypicalvaluesareatV =5V,andT =25°C. CC A (3) Pulseskewisdefinedas|t –t |ofeachchannelofthesamedevice. PLH PHL Copyright©2003–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:MAX202

MAX202 SLLS576F–JULY2003–REVISEDSETPEMBER2016 www.ti.com 6.7 Typical Characteristics atT =25°C(unlessotherwisenoted) A 0.7 5 0.65 0.6 4.8 0.55 0.5 4.6 V) V) e ( 0.45 e ( g 0.4 g 4.4 a a olt 0.35 olt V V T 0.3 T 4.2 OU 0.25 OU R 0.2 R 4 0.15 0.1 3.8 0.05 0 3.6 0 1 2 3 4 5 6 7 8 9 10 0 1 2 3 4 5 6 7 8 9 10 ROUT Current (mA) ROUT Current (mA) D001 D002 Figure1.ReceiverVOLvsOutputCurrent Figure2.ReceiverVOHvsOutputCurrent -2.5 10 -3 9.5 -3.5 9 -4 -4.5 8.5 V) -5 V) 8 ge ( -5.5 ge ( 7.5 olta -6 olta 7 V -6.5 V UT -7 UT 6.5 O -7.5 O 6 D D -8 5.5 -8.5 5 -9 -9.5 4.5 -10 4 0 1 2 3 4 5 6 7 8 9 10 0 1 2 3 4 5 6 7 8 9 10 DOUT Current (mA) DOUT Current (mA) D003 D004 Figure3.DriverVOLvsOutputCurrent Figure4.DriverVOHvsOutputCurrent 12 DIN 9 DOUT ROUT 6 V) 3 m ( or 0 ef v Wa -3 -6 -9 -12 0 2 4 6 8 10 12 14 16 18 Time (us) D005 Figure5.DriverandReceiverLoopbackWaveforms 6 SubmitDocumentationFeedback Copyright©2003–2016,TexasInstrumentsIncorporated ProductFolderLinks:MAX202

MAX202 www.ti.com SLLS576F–JULY2003–REVISEDSETPEMBER2016 7 Parameter Measurement Information 3 V Input 1.5 V 1.5 V RS-232 0 V Output Generator (see Note B) 50W C t t L PHL(D) PLH (D) RL (see NoteA) V 3 V 3 V OH Output –3 V –3 V V OL TEST CIRCUIT 6 V VOLTAGE WAVEFORMS SR(tf) = t or t PHL(D) PLH(D) A. C includesprobeandjigcapacitance. L B. The pulse generator has the following characteristics: PRR = 120 kbit/s, Z = 50 Ω, 50% duty cycle, t ≤ 10 ns, O r t ≤10ns. f Figure6. DriverSlewRate 3 V RS-232 Input 1.5 V 1.5 V Generator Output 0 V (see Note B) 50W C t t L PHL(D) PLH (D) RL (see NoteA) V OH Output 50% 50% V OL TEST CIRCUIT VOLTAGE WAVEFORMS A. C includesprobeandjigcapacitance. L B. The pulse generator has the following characteristics: PRR = 120 kbit/s, Z = 50 Ω, 50% duty cycle, t ≤ 10 ns, O r t ≤10ns. f Figure7. DriverPulseSkew 3 V Input 1.5 V 1.5 V Output –3 V Generator (see Note B) 50W t t C PHL(R) PLH (R) L (see NoteA) V OH Output 50% 50% V OL TEST CIRCUIT VOLTAGE WAVEFORMS A. C includesprobeandjigcapacitance. L B. Thepulsegeneratorhasthefollowingcharacteristics:Z =50Ω,50%dutycycle,t ≤10ns,t ≤10ns. O r f Figure8. ReceiverPropagationDelayTimes Copyright©2003–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:MAX202

MAX202 SLLS576F–JULY2003–REVISEDSETPEMBER2016 www.ti.com 8 Detailed Description 8.1 Overview The MAX202 device is a dual driver and receiver that includes a capacitive voltage generator using four capacitors to supply TIA/EIA-232-F voltage levels from a single 5-V supply. Each receiver converts TIA/EIA-232- F inputs to 5-V TTL/CMOS levels. These receivers have shorted and open fail safe. The receiver can accept up to ±30-V inputs and decode inputs as low as ±3 V. Each driver converts TTL/CMOS input levels into TIA/EIA- 232-Flevels.Outputsareprotectedagainstshortstoground. 8.2 Functional Block Diagram 5 V POWER 2 2 DOUT DIN TX RS-232 120 kb/s 15 kV HBM 2 2 RIN ROUT RX RS-232 Copyright © 2016,Texas Instruments Incorporated 8.3 Feature Description 8.3.1 Power The power block increases and inverts the 5-V supply for the RS-232 driver using a charge pump that requires four0.1-µFexternalcapacitors. 8.3.2 RS-232Driver Two drivers interface standard logic levels to RS-232 levels. The driver inputs do not have internal pullup resistors.Donotfloatthedriverinputs. 8.3.3 RS-232Receiver TwoSchmitttriggerreceiversinterfaceRS-232levelstostandardlogiclevels.Eachreceiverhasaninternal5-kΩ loadtoground.AnopeninputresultsinahighoutputonROUT. 8.4 Device Functional Modes 8.4.1 V Poweredby5-V CC Thedeviceisinnormaloperationwhenpoweredby5V. 8.4.2 V Unpowered CC WhenMAX202isunpowered,itcanbesafelyconnectedtoanactiveremoteRS-232device. 8 SubmitDocumentationFeedback Copyright©2003–2016,TexasInstrumentsIncorporated ProductFolderLinks:MAX202

MAX202 www.ti.com SLLS576F–JULY2003–REVISEDSETPEMBER2016 Device Functional Modes (continued) 8.4.3 TruthTables Table1andTable2listthefunctionforeachdriverandreceiver(respectively). Table1.FunctionTablefor EachDriver(1) INPUT OUTPUT DIN DOUT L H H L (1) H=highlevel,L=lowlevel Table2.FunctionTablefor EachReceiver(1) INPUT OUTPUT RIN ROUT L H H L Open H (1) H=highlevel,L=lowlevel, Open=inputdisconnectedor connecteddriveroff 11 14 DIN1 DOUT1 10 7 DIN2 DOUT2 12 13 ROUT1 RIN1 9 8 ROUT2 RIN2 Figure9. LogicDiagram(PositiveLogic) Copyright©2003–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:MAX202

MAX202 SLLS576F–JULY2003–REVISEDSETPEMBER2016 www.ti.com 9 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validateandtesttheirdesignimplementationtoconfirmsystemfunctionality. 9.1 Application Information For proper operation, add capacitors as shown in Figure 10. Pins 9 through 12 connect to UART or general purposelogiclines.RS-232linesonpins7,8,13,and14connecttoaconnectororcable. 9.2 Typical Application 1 16 C1+ VCC + CBYPASS – = 0.1mF, C1+ 2 15 0.1mF, C3 + V+ GND – 6.3 V 0.1mF – 16 V 3 14 C1– DOUT1 13 RIN1 4 C2+ C2 + 5 kW 0.1mF, – 16 V 5 C2– 12 ROUT1 6 11 C4 V– DIN1 – 0.1mF, + 16 V 7 10 DOUT2 DIN2 8 9 RIN2 ROUT2 5 kW Copyright © 2016,Texas Instruments Incorporated A. C3canbeconnectedtoV orGND. CC B. Resistorvaluesshownarenominal. C. Nonpolarized ceramic capacitors are acceptable. If polarized tantalum or electrolytic capacitors are used, they must beconnectedasshown. Figure10. TypicalOperatingCircuitandCapacitorValues 9.2.1 DesignRequirements • V minimumis4.5Vandmaximumis5.5V. CC • Maximumrecommendedbitrateis120kbps. 10 SubmitDocumentationFeedback Copyright©2003–2016,TexasInstrumentsIncorporated ProductFolderLinks:MAX202

MAX202 www.ti.com SLLS576F–JULY2003–REVISEDSETPEMBER2016 Typical Application (continued) 9.2.2 DetailedDesignProcedure 9.2.2.1 CapacitorSelection The capacitor type used for C1 through C4 is not critical for proper operation. The MAX202 requires 0.1-µF capacitors. Capacitors up to 10 µF can be used without harm. Ceramic dielectrics are suggested for the 0.1-µF capacitors. When using the minimum recommended capacitor values, make sure the capacitance value does not degrade excessively as the operating temperature varies. If in doubt, use capacitors with a larger (for example, 2×) nominal value. The capacitors' effective series resistance (ESR), which usually rises at low temperatures, influencestheamountofrippleonV+andV–. Uselargercapacitors(upto10µF)toreducetheoutputimpedanceatV+andV–. Bypass V to ground with at least 0.1 µF. In applications sensitive to power-supply noise generated by the CC charge pumps, decouple V to ground with a capacitor the same size as (or larger than) the charge-pump CC capacitors(C1toC4). 9.2.2.2 ESDProtection MAX202deviceshavestandardESDprotectionstructuresincorporatedonallpinstoprotectagainstelectrostatic discharges encountered during assembly and handling. In addition, the RS-232 bus pins (driver outputs and receiverinputs)ofthesedeviceshaveanextralevelofESDprotection.AdvancedESDstructuresweredesigned tosuccessfullyprotectthesebuspinsagainstESDdischargeof ±15-kVwhenpowereddown. 9.2.2.3 ESDTestConditions Stringent ESD testing is performed by TI based on various conditions and procedures. Please contact TI for a reliabilityreportthatdocumentstestsetup,methodology,andresults. 9.2.2.4 Human-BodyModel(HBM) TheHBMofESDtestingisshowninFigure11.Figure12showsthecurrentwaveformthatisgeneratedduringa discharge into a low impedance. The model consists of a 100-pF capacitor, charged to the ESD voltage of concern,andsubsequentlydischargedintothedeviceundertest(DUT)througha1.5-kΩ resistor. R D 1.5 kW V + CS DUT HBM - 100 pF Figure11. HBMESDTestCircuit Copyright©2003–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:MAX202

MAX202 SLLS576F–JULY2003–REVISEDSETPEMBER2016 www.ti.com Typical Application (continued) 1.5 V = 2 kV HBM DUT = 10-V, 1-WZener Diode | 1.0 A - T U D I 0.5 0.0 0 50 100 150 200 Time - ns Figure12. TypicalHBMCurrentWaveform 9.2.3 ApplicationCurve 12 DIN 9 DOUT ROUT 6 V) 3 m ( or 0 ef v Wa -3 -6 -9 -12 0 2 4 6 8 10 12 14 16 18 Time (us) D006 120kbit/s,1-nFload Figure13.DriverandReceiverLoopbackSignal 12 SubmitDocumentationFeedback Copyright©2003–2016,TexasInstrumentsIncorporated ProductFolderLinks:MAX202

MAX202 www.ti.com SLLS576F–JULY2003–REVISEDSETPEMBER2016 10 Power Supply Recommendations The V voltage must be connected to the same power source used for logic device connected to DIN and CC ROUTpins.V mustbebetween4.5Vand5.5V. CC 11 Layout 11.1 Layout Guidelines Keep the external capacitor traces short. This is more important on C1 and C2 nodes that have the fastest rise and fall times. For best ESD performance, make the impedance from MAX202 ground pin to the ground plane of thecircuitboardaslowaspossible.Usewidemetalandmultipleviasonbothsidesofgroundpin. 11.2 Layout Example Ground C3 1 C1+ VCC 16 VCC (cid:19)(cid:17)(cid:20)PF C1 2 V+ GND 15 Ground 3 C1- DOUT1 14 4 C2+ RIN1 13 C2 5 C2- ROUT1 12 Ground 6 V- DIN1 11 C4 7 DOUT2 DIN2 10 8 RIN2 ROUT2 9 Figure14. MAX202CircuitBoardLayout Copyright©2003–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:MAX202

MAX202 SLLS576F–JULY2003–REVISEDSETPEMBER2016 www.ti.com 12 Device and Documentation Support 12.1 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed.Forchangedetails,reviewtherevisionhistoryincludedinanyreviseddocument. 12.2 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TIE2E™OnlineCommunity TI'sEngineer-to-Engineer(E2E)Community.Createdtofostercollaboration amongengineers.Ate2e.ti.com,youcanaskquestions,shareknowledge,exploreideasandhelp solveproblemswithfellowengineers. DesignSupport TI'sDesignSupport QuicklyfindhelpfulE2Eforumsalongwithdesignsupporttoolsand contactinformationfortechnicalsupport. 12.3 Trademarks E2EisatrademarkofTexasInstruments. Allothertrademarksarethepropertyoftheirrespectiveowners. 12.4 Electrostatic Discharge Caution Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. 12.5 Glossary SLYZ022—TIGlossary. Thisglossarylistsandexplainsterms,acronyms,anddefinitions. 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of thisdocument.Forbrowser-basedversionsofthisdatasheet,refertotheleft-handnavigation. 14 SubmitDocumentationFeedback Copyright©2003–2016,TexasInstrumentsIncorporated ProductFolderLinks:MAX202

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) MAX202CD ACTIVE SOIC D 16 40 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 MAX202C & no Sb/Br) MAX202CDR ACTIVE SOIC D 16 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 MAX202C & no Sb/Br) MAX202CDRE4 ACTIVE SOIC D 16 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 MAX202C & no Sb/Br) MAX202CDW ACTIVE SOIC DW 16 40 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 MAX202C & no Sb/Br) MAX202CDWR ACTIVE SOIC DW 16 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 MAX202C & no Sb/Br) MAX202CPW ACTIVE TSSOP PW 16 90 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 MA202C & no Sb/Br) MAX202CPWR ACTIVE TSSOP PW 16 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 MA202C & no Sb/Br) MAX202ID ACTIVE SOIC D 16 40 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 MAX202I & no Sb/Br) MAX202IDE4 ACTIVE SOIC D 16 40 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 MAX202I & no Sb/Br) MAX202IDG4 ACTIVE SOIC D 16 40 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 MAX202I & no Sb/Br) MAX202IDR ACTIVE SOIC D 16 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 MAX202I & no Sb/Br) MAX202IDRE4 ACTIVE SOIC D 16 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 MAX202I & no Sb/Br) MAX202IDW ACTIVE SOIC DW 16 40 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 MAX202I & no Sb/Br) MAX202IDWR ACTIVE SOIC DW 16 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 MAX202I & no Sb/Br) MAX202IPW ACTIVE TSSOP PW 16 90 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 MB202I & no Sb/Br) MAX202IPWR ACTIVE TSSOP PW 16 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 MB202I & no Sb/Br) MAX202IPWRE4 ACTIVE TSSOP PW 16 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 MB202I & no Sb/Br) Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 26-Feb-2019 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) MAX202CDR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1 MAX202CDWR SOIC DW 16 2000 330.0 16.4 10.75 10.7 2.7 12.0 16.0 Q1 MAX202CPWR TSSOP PW 16 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 MAX202IDR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1 MAX202IDWR SOIC DW 16 2000 330.0 16.4 10.75 10.7 2.7 12.0 16.0 Q1 MAX202IPWR TSSOP PW 16 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 26-Feb-2019 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) MAX202CDR SOIC D 16 2500 333.2 345.9 28.6 MAX202CDWR SOIC DW 16 2000 350.0 350.0 43.0 MAX202CPWR TSSOP PW 16 2000 367.0 367.0 35.0 MAX202IDR SOIC D 16 2500 333.2 345.9 28.6 MAX202IDWR SOIC DW 16 2000 350.0 350.0 43.0 MAX202IPWR TSSOP PW 16 2000 367.0 367.0 35.0 PackMaterials-Page2

None

None

PACKAGE OUTLINE PW0016A TSSOP - 1.2 mm max height SCALE 2.500 SMALL OUTLINE PACKAGE SEATING PLANE C 6.6 TYP 6.2 A 0.1 C PIN 1 INDEX AREA 14X 0.65 16 1 2X 5.1 4.55 4.9 NOTE 3 8 9 0.30 B 4.5 16X 0.19 1.2 MAX 4.3 0.1 C A B NOTE 4 (0.15) TYP SEE DETAIL A 0.25 GAGE PLANE 0.15 0.05 0.75 0.50 0 -8 DETA 20AIL A TYPICAL 4220204/A 02/2017 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side. 5. Reference JEDEC registration MO-153. www.ti.com

EXAMPLE BOARD LAYOUT PW0016A TSSOP - 1.2 mm max height SMALL OUTLINE PACKAGE 16X (1.5) SYMM (R0.05) TYP 1 16X (0.45) 16 SYMM 14X (0.65) 8 9 (5.8) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE: 10X SOLDER MASK METAL UNDER SOLDER MASK OPENING METAL SOLDER MASK OPENING EXPOSED METAL EXPOSED METAL 0.05 MAX 0.05 MIN ALL AROUND ALL AROUND NON-SOLDER MASK SOLDER MASK DEFINED DEFINED (PREFERRED) SOLDE15.000R MASK DETAILS 4220204/A 02/2017 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN PW0016A TSSOP - 1.2 mm max height SMALL OUTLINE PACKAGE 16X (1.5) SYMM (R0.05) TYP 1 16X (0.45) 16 SYMM 14X (0.65) 8 9 (5.8) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE: 10X 4220204/A 02/2017 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com

GENERIC PACKAGE VIEW DW 16 SOIC - 2.65 mm max height 7.5 x 10.3, 1.27 mm pitch SMALL OUTLINE INTEGRATED CIRCUIT This image is a representation of the package family, actual package may vary. Refer to the product data sheet for package details. 4224780/A www.ti.com

PACKAGE OUTLINE DW0016A SOIC - 2.65 mm max height SCALE 1.500 SOIC C 10.63 SEATING PLANE TYP 9.97 A PIN 1 ID 0.1 C AREA 14X 1.27 16 1 10.5 2X 10.1 8.89 NOTE 3 8 9 0.51 16X 0.31 7.6 B 7.4 0.25 C A B 2.65 MAX NOTE 4 0.33 TYP 0.10 SEE DETAIL A 0.25 GAGE PLANE 0.3 0 - 8 0.1 1.27 0.40 DETAIL A (1.4) TYPICAL 4220721/A 07/2016 NOTES: 1. All linear dimensions are in millimeters. Dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm, per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm, per side. 5. Reference JEDEC registration MS-013. www.ti.com

EXAMPLE BOARD LAYOUT DW0016A SOIC - 2.65 mm max height SOIC 16X (2) SEE SYMM DETAILS 1 16 16X (0.6) SYMM 14X (1.27) 8 9 R0.05 TYP (9.3) LAND PATTERN EXAMPLE SCALE:7X METAL SOLDER MASK SOLDER MASK METAL OPENING OPENING 0.07 MAX 0.07 MIN ALL AROUND ALL AROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED SOLDER MASK DETAILS 4220721/A 07/2016 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN DW0016A SOIC - 2.65 mm max height SOIC 16X (2) SYMM 1 16 16X (0.6) SYMM 14X (1.27) 8 9 R0.05 TYP (9.3) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:7X 4220721/A 07/2016 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com

IMPORTANTNOTICEANDDISCLAIMER TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable standards, and any other safety, security, or other requirements. These resources are subject to change without notice. TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these resources. TI’s products are provided subject to TI’s Terms of Sale (www.ti.com/legal/termsofsale.html) or other applicable terms available either on ti.com or provided in conjunction with such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for TI products. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2020, Texas Instruments Incorporated