MAC97 Series Sensitive Gate Triacs Silicon Bidirectional Thyristors Designed for use in solid state relays, MPU interface, TTL logic and any other light industrial or consumer application. Supplied in an inexpensive TO−92 package which is readily adaptable for use in automatic insertion equipment. http://onsemi.com Features TRIACS • One−Piece, Injection−Molded Package 0.8 AMPERE RMS • Blocking Voltage to 600 Volts • 200 thru 600 VOLTS Sensitive Gate Triggering in Four Trigger Modes (Quadrants) for all possible Combinations of Trigger Sources, and especially for Circuits that Source Gate Drives • MT2 MT1 All Diffused and Glassivated Junctions for Maximum Uniformity of Parameters and Reliability G • These are Pb−Free Devices* MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) MARKING Rating Symbol Value Unit DIAGRAM Peak Repetitive Off-State Voltage VDRM, V (TJ = −40 to +110°C) (Note 1) VRRM Sine Wave 50 to 60 Hz, Gate Open MAC MMAACC9977AA46 240000 123 1 2 3 AY97WAWx(cid:2) MAC97A8 600 (cid:2) STRAIGHT LEAD BENT LEAD On-State RMS Current IT(RMS) 0.6 A BULK PACK TAPE & REEL Full Cycle Sine Wave 50 to 60 Hz AMMO PACK (TC = +50°C) TO−92 (TO−226) CASE 029 Peak Non−Repetitive Surge Current ITSM 8.0 A STYLE 12 One Full Cycle, Sine Wave 60 Hz (TC = 110°C) MAC97Ax = Device Code Circuit Fusing Considerations (t = 8.3 ms) I2t 0.26 A2s x = 4, 6, or 8 A = Assembly Location Peak Gate Voltage VGM 5.0 V Y = Year (t (cid:2) 2.0 (cid:2)s, TC = +80°C) WW = Work Week Peak Gate Power PGM 5.0 W (cid:2) = Pb−Free Package (t (cid:2) 2.0 (cid:2)s, TC = +80°C) (Note: Microdot may be in either location) Average Gate Power PG(AV) 0.1 W (TC = 80°C, t (cid:2) 8.3 ms) Pe(at k(cid:2) G 2a.t0e (cid:2)Csu, rTreCn =t +80°C) IGM 1.0 A PIN ASSIGNMENT Operating Junction Temperature Range TJ −40 to +110 °C 1 Main Terminal 1 Storage Temperature Range Tstg −40 to +150 °C 2 Gate 3 Main Terminal 2 Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. ORDERING INFORMATION 1. VDRM and VRRM for all types can be applied on a continuous basis. Blocking voltages shall not be tested with a constant current source such that the See detailed ordering and shipping information in the package voltage ratings of the devices are exceeded. dimensions section on page 6 of this data sheet. *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. © Semiconductor Components Industries, LLC, 2013 1 Publication Order Number: August, 2013 − Rev. 10 MAC97/D

MAC97 Series THERMAL CHARACTERISTICS Characteristic Symbol Max Unit Thermal Resistance, Junction−to−Case R(cid:3)JC 75 °C/W Thermal Resistance, Junction−to−Ambient R(cid:3)JA 200 °C/W Maximum Lead Temperature for Soldering Purposes for 10 Seconds TL 260 °C ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted; Electricals apply in both directions) Characteristic Symbol Min Typ Max Unit OFF CHARACTERISTICS Peak Repetitive Blocking Current IDRM, IRRM (VD = Rated VDRM, VRRM; Gate Open) TJ = 25°C − − 10 (cid:2)A TJ = +110°C − − 100 (cid:2)A ON CHARACTERISTICS Peak On−State Voltage VTM − − 1.9 V (ITM = (cid:3).85 A Peak; Pulse Width (cid:2) 2.0 ms, Duty Cycle (cid:2) 2.0%) Gate Trigger Current (Continuous dc) IGT mA (VD = 12 Vdc, RL = 100 (cid:4)) MT2(+), G(+) − − 5.0 MT2(+), G(−) − − 5.0 MT2(−), G(−) − − 5.0 MT2(−), G(+) − − 7.0 Gate Trigger Voltage (Continuous dc) VGT V (VD = 12 Vdc, RL = 100 (cid:4)) MT2(+), G(+) All Types − .66 2.0 MT2(+), G(−) All Types − .77 2.0 MT2(−), G(−) All Types − .84 2.0 MT2(−), G(+) All Types − .88 2.5 Gate Non−Trigger Voltage VGD 0.1 − − V (VD = 12 V, RL = 100 (cid:4), TJ = 110°C) All Four Quadrants Holding Current IH − 1.5 10 mA (VD = 12 Vdc, Initiating Current = 200 mA, Gate Open) Turn-On Time tgt − 2.0 − (cid:2)s (VD = Rated VDRM, ITM = 1.0 A pk, IG = 25 mA) DYNAMIC CHARACTERISTICS Critical Rate−of−Rise of Commutation Voltage dV/dt(c) − 5.0 − V/(cid:2)s (VD = Rated VDRM, ITM = .84 A, Commutating di/dt = .3 A/ms, Gate Unenergized, TC = 50°C) Critical Rate of Rise of Off−State Voltage dv/dt − 25 − V/(cid:2)s (VD = Rated VDRM, TC = 110°C, Gate Open, Exponential Waveform http://onsemi.com 2

MAC97 Series Voltage Current Characteristic of Triacs (Bidirectional Device) + Current Quadrant 1 MainTerminal 2 + Symbol Parameter VTM VDRM Peak Repetitive Forward Off State Voltage on state IDRM Peak Forward Blocking Current IH VRRM Peak Repetitive Reverse Off State Voltage IRRM at VRRM IRRM Peak Reverse Blocking Current VTM Maximum On State Voltage off state + Voltage IH Holding Current IH IDRM at VDRM Quadrant 3 VTM MainTerminal 2 − Quadrant Definitions for a Triac MT2 POSITIVE (Positive Half Cycle) + (+) MT2 (+) MT2 Quadrant II (−) IGT (+) IGT Quadrant I GATE GATE MT1 MT1 REF REF IGT − + IGT (−) MT2 (−) MT2 Quadrant III (−) IGT (+) IGT Quadrant IV GATE GATE MT1 MT1 REF REF − MT2 NEGATIVE (Negative Half Cycle) All polarities are referenced to MT1. With in−phase signals (using standard AC lines) quadrants I and III are used. http://onsemi.com 3

MAC97 Series 110 110 C) °TEMPERATURE ( 1098000 DC180°(cid:4) = 30° 60° 90° M ALLOWABLE°RATURE ( C)187900000 DC 180° (cid:4) = 30° 60° 90° ABLE CASE 7600 (cid:5) 120° , MAXIMUS)ENT TEMPE 6500 (cid:5) 120° W 50 MBI O (cid:5) RM 40 (cid:5) M ALL 40 (cid:5) = CONDUCTION ANGLE IT(A 30 (cid:5) = CONDUCTION ANGLE U AXIM 300 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 200 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 M T , C IT(RMS), RMS ON-STATE CURRENT (AMPS) IT(RMS), RMS ON-STATE CURRENT (AMPS) Figure 1. RMS Current Derating Figure 2. RMS Current Derating S) 1.2 6.0 T T A W (cid:5) 4.0 N ( 1.0 O DC SIPATI 0.8 (cid:5) 180° 2.0 TJ = 110°C DIS (cid:5) = CONDUCTION ANGLE 120° 25°C ER 0.6 W O P 1.0 E 0.4 AG 90° MP) M AVER 0.2 (cid:4) = 30° 60° ENT (A 0.6 MU RR 0.4 XI 0 CU MA 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 E P , (AV) IT(RMS), RMS ON-STATE CURRENT (AMPS) N‐STAT 0.2 O Figure 3. Power Dissipation S U O E N 0.1 A T N A T S 0.06 N , IM T 0.04 I 0.02 0.01 0.006 0.4 1.2 2.0 2.8 3.6 4.4 5.2 6.0 VTM, INSTANTANEOUS ON‐STATE VOLTAGE (VOLTS) Figure 4. On−State Characteristics http://onsemi.com 4

MAC97 Series D) 1.0 10 E Z LI S) A P M M R A CE (NO Z(cid:6)JC(t) = R(cid:6)JC(t) (cid:5) r(t) RENT ( 5.0 N R A U T C SIS 0.1 GE 3.0 NSIENT THERMAL RE 0.01 I , PEAK SURTSM21..00 TfS =Ju r=6g e01 i1sH 0pz°reCceded and followed by rated curCreYntC.LE A 0.1 1.0 10 100 1(cid:3)103 1(cid:3)104 1.0 2.0 3.0 5.0 10 30 50 100 R T R , (t) t, TIME (ms) NUMBER OF CYCLES Figure 5. Transient Thermal Response Figure 6. Maximum Allowable Surge Current 100 1.2 ENT (mA) GE (V) 11..01 QQ34 GER CURR 10 QQ34 GER VOLTA 00..89 QQ12 G Q2 G GATE TRI 1 Q1 GATE TRI 00..67 , GT , GT0.5 I V 0.4 0 0.3 -40 -25 -10 5 20 35 50 65 80 95 110 -40 -25 -10 5 20 35 50 65 80 95 110 TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) Figure 7. Typical Gate Trigger Current versus Figure 8. Typical Gate Trigger Voltage versus Junction Temperature Junction Temperature 100 10 A) A) m m T ( 10 Q2 T ( N N RE RE MT2 Negative R R U U C C 1 NG Q4 Q3 NG MT2 Positive HI DI C 1 L T O , LAIL Q1 , HIH 0 0.1 -40 -25 -10 5 20 35 50 65 80 95 110 -40 -25 -10 5 20 35 50 65 80 95 110 TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) Figure 9. Typical Latching Current versus Figure 10. Typical Holding Current versus Junction Temperature Junction Temperature http://onsemi.com 5

MAC97 Series LL 1N4007 200 VRMS ADJUST FOR MEASURE ITM, 60 Hz VAC I RS CHARGE OL CHARGE TRIGGER CONTROL TR - 200 V ON CS ADJUST FOR + R C MT2 dV/dt(c) E GG 1N914 51 (cid:4) NON‐POLAR RI MT1 CL T G Note: Component values are for verification of rated (dv/dt)c. See AN1048 for additional information. Figure 11. Simplified Test Circuit to Measure the Critical Rate of Rise of Commutating Voltage (dV/dt) c ORDERING & SHIPPING INFORMATION Europe U.S. Equivalent Shipping Description of TO92 Tape Orientation MAC97A6RL1G Radial Tape & Reel (2K/Reel) Flat side of TO92 & adhesive tape visible (Pb−Free) MAC97A8RLRMG MAC97A8RL1G Radial Tape & Reel (2K/Reel) Flat side of TO92 & adhesive tape visible (Pb−Free) MAC97A4G Bulk in Box (5K/Box) N/A, Bulk (Pb−Free) MAC97A6G Bulk in Box (5K/Box) N/A, Bulk (Pb−Free) MAC97A8G Bulk in Box (5K/Box) N/A, Bulk (Pb−Free) MAC97A4RLRFG Radial Tape & Reel (2K/Reel) Round side of TO92 & adhesive tape on reverse side (Pb−Free) MAC97A4RLRPG Radial Tape & Reel (2K/Reel) Round side of TO92 & adhesive tape on reverse side (Pb−Free) MAC97A6RLRFG Radial Tape & Reel (2K/Reel) Round side of TO92 & adhesive tape on reverse side (Pb−Free) MAC97A6RLRPG Radial Tape & Reel (2K/Reel) Round side of TO92 & adhesive tape on reverse side (Pb−Free) MAC97A8RLRPG Radial Tape / Fan Fold Box (2K/Box) Round side of TO92 & adhesive tape visible (Pb−Free) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 6

MAC97 Series TO−92 EIA RADIAL TAPE IN FAN FOLD BOX OR ON REEL H2A H2A H2B H2B H W2 H4H5 T1 L1 H1 W1 W L T F1 T2 F2 P2 P2 D P1 P Figure 12. Device Positioning on Tape Specification Inches Millimeter Symbol Item Min Max Min Max D Tape Feedhole Diameter 0.1496 0.1653 3.8 4.2 D2 Component Lead Thickness Dimension 0.015 0.020 0.38 0.51 F1, F2 Component Lead Pitch 0.0945 0.110 2.4 2.8 H Bottom of Component to Seating Plane .059 0.156 1.5 4.0 H1 Feedhole Location 0.3346 0.3741 8.5 9.5 H2A Deflection Left or Right 0 0.039 0 1.0 H2B Deflection Front or Rear 0 0.051 0 1.0 H4 Feedhole to Bottom of Component 0.7086 0.768 18 19.5 H5 Feedhole to Seating Plane 0.610 0.649 15.5 16.5 L Defective Unit Clipped Dimension 0.3346 0.433 8.5 11 L1 Lead Wire Enclosure 0.09842 − 2.5 − P Feedhole Pitch 0.4921 0.5079 12.5 12.9 P1 Feedhole Center to Center Lead 0.2342 0.2658 5.95 6.75 P2 First Lead Spacing Dimension 0.1397 0.1556 3.55 3.95 T Adhesive Tape Thickness 0.06 0.08 0.15 0.20 T1 Overall Taped Package Thickness − 0.0567 − 1.44 T2 Carrier Strip Thickness 0.014 0.027 0.35 0.65 W Carrier Strip Width 0.6889 0.7481 17.5 19 W1 Adhesive Tape Width 0.2165 0.2841 5.5 6.3 W2 Adhesive Tape Position 0.0059 0.01968 0.15 0.5 NOTES: 2. Maximum alignment deviation between leads not to be greater than 0.2 mm. 3. Defective components shall be clipped from the carrier tape such that the remaining protrusion (L) does not exceed a maximum of 11 mm. 4. Component lead to tape adhesion must meet the pull test requirements. 5. Maximum non−cumulative variation between tape feed holes shall not exceed 1 mm in 20 pitches. 6. Holddown tape not to extend beyond the edge(s) of carrier tape and there shall be no exposure of adhesive. 7. No more than 1 consecutive missing component is permitted. 8. A tape trailer and leader, having at least three feed holes is required before the first and after the last component. 9. Splices will not interfere with the sprocket feed holes. http://onsemi.com 7

MAC97 Series PACKAGE DIMENSIONS TO−92 (TO−226) CASE 29−11 ISSUE AM A B STRAIGHT LEAD N1O.TEDSIM:ENSIONING AND TOLERANCING PER ANSI BULK PACK Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. R 3. CONTOUR OF PACKAGE BEYOND DIMENSION R IS UNCONTROLLED. 4. LEAD DIMENSION IS UNCONTROLLED IN P AND P BEYOND DIMENSION K MINIMUM. L SEATING INCHES MILLIMETERS PLANE K DIM MIN MAX MIN MAX A 0.175 0.205 4.45 5.20 B 0.170 0.210 4.32 5.33 C 0.125 0.165 3.18 4.19 D 0.016 0.021 0.407 0.533 X X D G 0.045 0.055 1.15 1.39 G H 0.095 0.105 2.42 2.66 J 0.015 0.020 0.39 0.50 H J K 0.500 --- 12.70 --- L 0.250 --- 6.35 --- V C N 0.080 0.105 2.04 2.66 P --- 0.100 --- 2.54 SECTION X−X R 0.115 --- 2.93 --- 1 N V 0.135 --- 3.43 --- N STYLE 12: PIN 1. MAIN TERMINAL 1 2. GATE 3. MAIN TERMINAL 2 R A B BENT LEAD N1O.TEDSIM:ENSIONING AND TOLERANCING PER TAPE & REEL ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. AMMO PACK 3. CONTOUR OF PACKAGE BEYOND DIMENSION R IS UNCONTROLLED. 4. LEAD DIMENSION IS UNCONTROLLED IN P P AND BEYOND DIMENSION K MINIMUM. T MILLIMETERS SPELAATNIENG K DIM MIN MAX A 4.45 5.20 B 4.32 5.33 C 3.18 4.19 D 0.40 0.54 X X D G 2.40 2.80 G J 0.39 0.50 K 12.70 --- J N 2.04 2.66 V P 1.50 4.00 C R 2.93 --- V 3.43 --- SECTION X−X 1 N ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: N. American Technical Support: 800−282−9855 Toll Free ON Semiconductor Website: www.onsemi.com Literature Distribution Center for ON Semiconductor USA/Canada P.O. Box 5163, Denver, Colorado 80217 USA Europe, Middle East and Africa Technical Support: Order Literature: http://www.onsemi.com/orderlit Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Phone: 421 33 790 2910 Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Japan Customer Focus Center For additional information, please contact your local Email: orderlit@onsemi.com Phone: 81−3−5817−1050 Sales Representative http://onsemi.com MAC97/D 8