LYT4211-4218/4311-4318 LYTSwitch™™-4 High Power LED Driver IC Family Single-Stage Accurate Primary-Side Constant Current (CC) Controller with PFC for Low-Line Applications with TRIAC Dimming and Non-Dimming Options Optimized for Different Applications and Power Levels Part Number Input Voltage Range TRIAC Dimmable LYT4211-LYT4218 85-132 VAC No LYT4311-LYT4318 85-132 VAC Yes Output Power Table Click Here Product Minimum Output Power Maximum Output Power To read about LYT4x11E 2.5 W 12 W LYTSwitch-4 Low-Line LYT4x12E 2.5 W 15 W LYT4x13E 3.8 W 18 W LYT4x14E 4.5 W 22 W LYT4x15E 5.5 W 25 W LYT4x16E 6.8 W 35 W LYT4x17E 8.0 W 50 W LYT4x18E 18 W 78 W LYT4221-4228/4321-4328 LYTSwitch™-4 High Power LED Driver IC Family Single-Stage Accurate Primary-Side Constant Current (CC) Controller with PFC for High-Line Applications with TRIAC Dimming and Non-Dimming Options Optimized for Different Applications and Power Levels Part Number Input Voltage Range TRIAC Dimmable LYT4221-LYT4228 160-300 VAC No LYT4321-LYT4328 160-300 VAC Yes Output Power Table Click Here Product Minimum Output Power Maximum Output Power To read about LYT4x21E 6 W 12 W LYTSwitch-4 High-Line LYT4x22E 6 W 15 W LYT4x23E 8 W 18 W LYT4x24E 9 W 22 W LYT4x25E 11 W 25 W LYT4x26E 14 W 35 W LYT4x27E 19 W 50 W LYT4x28E 33 W 78 W

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LYT4211-4218/4311-4318 LYTSwitch™-4 High Power LED Driver IC Family Single-Stage Accurate Primary-Side Constant Current (CC) Controller with PFC for Low-Line Applications with TRIAC Dimming and Non-Dimming Options Product Highlights • Better than ±5% CC regulation • TRIAC dimmable to less than 5% output • Fast start-up • <250 ms at full brightness • <1s at 10% brightness • High power factor >0.9 AINC • Easily meets EN61000-3-2 D V LYTSwitch-4 CONTROL • Less than 10% THD in optimized designs BP • Up to 92% efficient S R FB • 132 kHz switching frequency for small magnetics High Performance, Combined Driver, Controller, Switch PI-6800-050913 The LYTSwitch-4 family enables off-line LED drivers with high Figure 1. Typical Schematic. power factor which easily meet international requirements for THD and harmonics. Output current is tightly regulated with better than ±5% CC tolerance1. Efficiency of up to 92% is easily Optimized for Different Applications and Power Levels achieved in typical applications. Part Number Input Voltage Range TRIAC Dimmable Supports a Wide Selection of TRIAC Dimmers The LYTSwitch-4 family provides excellent turn-on characteristics LYT4211-LYT4218 85-132 VAC No for leading-edge and trailing-edge TRIAC dimming applications. LYT4311-LYT4318 85-132 VAC Yes This results in drivers with a wide dimming range and fast start-up, even when turning on from a low conduction angle – large dimming ratio and low “pop-on” current. Output Power Table1,2 Low Solution Cost and Long Lifetime Product6 Minimum Output Power3 Maximum Output Power4 LYTSwitch-4 ICs are highly integrated and employ a primary-side control technique that eliminates the optoisolator and reduces LYT4x11E5 2.5 W 12 W component count. This allows the use of low-cost single-sided LYT4x12E 2.5 W 15 W printed circuit boards. Combining PFC and CC functions into a single-stage also helps reduce cost and increase efficiency. LYT4x13E 3.8 W 18 W The 132 kHz switching frequency permits the use of small, LYT4x14E 4.5 W 22 W low-cost magnetics. LYT4x15E 5.5 W 25 W LED drivers using the LYTSwitch-4 family do not use primary- side aluminum electrolytic bulk capacitors. This means greatly LYT4x16E 6.8 W 35 W extended driver lifetime, especially in bulb and other high LYT4x17E 8.0 W 50 W temperature applications. LYT4x18E 18 W 78 W Table 1. Output Power Table. Notes: 1. Performance for typical design. See Application Note. 2. Continuous power in an open-frame design with adequate heat sinking; device local ambient of 70 °C. Power level calculated assuming a typical LED string voltage and efficiency >80%. 3. Minimum output power requires C = 47 µF. BP 4. Maximum output power requires C = 4.7 µF. BP eSIP-7C (E Package) 5. LYT4311 C = 47 µF, LYT4211 C = 4.7 µF. BP BP 6. Package: eSIP-7C (see Figure 2). Figure 2. Package Options. www.power.com November 2014 This Product is Covered by Patents and/or Pending Patent Applications.

LYT4211-4218/4311-4318 Topology Isolation Efficiency Cost THD Output Voltage Isolated Flyback Yes 88% High Best Any Buck No 92% Low Good Limited Tapped-Buck No 89% Middle Best Any Buck-Boost No 90% Low Best High-Voltage Table 2. Performance of Different Topologies in a Typical Non-Dimmable 10 W Low-Line Design. Typical Circuit Schematic Key Features Flyback Benefits • Provides isolated output • Supports widest range of output voltages • Very good THD performance Limitations AINC D V LYTSwitch-4 • Flyback transformer CONTROL • Overall efficiency reduced by parasitic capacitance BP and inductance in the transformer S R FB • Larger PCB area to meet isolation requirements • Requires additional components (primary clamp and bias) PI-6800-050913 • Higher RMS switch and winding currents increases losses Figure 3a. Typical Isolated Flyback Schematic. and lowers efficiency Buck Benefits • Highest efficiency • Lowest component count – small size • Simple low-cost power inductor • Low drain source voltage stress AINC • Best EMI/lowest component count for filter D V LYTSwitch-4 Limitations CONTROL BP • Single input line voltage range S R FB • Output voltage <0.6 × V × 1.41 IN(AC) • Output voltage for low THD designs PI-6841-111813 • Non-isolated Figure 3b. Typical Buck Schematic. Tapped-Buck Benefits • Ideal for low output voltage designs (<20 V) • High efficiency • Low component count • Simple low-cost tapped inductor LYTSwitch-4 AC Limitations IN D V CONTROL • Designs best suited for single input line voltage BP • Requires additional components (primary clamp) S R FB • Non-isolated PI-6842-111813 Figure 3c. Typical Tapped-Buck Schematic. Buck-Boost Benefits • Ideal for non-isolated high output voltage designs • High efficiency • Low component count • Simple common low-cost power inductor can be used AINC • Lowest THD D V LYTSwitch-4 Limitations CONTROL BP • Maximum V is limited by MOSFET breakdown voltage OUT S R FB • Single input line voltage range • Non-isolated PI-6859-111813 Figure 3d. Typical Buck-Boost Schematic. 2 Rev. E 11/14 www.power.com

LYT4211-4218/4311-4318 DRAIN (D) BYPASS (BP) 5.9 V REGULATOR BYPASS CAPACITOR SOFT-START SELECT TIMER HYSTERETIC THERMAL SHUTDOWN FAULT + ILIM MI AUTO-RESTART PRESENT 5.9 V - 5.0 V COUNTER BYPASS PIN 1 V UNDERVOLTAGE DGraivteer VOLTAGE SenseFet MONITOR (V) STOP JITTER LOGIC CLOCK Comparator OSCILLATOR - LEB 3-VT + DFCBMOAFXF OCP OV LINE SENSE + - CURRENT LIMIT FEEDBACK (FB) IV PFC/CC COMPARATOR ILIM VBG IFB CONTROL MI VSENSE FEEDBACK FBOFF SENSE DCMAX IS REFERENCE (R) REBFELORECNKCE VBG 6.4 V PI-6843-071112 SOURCE (S) Figure 4. Functional Block Diagram. Pin Functional Description VOLTAGE MONITOR (V) Pin: This pin interfaces with an external input line peak detector, DRAIN (D) Pin: consisting of a rectifier, filter capacitor and resistors. The This pin is the power FET drain connection. It also provides applied current is used to control stop logic for overvoltage (OV), internal operating current for both start-up and steady-state provide feed-forward to control the output current and the operation. remote ON/OFF function. SOURCE (S) Pin: This pin is the power FET source connection. It is also the ground reference for the BYPASS, FEEDBACK, REFERENCE and VOLTAGE MONITOR pins. E Package (eSIP-7C) (Top View) BYPASS (BP) Pin: Exposed Pad This is the connection point for an external bypass capacitor for (Backside) Internally the internally generated 5.9 V supply. This pin also provides Connected to output power selection through choice of the BYPASS pin SOURCE Pin (see eSIP-7C Package capacitor value. Drawing) FEEDBACK (FB) Pin: The FEEDBACK pin is used for output voltage feedback. The current into the FEEDBACK pin is directly proportional to the 1 R2 V3 F4 B5 S 7 D output voltage. The FEEDBACK pin also includes circuitry to BP protect against open load and overload output conditions. PI-7076-062513 REFERENCE (R) Pin: Figure 5. Pin Configuration. This pin is connected to an external precision resistor and is used to configure for dimming (LYT4311-4318) and non-TRIAC dimming (LYT4211-4218) modes of operation. 3 www.power.com Rev. E 11/14

LYT4211-4218/4311-4318 Functional Description For non-dimming or PWM dimming applications with LYT4211- 4218, the external resistor should be a 24.9 kW ±1%. For phase A LYTSwitch-4 device monolithically combines a controller and angle AC dimming with LYT4311-4318, the external resistor high-voltage power FET into one package. The controller should be a 49.9 kW ±1%. One percent resistors are provides both high power factor and constant current output in recommended as the resistor tolerance directly affects the a single-stage. The LYTSwitch-4 controller consists of an output tolerance. Other resistor values should not be used. oscillator, feedback (sense and logic) circuit, 5.9 V regulator, hysteretic over-temperature protection, frequency jittering, BYPASS Pin Capacitor Power Gain Selection cycle-by-cycle current limit, auto-restart, inductance correction, LYTSwitch-4 devices have the capability to tailor the internal power factor and constant current control. gain to either full or a reduced output power setting. This allows selection of a larger device to minimize dissipation for both FEEDBACK Pin Current Control Characteristics thermal and efficiency reasons. The power gain is selected with The figure shown below illustrates the operating boundaries of the value of the BYPASS pin capacitor. The full power setting is the FEEDBACK pin current. Above I switching is disabled selected with a 4.7 µF capacitor and the reduced power setting FB(SKIP) and below I the device enters into auto-restart. (for higher efficiency) is selected with a 47 µF capacitor. The FB(AR) BYPASS pin capacitor sets both the internal power gain as well as the over-current protection (OCP) threshold. Unlike the IFB(SKIP) Skip-Cycle larger devices, the LYT4x11 power gain is not programmable. Use a 47 µF capacitor for the LYT4x11. Switching Frequency The switching frequency is 132 kHz during normal operation. To further reduce the EMI level, the switching frequency is IFB CCR eCgoinotnrol jittered (frequency modulated) by approximately 2.6 kHz. During start-up the frequency is 66 kHz to reduce start-up time when the AC input is phase angle dimmed. Jitter is disabled in deep dimming. I Soft-Start FB(DCMAXR) The controller includes a soft-start timing feature which inhibits the auto-restart protection feature for the soft-start period (t ) Soft-Start and SOFT to distinguish start-up into a fault (short-circuit) from a large CC Fold-Back Region output capacitor. At start-up the LYTSwitch-4 clamps the maximum duty cycle to reduce the output power. The total soft-start period is t . SOFT Remote ON/OFF and EcoSmart™ The VOLTAGE MONITOR pin has a 1 V threshold comparator connected at its input. This voltage threshold is used for IFB(AR) Auto-Restart remote ON/OFF control. When a signal is received at the VOLTAGE MONITOR pin to disable the output (VOLTAGE DC10 DC MAX MONITOR pin tied to ground through an optocoupler photo- Maximum Duty Cycle PI-5433-060410 transistor) the LYTSwitch-4 will complete its current switching Figure 6. FEEDBACK Pin Current Characteristic. cycle before the internal power FET is forced off. The FEEDBACK pin current is also used to clamp the maximum The remote ON/OFF feature can also be used as an eco-mode duty cycle to limit the available output power for overload and or power switch to turn off the LYTSwitch-4 and keep it in a open-loop conditions. This duty cycle reduction characteristic very low power consumption state for indefinite long periods. also promotes a monotonic output current start-up characteristic When the LYTSwitch-4 is remotely turned on after entering this and helps preventing over-shoot. mode, it will initiate a normal start-up sequence with soft-start the next time the BYPASS pin reaches 5.9 V. In the worst case, REFERENCE Pin the delay from remote on to start-up can be equal to the full The REFERENCE pin is tied to ground (SOURCE) via an external discharge/charge cycle time of the BYPASS pin. This reduced resistor. The value selected sets the internal references, consumption remote off mode can eliminate expensive and determining the operating mode for dimming (LYT4311-4318) unreliable in-line mechanical switches. and non-dimming (LYT4211-4218) operation and the line overvoltage thresholds of the VOLTAGE MONITOR pin. 4 Rev. E 11/14 www.power.com

LYT4211-4218/4311-4318 completed. Special consideration must be made to appropriately size the output capacitor to ensure that after the soft-start period (t ) the FEEDBACK pin current is above the I SOFT FB(AR) threshold to ensure successful power-supply start-up. After the D V soft-start time period, auto-restart is activated only when the CONTROL FEEDBACK pin current falls below I . BP FB(AR) Over-Current Protection S R FB The current limit circuit senses the current in the power FET. When this current exceeds the internal threshold (I ), the power LIMIT FET is turned off for the remainder of that cycle. A leading edge blanking circuit inhibits the current limit comparator for a short time (t ) after the power FET is turned on. This leading edge LEB blanking time has been set so that current spikes caused by PI-5435-052510 capacitance and rectifier reverse recovery will not cause premature termination of the power FET conduction. Figure 7. Remote ON/OFF VOLTAGE MONITOR Pin Control. Line Overvoltage Protection 5.9 V Regulator/Shunt Voltage Clamp This device includes overvoltage detection to limit the maximum The internal 5.9 V regulator charges the bypass capacitor operating voltage detected through the VOLTAGE MONITOR pin. connected to the BYPASS pin to 5.9 V by drawing a current An external peak detector consisting of a diode and capacitor is from the voltage on the DRAIN pin whenever the power FET is required to provide input line peak voltage to the VOLTAGE off. The BYPASS pin is the internal supply voltage node. When MONITOR pin through a resistor. the power FET is on, the device operates from the energy stored in the bypass capacitor. Extremely low power consumption of the The resistor sets line overvoltage (OV) shutdown threshold which, internal circuitry allows LYTSwitch-4 to operate continuously from once exceeded, forces the LYTSwitch-4 to stop switching. Once current it takes from the DRAIN pin. A bypass capacitor value the line voltage returns to normal, the device resumes normal of 47 or 4.7 µF is sufficient for both high frequency decoupling operation. A small amount of hysteresis is provided on the OV and energy storage. In addition, there is a 6.4 V shunt regulator threshold to prevent noise-generated toggling. When the power clamping the BYPASS pin at 6.4 V when current is provided to FET is off, the rectified DC high voltage surge capability is the BYPASS pin through an external resistor. This facilitates increased to the voltage rating of the power FET (725 V), due to the powering of LYTSwitch-4 externally through a bias winding to absence of the reflected voltage and leakage spikes on the drain. increase operating efficiency. It is recommended that the BYPASS pin is supplied current from the bias winding for Hysteretic Thermal Shutdown normal operation. The thermal shutdown circuitry senses the controller die temperature. The threshold is set at 142 °C typical with a 75 °C Auto-Restart hysteresis. When the die temperature rises above this threshold In the event of an open-loop fault (open FEEDBACK pin resistor (142 °C) the power FET is disabled and remains disabled until or broken path to feedback winding), output short-circuits or an the die temperature falls by 75 °C, at which point the power FET overload condition the controller enters into the auto-restart is re-enabled. mode. The controller annunciates both short-circuit and open-loop conditions once the FEEDBACK pin current falls Safe Operating Area (SOA) Protection below the I threshold after the soft-start period. To minimize The device also features a safe operating area (SOA) protection FB(AR) the power dissipation under this fault condition the shutdown/ mode which disables FET switching for 40 cycles in the event auto-restart circuit turns the power supply on (same as the the peak switch current reaches the I threshold and the switch LIMIT soft-start period) and off at an auto-restart duty cycle of on-time is less than t . This protection mode protects the ON(SOA) typically DC for as long as the fault condition persists. If the device under short-circuited LED conditions and at start-up during AR fault is removed during the auto-restart off-time, the power the soft-start period when auto-restart protection is inhibited. supply will remain in auto-restart until the full off-time count is The SOA protection mode remains active in normal operation. 5 www.power.com Rev. E 11/14

LYT4211-4218/4311-4318 Application Example peak drain voltage of U1 below the 725 V rating of the internal power FET. Bridge rectifier BR1 rectifies the AC line voltage. 20 W TRIAC Dimmable High Power Factor LED Driver EMI filtering is provided by L1-L3, C1, C4, R2, R24 and R25 Design Example (DER-350) together with the safety rated Y class capacitor (CY1) that bridges the safety isolation barrier between primary and secondary. The circuit schematic in Figure 8 shows a TRIAC dimmable high Resistor R2, R24 and R25 act to damp any resonances formed power factor LED driver based on LYT4317E from the LYTSwitch-4 between L1, L2, L3, C1 and the AC line impedance. A small family of devices. The design is configurable for non-dimmable bulk capacitor (C4) is required to provide a low impedance only applications by simple component value changes. It was source for the primary switching current. The maximum value optimized to drive an LED string at a voltage of 36 V with a of C2 and C4 is limited in order to maintain a power factor of constant current of 0.7 A ideal for Lumens PAR lamp retro-fit greater than 0.9. applications. The design operates over an input voltage range of 90 VAC to 132 VAC. LYTSwitch-4 Primary To provide peak line voltage information to U1 the incoming The key goals of this design were compatibility with standard rectified AC peak charges C6 via D2. This is then fed into the leading edge TRIAC AC dimmers, very wide dimming range VOLTAGE MONITOR pin of U1 as a current via R10. This (1000:1, 550 mA:0.55 mA), high efficiency (>85%) and high sensed current is also used by the device to set the line input power factor (>0.9). The design is fully protected from faults overvoltage protection threshold. Resistor R9 provides a such as no-load (open load), overvoltage and output short- discharge path for C6 with a time constant much longer than circuit or overload conditions and over temperature. that of the rectified AC to prevent generation of line frequency ripple. Circuit Description The LYTSwitch-4 device (U1- LYT4317E) integrates the power The VOLTAGE MONITOR pin current and the FEEDBACK pin FET, controller and start-up functions into a single package current are used internally to control the average output LED reducing the component count versus typical implementations. current. For TRIAC phase-dimming applications a 49.9 kW Configured as part of an isolated continuous conduction mode resistor (R14) is used on the REFERENCE pin and 2 MW (R10) flyback converter, U1 provides high power factor via its internal on the VOLTAGE MONITOR pin to provide a linear relationship control algorithm together with the small input capacitance of between input voltage and the output current and maximizing the design. Continuous conduction mode operation results in the dimming range. reduced primary peak and RMS current. This both reduces EMI noise, allowing simpler, smaller EMI filtering components Diode D3, R15 and C7 clamp the drain voltage to a safe level and improves efficiency. Output current regulation is maintained due to the effects of leakage inductance. Diode D4 is without the need for secondary-side sensing which eliminates necessary to prevent reverse current from flowing through U1 current sense resistors and improves efficiency. for the period of the rectified AC input voltage that the voltage across C4 falls to below the reflected output voltage (V ). Input Stage OR Fuse F1 provides protection from component failures while RV1 provides a clamp during differential line surges, keeping the C13 R26 100 pF 30 Ω 200 V DFLUD19400-7 DFLDU21400 12 FL1 363C301 1VµF 363C301 2VµF 2R0 2k3Ω 55306 mV,A R24 D7 MBBR61S 417/8 k WΩ 511/R08 9 kWΩ 20R01 k5Ω 26.3C20 7n VF 1 FL2 BYW29-200 600 V D6 RTN BAV21 10 D3 R20 C5 C9 US1J 39 Ω 100 nF 56 µF 1/8 W 50 V 50 V 15/R211 0W 2225C001 nVF 2R1 M%10Ω RTM18 11 2R0 1k9Ω 1205C002 nVF 36R0 6kΩ 1205C004 nVF 22.5C20 6µ VF UDS14D 1/8 W 41R7/8 2k 5WΩ 1 Lm1H417/R8 k2 WΩ 1 Lm2H 5 Lm3H LYTSwitch-4D CONTVROL1B3/RA1D Vk105Ω17 W6 116/R115%16 k8 WΩ ML BADV821 5F 1A 1940R0 - V V11A3C2 X0202QM1A2BL2 LYTU43117E S R FBBP MMBQT23904 VR4MAZS330033 V 10C01 5nF L VAC N 457C003 VnF 110R 0W8 Ω 419/R11.9%16 4 kWΩ417C6 8 µVF 15C001 n4VF 11/R1020 Ω7 W 11/R1 k20Ω2 W 50 V 47C0Y p1F 250 VAC PI-6875-052213 Figure 8. DER-350 Schematic of an Isolated, TRIAC Dimmable, High Power Factor, 90-132 VAC, 20 W / 36 V / 550 mA LED Driver. 6 Rev. E 11/14 www.power.com

LYT4211-4218/4311-4318 Diode D6, C5, C9, R19 and R20 create the primary bias supply TRIAC Phase Dimming Control Compatibility from an auxiliary winding on the transformer. Capacitor C8 The requirement to provide output dimming with low-cost, provides local decoupling for the BYPASS pin of U1 which is the TRIAC-based, leading edge phase dimmers introduces a supply pin for the internal controller. During start-up C8 is number of trade-offs in the design. charged to ~6 V from an internal high-voltage current source tied to the device DRAIN pin. This allows the part to start Due to the much lower power consumed by LED based lighting switching at which point the operating supply current is provided the current drawn by the overall lamp is below the holding from the bias supply via R17. Capacitor C8 also selects the current of the TRIAC within the dimmer. This can cause output power mode (47 µF for reduced power was selected to undesirable behaviors such as limited dimming range and/or reduce dissipation in U1 and increase efficiency for this design). flickering as the TRIAC fires inconsistently. The relatively large impedance the LED lamp presents to the line allows significant Feedback ringing to occur due to the inrush current charging the input The bias winding voltage is proportional to the output voltage capacitance when the TRIAC turns on. This too can cause (set by the turns ratio between the bias and secondary similar undesirable behavior as the ringing may cause the windings). This allows the output voltage to be monitored TRIAC current to fall to zero and turn off. without secondary-side feedback components. Resistor R18 converts the bias voltage into a current which is fed into the To overcome these issues simple two circuits, the SCR active FEEDBACK pin of U1. The internal engine within U1 combines damper and R-C passive bleeder, are incorporated. The the FEEDBACK pin current, the VOLTAGE MONITOR pin current drawback of these circuits is increased dissipation and and drain current information to provide a constant output therefore reduced efficiency of the supply. For non-dimming current over a 1.5:1 output voltage variation (LED string voltage applications these components can simply be omitted. variation of ±25%) at a fixed line input voltage. The SCR active damper consists of components R6, C3, and To limit the output voltage at no-load an output overvoltage Q1 in conjunction with R8. This circuit limits the inrush current protection circuit is set by D8, C15, R22, VR4, R27, C14 and Q2. that flows to charge C4 when the TRIAC turns on by placing R8 Should the output load be disconnected then the bias voltage in series for the first ~1 ms of the TRIAC conduction. After will increase until VR4 conducts, turning on Q2 and reducing approximately 1 ms, Q1 turns on and bypasses R8. This keeps the current into the FEEDBACK pin. When this current drops the power dissipation on R8 low and allows a larger value below 10 µA the part enters auto-restart and switching is during current limiting. Resistor R6 and C3 provide the delay disabled for 300 ms allowing time for the output and bias on Q1 turn on after the TRIAC conducts. Diode D9 blocks the voltages to fall. charge in capacitor C4 from flowing back after the TRIAC turns on which helps in dimming compatibility especially with high Output Rectification power dimmers. The transformer secondary winding is rectified by D7 and filtered by C11 and C12. An ultrafast TO-220 diode was The passive bleeder circuit is comprised of R1 and C1. This selected for efficiency and the combined value of C11 and C12 helps keep the input current above the TRIAC holding current were selected to give peak-to-peak LED ripple current equal to while the input current corresponding to the effective driver 30% of the mean value. For designs where lower ripple is resistance increases during each AC half-cycle. desirable the output capacitance value can be increased. A small pre-load is provided by R23 which discharges residual charge in output capacitors when turned off. 7 www.power.com Rev. E 11/14

LYT4211-4218/4311-4318 Modified DER-350 20 W High Power Factor LED Driver • For maximum output power column for Non-Dimmable and Enhanced Line Regulation • Reflected output voltage (V ) of 65 V OR • FEEDBACK pin current of 165 µA The circuit schematic in Figure 9 shows a high power factor • BYPASS pin capacitor value of 4.7 µF (LYT4x11 = 4.7 µF) LED driver based on a LYT4317 from the LYTSwitch-4 family of devices. It was optimized to drive an LED string at a voltage of Note that input line voltages above 85 VAC do not change the 36 V with a constant current of 0.55 A, ideal for high lumen PAR power delivery capability of LYTSwitch-4 devices. lamp retro-fit applications. The design operates over the low-line input voltage range of 90 VAC to 132 VAC and is Device Selection non-dimming application. A non-dimming application has Select the device size by comparing the required output power tighter output current variation with changes in the line voltage to the values in Table 1. For thermally challenging designs, e.g., than a dimming application. It’s key to note that, although not incandescent lamp replacement, where either the ambient specified for dimming, no circuit damage will result if the end temperature local to the LYTSwitch-4 device is high and/or user does operate the design with a phase controlled dimmer. there is minimal space for heat sinking use the minimum output power column. This is selected by using a 47 µF BYPASS pin Modification for Non-Dimmable Configuration capacitor and results in a lower device current limit and therefore The design is configurable for non-dimmable application by lower conduction losses. For open frame design or designs simply removing the component for SCR active damper (R6, where space is available for heat sinking then refer to the R8, C3, and Q1), blocking diode D9 and R-C bleeder (R1, C1) maximum output power column. This is selected by using a changes and replacing the reference resistor R14 with 24.9 kW. 4.7 µF BYPASS pin capacitor for all but the LYT4x11 which has (See Figure 9) only one power setting. In all cases in order to obtain the best output current tolerance maintain the device temperature below Key Application Considerations 100 °C Power Table Maximum Input Capacitance The data sheet power table (Table 1) represents the minimum To achieve high power factor, the capacitance used in both the and maximum practical continuous output power based on the EMI filter and for decoupling the rectified AC (bulk capacitor) following conditions: must be limited in value. The maximum value is a function of the output power of the design and reduces as the output • Efficiency of 80% power reduces. For the majority of designs limit the total • Device local ambient of 70 °C capacitance to less than 200 nF with a bulk capacitor value of • Sufficient heat sinking to keep the device temperature below 100 nF. Film capacitors are recommended compared to 100 °C ceramic types as they minimize audible noise with operating • For minimum output power column with leading edge phase dimmers. Start with a value of 10 nF • Reflected output voltage (V ) of 120 V for the capacitance in the EMI filter and increase in value until OR • FEEDBACK pin current of 135 µA there is sufficient EMI margin. • BYPASS pin capacitor value of 47 µF C13 R26 100 pF 41R7/8 2k 4WΩ DFLDU21400 12 FL1 30 Ω 200 V 363C301 1VµF 363C301 2VµF 2R0 2k3Ω 55306 mV,A D7 MBBR61S 511/R08 9 kWΩ 20R01 k5Ω 26.3C20 7n VF 1 FL2 BYW29-200 600 V D6 RTN BAV21 10 D3 R20 C5 C9 US1J 39 Ω 100 nF 56 µF 1/8 W 50 V 50 V R10 11 2 MΩ T1 R19 1% RM8 20 kΩ 41R7/8 2k 5WΩ 1 Lm1H417/R8 k2 WΩ 1 Lm2H 1205C002 nVF L3 1205C004 nVF 22.5C20 6µ VF UDS14D D5 1/8 W 5 mH BAV16 LYTSwitch-4 D CONTVROL13/R1 k10Ω7 W 116/R115%16 k8 WΩ ML BADV821 5F 1A 1940R0 - V V11A3C2 LYTU43117E S R FBBP MMBQT23904 VR4MAZS330033 V 10C01 5nF L VAC N 214/R11.9%16 4 kWΩ417C6 8 µVF 15C001 n4VF 11/R1020 Ω7 W 11/R1 k20Ω2 W 50 V 47C0Y p1F 250 VAC PI-6875a-052213 Figure 9. Modified Schematic of RD-350 for Non-Dimmable, Isolated, High Power Factor, 90-132 VAC, 20 W / 36 V LED Driver. 8 Rev. E 11/14 www.power.com

LYT4211-4218/4311-4318 REFERENCE Pin Resistance Value Selection Operation with Phase Controlled Dimmers The LYTSwitch-4 family contains phase dimming devices, Dimmer switches control incandescent lamp brightness by not LYT4311-4318, and non-dimming devices, LYT4211-4218. The conducting (blanking) for a portion of the AC voltage sine wave. non-dimmable devices use a 24.9 kW ±1% REFERENCE pin This reduces the RMS voltage applied to the lamp thus reducing resistor for best output current tolerance (over AC input voltage the brightness. This is called natural dimming and the LYTSwitch-4 changes). The dimmable devices (i.e. LYT4311-4318) use 49.9 kW LYT4311-4318 devices when configured for dimming utilize ±1% to achieve the widest dimming range. natural dimming by reducing the LED current as the RMS line voltage decreases. By this nature, line regulation performance is VOLTAGE MONITOR Pin Resistance Network Selection purposely decreased to increase the dimming range and more For widest AC phase angle dimming range with LYT4311-4318, closely mimic the operation of an incandescent lamp. Using a use a 2 MW (1.7 MW for 100 VAC (Japan)) resistor connected to 49.9 kW REFERENCE pin resistance selects natural dimming the line voltage peak detector circuit. Make sure that the mode operation. resistor’s voltage rating is sufficient for the peak line voltage. If necessary use multiple series connected resistors. Leading Edge Phase Controlled Dimmers The requirement to provide flicker-free output dimming with low- Primary Clamp and Output Reflected Voltage V cost, TRIAC-based, leading edge phase dimmers introduces a OR A primary clamp is necessary to limit the peak drain to source number of trade-offs in the design. voltage. A Zener clamp requires the fewest components and board space and gives the highest efficiency. RCD clamps are Due to the much lower power consumed by LED based lighting also acceptable however the peak drain voltage should be the current drawn by the overall lamp is below the holding carefully verified during start-up and output short-circuits as the current of the TRIAC within the dimmer. This causes clamping voltage varies with significantly with the peak drain undesirable behaviors such as limited dimming range and/or current. flickering. The relatively large impedance the LED lamp presents to the line allows significant ringing to occur due to the inrush For the highest efficiency, the clamping voltage should be current charging the input capacitance when the TRIAC turns selected to be at least 1.5 times the output reflected voltage, on. This too can cause similar undesirable behavior as the V , as this keeps the leakage spike conduction time short. ringing may cause the TRIAC current to fall to zero and turn off. OR This will ensure efficient operation of the clamp circuit and will also keep the maximum drain voltage below the rated To overcome these issues two circuits, the active damper and breakdown voltage of the FET. An RCD (or RCDZ) clamp passive bleeder, are incorporated. The drawback of these provides tighter clamp voltage tolerance than a Zener clamp. circuits is increased dissipation and therefore reduced efficiency The RCD clamp is more cost effective than the Zener clamp but of the supply so for non-dimming applications these components requires more careful design to ensure that the maximum drain can simply be omitted. voltage does not exceed the power FET breakdown voltage. These V limits are based on the BV rating of the internal Figure 10a shows the line voltage and current at the input of a OR DSS FET, a V of 60 V to 100 V is typical for most designs, giving leading edge TRIAC dimmer with Figure 10b showing the OR the best PFC and regulation performance. resultant rectified bus voltage. In this example, the TRIAC conducts at 90 degrees. Series Drain Diode Andeencv uieclsters.a af aTrysh tte oo v rpo Srletcavhgeoent ttr kareyti vndegiro smdeeu c siunt r esrexencritee eflsod ww tihitnheg to htuhetr poduuratg irhne fltishe ec ted put) (V)325500 PVCIou-5lrt9rae8g3ne-t060810 00..3255 mer) (A) voltage, V . The current rating should exceed two times the n m average pOriRmary current and have a peak rating equal to the mer I150 0.15 h Di maximum drain current of the selected LYTSwitch-4 device. m 50 0.05 ug Di o Line Voltage Peak Detector Circuit at -500.5 50 100 150 200 250 300 350 400-0.05 Thr LYTSwitch-4 devices use the peak line voltage to regulate the ge ( nt ( a-150 -0.15 e iplpsooo wrwweeceero rrP mdfFaem calitvneoendrr d (y>he it0gdo.h 9tteoh),r e sml imoninueait mlpcleuuirztr e.vr e a lAnilnu tec ed asrips ipataoprcerlei ttaio oacrnn cv.dea plgutieav beol eft h 1be µu htF ig rteohs eu4s.lt7t i nµ F Line Volt--235500 --00..2355 Line Curr Conduction Angle (°) Figure 10a. Ideal Input Voltage and Current Waveform for a Leading Edge TRIAC Dimmer at 90°. 9 www.power.com Rev. E 11/14

LYT4211-4218/4311-4318 350 PI-5984-060810 0.35 350 PI-5986-060810 0.35 Rectified Input Voltage (V)32211050505000000 VCoulrtraegnet 000000......322110555 Rectified Input Current (A) Dimmer Output Voltage (V)--2112-555555000000 0 50 100 150 200 250 300VCoulrtraegnet350 000---000...210...012555555 Dimmer Output Current (A) 0 0 -350 -0.35 0 50 100 150 200 250 300 350 400 Conduction Angle (°) Conduction Angle (°) Figure 10b. Resultant Waveforms Following Rectification of TRIAC Dimmer Output. Figure 12. Ideal Dimmer Output Voltage and Current Waveforms for a Trailing Edge Dimmer at 90° Conduction Angle. Figure 11 shows undesired rectified bus voltage and current with the TRIAC turning off prematurely and restarting. Start by adding a bleeder circuit. Add a 0.44 µF capacitor and 510 W 1 W resistor (components in series) across the rectified If the TRIAC is turning off before the end of the half-cycle bus (C1 and R1 in Figure 8). If the results in satisfactory operation erratically or alternate half AC cycles have different conduction reduce the capacitor value to the smallest that result in acceptable angles then flicker will be observed in the LED light due to performance to reduce losses and increase efficiency. variations in the output current. This can be solved by including a bleeder and damper circuit. If the bleeder circuit does not maintain conduction in the TRIAC, then add an active damper as shown in Figure 8. This consists Dimmers will behave differently based on manufacturer and of components R6, C3, and Q1 in conjunction with R8. This power rating, for example a 300 W dimmer requires less circuit limits the inrush current that flows to charge C4 when the dampening and requires less power loss in the bleeder than a TRIAC turns on by placing R8 in series for the first 1 ms of the 600 W or 1000 W dimmer due to different drive circuits and TRIAC conduction. After approximately 1 ms, Q1 turns on and TRIAC holding current specifications. Multiple lamps in parallel shorts R8. This keeps the power dissipation on R8 low and driven from the same dimmer can introduce more ringing due to allows a larger value to be used during current limiting. the increased capacitance of parallel units. Therefore, when Increasing the delay before Q1 turns on by increasing the value testing dimmer operation verify on a number of models, of resistor R6 will improve dimmer compatibility but cause more different line voltages and with both a single driver and multiple power to be dissipated across R8. Monitor the AC line current drivers in parallel. and voltage at the input of the power supply as you make the adjustments. Increase the delay until the TRIAC operates 350 PI-5985-060810 0.35 properly but keep the delay as short as possible for efficiency. Voltage oltage (V)320500 Current 00..325 urrent (A) Aathnsed ad dgraivemenrep.rearl cruirlceu tihtse, gthree amteor rteh ety ppoesw eorf ddiimssmipeartse dw iinll wthoer kb lweeitdhe r ut V200 0.2 ut C Trailing Edge Phase Controlled Dimmers p p d In150 0.15 d In Figure 11 shows the line voltage and current at the input of the e e power supply with a trailing edge dimmer. In this example, the fi100 0.1 fi cti cti dimmer conducts at 90 degrees. Many of these dimmers use e e R 50 0.05 R back-to-back connected power FETs rather than a TRIAC to control the load. This eliminates the holding current issue of 0 0 TRIACs and since the conduction begins at the zero crossing, 0 50 100 150 200 250 300 350 400 high current surges and line ringing are minimized. Typically these Conduction Angle (°) types of dimmers do not require damping and bleeder circuits. Figure 11. Example of Phase Angle Dimmer Showing Erratic Firing. 10 Rev. E 11/14 www.power.com

LYT4211-4218/4311-4318 Audible Noise Considerations for Use with lifetime. For every 10 °C rise in temperature, component life is Leading Edge Dimmers reduced by a factor of 2. Therefore it is important to properly Noise created when dimming is typically created by the input heat sink and to verify the operating temperatures of all devices. capacitors, EMI filter inductors and the transformer. The input capacitors and inductors experience high di/dt and dv/dt every Layout Considerations AC half-cycle as the TRIAC fires and an inrush current flows to Primary-Side Connections charge the input capacitance. Noise can be minimized by Use a single point (Kelvin) connection at the negative terminal of selecting film vs. ceramic capacitors, minimizing the capacitor the input filter capacitor for the SOURCE pin and bias returns. value and selecting inductors that are physically short and wide. This improves surge capabilities by returning surge currents from the bias winding directly to the input filter capacitor. The The transformer may also create noise which can be minimized BYPASS pin capacitor should be located as close to the by avoiding cores with long narrow legs (high mechanical BYPASS pin and connected as close to the SOURCE pin as resonant frequency). For example, RM cores produce less possible. The SOURCE pin trace should not be shared with the audible noise than EE cores for the same flux density. Reducing main power FET switching currents. All FEEDBACK pin the core flux density will also reduce the noise. Reducing the components that connect to the SOURCE pin should follow the maximum flux density (BM) to 1500 Gauss usually eliminates same rules as the BYPASS pin capacitor. It is critical that the any audible noise but must be balanced with the increased core main power FET switching currents return to the bulk capacitor size needed for a given output power. with the shortest path as possible. Long high current paths Thermal and Lifetime Considerations create excessive conducted and radiated noise. Lighting applications present thermal challenges to the driver. Secondary-Side Connections In many cases the LED load dissipation determines the working The output rectifier and output filter capacitor should be as ambient temperature experienced by the drive so thermal close as possible. The transformer’s output return pin should evaluation should be performed with the driver inside the final have a short trace to the return side of the output filter capacitor. enclosure. Temperature has a direct impact on driver and LED BYPASS Pin LYT4317E Capacitor Clamp Transformer Output Input EMI Filter Diode Bullk Capacitor Output Capacitor REFERENCE Pin Resistor FEEDBACK Pin Resistor Output Capacitors VOLTAGE MONITOR Pin Resistor PI-6904-072313 Figure 13. DER-350 20 W Layout Example, Top Silk / Bottom Layer. 11 www.power.com Rev. E 11/14

LYT4211-4218/4311-4318 Quick Design Checklist Maximum Drain Voltage Verify that the peak V does not exceed 725 V under all DS operating conditions including start-up and fault conditions. Maximum Drain Current Measure the peak drain current under all operation conditions including start-up and fault conditions. Look for signs of transformer saturation (usually occurs at highest operating ambient temperatures). Verify that the peak current is less than the stated Absolute Maximum Rating in the data sheet. Thermal Check At maximum output power, both minimum and maximum line voltage and ambient temperature; verify that temperature specifications are not exceeded for the LYTSwitch-4, transformer, output diodes, output capacitors and drain clamp components. 12 Rev. E 11/14 www.power.com

LYT4211-4218/4311-4318 Absolute Maximum Ratings(1,4) DRAIN Pin Peak Current(5): LYT4x11 .................................1.37 A Operating Junction Temperature(2) .........................-40 to 150 °C LYT4x12 .................................2.08 A LYT4x13 .................................2.72 A Notes: LYT4x14 ................................4.08 A 1. All voltages referenced to SOURCE, T = 65 °C. A LYT4x15 ................................5.44 A 2. Normally limited by internal circuitry. LYT4x16 ................................6.88 A 3. 1/16 in. from case for 5 seconds. LYT4x17 .................................7.73 A 4. Absolute Maximum Ratings specified may be applied, one LYT4x18 ................................9.00 A at a time without causing permanent damage to the DRAIN Pin Voltage ……………………… .................-0.3 to 725 V product. Exposure to Absolute Maximum Ratings for BYPASS Pin Voltage .................................................-0.3 to 9 V extended periods of time may affect product reliability. BYPASS Pin Current ……………………… ......................100 mA 5. Peak DRAIN current is allowed while the DRAIN voltage is VOLTAGE MONITOR Pin Voltage .............................-0.3 to 9 V(6) simultaneously less than 400 V. See also Figure 13. FEEDBACK Pin Voltage …….. .................................. -0.3 to 9 V 6. During start-up (the period before the BYPASS pin begins REFERENCE Pin Voltage ..........................................-0.3 to 9 V powering the IC) the VOLTAGE MONITOR pin voltage can Lead Temperature(3) ........................................................260 °C safely rise to 15 V without damage. Storage Temperature …………………. ..................-65 to 150 °C Thermal Resistance Thermal Resistance: E Package Notes: (q ) ....................................................105 °C/W(1) 1. Free standing with no heat sink. JA (q ) ....................................................2 °C/W(2) 2. Measured at back surface tab. JC Conditions Parameter Symbol SOURCE = 0 V; T = -20 °C to 125 °C Min Typ Max Units J (Unless Otherwise Specified) Control Functions Average 124 132 140 Switching Frequency f T = 65 °C kHz OSC J Peak-Peak Jitter 5.4 Frequency Jitter T = 65 °C f J 2.6 kHz Modulation Rate M See Note B LYT4x11 -4.1 -3.4 -2.7 LYT4x12 -7.3 -6.1 -4.9 V = 0 V, I BP CH1 T = 65 °C J LYT4x13-4x17 -12 -9.5 -7.0 LYT4x18 -13.3 -10.8 -8.3 BYPASS Pin mA Charge Current LYT4x11 -0.85 -0.62 -0.43 LYT4x12 -3.5 -2.4 -1.7 V = 5 V, I BP CH2 T = 65 °C J LYT4x13-4x17 -6.5 -4.35 -3.1 LYT4x18 -7.5 -5.5 -4.25 Charging Current See Note A, B 0.7 %/°C Temperature Drift BYPASS Pin Voltage V 0 °C < T < 100 °C 5.75 5.95 6.15 V BP J BYPASS Pin V 0 °C < T < 100 °C 0.85 V Voltage Hysteresis BP(H) J BYPASS Pin I = 4 mA V BP 6.1 6.4 6.6 V Shunt Voltage BP(SHUNT) 0 °C < T < 100 °C J T = 65 °C Soft-Start Time t J 55 76 ms SOFT V = 5.9 V BP 13 www.power.com Rev. E 11/14

LYT4211-4218/4311-4318 Conditions Parameter Symbol SOURCE = 0 V; T = -20 °C to 125 °C Min Typ Max Units J (Unless Otherwise Specified) Control Functions (cont.) 0 °C < T < 100 °C I J 0.5 0.8 1.2 CD2 FET Not Switching Drain Supply Current mA 0 °C < T < 100 °C I J 1 2.5 4 CD1 FET Switching at f OSC VOLTAGE MONITOR Pin Line Overvoltage TJ = 65 °C Threshold 115 123 131 I R = 24.9 kW µA Threshold OV R R = 49.9 kW Hysteresis 6 R VOLTAGE MONITOR 0 °C < T < 100 °C V J 2.75 3.0 3.25 V Pin Voltage V I < I V OV VOLTAGE MONITOR Pin V = 5 V I V 165 185 205 µA Short-Circuit Current V(SC) T = 65 °C J Remote ON/OFF V T = 65 °C 0.5 V Threshold V(REM) J FEEDBACK Pin FEEDBACK Pin Current at Onset of Maximum I 0 °C < T < 100 °C 90 µA FB(DCMAXR) J Duty Cycle FEEDBACK Pin Current I 0 °C < T < 100 °C 210 µA Skip Cycle Threshold FB(SKIP) J I < I < I Maximum Duty Cycle DC FB(DCMAXR) FB FB(SKIP) 90 99.9 % MAX 0 °C < T < 100 °C J I = 150 µA FEEDBACK Pin Voltage V FB 2.1 2.3 2.56 V FB 0 °C < T < 100 °C J FEEDBACK Pin V = 5 V I FB 320 400 480 µA Short-Circuit Current FB(SC) T = 65 °C J DC10 I = I , T = 65 °C, See Note B 17 FB FB(AR) J Duty Cycle Reduction DC40 I = 40 µA, T = 65 °C 34 % FB J DC60 I = 60 µA, T = 65 °C 55 FB J Auto-Restart T = 65 °C Auto-Restart ON-Time t J 55 76 ms AR V = 5.9 V BP Auto-Restart T = 65 °C DC J 25 % Duty Cycle AR See Note B SOA Minimum Switch T = 65 °C t J 0.875 µs ON-Time ON(SOA) See Note B FEEDBACK Pin Current I 0 °C < T < 100 °C 6.5 10 µA During Auto-Restart FB(AR) J 14 Rev. E 11/14 www.power.com

LYT4211-4218/4311-4318 Conditions Parameter Symbol SOURCE = 0 V; T = -20 °C to 125 °C Min Typ Max Units J (Unless Otherwise Specified) REFERENCE Pin REFERENCE Pin V 1.223 1.245 1.273 V Voltage R R = 24.9 kW R REFERENCE Pin 0 °C < T < 100 °C I J 48.69 49.94 51.19 µA Current R Current Limit/Circuit Protection di/dt = 174 mA/µs LYT4x12 1.00 1.17 di/dt = 174 mA/µs LYT4x13 1.24 1.44 Full Power I di/dt = 225 mA/µs LYT4x14 1.46 1.70 Current Limit LIMIT(F) A (C = 4.7 µF) TJ = 65 °C di/dt = 320 mA/µs LYT4x15 1.76 2.04 BP di/dt = 350 mA/µs LYT4x16 2.43 2.83 di/dt = 426 mA/µs LYT4x17 3.26 3.79 di/dt = 133 mA/µs LYT4x11 0.74 0.86 di/dt = 195 mA/µs LYT4x12 0.81 0.95 di/dt = 192 mA/µs LYT4x13 1.00 1.16 Reduced Power I di/dt = 240 mA/µs LYT4x14 1.19 1.38 Current Limit LIMIT(R) A (C = 47 µF) TJ = 65 °C di/dt = 335 mA/µs LYT4x15 1.43 1.66 BP di/dt = 380 mA/µs LYT4x16 1.76 2.05 di/dt = 483 mA/µs LYT4x17 2.35 2.73 di/dt = 930 mA/µs LYT4x18 4.90 5.70 Minimum ON-Time t + t T = 65 °C 300 500 700 ns Pulse LEB IL(D) J Leading Edge T = 65 °C t J 150 500 ns Blanking Time LEB See Note B T = 65 °C Current Limit Delay t J 150 ns IL(D) See Note B Thermal Shutdown See Note B 147 155 164 °C Temperature Thermal Shutdown See Note B 56 °C Hysteresis BYPASS Pin Power-Up Reset Threshold V 0 °C < T < 100 °C 2.25 3.30 4.25 V BP(RESET) J Voltage 15 www.power.com Rev. E 11/14

LYT4211-4218/4311-4318 Conditions Parameter Symbol SOURCE = 0 V; T = -20 °C to 125 °C Min Typ Max Units J (Unless Otherwise Specified) Output T = 65 °C 11.5 13.2 LYT4x11 J I = 100 mA D T = 100 °C 13.5 15.5 J T = 65 °C 6.9 8.0 LYT4x12 J I = 100 mA D T = 100 °C 8.4 9.7 J T = 65 °C 5.3 6.0 LYT4x13 J I = 150 mA D T = 100 °C 6.3 7.3 J T = 65 °C 3.4 3.9 LYT4x14 J I = 150 mA D T = 100 °C 3.9 4.5 J ON-State Resistance R W DS(ON) T = 65 °C 2.5 2.9 LYT4x15 J I = 200 mA D T = 100 °C 3.0 3.4 J T = 65 °C 1.9 2.2 LYT4x16 J I = 250 mA D T = 100 °C 2.3 2.7 J T = 65 °C 1.7 2.0 LYT4x17 J I = 350 mA D T = 100 °C 2.0 2.4 J T = 65 °C 1.3 1.5 LYT4x18 J I = 600 mA D T = 100 °C 1.6 1.8 J V = 6.4 V OFF-State Drain BP I V = 560 V 50 µA Leakage Current DSS DS T = 100 °C J V = 6.4 V Breakdown Voltage BV BP 725 V DSS T = 65 °C J Minimum Drain T < 100 °C 36 V Supply Voltage J Rise Time t 100 V R Measured in a Typical Flyback See Note B Fall Time t 50 ns F NOTES: A. For specifications with negative values, a negative temperature coefficient corresponds to an increase in magnitude with increasing temperature and a positive temperature coefficient corresponds to a decrease in magnitude with increasing temperature. B. Guaranteed by characterization. Not tested in production. 16 Rev. E 11/14 www.power.com

LYT4211-4218/4311-4318 Typical Performance Characteristics e (pF)10000 LLLLSYYYYcTTTTa4444linxxxx1111g1234 F a 0000c....t1235o8886rs: PI-6715-072313 300 LLLLSYYYYcTTTTa4444linxxxx1111g1234 F a 0000c....t1235o8886rs: PI-6716-071012 anc1000 LLYYTT44xx1156 01..7050 W) 200 LLYYTT44xx1156 01..7050 pacit LL YYTT44xx1178 11..1565 er (m LL YYTT44xx1178 11..1565 a w N C 100 Po 100 AI R D 10 0 1 100 200 300 400 500 600 0 100 200 300 400 500 600 700 DRAIN Pin Voltage (V) DRAIN Voltage (V) Figure 14. Drain Capacitance vs. Drain Pin Voltage. Figure 15. Power vs. Drain Voltage. g) n nt (A) 45 PI-6717-071012 entMaximum Rati 10..128 PI-6909-110512 Curre 3 SLLYYcaTTl44inxxg11 12F a c00t..12o88rs: N Currolute 0.6 RAIN 2 LLLYYYTTT444xxx111345 000...357865 DRAIo Abs 0.4 D LYT4x16 1.00 t 1 LYT4x17 1.16 d LYT4x18 1.55 ze 0.2 LYT4x2 8 TCASE = 25 °C ali LYT4x28 TCASE = 100 °C m 0 r 0 o 0 2 4 6 8 10 12 14 16 18 20 N 0 100 200 300 400 500 600 700 800 ( DRAIN Voltage (V) DRAIN Voltage (V) Figure 16. Drain Current vs. Drain Voltage. Figure 17. Maximum Allowable Drain Current vs. Drain Voltage. 17 www.power.com Rev. E 11/14

LYT4211-4218/4311-4318 eSIP-7C (E Package) 2 0.403 (10.24) C 0.397 (10.08) 0.264 (6.70) A 0.081 (2.06) Ref. 0.077 (1.96) B Detail A 2 0.325 (8.25) 0.290 (7.37) 0.198 (5.04) Ref. 0.320 (8.13) Ref. 0.519 (13.18) Ref. Pin #1 0.207 (5.26) I.D. 0.140 (3.56) 0.016 (0.41) 0.187 (4.75) 0.120 (3.05) Ref. 0.070 (1.78) Ref. 0.047 (1.19) 3 4 0.033 (0.84) 0.050 (1.27) 0.100 (2.54) 6× 0.016 (0.41) 0.028 (0.71) 3 6× 0.118 (3.00) 0.011 (0.28) 0.010 M 0.25 M C A B 0.020 M 0.51 M C FRONT VIEW SIDE VIEW BACK VIEW 10° Ref. 0.100 (2.54) All Around 0.021 (0.53) 0.019 (0.48) 0.060 (1.52) 0.020 (0.50) 0.050 (1.27) Ref. 0.050 (1.27) PIN 1 0.048 (1.22) 0.059 (1.50) 0.155 (3.93) 0.378 (9.60) 0.046 (1.17) Ref. 0.019 (0.48) Ref. 0.023 (0.58) PIN 7 END VIEW 0.027 (0.70) 0.059 (1.50) DETAIL A Notes: 0.100 (2.54) 0.100 (2.54) 1. Dimensioning and tolerancing per ASME Y14.5M-1994. 2. Dimensions noted are determined at the outermost extremes of the plastic MOUNTING HOLE PATTERN body exclusive of mold flash, tie bar burrs, gate burrs, and interlead flash, but (not to scale) including any mismatch between the top and bottom of the plastic body. Maximum mold protrusion is 0.007 [0.18] per side. 3. Dimensions noted are inclusive of plating thickness. 4. Does not include inter-lead flash or protrusions. 5. Controlling dimensions in inches (mm). PI-4917-020515 Part Ordering Information • LYTSwitch-4 Product Family • 4 Series Number • PFC/Dimming 2 PFC No Dimming 3 PFC Dimming • Voltage Range 1 Low-Line • Device Size • Package Identifier LYT 4 2 1 3 E E eSIP-7C 18 Rev. E 11/14 www.power.com

LYT4211-4218/4311-4318 Revision Notes Date A Initial Release. 11/12 B Corrected Min and Typ parameter table values on pages 13 and 14. 02/13 B Updated parameters I , I , I , DC , I , I ,on pages 13, 14 and 15. 02/20/13 CH1 CH2 CD1 AR LIMIT(F) LIMIT(R) C Updated figures 1, 3a, 3b, 3c, 3d, 8, 9 and 13. 06/13 D Added Note 6 to Absolute Maximum Ratings section. 10/13 E Removed L pin parts, updated I , BV , Thermal Shutdown Temperature and Hysteresis parameters per PCN-14441. 11/11/14 CH2 DSS 19 www.power.com Rev. E 11/14

For the latest updates, visit our website: www.power.com Power Integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability. Power Integrations does not assume any liability arising from the use of any device or circuit described herein. POWER INTEGRATIONS MAKES NO WARRANTY HEREIN AND SPECIFICALLY DISCLAIMS ALL WARRANTIES INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF THIRD PARTY RIGHTS. Patent Information The products and applications illustrated herein (including transformer construction and circuits external to the products) may be covered by one or more U.S. and foreign patents, or potentially by pending U.S. and foreign patent applications assigned to Power Integrations. A complete list of Power Integrations patents may be found at www.power.com. Power Integrations grants its customers a license under certain patent rights as set forth at http://www.power.com/ip.htm. Life Support Policy POWER INTEGRATIONS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF POWER INTEGRATIONS. As used herein: 1. A Life support device or system is one which, (i) is intended for surgical implant into the body, or (ii) supports or sustains life, and (iii) whose failure to perform, when properly used in accordance with instructions for use, can be reasonably expected to result in significant injury or death to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. The PI logo, TOPSwitch, TinySwitch, LinkSwitch, LYTSwitch, InnoSwitch, DPA-Switch, PeakSwitch, CAPZero, SENZero, LinkZero, HiperPFS, HiperTFS, HiperLCS, Qspeed, EcoSmart, Clampless, E-Shield, Filterfuse, FluxLink, StakFET, PI Expert and PI FACTS are trademarks of Power Integrations, Inc. Other trademarks are property of their respective companies. ©2014, Power Integrations, Inc. Power Integrations Worldwide Sales Support Locations World Headquarters Germany Japan Taiwan 5245 Hellyer Avenue Lindwurmstrasse 114 Kosei Dai-3 Bldg. 5F, No. 318, Nei Hu Rd., Sec. 1 San Jose, CA 95138, USA. 80337 Munich 2-12-11, Shin-Yokohama, Nei Hu Dist. Main: +1-408-414-9200 Germany Kohoku-ku Taipei 11493, Taiwan R.O.C. Customer Service: Phone: +49-895-527-39110 Yokohama-shi Kanagwan Phone: +886-2-2659-4570 Phone: +1-408-414-9665 Fax: +49-895-527-39200 222-0033 Japan Fax: +886-2-2659-4550 Fax: +1-408-414-9765 e-mail: eurosales@power.com Phone: +81-45-471-1021 e-mail: taiwansales@power.com e-mail: usasales@power.com Fax: +81-45-471-3717 India e-mail: japansales@power.com UK China (Shanghai) #1, 14th Main Road First Floor, Unit 15, Meadway Rm 2410, Charity Plaza, No. 88 Vasanthanagar Korea Court, Rutherford Close, North Caoxi Road Bangalore-560052 India RM 602, 6FL Stevenage, Herts. SG1 2EF Shanghai, PRC 200030 Phone: +91-80-4113-8020 Korea City Air Terminal B/D, 159-6 United Kingdom Phone: +86-21-6354-6323 Fax: +91-80-4113-8023 Samsung-Dong, Kangnam-Gu, Phone: +44 (0) 1252-730-141 Fax: +86-21-6354-6325 e-mail: indiasales@power.com Seoul, 135-728, Korea Fax: +44 (0) 1252-727-689 e-mail: chinasales@power.com Phone: +82-2-2016-6610 e-mail: eurosales@power.com Italy Fax: +82-2-2016-6630 China (Shenzhen) Via Milanese 20, 3rd. Fl. e-mail: koreasales@power.com 17/F, Hivac Building, No. 2, Keji 20099 Sesto San Giovanni (MI) Nan 8th Road, Nanshan District, Italy Singapore Shenzhen, China, 518057 Phone: +39-024-550-8701 51 Newton Road Phone: +86-755-8672-8689 Fax: +39-028-928-6009 #19-01/05 Goldhill Plaza Fax: +86-755-8672-8690 e-mail: eurosales@power.com Singapore, 308900 e-mail: chinasales@power.com Phone: +65-6358-2160 Fax: +65-6358-2015 e-mail: singaporesales@power.com

LYT4221-4228/4321-4328 LYTSwitch™-4 High Power LED Driver IC Family Single-Stage Accurate Primary-Side Constant Current (CC) Controller with PFC for High-Line Applications with TRIAC Dimming and Non-Dimming Options Product Highlights • Better than ±5% CC regulation • TRIAC dimmable to less than 5% output • Fast start-up • <250 ms at full brightness • <1s at 10% brightness • High power factor >0.9 AINC • Easily meets EN61000-3-2 D V LYTSwitch-4 CONTROL • Less than 10% THD in optimized designs BP • Up to 92% efficient S R FB • 132 kHz switching frequency for small magnetics High Performance, Combined Driver, Controller, Switch PI-6800-050913 The LYTSwitch-4 family enables off-line LED drivers with high Figure 1. Typical Schematic. power factor which easily meet international requirements for THD and harmonics. Output current is tightly regulated with better than ±5% CC tolerance1. Efficiency of up to 92% is easily Optimized for Different Applications and Power Levels achieved in typical applications. Part Number Input Voltage Range TRIAC Dimmable Supports a Wide Selection of TRIAC Dimmers The LYTSwitch-4 family provides excellent turn-on characteristics LYT4221-LYT4228 160-308 VAC No for leading-edge and trailing-edge TRIAC dimming applications. LYT4321-LYT4328 160-308 VAC Yes This results in drivers with a wide dimming range and fast start-up, even when turning on from a low conduction angle – large dimming ratio and low “pop-on” current. Output Power Table1,2 Low Solution Cost and Long Lifetime Product6 Minimum Output Power3 Maximum Output Power4 LYTSwitch-4 ICs are highly integrated and employ a primary-side control technique that eliminates the optoisolator and reduces LYT4x21E5 6 W 12 W component count. This allows the use of low-cost single-sided LYT4x22E 6 W 15 W printed circuit boards. Combining PFC and CC functions into a single-stage also helps reduce cost and increase efficiency. LYT4x23E 8 W 18 W The 132 kHz switching frequency permits the use of small, LYT4x24E 9 W 22 W low-cost magnetics. LYT4x25E 11 W 25 W LED drivers using the LYTSwitch-4 family do not use primary- side aluminum electrolytic bulk capacitors. This means greatly LYT4x26E 14 W 35 W extended driver lifetime, especially in bulb and other high LYT4x27E 19 W 50 W temperature applications. LYT4x28E 33 W 78 W Table 1. Output Power Table. Notes: 1. Performance for typical design. See Application Note. 2. Continuous power in an open frame design with adequate heat sinking; device local ambient of 70 °C. Power level calculated assuming a typical LED string voltage and efficiency >80%. 3. Minimum output power requires C = 47 µF. BP 4. Maximum output power requires C = 4.7 µF. BP eSIP-7C (E Package) 5. LYT4321 CBP = 47 µF, LYT4221 CBP = 4.7 µF. 6. Package: eSIP-7C (see Figure 2). Figure 2. Package Options. www.power.com November 2014 This Product is Covered by Patents and/or Pending Patent Applications.

LYT4221-4228/4321-4328 Topology Isolation Efficiency Cost THD Output Voltage Isolated Flyback Yes 88% High Best Any Buck No 92% Low Good Limited Tapped Buck No 89% Middle Best Any Buck-Boost No 90% Low Best High-Voltage Table 2. Performance of Different Topologies in a Typical Non-Dimmable 10 W High-Line Design. Typical Circuit Schematic Key Features Flyback Benefits • Provides isolated output • Supports widest range of output voltages • Very good THD performance Limitations AINC • Flyback transformer D V LYTSwitch-4 • Overall efficiency reduced by parasitic capacitance CONTROL BP and inductance in the transformer S R FB • Larger PCB area to meet isolation requirements • Requires additional components (primary clamp and bias) PI-6800-050913 • Higher RMS switch and winding currents increases losses and lowers efficiency Figure 3a. Typical Isolated Flyback Schematic. Buck Benefits • Highest efficiency • Lowest component count – small size • Simple low-cost power inductor • Low drain source voltage stress AC • Best EMI/lowest component count for filter IN D V LYTSwitch-4 Limitations CONTROL BP • Single input line voltage range S R FB • Output voltage <0.6 × V × 1.41 IN(AC) • Output voltage for low THD designs PI-6841-111813 • Non-isolated Figure 3b. Typical Buck Schematic. Tapped Buck Benefits • Ideal for low output voltage designs (<20 V) • High efficiency • Low component count • Simple low-cost tapped inductor LYTSwitch-4 Limitations AC IN D V • Designs best suited for single input line voltage CONTROL BP • Requires additional components (primary clamp) S R FB • Non-isolated PI-6842-111813 Figure 3c. Typical Tapped Buck Schematic. Buck-Boost Benefits • Ideal for non-isolated high output voltage designs • High efficiency • Low component count • Simple common low-cost power inductor can be used AINC • Lowest THD D V LYTSwitch-4 Limitations CONTROL BP • Maximum V is limited by MOSFET breakdown voltage OUT S R FB • Single input line voltage range • Non-isolated PI-6859-111813 Figure 3d. Typical Buck-Boost Schematic. 2 Rev. C 11/14 www.power.com

LYT4221-4228/4321-4328 DRAIN (D) BYPASS (BP) 5.9 V REGULATOR BYPASS CAPACITOR SOFT-START SELECT TIMER HYSTERETIC THERMAL SHUTDOWN FAULT + ILIM MI AUTO-RESTART PRESENT 5.9 V - 5.0 V COUNTER BYPASS PIN 1 V UNDERVOLTAGE DGraivteer VOLTAGE SenseFet MONITOR (V) STOP JITTER LOGIC CLOCK Comparator OSCILLATOR - LEB 3-VT + DFCBMOAFXF OCP OV LINE SENSE + - CURRENT LIMIT FEEDBACK (FB) IV PFC/CC COMPARATOR ILIM VBG IFB CONTROL MI VSENSE FEEDBACK FBOFF SENSE DCMAX IS REFERENCE (R) REBFELORECNKCE VBG 6.4 V PI-6843-071112 SOURCE (S) Figure 4. Functional Block Diagram. Pin Functional Description VOLTAGE MONITOR (V) Pin: This pin interfaces with an external input line peak detector, DRAIN (D) Pin: consisting of a rectifier, filter capacitor and resistors. The This pin is the power FET drain connection. It also provides applied current is used to control stop logic for overvoltage (OV), internal operating current for both start-up and steady-state provide feed-forward to control the output current and the operation. remote ON/OFF function. SOURCE (S) Pin: This pin is the power FET source connection. It is also the ground reference for the BYPASS, FEEDBACK, REFERENCE and VOLTAGE MONITOR pins. E Package (eSIP-7C) (Top View) BYPASS (BP) Pin: Exposed Pad This is the connection point for an external bypass capacitor for (Backside) Internally the internally generated 5.9 V supply. This pin also provides Connected to output power selection through choice of the BYPASS pin SOURCE Pin (see eSIP-7C Package capacitor value. Drawing) FEEDBACK (FB) Pin: The FEEDBACK pin is used for output voltage feedback. The current into the FEEDBACK pin is directly proportional to the 1 R2 V3 F4 B5 S 7 D output voltage. The FEEDBACK pin also includes circuitry to BP protect against open load and overload output conditions. PI-7076-062513 REFERENCE (R) Pin: Figure 5. Pin Configuration. This pin is connected to an external precision resistor and is configured to use only 24.9 kW for non-dimming and dimming. 3 www.power.com Rev. C 11/14

LYT4221-4228/4321-4328 Functional Description BYPASS Pin Capacitor Power Gain Selection LYTSwitch-4 devices have the capability to tailor the internal A LYTSwitch-4 device monolithically combines a controller and gain to either full or a reduced output power setting. This allows high-voltage power FET into one package. The controller selection of a larger device to minimize dissipation for both provides both high power factor and constant current output in thermal and efficiency reasons. The power gain is selected with a single-stage. The LYTSwitch-4 controller consists of an the value of the BYPASS pin capacitor. The full power setting is oscillator, feedback (sense and logic) circuit, 5.9 V regulator, selected with a 4.7 µF capacitor and the reduced power setting hysteretic over-temperature protection, frequency jittering, (for higher efficiency) is selected with a 47 µF capacitor. The cycle-by-cycle current limit, auto-restart, inductance correction, BYPASS pin capacitor sets both the internal power gain as well power factor and constant current control. as the over-current protection (OCP) threshold. Unlike the larger devices, the LYT4x21 power gain is not programmable. FEEDBACK Pin Current Control Characteristics Use a 47 µF capacitor for the LYT4x21. The figure shown below illustrates the operating boundaries of the FEEDBACK pin current. Above I switching is disabled Switching Frequency FB(SKIP) and below I the device enters into auto-restart. The switching frequency is 132 kHz during normal operation. FB(AR) To further reduce the EMI level, the switching frequency is jittered (frequency modulated) by approximately 5.4 kHz. IFB(SKIP) Skip-Cycle During start-up the frequency is 66 kHz to reduce start-up time when the AC input is phase angle dimmed. Jitter is disabled in deep dimming. Soft-Start The controller includes a soft-start timing feature which inhibits IFB CCR eCgoinotnrol the auto-restart protection feature for the soft-start period (tSOFT) to distinguish start-up into a fault (short-circuit) from a large output capacitor. At start-up the LYTSwitch-4 clamps the maximum duty cycle to reduce the output power. The total soft-start period is t . SOFT I FB(DCMAXR) Remote ON/OFF and EcoSmart™ The VOLTAGE MONITOR pin has a 1 V threshold comparator Soft-Start connected at its input. This voltage threshold is used for Region remote ON/OFF control. When a signal is received at the VOLTAGE MONITOR pin to disable the output (VOLTAGE MONITOR pin tied to ground through an optocoupler photo- transistor) the LYTSwitch-4 will complete its current switching cycle before the internal power FET is forced off. The remote ON/OFF feature can also be used as an eco-mode IFB(AR) Auto-Restart or power switch to turn off the LYTSwitch-4 and keep it in a DC10 DC very low power consumption state for indefinite long periods. MAX Maximum Duty Cycle When the LYTSwitch-4 is remotely turned on after entering this PI-6978-040213 mode, it will initiate a normal start-up sequence with soft-start Figure 6. FEEDBACK Pin Current Characteristic. the next time the BYPASS pin reaches 5.9 V. In the worst case, the delay from remote on to start-up can be equal to the full The FEEDBACK pin current is also used to clamp the maximum discharge/charge cycle time of the BYPASS pin. This reduced duty cycle to limit the available output power for overload and consumption remote off mode can eliminate expensive and open-loop conditions. This duty cycle reduction characteristic unreliable in-line mechanical switches. also promotes a monotonic output current start-up characteristic and helps preventing over-shoot. REFERENCE Pin The REFERENCE pin is tied to ground (SOURCE) via an external resistor. The value selected sets the internal references and it should be 24.9 kW ±1%. One percent resistors are recommended as the resistor tolerance directly affects the output tolerance. Other resistor values should not be used. 4 Rev. C 11/14 www.power.com

LYT4221-4228/4321-4328 completed. Special consideration must be made to appropriately size the output capacitor to ensure that after the soft-start period (t ) the FEEDBACK pin current is above the I SOFT FB(AR) threshold to ensure successful power-supply start-up. After the D V soft-start time period, auto-restart is activated only when the CONTROL FEEDBACK pin current falls below I . BP FB(AR) Over-Current Protection S R FB The current limit circuit senses the current in the power FET. When this current exceeds the internal threshold (I ), the power LIMIT FET is turned off for the remainder of that cycle. A leading edge blanking circuit inhibits the current limit comparator for a short time (t ) after the power FET is turned on. This leading edge LEB blanking time has been set so that current spikes caused by PI-5435-052510 capacitance and rectifier reverse recovery will not cause premature termination of the power FET conduction. Figure 7. Remote ON/OFF VOLTAGE MONITOR Pin Control. Line Overvoltage Protection 5.9 V Regulator/Shunt Voltage Clamp This device includes overvoltage detection to limit the maximum The internal 5.9 V regulator charges the bypass capacitor operating voltage detected through the VOLTAGE MONITOR pin. connected to the BYPASS pin to 5.9 V by drawing a current An external peak detector consisting of a diode and capacitor is from the voltage on the DRAIN pin whenever the power FET is required to provide input line peak voltage to the VOLTAGE off. The BYPASS pin is the internal supply voltage node. When MONITOR pin through a resistor. the power FET is on, the device operates from the energy stored in the bypass capacitor. Extremely low power consumption of the The resistor sets line overvoltage (OV) shutdown threshold which, internal circuitry allows LYTSwitch-4 to operate continuously from once exceeded, forces the LYTSwitch-4 to stop switching. Once current it takes from the DRAIN pin. A bypass capacitor value the line voltage returns to normal, the device resumes normal of 47 or 4.7 µF is sufficient for both high frequency decoupling operation. A small amount of hysteresis is provided on the OV and energy storage. In addition, there is a 6.4 V shunt regulator threshold to prevent noise-generated toggling. When the power clamping the BYPASS pin at 6.4 V when current is provided to FET is off, the rectified DC high voltage surge capability is the BYPASS pin through an external resistor. This facilitates increased to the voltage rating of the power FET (725 V), due to the powering of LYTSwitch-4 externally through a bias winding to absence of the reflected voltage and leakage spikes on the drain. increase operating efficiency. It is recommended that the BYPASS pin is supplied current from the bias winding for Hysteretic Thermal Shutdown normal operation. The thermal shutdown circuitry senses the controller die temperature. The threshold is set at 142 °C typical with a 75 °C Auto-Restart hysteresis. When the die temperature rises above this threshold In the event of an open-loop fault (open FEEDBACK pin resistor (142 °C) the power FET is disabled and remains disabled until or broken path to feedback winding), output short-circuits or an the die temperature falls by 75 °C, at which point the power FET overload condition the controller enters into the auto-restart is re-enabled. mode. The controller annunciates both short-circuit and open-loop conditions once the FEEDBACK pin current falls Safe Operating Area (SOA) Protection below the I threshold after the soft-start period. To minimize The device also features a safe operating area (SOA) protection FB(AR) the power dissipation under this fault condition the shutdown/ mode which disables FET switching for 40 cycles in the event auto-restart circuit turns the power supply on (same as the the peak switch current reaches the I threshold and the switch LIMIT soft-start period) and off at an auto-restart duty cycle of on-time is less than t . This protection mode protects the ON(SOA) typically DC for as long as the fault condition persists. If the device under short-circuited LED conditions and at start-up during AR fault is removed during the auto-restart off-time, the power the soft-start period when auto-restart protection is inhibited. supply will remain in auto-restart until the full off-time count is The SOA protection mode remains active in normal operation. 5 www.power.com Rev. C 11/14

LYT4221-4228/4321-4328 Application Example Input Stage Fuse F1 provides protection from component failures while RV1 20 W TRIAC Dimmable High Power Factor LED Driver provides a clamp during differential line surges, keeping the Design Example (DER-396) peak drain voltage of U1 below the device absolute maximum rating of the internal power FET. Bridge rectifier BR1 rectifies The circuit schematic in Figure 8 shows a TRIAC dimmable high the AC line voltage. EMI filtering is provided by L1, L2, C4, C5, power factor LED driver based on LYT4324E from the LYTSwitch-4 R3 and R12 together with the safety rated Y class capacitor high-line family of devices. The design is configurable for non- (CY1) that bridges the safety isolation barrier between primary dimmable only applications by simply changing the device to a and secondary. Resistor R3 and R12 damp any resonances non-dimmable LYTSwitch-4 and removing the damper and formed between L1, L2, C4 and the AC line impedance. A small bleeder circuit. It was optimized to drive an LED string at a bulk capacitor (C5) is required to provide a low impedance path voltage of 36 V with a constant current of 0.550 A ideal for high for the primary switching current. The maximum value of C4 Lumens PAR lamp retro-fit applications. The design operates and C5 is limited in order to maintain a power factor of greater over an input voltage range of 185 VAC to 265 VAC. than 0.9. The key goals of this design were compatibility with standard LYTSwitch-4 High-Line Primary leading edge TRIAC AC dimmers, very wide dimming range, To provide peak line voltage information to U1 the incoming high efficiency (>85%) and high power factor (>0.9). The design rectified AC peak charges C6 via D2. This is then fed into the is fully protected from faults such as no-load (open-load), over- VOLTAGE MONITOR pin of U1 as a current via R14 and R15. voltage and output short-circuit or overload conditions and This sensed current is also used by the device to set the line over-temperature. input overvoltage protection threshold. Resistor R13 provides a discharge path for C6 with a time constant much longer than that Circuit Description of the rectified AC to minimize generation of line frequency ripple. The LYTSwitch-4 high-line device (U1-LYT4324E) integrates the power FET, controller and start-up functions into a single package The VOLTAGE MONITOR pin current and the FEEDBACK pin reducing the component count versus typical implementations. current are used internally to control the average output LED Configured as part of an isolated continuous conduction mode current. For TRIAC phase-dimming or non-dimming applications flyback converter, U1 provides high power factor via its internal the same value of resistance 24.9 kW is used on the REFERENCE control algorithm together with the small input capacitance of pin resistor (R18) and 4 MW (R14 + R15) on the VOLTAGE MONITOR the design. Continuous conduction mode operation results in pin to provide a linear relationship between input voltage and reduced primary peak and RMS current. This both reduces the output current and maximizing the dimming range. EMI noise, allowing simpler, smaller EMI filtering components and improves efficiency. Output current regulation is maintained without the need for secondary-side sensing which eliminates current sense resistors and improves efficiency. C13 R25 100 pF VR4 30 Ω 200 V C14 C15 SMAJ200A-13-F 330 µF 330 µF R26 36 V, 200 V 1 FL1 63 V 63 V 7.5 kΩ 550 mA B110B00RS01- VG 16R2 7kΩ 511R/081 k3WΩ D2DFLU1400-7 26.3C20 7n VF 7 FL2 BRY2W2D289-200R21 RTTPTPN34 1% 39 Ω 20 kΩ 1 RM4Ω R8 2R1 M%14Ω UDS31J 6 BADV62111/0C80 1W 1nF 1/8 W 56C 9µF 25R0 VV1AC 1 RM5Ω 1612% kΩ 2R1 M%15Ω RMT17/18 50 V 50 V 5F 1AL 55R1111R0%20%1 7 RΩΩLM1515521R91111R0V0%20%2 A8 -ΩΩ C263452420C001 nVFN112/R8 k3 WΩ 2B.4RAD M6V12Ω1 Q1MMBT3906 34017C1. RM1 k%2p9V kMFΩBQT23906 252C01 R3 n5V1F1 Ω0N51V25R4 15VB2R-24T 01WQ3 11Ω42IRFU320PBF0C004 nVF 3145R7 Lm 1k22HΩ42 2420C005 nVF LY24L.TY0C2S0T 6µ U4wVF31it2c4hE-4DS UCDSO14RND21TV4R/R11.O9%16 LF8 kWBΩBP D561.R102BAV16WS-7-FC100 k98 VµΩF M1115C30R1M/0381 %2 n B 0Vk0WFTΩ3Q9404L1T1/R1102G0 ΩVR23 WMMSZ5256BS-7-F33 V11/BR1 Ak20VΩ4 W21DW7S1-50C7001- F2VnF CY1 TP1 TP2 470 pF 250 VAC PI-7088-072913 Figure 8. DER-396 Schematic of an Isolated, TRIAC Dimmable, High Power Factor, 185 – 265 VAC, 20 W / 36 V LED Driver. 6 Rev. C 11/14 www.power.com

LYT4221-4228/4321-4328 Diode D3, VR4 and C7 clamp the drain voltage to a safe level Due to the much lower power consumed by LED based lighting due to the effects of leakage inductance. Diode D4 is the current drawn by the overall lamp is below the holding necessary to prevent reverse current from flowing through U1 current and/or latching of the TRIAC within the dimmer. This for the period of the rectified AC input voltage that the voltage can cause undesirable behaviors such as limited dimming across C5 falls to below the reflected output voltage (V ). range and/or flickering as the TRIAC fires inconsistently. The OR relatively large impedance the LED lamp presents to the line Diode D6, C9, C11, R21 and R22 create the primary bias supply allows significant ringing to occur due to the inrush current from an auxiliary winding on the transformer. Capacitor C8 charging the input capacitance when the TRIAC turns on. This provides local decoupling for the BYPASS pin of U1 which is the too can cause similar undesirable behavior as the ringing may supply pin for the internal controller. During start-up C8 is cause the TRIAC current to fall to zero and turn off. charged to ~6 V from an internal high-voltage current source tied to the device DRAIN pin. This allows the part to start To overcome these issues two simple circuits, the MOSFET switching at which point the operating supply current is provided active damper and RC passive bleeder were employed. from the bias supply via R19 and D5. Capacitor C8 also selects Employing these circuits however comes without penalty, since the output power mode (47 µF for reduced power was selected their purpose is to satisfy the holding and latching current of a to reduce dissipation in U1 and increase efficiency). TRIAC by providing some low impedance path for the TRIAC current to flow continuously during the turn-on phase will Feedback introduce additional dissipation and therefore reduced system The bias winding voltage is proportional to the output voltage efficiency of the supply. For non-dimming applications these (set by the turn ratio between the bias and secondary windings). circuits can simply be omitted (see Figure 9). This allows the output voltage to be monitored without secondary- side feedback components. Resistor R20 converts the bias Power Integrations proprietary active damper circuit is used in voltage into a current which is fed into the FEEDBACK pin of U1. this design for achieving high efficiency, good dimmer The internal engine within LYTSwitch-4 (U1) combines the compatibility and line surge protection. FEEDBACK pin current, the VOLTAGE MONITOR pin current and drain current information to provide a constant output MOSFET Q3 is always on during non-dimming (no TRIAC current over up to 1.5 : 1 output voltage variation (LED string connected) operation. It bypasses the loss across the damper voltage variation of ±25%) at a fixed line input voltage. resistor (R11) via the low R of the MOSFET Q3 thereby DS(ON) maintaining high system efficiency. The gate of Q3 is biased To limit the output voltage at no-load an output overvoltage through the divider of R4, R5, and R6 and filtered by C13. protection circuit is set by D7, C12, R24, VR2, R23, C10 and Q4. Should the output load be disconnected the bias voltage will While Q3 is always on during non-dimming operation, MOSFET increase until VR2 conducts, biasing Q4 to turn on via R23 and Q3 operates differently during dimming. When the TRIAC turns pulling down current going into the FEEDBACK pin. When the on at the beginning of every AC half-line cycle MOSFET Q3 is feedback current drops below 10 µA the part enters auto- off initially allowing the resistor (R11) to damp the current ringing restart and the switching of the MOSFET is disabled for 600 ms, due to inrush of current induced by the input bulk capacitance allowing time for the output and bias voltages to fall. and EMI filter impedance. After approximately 1 ms Q3 turns on and bypasses R11. The effect is increased compatibility with Output Rectification different types of dimmers. The transformer secondary winding is rectified by D8 and filtered by C14 and C15. An ultrafast TO-220 diode was During differential line surge occurrence where a high dv/dt is selected for efficiency and the combined value of C11 and C12 detected through the RC high-pass filter R7, R8 and C2. were selected to give peak-to-peak LED ripple current equal to Transistor Q2 will turn off Q3 and a voltage proportional to the 30% of the mean value. For designs where lower ripple is input current that will develop across the damper resistor will be desirable the output capacitance value can be increased. subtracted from the input thus limiting the voltage stress on the A small pre-load is provided by R26 which discharges residual DRAIN pin of U1. charge in output capacitors when turned off. Resistor R9 bleeds the charge from C2 and ensures Q2 is off TRIAC Phase Dimming Control Compatibility during normal operation. The requirement to provide output dimming with low cost, TRIAC-based, leading edge phase dimmers introduces a The passive bleeder circuit is comprised of R1, R2, R27, R28 number of trade-offs in the design. and C1. This network helps keep the input current above the TRIAC holding current while the input current corresponding to the effective driver resistance increases during each AC half-cycle. 7 www.power.com Rev. C 11/14

LYT4221-4228/4321-4328 Modified DER-396 20 W High Power Factor LED Driver • Efficiency of 85% for Non-Dimmable and Enhanced Line Regulation • Device local ambient of 70 °C • Sufficient heat sinking to keep the device temperature The circuit schematic in Figure 9 shows a high power factor below 100 °C LED driver based on a LYT4224E from the LYTSwitch-4 non- • For minimum output power column dimming high-line family of devices. It was optimized to drive • Reflected output voltage (V ) of 135 V OR an LED string at a voltage of 36 V with a constant current of • FEEDBACK pin current of 135 µA 0.55 A, ideal for high lumens PAR lamp retro-fit applications. • BYPASS pin capacitor value of 47 µF The design operates over the high-line input voltage range of • For maximum output power column 185 VAC to 265 VAC and is non-dimming application. A non- • Reflected output voltage (V ) of 90 V OR dimming application has tighter output current variation with • FEEDBACK pin current of 165 µA changes in the line voltage than a dimming application. It’s key • BYPASS pin capacitor value of 4.7 µF to note that, although not specified for dimming, no circuit • (LYT4x21 = 4.7 µF) damage will result if the end user does operate the design with a phase controlled dimmer. Note that input line voltages above 185 VAC do not change the power delivery capability of LYTSwitch-4 high-line devices. Modification for Non-Dimmable Configuration The DER-396 is configurable for non-dimmable application by Device Selection simply removing the components of the MOSFET active damper Select the device size by comparing the required output power (R4, R5, R6, R7, R8, R9, R10, R11, D1, Q1, Q2, C3, and VR1) to the values in Table 1. For thermally challenging designs, e.g., and passive R-C bleeder (R1, R2, R27, R28 and C1) and replacing incandescent lamp replacement, where either the ambient the IC U1 to LYT4224E, non-dimmable device LYTSwitch-4 non- temperature local to the LYTSwitch-4 high-line device is high dimming high-line family. For non-dimmable application audible and/or there is minimal space for heat sinking use the minimum noise is not critical so L1 and L2 can be replaced with a regular output power column. This is selected by using a 47 µF BYPASS off-the-shelf dog bone inductor for cost reduction (See Figure 9). pin capacitor and results in a lower device current limit and therefore lower conduction losses. For open frame design or Key Application Considerations designs where space is available for heat sinking then refer to the maximum output power column. This is selected by using a Power Table 4.7 µF BYPASS pin capacitor for all but the LYT4x21 which has only The data sheet power table (Table 1) represents the minimum one power setting. In all cases in order to obtain the best output and maximum practical continuous output power based on the current tolerance maintain the device temperature below 100 °C. following assumed conditions: C13 R25 100 pF VR4 30 Ω 200 V C14 C15 SMAJ200A-13-F 330 µF 330 µF R26 36 V, 200 V 1 FL1 63 V 63 V 7.5 kΩ 550 mA 511R/081 k3WΩ D2DFLU1400-7 26.3C20 7n VF 7 FL2 BRY2W2D289-200R21 RTTPTPN34 39 Ω 20 kΩ 1/8 W 1/8 W 6 BR1 2R1 M%14Ω UDS31J BADV62110C01 1nF 56C 9µF B10S-G 50 V 50 V 1000 V R15 8 2 MΩ T1 1% RM7/1 C4 C5 C6 D4 120 nF 220 nF 2.2 µF US1D RV1 400 V 400 V 400 V 250 VAC 6.R21 k9Ω R20 BAV21DW7S-7-F 11R2/8 2k 9WΩ 1.5L 1m11H2/R8 k3 WΩ 1.5L 3mH LYLTYSTU4w21it2c4hE-4 DS CORNTVROLFBBP D5BAV16WS-7-F M113M1/38% B kWTΩ3Q9404LT1GVR2MMSZ5256BS-7-F33 V 10C01 2nF L5F 1A190V A- C265 N 41R7/8 1k 2WΩ 214/R11.9%16 8 kWΩ 417C6 8 µVF 15C001 n0VF 11/R1020 Ω3 W 11/R1 k20Ω4 W 50 V CY1 TP1 TP2 470 pF L2 250 VAC 1.5 mH PI-7089-102313 Figure 9. Modified Schematic of DER-396 for Non-Dimmable, Isolated, High Power Factor, 185-265 VAC, 20 W / 36 V LED Driver. 8 Rev. C 11/14 www.power.com

LYT4221-4228/4321-4328 Maximum Input Capacitance Line Voltage Peak Detector Circuit To achieve high power factor, the capacitance used in both the LYTSwitch-4 high-line devices use the peak line voltage to EMI filter and for decoupling the rectified AC (bulk capacitor) regulate the power delivery to the output. A capacitor value of must be limited in value. The maximum value is a function of 1 µF to 4.7 µF is recommended to minimize line ripple and give the output power of the design and reduces as the output the highest power factor (>0.9), smaller values are acceptable power reduces. For the majority of designs limit the total but result in lower PF and higher line current distortion. capacitance to less than 220 nF with a bulk capacitor value of 100 nF. Film capacitors are recommended compared to Operation with Phase Controlled Dimmers ceramic types as they minimize audible noise with operating Dimmer switches control incandescent lamp brightness by not with leading edge phase dimmers. Start with a value of 10 nF conducting (blanking) for a portion of the AC voltage sine wave. for the capacitance in the EMI filter and increase in value until This reduces the RMS voltage applied to the lamp thus reducing there is sufficient EMI margin. the brightness. This is called natural dimming and the LYTSwitch-4 high-line LYT4321-4328 devices when configured for dimming REFERENCE Pin Resistance Value Selection utilize natural dimming by reducing the LED current as the RMS The LYTSwitch-4 high-line family contains phase dimming line voltage decreases. By this nature, line regulation performance devices, LYT4321-4328, and non-dimming devices, LYT4221- is purposely decreased to increase the dimming range and 4228. Both the non-dimmable devices and dimmable devices more closely mimic the operation of an incandescent lamp. use 24.9 kW ±1% REFERENCE pin resistor for best output current tolerance (over AC input voltage changes). Leading Edge Phase Controlled Dimmers The requirement to provide flicker-free output dimming with low- VOLTAGE MONITOR Pin Resistance Network Selection cost, TRIAC-based, leading edge phase dimmers introduces a For widest AC phase angle dimming range with LYT4321-4328, number of trade-offs in the design. use a 4 MW resistor connected to the line voltage peak detector circuit. Make sure that the resistor’s voltage rating is sufficient Due to the much lower power consumed by LED based lighting for the peak line voltage. If necessary use multiple series the current drawn by the overall lamp is below the holding connected resistors. current of the TRIAC within the dimmer. This causes undesirable behaviors such as limited dimming range and/or flickering. The Primary Clamp and Output Reflected Voltage V relatively large impedance the LED lamp presents to the line OR A primary clamp is necessary to limit the peak drain to source allows significant ringing to occur due to the inrush current voltage. A Zener clamp requires the fewest components and charging the input capacitance when the TRIAC turns on. This board space and gives the highest efficiency. RCD clamps are too can cause similar undesirable behavior as the ringing may also acceptable however the peak drain voltage should be care- cause the TRIAC current to fall to zero and turn off. fully verified during start-up and output short-circuits as the clamping voltage varies with significantly with the peak drain To overcome these issues two circuits, the active damper and current. passive bleeder, are incorporated. The drawback of these circuits is increased dissipation and therefore reduced efficiency For the highest efficiency, the clamping voltage should be of the supply so for non-dimming applications these components selected to be at least 1.5 times the output reflected voltage, can simply be omitted. V , as this keeps the leakage spike conduction time short. OR When using a Zener clamp in a universal input or high-line only Figure 10(a) shows the line voltage and current at the input of a application, a V of less than 135 V is recommended to allow leading edge TRIAC dimmer with Figure 10(b) showing the OR for the absolute tolerances and temperature variations of the resultant rectified bus voltage. In this example, the TRIAC Zener. This will ensure efficient operation of the clamp circuit conducts at 90 degrees. and will also keep the maximum drain voltage below the rated breakdown voltage of the FET. An RCD (or RCDZ) clamp Figure 11 shows undesired rectified bus voltage and current provides tighter clamp voltage tolerance than a Zener clamp. with the TRIAC turning off prematurely and restarting. The RCD clamp is more cost-effective than the Zener clamp but requires more careful design to ensure that the maximum drain If the TRIAC is turning off before the end of the half-cycle voltage does not exceed the power FET breakdown voltage. erratically or alternate half AC cycles have different conduction These V limits are based on the BV rating of the internal angles then flicker will be observed in the LED light due to OR DSS FET, a V of 90 V to 120 V is typical for most designs, giving variations in the output current. This can be solved by including OR the best PFC and regulation performance. a bleeder and damper circuit. Series Drain Diode Dimmers will behave differently based on manufacturer and An ultrafast or Schottky diode in series with the drain is power rating, for example a 300 W dimmer requires less necessary to prevent reverse current flowing through the device. dampening and requires less power loss in the bleeder than a The voltage rating must exceed the output reflected voltage, 600 W or 1000 W dimmer due to different drive circuits and V . The current rating should exceed two times the average OR TRIAC holding current specifications. Line voltage also has a primary current and have a peak rating equal to the maximum significant impact as at high-line for a given output power the drain current of the selected LYTSwitch-4 high-line device. 9 www.power.com Rev. C 11/14

LYT4221-4228/4321-4328 V) 350 PI-5983-060810 0.35 A) 350 PI-5985-060810 0.35 mer Input) ( 215500 VCoulrtraegnet 00..2155 h Dimmer) ( oltage (V) 320500 CVoulrtraegnet 00..325 urrent (A) Line Voltage (at Dim---123-55555000000.5 50 100 150 200 250 300 350 4000----0000.0....012355555 Line Current (Throug Rectified Input V 211050500000 00000....211055 Rectified Input C 0 50 100 150 200 250 300 350 400 Conduction Angle (°) Conduction Angle (°) Figure 10a. Ideal Input Voltage and Current Waveforms for a Leading Edge TRIAC Dimmer at 90° Conduction Angle. Figure 11. Example of Phase Angle Dimmer Showing Erratic Firing. 350 PI-5984-060810 0.35 350 PI-5986-060810 0.35 oltage (V) 320500 VCoulrtraegnet 00..325 urrent (A) oltage (V) 215500 VCoulrtraegnet 00..2155 urrent (A) ut V 200 0.2 ut C ut V 50 0.05 ut C p p p p d In 150 0.15 d In Out -50 0 50 100 150 200 250 300 350 -0.05 Out ectifie 100 0.1 ectifie mmer -150 -0.15 mmer R 50 0.05 R Di-250 -0.25 Di 0 0 -350 -0.35 0 50 100 150 200 250 300 350 400 Conduction Angle (°) Conduction Angle (°) Figure 12. Ideal Dimmer Output Voltage and Current Waveforms for a Trailing Figure 10b. Resultant Waveforms Following Rectification of TRIAC Dimmer Output. Edge Dimmer at 90° Conduction Angle. input current and therefore TRIAC current is lower but the peak C3 will improve dimmer compatibility but cause more power to inrush current when the input capacitance charges is higher be dissipated across the damper resistor. Monitor the AC line creating more ringing. Finally multiple lamps in parallel driven from current and voltage at the input of the power supply as you the same dimmer can introduce more ringing due to the increased make the adjustments. Increase the delay until the TRIAC capacitance of parallel units. Therefore, when testing dimmer operates properly but keep the delay as short as possible for operation verify on a number of models, different line voltages efficiency. and with both a single driver and multiple drivers in parallel. As a general rule the greater the power dissipated in the bleeder Start by adding a bleeder circuit. Add a 0.44 µF capacitor and and damper circuits, the more types of dimmers will work with 510 W 1 W resistor (components in series) across the rectified the driver. bus (C1 and R1, R2, R27, R28 in Figure 8). If the results in satisfactory operation reduce the capacitor value to the smallest Trailing Edge Phase Controlled Dimmers that result in acceptable performance to reduce losses and Figure 12 shows the line voltage and current at the input of the increase efficiency. power supply with a trailing edge dimmer. In this example, the dimmer conducts at 90 degrees. Many of these dimmers use If the bleeder circuit does not maintain conduction in the TRIAC, back-to-back connected power FETs rather than a TRIAC to then add an active damper as shown in Figure 8. This circuit control the load. This eliminates the holding current issue of limits the inrush current that flows to charge C4 and C5 when TRIACs and since the conduction begins at the zero crossing, high the TRIAC turns on by placing the damper resistor (R11, R29) in current surges and line ringing are minimized. These types of series for the first 1 ms of the TRIAC conduction. After approxi- dimmers do not require damping circuits but do require a mately 1 ms, Q3 turns on and shorts the damper resistor. This bleeder. However the bleeder ensures that the AC voltage keeps the power dissipation on the damper resistor low and across the dimmer falls to a low enough level for the dimmer to allows a larger value to be used during current limiting. Increasing correctly detect zero crossing. This is used internally by the the delay before Q3 turns on by increasing the value of capacitor dimmer for timing. 10 Rev. C 11/14 www.power.com

LYT4221-4228/4321-4328 Audible Noise Considerations for use with lifetime. For every 10 °C rise in temperature, component life is Leading Edge Dimmers reduced by a factor of 2. Therefore it is important to properly Noise created when dimming is typically created by the input heat sink and to verify the operating temperatures of all devices. capacitors, EMI filter inductors and the transformer. The input capacitors and inductors experience high di/dt and dv/dt every Layout Considerations AC half-cycle as the TRIAC fires and an inrush current flows to Primary-Side Connections charge the input capacitance. Noise can be minimized by Use a single point (Kelvin) connection at the negative terminal of selecting film vs. ceramic capacitors, minimizing the capacitor the input filter capacitor for the SOURCE pin and bias returns. value and selecting inductors that are physically short and wide. This improves surge capabilities by returning surge currents The transformer may also create noise which can be minimized from the bias winding directly to the input filter capacitor. The by avoiding cores with long narrow legs (high mechanical BYPASS pin capacitor should be located as close to the BYPASS resonant frequency). For example, RM cores produce less pin and connected as close to the SOURCE pin as possible. audible noise than EE cores for the same flux density. Reducing The SOURCE pin trace should not be shared with the main the core flux density will also reduce the noise. Reducing the power FET switching currents. All FEEDBACK pin components maximum flux density (BM) to 1500 Gauss usually eliminates that connect to the SOURCE pin should follow the same rules any audible noise but must be balanced with the increased core as the BYPASS pin capacitor. It is critical that the main power size needed for a given output power. FET switching currents return to the bulk capacitor with the shortest path as possible. Long high current paths create Thermal and Lifetime Considerations excessive conducted and radiated noise. Lighting applications present thermal challenges to the driver. In many cases the LED load dissipation determines the working Secondary-Side Connections ambient temperature experienced by the drive so thermal The output rectifier and output filter capacitor should be as evaluation should be performed with the driver inside the final close as possible. The transformer’s output return pin should enclosure. Temperature has a direct impact on driver and LED have a short trace to the return side of the output filter capacitor. BYPASS Pin LYT4224E Capacitor Clamp Transformer Output Input EMI Filter Diode Bullk Capacitor Output Capacitor REFERENCE Pin Resistor FEEDBACK Pin Resistor Output Capacitors VOLTAGE MONITOR Pin Resistor PI-7096-102313 Figure 13. DER-396 20 W Layout Example, Top Silkscreen / Bottom Layer. 11 www.power.com Rev. C 11/14

LYT4221-4228/4321-4328 Quick Design Checklist Maximum Drain Voltage Verify that the peak V does not exceed the device absolute DS maximum rating under all operating conditions including start-up and fault conditions. Maximum Drain Current Measure the peak drain current under all operation conditions including start-up and fault conditions. Look for signs of transformer saturation (usually occurs at highest operating ambient temperatures). Verify that the peak current is less than the stated Absolute Maximum Rating in the data sheet. Thermal Check At maximum output power, both minimum and maximum line voltage and ambient temperature; verify that temperature specifications are not exceeded for the LYTSwitch-4 high-line, transformer, output diodes, output capacitors and drain clamp components. 12 Rev. C 11/14 www.power.com

LYT4221-4228/4321-4328 Absolute Maximum Ratings(1,4) DRAIN Pin Peak Current(5): LYT4x21 .................................1.37 A Operating Junction Temperature(2) .........................-40 to 150 °C LYT4x22 .................................2.08 A LYT4x23 .................................2.72 A Notes: LYT4x24 ................................4.08 A 1. All voltages referenced to SOURCE, T = 65 °C. A LYT4x25 ................................5.44 A 2. Normally limited by internal circuitry. LYT4x26 ................................6.88 A 3. 1/16 in. from case for 5 seconds. LYT4x27 .................................7.33 A 4. Absolute Maximum Ratings specified may be applied, one LYT4x28 ...................................9.0 A at a time without causing permanent damage to the DRAIN Pin Voltage ……………………… .................-0.3 to 725 V product. Exposure to Absolute Maximum Ratings for BYPASS Pin Voltage .................................................-0.3 to 9 V extended periods of time may affect product reliability. BYPASS Pin Current ……………………… ......................100 mA 5. Peak DRAIN current is allowed while the DRAIN voltage is VOLTAGE MONITOR Pin Voltage .............................-0.3 to 9 V(6) simultaneously less than 400 V. See also Figure 10. FEEDBACK Pin Voltage …….. ...................................-0.3 to 9 V 6. During start-up (the period before the BYPASS pin begins REFERENCE Pin Voltage ..........................................-0.3 to 9 V powering the IC) the VOLTAGE MONITOR pin voltage can Lead Temperature(3) ........................................................260 °C safely rise to 15 V without damage. Storage Temperature …………………. ..................-65 to 150 °C Thermal Resistance Thermal Resistance: E Package Notes: (q ) ....................................................105 °C/W(1) 1. Free standing with no heat sink. JA (q ) ....................................................2 °C/W(2) 2. Measured at back surface tab. JC Conditions Parameter Symbol SOURCE = 0 V; T = -20 °C to 125 °C Min Typ Max Units J (Unless Otherwise Specified) Control Functions Average 124 132 140 Switching Frequency f T = 65 °C kHz OSC J Peak-Peak Jitter 5.4 Frequency Jitter T = 65 °C f J 2.6 kHz Modulation Rate M See Note B LYT4x21 -6.04 -3.45 -2.59 LYT4x22 -10.89 -6.22 -4.67 LYT4x23 -16.21 -9.26 -6.95 LYT4x24 -21.88 -12.5 -9.38 V = 0 V, I BP CH1 T = 65 °C J LYT4x25 -26.25 -15.0 -11.25 LYT4x26 -15.75 -9.00 -6.75 LYT4x27 -17.50 -10.0 -7.50 LYT4x28 -20.65 -11.8 -8.85 BYPASS Pin mA Charge Current LYT4x21 -1.23 -0.7 -0.49 LYT4x22 -4.38 -2.5 -1.75 LYT4x23 -8.05 -4.6 -3.22 LYT4x24 -11.64 -6.65 -4.66 V = 5 V, I BP CH2 T = 65 °C J LYT4x25 -15.10 -8.63 -6.04 LYT4x26 -7.61 -4.35 -3.05 LYT4x27 -9.22 -5.27 -3.69 LYT4x28 -10.15 -5.8 -4.06 13 www.power.com Rev. C 11/14

LYT4221-4228/4321-4328 Conditions Parameter Symbol SOURCE = 0 V; T = -20 °C to 125 °C Min Typ Max Units J (Unless Otherwise Specified) Control Functions (cont.) Charging Current See Note A, B 0.7 %/°C Temperature Drift BYPASS Pin Voltage V 0 °C < T < 100 °C 5.75 5.95 6.15 V BP J BYPASS Pin V 0 °C < T < 100 °C 0.85 V Voltage Hysteresis BP(H) J BYPASS Pin I = 4 mA V BP 6.1 6.4 6.7 V Shunt Voltage BP(SHUNT) 0 °C < T < 100 °C J T = 65 °C Soft-Start Time t J 51 72 ms SOFT V = 5.9 V BP 0 °C < T < 100 °C I J 0.5 0.8 1.2 CD2 FET Not Switching Drain Supply Current mA 0 °C < T < 100 °C I J 1 2.5 4 CD1 FET Switching at f OSC VOLTAGE MONITOR Pin Threshold 105 112 119 Line Overvoltage T = 65 °C I J µA Threshold OV R = 24.9 kW R Hysteresis 5 VOLTAGE MONITOR 0 °C < T < 100 °C V J LYT4x21-4x28 2.75 3.00 3.25 V Pin Voltage V I < I V OV VOLTAGE MONITOR Pin V = 5 V I V LYT4x27-4x28 150 175 200 µA Short-Circuit Current V(SC) T = 65 °C J Remote ON/OFF V T = 65 °C 0.5 V Threshold V(REM) J FEEDBACK Pin FEEDBACK Pin Current at Onset of Maximum I 0 °C < T < 100 °C 90 µA FB(DCMAXR) J Duty Cycle FEEDBACK Pin Current I T = 65 °C 210 µA Skip Cycle Threshold FB(SKIP) J I < I < I Maximum Duty Cycle DC FB(DCMAXR) FB FB(SKIP) 85 99.9 % MAX 0 °C < T < 100 °C J I = 150 µA FEEDBACK Pin Voltage V FB 2.1 2.3 2.56 V FB 0 °C < T < 100 °C J FEEDBACK Pin V = 5 V I FB 320 380 480 µA Short-Circuit Current FB(SC) T = 65 °C J DC10 I = I , T = 65 °C, See Note B 13 FB FB(AR) J Duty Cycle Reduction DC40 I = 40 µA, T = 65 °C 37 % FB J DC60 I = 60 µA, T = 65 °C 60 FB J Auto-Restart T = 65 °C Auto-Restart ON-Time t J 51 72 ms AR V = 5.9 V BP 14 Rev. C 11/14 www.power.com

LYT4221-4228/4321-4328 Conditions Parameter Symbol SOURCE = 0 V; T = -20 °C to 125 °C Min Typ Max Units J (Unless Otherwise Specified) Auto-Restart (cont.) Auto-Restart T = 65 °C DC J 12.5 % Duty Cycle AR See Note B SOA Minimum Switch T = 65 °C t J 0.875 µs ON-Time ON(SOA) See Note B FEEDBACK Pin Current I 0 °C < T < 100 °C 6.5 10 µA During Auto-Restart FB(AR) J REFERENCE Pin REFERENCE Pin V 1.223 1.245 1.273 V Voltage R R = 24.9 kW R REFERENCE Pin 0 °C < T < 100 °C I J 48.69 49.94 51.19 µA Current R Current Limit/Circuit Protection di/dt = 138 mA/µs LYT4x22 0.79 0.92 di/dt = 145 mA/µs LYT4x23 0.99 1.15 Full Power I di/dt = 180 mA/µs LYT4x24 1.18 1.38 Current Limit LIMIT(F) A (C = 4.7 µF) TJ = 65 °C di/dt = 227 mA/µs LYT4x25 1.41 1.63 BP di/dt = 272 mA/µs LYT4x26 1.89 2.19 di/dt = 375 mA/µs LYT4x27 2.61 3.03 di/dt = 110 mA/µs LYT4x21 0.59 0.69 di/dt = 158 mA/µs LYT4x22 0.65 0.76 di/dt = 155 mA/µs LYT4x23 0.8 0.93 Reduced Power I di/dt = 188 mA/µs LYT4x24 0.95 1.11 Current Limit LIMIT(R) A (C = 47 µF) TJ = 65 °C di/dt = 240 mA/µs LYT4x25 1.14 1.33 BP di/dt = 300 mA/µs LYT4x26 1.38 1.61 di/dt = 415 mA/µs LYT4x27 1.88 2.18 di/dt = 770 mA/µs LYT4x28 3.92 4.56 Minimum t + t T = 65 °C 270 450 630 ns ON-Time Pulse LEB IL(D) J Leading Edge T = 65 °C t J 110 375 ns Blanking Time LEB See Note B T = 65 °C Current Limit Delay t J 150 ns IL(D) See Note B Thermal Shutdown See Note B LYT4x21-4x28 147 155 164 °C Temperature Thermal Shutdown See Note B 56 °C Hysteresis BYPASS Pin Power-Up Reset Threshold V 0 °C < T < 100 °C 2.25 3.30 4.25 V BP(RESET) J Voltage 15 www.power.com Rev. C 11/14

LYT4221-4228/4321-4328 Conditions Parameter Symbol SOURCE = 0 V; T = -20 °C to 125 °C Min Typ Max Units J (Unless Otherwise Specified) Output T = 65 °C 11.5 13.2 LYT4x21 J I = 100 mA D T = 100 °C 13.5 15.5 J T = 65 °C 6.9 8.0 LYT4x22 J I = 100 mA D T = 100 °C 8.4 9.7 J T = 65 °C 5.3 6.0 LYT4x23 J I = 150 mA D T = 100 °C 6.3 7.3 J T = 65 °C 3.4 3.9 LYT4x24 J I = 150 mA D T = 100 °C 3.9 4.5 J ON-State Resistance R W DS(ON) T = 65 °C 2.5 2.9 LYT4x25 J I = 200 mA D T = 100 °C 3.0 3.4 J T = 65 °C 1.9 2.2 LYT4x26 J I = 250 mA D T = 100 °C 2.3 2.7 J T = 65 °C 1.8 2.0 LYT4x27 J I = 350 mA D T = 100 °C 2.1 2.5 J T = 65 °C 1.3 1.5 LYT4x28 J I = 600 mA D T = 100 °C 1.6 1.9 J V = 6.4 V OFF-State Drain BP I V = 560 V 50 µA Leakage Current DSS DS T = 100 °C J V = 6.4 V Breakdown Voltage BV BP 725 V DSS T = 65 °C J Minimum Drain T < 100 °C 36 V Supply Voltage J Rise Time t 100 ns R Measured in a Typical Flyback See Note B Fall Time t 50 ns F NOTES: A. For specifications with negative values, a negative temperature coefficient corresponds to an increase in magnitude with increasing temperature and a positive temperature coefficient corresponds to a decrease in magnitude with increasing temperature. B. Guaranteed by characterization. Not tested in production. Note: The parameter values and limits specified herein are based on a limited data set. There is a small likelihood that minor changes may be required based on additional data as they become available. 16 Rev. C 11/14 www.power.com

LYT4221-4228/4321-4328 Typical Performance Characteristics pF)10000 LLLSYYYcTTTa444linxxx222g123 F a 000c...t123o888rs: PI-6965-102313 300 LLLSYYYcTTTa444linxxx222g123 F a 000c...t123o888rs: PI-6966-102313 e ( LYT4x24 0.56 LYT4x24 0.56 nc1000 LLYYTT44xx2256 01..7050 W) 200 LLYYTT44xx2256 01..7050 ta LYT4x27 1.16 m LYT4x27 1.16 apaci L YT4x28 1.55 wer ( L YT4x28 1.55 C o N 100 P 100 AI R D 10 0 1 100 200 300 400 500 600 0 100 200 300 400 500 600 700 DRAIN Pin Voltage (V) DRAIN Voltage (V) Figure 14. Drain Capacitance vs. Drain Pin Voltage. Figure 15. Power vs. Drain Voltage. g) n 45 PI-6967-102313 mum Rati 1.12 PI-6010-060410 nt (A) entMaxi 0.8 re 3 Scaling Factors: urre ur LYT4x21 0.18 Cut 0.6 C LYT4x22 0.28 N ol AIN 2 LLYYTT44xx2234 00..3586 RAIAbs 0.4 R LYT4x25 0.75 Do D 1 LLYYTT44xx2267 11..0106 d t LYT4x28 1.55 ze 0.2 LYT42x 8 TCASE = 25 °C ali LYT42x8 TCASE = 100 °C m 0 r 0 o 0 2 4 6 8 10 12 14 16 18 20 N 0 100 200 300 400 500 600 700 800 ( DRAIN Voltage (V) DRAIN Voltage (V) Figure 16. Drain Current vs. Drain Voltage. Figure 17. Maximum Allowable Drain Current vs. Drain Voltage. 17 www.power.com Rev. C 11/14

LYT4221-4228/4321-4328 eSIP-7C (E Package) C 2 A 0.403 (10.24) 0.081 (2.06) 0.264 (6.70) 0.397 (10.08) 0.077 (1.96) Ref. B Detail A 2 0.325 (8.25) 0.290 (7.37) 0.198 (5.04) Ref. 0.320 (8.13) Ref. 0.519 (13.18) Ref. Pin #1 0.140 (3.56) 0.016 (0.41) 0.207 (5.26) I.D. 0.120 (3.05) Ref. 0.187 (4.75) 0.070 (1.78) Ref. 0.047 (1.19) 3 4 0.033 (0.84) 0.050 (1.27) 0.100 (2.54) 6× 0.016 (0.41) 0.028 (0.71) 3 0.011 (0.28)6× 0.118 (3.00) 0.010 M 0.25 M C A B 0.020 M 0.51 M C FRONT VIEW SIDE VIEW BACK VIEW 0.100 (2.54) 10° Ref. All Around 0.021 (0.53) 0.060 (1.52) 0.020 (0.50) 0.050 (1.27) 0.019 (0.48) Ref. 0.050 (1.27) PIN 1 0.048 (1.22) 0.059 (1.50) 0.155 (3.93) 0.378 (9.60) 0.046 (1.17) Ref. 0.019 (0.48) Ref. 0.023 (0.58) PIN 7 END VIEW 0.027 (0.70) 0.059 (1.50) Notes: 1. Dimensioning and tolerancing per ASME Y14.5M-1994. DETAIL A 2. Dimensions noted are determined at the outermost 0.100 (2.54) 0.100 (2.54) extremes of the plastic body exclusive of mold flash, tie bar burrs, gate burrs, and interlead flash, but including MOUNTING HOLE PATTERN any mismatch between the top and bottom of the plastic (not to scale) body. Maximum mold protrusion is 0.007 [0.18] per side. 3. Dimensions noted are inclusive of plating thickness. 4. Does not include inter-lead flash or protrusions. 5. Controlling dimensions in inches (mm). PI-4917-061510 18 Rev. C 11/14 www.power.com

LYT4221-4228/4321-4328 Part Ordering Information • LYTSwitch Product Family • 4 Series Number • PFC/Dimming 2 PFC No Dimming 3 PFC Dimming • Voltage Range 2 High-Line • Device Size • Package Identifier LYT 4 2 2 3 E E eSIP-7C 19 www.power.com Rev. C 11/14

Revision Notes Date A Initial Release. 11/13 B LYT4x27E, LYT4x28E – updated / added parameters: I , I , V, I ,andI . 03/11/14 CH1 CH2 V V(SC) LIMIT(F) Updated I and I , V , I , V, I , I , I , I , R , Duty Cycle Reduction, Thermal Shutdown Temperature C CH1 CH2 BP(SHUNT) OV V V(SC) FB(SKIP) FB(SC) LIMIT(R) DS(ON) 11/11/14 and Hysteresis parameters per PCN-14441. For the latest updates, visit our website: www.power.com Power Integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability. Power Integrations does not assume any liability arising from the use of any device or circuit described herein. POWER INTEGRATIONS MAKES NO WARRANTY HEREIN AND SPECIFICALLY DISCLAIMS ALL WARRANTIES INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF THIRD PARTY RIGHTS. Patent Information The products and applications illustrated herein (including transformer construction and circuits external to the products) may be covered by one or more U.S. and foreign patents, or potentially by pending U.S. and foreign patent applications assigned to Power Integrations. A complete list of Power Integrations patents may be found at www.power.com. Power Integrations grants its customers a license under certain patent rights as set forth at http://www.power.com/ip.htm. Life Support Policy POWER INTEGRATIONS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF POWER INTEGRATIONS. As used herein: 1. A Life support device or system is one which, (i) is intended for surgical implant into the body, or (ii) supports or sustains life, and (iii) whose failure to perform, when properly used in accordance with instructions for use, can be reasonably expected to result in significant injury or death to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. The PI logo, TOPSwitch, TinySwitch, LinkSwitch, LYTSwitch, InnoSwitch, DPA-Switch, PeakSwitch, CAPZero, SENZero, LinkZero, HiperPFS, HiperTFS, HiperLCS, Qspeed, EcoSmart, Clampless, E-Shield, Filterfuse, FluxLink, StakFET, PI Expert and PI FACTS are trademarks of Power Integrations, Inc. Other trademarks are property of their respective companies. ©2014, Power Integrations, Inc. Power Integrations Worldwide Sales Support Locations World Headquarters Germany Japan Taiwan 5245 Hellyer Avenue Lindwurmstrasse 114 Kosei Dai-3 Bldg. 5F, No. 318, Nei Hu Rd., Sec. 1 San Jose, CA 95138, USA. 80337 Munich 2-12-11, Shin-Yokohama, Nei Hu Dist. Main: +1-408-414-9200 Germany Kohoku-ku Taipei 11493, Taiwan R.O.C. Customer Service: Phone: +49-895-527-39110 Yokohama-shi Kanagwan Phone: +886-2-2659-4570 Phone: +1-408-414-9665 Fax: +49-895-527-39200 222-0033 Japan Fax: +886-2-2659-4550 Fax: +1-408-414-9765 e-mail: eurosales@power.com Phone: +81-45-471-1021 e-mail: taiwansales@power.com e-mail: usasales@power.com Fax: +81-45-471-3717 India e-mail: japansales@power.com UK China (Shanghai) #1, 14th Main Road First Floor, Unit 15, Meadway Rm 2410, Charity Plaza, No. 88 Vasanthanagar Korea Court, Rutherford Close, North Caoxi Road Bangalore-560052 India RM 602, 6FL Stevenage, Herts. SG1 2EF Shanghai, PRC 200030 Phone: +91-80-4113-8020 Korea City Air Terminal B/D, 159-6 United Kingdom Phone: +86-21-6354-6323 Fax: +91-80-4113-8023 Samsung-Dong, Kangnam-Gu, Phone: +44 (0) 1252-730-141 Fax: +86-21-6354-6325 e-mail: indiasales@power.com Seoul, 135-728, Korea Fax: +44 (0) 1252-727-689 e-mail: chinasales@power.com Phone: +82-2-2016-6610 e-mail: eurosales@power.com Italy Fax: +82-2-2016-6630 China (Shenzhen) Via Milanese 20, 3rd. Fl. e-mail: koreasales@power.com 17/F, Hivac Building, No. 2, Keji 20099 Sesto San Giovanni (MI) Nan 8th Road, Nanshan District, Italy Singapore Shenzhen, China, 518057 Phone: +39-024-550-8701 51 Newton Road Phone: +86-755-8672-8689 Fax: +39-028-928-6009 #19-01/05 Goldhill Plaza Fax: +86-755-8672-8690 e-mail: eurosales@power.com Singapore, 308900 e-mail: chinasales@power.com Phone: +65-6358-2160 Fax: +65-6358-2015 e-mail: singaporesales@power.com

Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: P ower Integrations: LYT4217E LYT4216E LYT4315E LYT4212E LYT4214E LYT4313E LYT4213E LYT4314E LYT4316E LYT4215E LYT4211E LYT4311E LYT4312E LYT4317E LYT4218L LYT4218E LYT4318E LYT4318L LYT4222E LYT4316L LYT4223E LYT4217L LYT4313L LYT4314L LYT4326E LYT4321E LYT4323E LYT4317L LYT4211L LYT4214L LYT4216L LYT4212L LYT4225E LYT4311L LYT4324E LYT4215L LYT4312L LYT4315L LYT4226E LYT4213L LYT4224E LYT4221E LYT4322E LYT4325E LYT4228E3 LYT4327E3 LYT4328E3 LYT4227E3 LYT4213E2 LYT4218E2 LYT4222E3 LYT4325E3 LYT4212E2 LYT4216E2 LYT4313E2 LYT4215E2 LYT4221E3 LYT4225E3 LYT4317E2 LYT4214E2 LYT4217E2 LYT4226E3 LYT4326E3 LYT4323E3 LYT4315E2 LYT4324E3 LYT4312E2 LYT4316E2 LYT4322E3 LYT4211E2 LYT4321E4 LYT4223E3 LYT4224E3 LYT4311E2 LYT4318E2 LYT4314E2