LTC6081/LTC6082 Precision Dual/Quad CMOS Rail-to-Rail Input/ Output Amplifiers FeaTures DescripTion ■ Maximum Offset Voltage: 70µV (25°C) The LTC®6081/LTC6082 are dual/quad low offset, low drift, ■ Maximum Offset Drift: 0.8µV/°C low noise CMOS operational amplifiers with rail-to-rail ■ Maximum Input Bias: 1pA (25°C) 40pA (T ≤ 85°C) input/output swing. A ■ Open Loop Voltage Gain: 120dB Typ The 70µV maximum offset, 1pA input bias current, 120dB ■ Gain Bandwidth Product: 3.6MHz open loop gain and 1.3µV 0.1Hz to 10Hz noise make ■ CMRR: 100dB Min P-P it perfect for precision signal conditioning. The LTC6081/ ■ PSRR: 98dB Min LTC6082 features 100dB CMRR and 98dB PSRR. ■ 0.1Hz to 10Hz Noise: 1.3µV P-P ■ Supply Current: 330µA Each amplifier consumes only 330µA of current on a 3V ■ Rail-to-Rail Inputs and Outputs supply. The 10-lead DFN has an independent shutdown ■ Unity Gain Stable function that reduces each amplifier’s supply current ■ 2.7V to 5.5V Operation Voltage to 1µA. ■ Dual LTC6081 in 8-Lead MSOP and 10-Lead DFN10 LTC6081/LTC6082 is specified for power supply voltages Packages; Quad LTC6082 in 16-Lead SSOP and DFN of 3V and 5V from –40°C to 125°C. The dual LTC6081 is Packages available in 8-lead MSOP and 10-lead DFN10 packages. The quad LTC6082 is available in 16-lead SSOP and DFN applicaTions packages. ■ Photodiode Amplifier L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. ■ Strain Gauge ■ High Impedance Sensor Amplifier ■ Microvolt Accuracy Threshold Detection ■ Instrumentation Amplifiers ■ Thermocouple Amplifiers Typical applicaTion Shock Sensor Amplifier (Accelerometer) VOS Drift Histogram V+ 0.1µF 30 LTC6081MS8 8.2pF 00) TA = –40°C TO 125°C 2M 2M F 1 25 VS = 3V + T O VCM = 0.5V U PKGMSU-R00ALTDA 1G 3.9pF 3.9pF LTC16/2081 BVOWU T~ =2 .120k9HmzV/g RS (O 20 0° SE7N7S0OpRF – LIFIE 15 P 1M M A V– 0.1µF1M ER OF 10 B M 5 U N 10k 60812 TA01 0 47pF –0.20 –0.10 0 0.10 0.20 0.30 VOSDRIFT (µV/°C) 60812 TA01b 60812fd 1 For more information www.linear.com/LTC6081

LTC6081/LTC6082 absoluTe MaxiMuM raTinGs (Note 1) Total Supply Voltage (V+ to V–) ...................................6V Specified Temperature Range (Note 4) Input Voltage ......................................................V– to V+ LTC6081C, LTC6082C ..............................0°C to 70°C Output Short Circuit Duration (Note 2).............Indefinite LTC6081I, LTC6082I .............................–40°C to 85°C Operating Temperature Range (Note 3) LTC6081H, LTC6082H ........................–40°C to 125°C LTC6081C, LTC6082C ..........................–40°C to 85°C Junction Temperature LTC6081I, LTC6082I .............................–40°C to 85°C DFN Packages ...................................................125°C LTC6081H, LTC6082H ........................–40°C to 125°C All Other Packages ............................................150°C (H Temperature Range Not Available in DFN Package) Storage Temperature Range DFN Packages ....................................–65°C to 125°C All Other Packages .............................–65°C to 150°C Lead Temperature (Soldering, 10 Sec) ..................300°C pin conFiGuraTion TOP VIEW OUTA 1 10 V+ TOP VIEW –INA 2 A 9 OUTB OUTA1 8V+ +INA 3 B 8 –INB –INA2 A 7OUTB V– 4 7 +INB +INAV34– B 65–+IINNBB SHDN_A 5 6 SHDN_B MS8 PACKAGE 8-LEAD PLASTIC MSOP DD PACKAGE 10-LEAD (3mm × 3mm) PLASTIC DFN TJMAX = 150°C, θJA = 200°C/W TJMAX = 125°C, θJA = 43°C/W UNDERSIDE METAL CONNECTED TO V– TOP VIEW TOP VIEW OUTA 1 16 OUTD OUTA 1 16 OUTD –INA 2 A D 15 –IND –INA 2 A D 15 –IND +INA 3 14 +IND +INA 3 14 +IND V+ 4 13 V– V+ 4 13 V– +INB 5 B C 12 +INC +INB 5 B C 12 +INC –INB 6 11 –INC –INB 6 11 –INC OUTB 7 10 OUTC OUTB 7 10 OUTC NC 8 9 NC NC 8 9 NC DHC PACKAGE GN PACKAGE 16-LEAD (5mm × 3mm) PLASTIC DFN 16-LEAD PLASTIC SSOP UNDETRJMSIADXE = M 12E5TA°CL, CθOJAN =N E4C3T°CED/W T O V– TJMAX = 150°C, θJA = 110°C/W 60812fd 2 For more information www.linear.com/LTC6081

LTC6081/LTC6082 orDer inForMaTion LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION SPECIFIED TEMPERATURE RANGE LTC6081CDD#PBF LTC6081CDD#TRPBF LCJP 10-Lead (3mm × 3mm) Plastic DFN 0°C to 70°C LTC6081IDD#PBF LTC6081IDD#TRPBF LCJP 10-Lead (3mm × 3mm) Plastic DFN –40°C to 85°C LTC6081CMS8#PBF LTC6081CMS8#TRPBF LTCJN 8-Lead Plastic MSOP 0°C to 70°C LTC6081IMS8#PBF LTC6081IMS8#TRPBF LTCJN 8-Lead Plastic MSOP –40°C to 85°C LTC6081HMS8#PBF LTC6081HMS8#TRPBF LTCJN 8-Lead Plastic MSOP –40°C to 125°C LTC6082CDHC#PBF LTC6082CDHC#TRPBF 6082 16-Lead (5mm × 3mm) Plastic DFN 0°C to 70°C LTC6082IDHC#PBF LTC6082IDHC#TRPBF 6082 16-Lead (5mm × 3mm) Plastic DFN –40°C to 85°C LTC6082CGN#PBF LTC6082CGN#TRPBF 6082 16-Lead Plastic SSOP 0°C to 70°C LTC6082IGN#PBF LTC6082IGN#TRPBF 6082I 16-Lead Plastic SSOP –40°C to 85°C LTC6082HGN#PBF LTC6082HGN#TRPBF 6082H 16-Lead Plastic SSOP –40°C to 125°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ 60812fd 3 For more information www.linear.com/LTC6081

LTC6081/LTC6082 elecTrical characTerisTics The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T = 25°C. Test conditions are V+ = 3V, V– = 0V, V = 0.5V unless otherwise noted. A CM C, I SUFFIXES H SUFFIX SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS V Offset Voltage LTC6081MS8, LTC6082GN V = 0.5V, 2.5V –70 70 –70 70 μV OS CM LTC6081MS8, LTC6082GN V = 0.5V, 2.5V ● –90 90 –90 90 μV CM LTC6081DD, LTC6082DHC V = 0.5V, 2.5V –70 70 μV CM LTC6081DD, LTC6082DHC V = 0.5V, 2.5V ● –90 90 μV CM ΔVOS⁄ΔT Input Offset Voltage Drift ● ±0.2 ±0.8 ±0.2 ±0.8 μV/°C (Note 5) I Input Bias Current 0.2 1 0.2 1 pA B (Note 6) ● 40 500 pA I Input Offset Current 0.1 0.1 pA OS ● 15 100 pA e Input Referred Noise Noise Density at f = 1kHz 13 13 nV/√Hz n Integrated Noise From 0.1Hz to 10Hz 1.3 1.3 µV P-P I Input Noise Current Density 0.5 0.5 fA/√Hz n (Note 7) Input Common Mode Range ● V– V+ V– V+ V C Differential Input Capacitance 3 3 pF DIFF C Common Mode Input 7 7 pF CM Capacitance CMRR Common Mode Rejection V = 0V to 1.5V 95 105 95 105 dB CM Ratio V = 0V to 1.5V ● 88 100 86 100 dB CM V = 0V to 3V 93 105 93 105 dB CM V = 0V to 3V ● 88 100 86 100 dB CM PSRR Power Supply Rejection Ratio V = 2.7V to 5.5V 98 110 98 110 dB S ● 96 96 dB V Output Voltage, High, Either No Load 1 1 mV OUT Output Pin I = 0.5mA ● –32 –35 mV SOURCE I = 5mA ● –320 –350 mV SOURCE Output Voltage, Low, Either No Load 1 1 mV Output Pin (Referred to V–) I = 0.5mA ● 33 40 mV SINK I = 5mA ● 300 360 mV SINK A Large-Signal Voltage Gain R = 10k, 0.5V < V < 2.5V ● 110 120 110 120 dB VOL LOAD OUT I Output Short-Circuit Current Source ● 17 15 mA SC Sink ● 17 15 mA SR Slew Rate A = 1 1 1 V/μs V GBW Gain-Bandwidth Product R = 100k 2.5 3.6 2.5 3.6 MHz L (f = 50kHz) ● 1.8 1.5 MHz TEST F0 Phase Margin RL = 10k 70 70 Deg t Settling Time 0.1% A = 1, 1V Step 6 6 μs S V I Supply Current No Load 330 400 330 400 μA S (Per Amplifier) ● 435 460 μA Shutdown Current Shutdown, V ≤ 0.8V 0.5 μA SHDN (Per Amplifier) ● 2 μA V Supply Voltage Range Guaranteed by the PSRR Test ● 2.7 5.5 2.7 5.5 V S Channel Separation f = 10kHz, R = 10k –120 –120 dB s L 60812fd 4 For more information www.linear.com/LTC6081

LTC6081/LTC6082 elecTrical characTerisTics The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T = 25°C. Test conditions are V+ = 3V, V– = 0V, V = 0.5V unless otherwise noted. A CM C, I SUFFIXES H SUFFIX SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS Shutdown Logic SHDN High ● 2 2 V SHDN Low ● 0.8 0.8 V THD Total Harmonic Distortion f = 10kHz, V+ = 3V, V = 1V , R = 10k –90 –90 dB OUT P-P L t Turn-On Time V = 0.8V to 2V 10 10 µs ON SHDN t Turn-Off Time V = 2V to 0.8V 2 2 µs OFF SHDN SHDN Pin Current V = 0V ● 2 μA SHDN The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. Test conditions are V+ = 5V, V– = 0V, V = 0.5V unless otherwise noted. CM C, I SUFFIXES H SUFFIX SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS V Offset Voltage LTC6081MS8, LTC6082GN V = 0.5V –70 70 –70 70 μV OS CM LTC6081MS8, LTC6082GN V = 0.5V ● –90 90 –90 90 μV CM LTC6081DD, LTC6082DHC V = 0.5V –70 70 μV CM LTC6081DD, LTC6082DHC V = 0.5V ● –90 90 μV CM ΔVOS⁄ΔT Input Offset Voltage Drift ● ±0.2 ±0.8 ±0.2 ±0.8 μV/°C (Note 8) I Input Bias Current 0.2 0.2 pA B ● 40 500 pA I Input Offset Current 0.1 0.1 pA OS ● 15 100 pA e Input Referred Noise f = 1kHz 13 13 nV/√Hz n 0.1Hz to 10Hz 1.3 1.3 µV P-P I Input Noise Current Density 0.5 0.5 fA/√Hz n (Note 7) Input Common Mode Range ● V– V+ V– V+ V C Differential Input Capacitance 3 3 pF DIFF C Common Mode Input 7 7 pF CM Capacitance CMRR Common Mode Rejection V = 0V to 3.5V 100 110 100 110 dB CM Ratio V = 0V to 3.5V ● 95 110 94 110 dB CM V = 0V to 5V ● 86 95 86 95 dB CM PSRR Power Supply Rejection Ratio V = 2.7V to 5.5V 98 110 98 110 dB S ● 96 96 dB V Output Voltage, High, Either No Load 1 1 mV OUT Output Pin (Referred to V+) I = 0.5mA ● –24 –25 mV SOURCE I = 5mA ● –200 –220 mV SOURCE Output Voltage, Low, Either No Load 1 1 mV Output Pin (Referred to V–) I = 0.5mA ● 27 32 mV SINK I = 5mA ● 210 240 mV SINK A Large-Signal Voltage Gain R = 10k, 0.5V < V < 4.5V ● 110 120 110 120 dB VOL LOAD OUT 60812fd 5 For more information www.linear.com/LTC6081

LTC6081/LTC6082 elecTrical characTerisTics The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T = 25°C. Test conditions are V+ = 5V, V– = 0V, V = 0.5V unless otherwise noted. A CM C, I SUFFIXES H SUFFIX SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS I Output Short-Circuit Current Source ● 24 21 mA SC Sink ● 24 21 mA SR Slew Rate A = 1 1 1 V/μs V GBW Gain-Bandwidth Product R = 100k 2.5 3.5 2.5 3.5 MHz L (f = 50kHz) ● 1.8 1.5 MHz TEST F0 Phase Margin RL = 10k 70 70 Deg t Settling Time 0.1% A = 1, 1V Step 6 6 μs S V I Supply Current No Load 340 425 340 425 μA S (Per Amplifier) ● 465 490 μA Shutdown Current Shutdown, V ≤ 1.2V ● 6 μA SHDN (Per Amplifier) V Supply Voltage Range Guaranteed by the PSRR Test ● 2.7 5.5 2.7 5.5 V S Channel Separation f = 10kHz, R = 10k –120 –120 dB s L Shutdown Logic SHDN High ● 3.5 3.5 V SHDN Low ● 1.2 1.2 V THD Total Harmonic Distortion f = 10kHz, V+ = 5V, V = 2V , R = 10k –90 –90 dB OUT P-P L t Turn-On Time V = 1.2V to 3.5V 10 10 µs ON SHDN t Turn-Off Time V = 3.5V to 1.2V 2 2 µs OFF SHDN SHDN Pin Current V = 0V ● 2 μA SHDN Note 1: Stresses beyond those listed under Absolute Maximum Ratings characterized and expected to meet specified performance from –40°C may cause permanent damage to the device. Exposure to any Absolute to 85°C but are not tested or QA sampled at these temperatures. The Maximum Rating condition for extended periods may affect device LTC6081I/LTC6082I are guaranteed to meet specified performance from reliability and lifetime. –40°C to 85°C. The LTC6081H/LTC6082H are guaranteed to meet specified Note 2: A heat sink may be required to keep the junction temperature performance from –40°C to 125°C. below the absolute maximum. This depends on the power supply voltage Note 5: Input offset drift is computed from the limits of the V test OS and how many amplifiers are shorted. divided by the temperature range. This is a conservative estimate of worst Note 3: The LTC6081C/LTC6082C and LTC6081I/LTC6082I are guaranteed case drift. Consult the Typical Performance Characteristics section for functional over the operating temperature range of –40°C to 85°C. more information on input offset drift. The LTC6081H/LTC6082H are guaranteed functional over the operating Note 6: I guaranteed by the V = 5V test. B S temperature range of –40°C to 125°C. Note 7: Current noise is calculated from I = √2qI , where q = 1.6 • 10–19 n B Note 4: The LTC6081C/LTC6082C are guaranteed to meet specified coulomb. performance from 0°C to 70°C. The LTC6081C/LTC6082C are designed, Note 8: V drift is guaranteed by the V = 3V test. OS S 60812fd 6 For more information www.linear.com/LTC6081

LTC6081/LTC6082 Typical perForMance characTerisTics V Drift Histogram V Drift Histogram V vs Temperature OS OS OS 30 25 25 LTC6081MS8 LTC6081DFN LTC6081MS8 TA = –40°C TO 125°C TA = –40°C TO 125°C 20 VS = 3V OF 100) 25 VVSC M= =3 V0.5V OF 100) 20 VVSC M= =3 V0.5V 15 VRCEMPR =E 0S.E5NVTATIVE PARTS T 20 T 10 U U S (O S (O 15 µV) 5 MP 15 MP (S OF A OF A 10 VO 0 R 10 R –5 E E B B M M –10 U U 5 N 5 N –15 0 0 –20 –0.20 –0.10 0 0.10 0.20 0.30 –0.30 –0.20 –0.10 0 0.10 0.20 –50 –30 –10 10 30 50 70 90 110 130 VOSDRIFT (µV/°C) VOSDRIFT (µV/°C) TEMPERATURE (°C) 60812 G01 60812 G02 60812 G03 V Histogram V vs V V vs V OS OS CM OS CM 18 40 140 LTC6081MS8 VS = 3V VS = 5V 16 TA = 25°C 30 TA = 25°C 120 TA = 25°C F 100)14 VVSC M= =3 V0.5V 20 REPRESENTATIVE PARTS 100 REPRESENTATIVE PARTS O T 12 80 U 10 S (O10 µV) µV) 60 MP (S 0 (S OF A 8 VO–10 VO40 R 6 20 E MB 4 –20 0 U N 2 –30 –20 0 –40 –40 –9.5 –5.5 –1.5 2.5 6.5 10.5 0 0.5 1.0 1.5 2.0 2.5 3.0 0 1 2 3 4 5 VOS (µV) VCM (V) VCM (V) 60812 G04 60812 G05 60812 G06 V vs Output Current Warm-Up Drift vs Time Noise Voltage vs Frequency OS 200 25 110 150 VVSC M= =5 V2.5V TA = 125°C µV) 20 VTAC M= =2 50°.C5V 10900 TA = 25°C 100 TA = 25°C LTAGE ( 15 VS = 5V V/√Hz) 8700 O n V (µV)OS500 TA = 55°C GE IN OFFSET V 105 VS = 3V OISE VOLTAGE ( 65430000 VVSC M= =5 V0.5V N N A –50 CH 0 20 VS = 3V SINKING 10 VCM = 0.5V SOURCING CURRENT CURRENT –100 –5 0 –6 –4 –2 0 2 4 6 0 5 10 15 20 25 30 35 40 45 50 55 60 1 10 100 1k 10k 100k OUTPUT CURRENT (mA) TIME AFTER POWER UP (s) FREQUENCY (Hz) 60812 G07 60812 G08 60812 G09 60812fd 7 For more information www.linear.com/LTC6081

LTC6081/LTC6082 Typical perForMance characTerisTics 0.1Hz to 10Hz Output 0.1Hz to 10Hz Output Noise Voltage vs Frequency Voltage Noise Voltage Noise 300 280 VS = 3V TA = 25°C TA = 25°C 260 TA = 25°C VS = 3V VS = 3V GE (nV/√Hz) 211220864200000 PMOS INPUTS E (500nV/DIV) VCM = 0.5V SE (1µV/DIV) VCM = 2.5V NOISE VOLTA 1110864200000 VCM = 0N.5MVOS INPUTS OUTPUT NOIS OUTPUT NOI VCM = 2.5V 40 20 0 1 10 100 1k 10k 100k 0 5 10 15 20 25 30 35 40 45 50 0 5 10 15 20 25 30 35 40 45 50 FREQUENCY (Hz) TIME (s) TIME (s) 60812 G10 60812 G11 60812 G12 Input Bias Current vs Temperature I vs V I vs V BIAS CM BIAS CM 1000 40 500 VS = 5V LTC6081MS8 LTC6081MS8 VCM = 2.5V 30 VS = 5V 400 VS = 5V A) 100 20 300 TA = 125°C p T ( 10 200 N RRE pA) 0 TA = 70°C pA) 100 CU 10 (S (S 0 BIAS IBIA–10 IBIA–100 UT –20 TA = 85°C –200 INP 1 –30 –300 –40 –400 0.1 –50 –500 20 40 60 80 100 120 140 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 TEMPERATURE (°C) VCM (V) VCM (V) 60812 G13 60812 G14 60812 G15 Large Signal Transient Small Signal Transient Overshoot vs C L 55 TA = 25°C 50 VS = 3V 45 VCM = 0.5V 40 0.5V/DIV GND 20mV/DIV GND %) 35 AV = 1 T ( O 30 O SH 25 AV = 10 R 200µs/DIV 60812 G16 20µs/DIV 60812 G17 OVE 20 TA = 25°C TA = 25°C 15 VS = ±1.5V VS = ±1.5V 10 RL = 10k RL = 10k CL = 100pF CL = 100pF 5 0 10 100 1000 10000 CAPACITIVE LOAD (pF) 60812 G18 60812fd 8 For more information www.linear.com/LTC6081

LTC6081/LTC6082 Typical perForMance characTerisTics Supply Current vs Temperature Supply Current vs Time Output Impedance vs Frequency 390 1600 4 1000 VPCEMR A= M0.P5LVIFIER VS = 5V NTAO =B 2Y5P°ACSS CAPACITOR 370 SUPPLY CURRENT (µA) 332353910000 VS = 3V PPLY CURRENT OPAMP (µA)1284000000 SUPPLY VOLTAGE 321 SUPPLY VOLTAGE (V) OUTPUT IMPEDANCE (Ω) 101001 AAAVVV === 111000 270 SU SUPPLY CURRENT 0.1 VS = 3V VCM = 0.5V TA = 25°C 250 0 0 0.01 –40–25–10 5 20 35 50 65 80 95 110125 0 100 200 300 400 500 100 1k 10k 100k 1M 10M 100M TEMPERATURE (°C) TIME (µs) FREQUENCY (Hz) 60812 G19 60812 G20 60812 G21 Open Loop Gain Open Loop Gain Open Loop Gain vs Frequency 20 20 60 270 VS = 3V VS = 5V RL = 10k TA = 25°C TA = 25°C RL = 100k 180 10 10 40 PHASE V) V) 90 INPUT VOLTAGE (µ––21000 RRRLLL == = 11 200k0kk INPUT VOLTAGE (µ––21000 RRRLL L= = =1 10200kkk GAIN (dB)200 GAIN ––019800PHASE (DEG) –20 –30 –30 VS = 5V –270 VCM = 0.5V TA = 25°C –40 –40 –40 –360 0 0.5 1.0 1.5 2.0 2.5 3.0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 1k 10k 100k 1M 10M 100M OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) FREQUENCY (Hz) 60812 G22 60812 G23 60812 G24 Open Loop Gain vs Frequency CMRR vs Frequency PSRR vs Frequency 60 180 120 120 RL = 10k VS = 5V VS = 5V 40 PHASE RL = 100k 90 100 VTAC M= =2 50°.C5V 100 VTAC M= =2 50°.C5V RL = 1k 0 80 80 GAIN (dB)200 ––19800PHASE (DEG CMRR (dB) 6400 PSRR (dB) 6400 GAIN ) –270 20 20 –20 VS = 5V VCM = 0.5V –360 0 0 TA = 25°C CL = 200pF –40 –450 –20 –20 1k 10k 100k 1M 10M 100M 100 1k 10k 100k 1M 10M 100M 100 1k 10k 100k 1M 10M 100M FREQUENCY (Hz) FREQUENCY (Hz) FREQUENCY (Hz) 60812 G25 60812 G26 60812 G27 60812fd 9 For more information www.linear.com/LTC6081

LTC6081/LTC6082 Typical perForMance characTerisTics Output Voltage Swing Channel Separation vs Frequency vs Load Current Distortion vs Frequency CHANNEL SEPARATION (dB)––1–––1–0864220000000 VVRSCL M == =31 V00k.5V OUTPUT VOLTAGE SWING (V)(REFERRED TO SUPPLY VOLTAGE)++++VVV––––VVVVVSSSS SSSS––––+ 01122110V........55000505S VVSC M= =3 V0TTT.AAA5 V=== 12–2555°5C°°CC SOSUINRKCE DISTORTION (dBc)––––––––2456738900000000 ARVVSVOL U===T 511=V0 2kVP-P 2ND 3RD –140 –VS 0 –100 100 1k 10k 100k 1M 10M 100M 0.01 0.1 1 10 100 1 10 100 1000 FREQUENCY (Hz) LOAD CURRENT (mA) FREQUENCY (kHz) 60789 G29 60812 G30 60812 G28 pin FuncTions OUT: Amplifier Output SHDN_A: Shutdown Pin of Amplifier A, active low and only valid for LTC6081DD. An internal current source pulls the –IN: Inverting Input pin to V+ when floating. +IN: Noninverting Input SHDN_B: Shutdown Pin of Amplifier B, active low and only V+: Positive Supply valid for LTC6081DD. An internal current source pulls the V–: Negative Supply pin to V+ when floating. NC: Not internally connected. Exposed Pad: Connected to V–. 60812fd 10 For more information www.linear.com/LTC6081

LTC6081/LTC6082 applicaTions inForMaTion Preserving Input Precision Rail-to-Rail Input Preserving input accuracy of the LTC6081/LTC6082 re- The input stage of LTC6081/LTC6082 combines both PMOS quires that the application circuit and PC board layout do and NMOS differential pairs, extending its input common not introduce errors comparable or greater than the 5µV mode voltage range to both positive and negative supply typical offset of the amplifiers. Temperature differentials voltages. At high input common mode range, the NMOS across the input connections can generate thermocouple pair is on. At low common mode range, the PMOS pair is voltages of 10’s of microvolts so the connections to the on. The transition happens when the common voltage is input leads should be short, close together and away from between 1.3V and 0.9V below the positive supply. LTC6081 heat dissipating components. Air current across the board has better low frequency noise performance with PMOS can also generate temperature differentials. input on due to its lower flicker noise (see Voltage Noise vs Frequency and 0.1Hz to 10Hz Input Voltage Noise in The extremely low input bias currents (0.1pA typical) al- Typical Performance Characteristics). low high accuracy to be maintained with high impedance sources and feedback resistors. Leakage currents on the Thermal Hysteresis PC board can be higher than the input bias current. For example, 10GΩ of leakage between a 5V supply lead and Figure 1 shows the input offset voltage hysteresis of the an input lead will generate 500pA! Surround the input LTC6081IMS8 for 3 thermal cycles from –45°C to 90°C. leads with a guard ring driven to the same potential as the The typical offset shift is ±4µV. The data was taken with input common mode voltage to avoid excessive leakage the ICs in stress free sockets. Mounting to PC boards in high impedance applications. may cause additional hysteresis due to mechanical stress. The LTC6081 will meet offset voltage specifications in the Capacitive Load electrical characteristics table even after 15µV of additional error from thermal hysteresis. LTC6081/LTC6082 can drive capacitive load up to 200pF in unity gain. The capacitive load driving capability increases 0.30 VOS CHANGE AFTER 3 THERMAL CYCLES as the amplifier is used in higher gain configurations. A VCM = 0.5V small series resistance between the output and the load 0.25 V+ = 3V 300 UNITS S further increases the amount of capacitance the amplifier T NI0.20 U can drive. F O GE 0.15 A T SHDN Pins N E RC0.10 E Pins 5 and 6 are used for power shutdown on the LTC6081 P in the DD package. If they are floating, internal current 0.5 sources pull Pins 5 and 6 to V+ and the amplifiers operate 0 normally. In shutdown, the amplifier output is high im- –15–12 –9 –6 –3 0 3 6 9 12 15 VOS CHANGE (µV) 60812 F01 pedance, and each amplifier draws less than 2µA current. Figure 1. V Thermal Hysteresis of LTC6081MS8 OS 60812fd 11 For more information www.linear.com/LTC6081

LTC6081/LTC6082 applicaTions inForMaTion PC Board Layout and not the package. The package is generally aligned with the leads perpendicular to the long side of the PC Mechanical stress on a PC board and soldering-induced board (see Figure 2). stress can cause the V and V drift to shift. The DD OS OS and DHC packages are more sensitive to stress. A simple The most effective technique to relieve the PC board stress way to reduce the stress-related shifts is to mount the IC is to cut slots in the board around the op amp. These slots near the short edge of the PC board, or in a corner. The can be cut on three sides of the IC and the leads can exit on board edge acts as a stress boundary, or a region where the fourth side. Figure 2 shows the layout of a LTC6081DD the flexure of the board is minimum. The package should with slots at three sides. always be mounted so that the leads absorb the stress LONG DIMENSION SLOTS 60812 F02 Figure 2. Vertical Orientation of LTC6081DD with Slots siMpliFieD scheMaTic Simplified Schematic of the Amplifier V+ R1 R2 M10 M11 M8 I1 C1 1µA I2 V+ – + A1 V– D4 VBIAS M5 V+ +IN D7 V+ D3 OUTPUT CLAMP M1 M2 M6 M7 CONTROL OUT V– D6 D8 V+ –IN V– D2 D5 A2 BIAS SHDN GENERATION V– – + C2 D1 NOTE: SHDN IS ONLY AVAILABLE M3 M4 M9 V– IN THE DFN10 PACKAGE R3 R4 V– 60812 SS 60812fd 12 For more information www.linear.com/LTC6081

LTC6081/LTC6082 Typical applicaTions Low Side Current Sense 15pF 100k VDD V+ – I LOAD 1/2 LTC6081 VOUT = RSH • I • 101 + eNOISE = 3µVP-P, RTI RSH 1k BW ~ 1kHz 60812 TA03 Two Op-Amp Instrumentation Amplifier GAIN TRIM 1.96k 100k 100k CMRR V+ 0.1µF TRIM 976k 1M – 50k 1/2 100k LTC6081 – – + 1/2 VIN LTC6081 VOUT = 1011 • VIN + + V– 0.1µF 60812 TA04 60812fd 13 For more information www.linear.com/LTC6081

LTC6081/LTC6082 Typical applicaTions Thermocouple Amplifier 5V 0.1µF 1M + 1M 1µF LTC16/2081 V0°OCU TT O= 1500m0°VC/°C 5V – LT1025 2.49M K R– 10k 100pF SENSOR: OMEGA 5TC-TT-K-30-36 K-TYPE THERMOCOUPLE 1M RESISTORS PROTECT CIRCUIT TO ±350V WITH NO PHASE REVERSAL OF AMPLIFIER OUTPUT 1pA MAX IBIAS TRANSLATES TO 0.05°C ERROR 20µV VOS → 0.5°C OFFSET 60812 TA05 Precision Nanoamp Bidirectional Current Source 100k VIN + 1/4 100Ω LTC6082 – 0.01µF 1k 100Ω GAIN 5k TRIM 97.6k 100k 10-TURN 2.5V 0.1µF 10MΩ + 1/4 LTC6082 – – 100k 100k 1/4 LTC6082 3.9pF + 0.1µF IOUT = –1nA → 1nA FOR –2.5V LOAD IOUT VIN = –10V → 10V TOTAL ERROR <±1% (10pA) 60812 TA06 60812fd 14 For more information www.linear.com/LTC6081

LTC6081/LTC6082 packaGe DescripTion Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. DD Package 10-Lead Plastic DFN (3mm × 3mm) (Reference LTC DWG # 05-08-1699 Rev C) 0.70 ±0.05 3.55 ±0.05 1.65 ±0.05 2.15 ±0.05 (2 SIDES) PACKAGE OUTLINE 0.25 ±0.05 0.50 BSC 2.38 ±0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS R = 0.125 0.40 ±0.10 TYP 6 10 3.00 ±0.10 1.65 ±0.10 (4 SIDES) (2 SIDES) PIN 1 NOTCH PIN 1 R = 0.20 OR TOP MARK 0.35 × 45° (SEE NOTE 6) CHAMFER (DD) DFN REV C 0310 5 1 0.200 REF 0.75 ±0.05 0.25 ±0.05 0.50 BSC 2.38 ±0.10 (2 SIDES) 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2). CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 60812fd 15 For more information www.linear.com/LTC6081

LTC6081/LTC6082 packaGe DescripTion Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. DHC Package 16-Lead Plastic DFN (5mm × 3mm) (Reference LTC DWG # 05-08-1706 Rev Ø) 0.65 ±0.05 3.50 ±0.05 1.65 ±0.05 2.20 ±0.05 (2 SIDES) PACKAGE OUTLINE 0.25 ± 0.05 0.50 BSC 4.40 ±0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS 5.00 ±0.10 R = 0.115 0.40 ±0.10 TYP (2 SIDES) 9 16 R = 0.20 TYP 3.00 ±0.10 1.65 ±0.10 (2 SIDES) (2 SIDES) PIN 1 PIN 1 TOP MARK NOTCH (SEE NOTE 6) (DHC16) DFN 1103 8 1 0.200 REF 0.75 ±0.05 0.25 ±0.05 0.50 BSC 4.40 ±0.10 (2 SIDES) 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WJED-1) IN JEDEC PACKAGE OUTLINE MO-229 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 60812fd 16 For more information www.linear.com/LTC6081

LTC6081/LTC6082 packaGe DescripTion Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. GN Package 16-Lead Plastic SSOP (Narrow .150 Inch) (Reference LTC DWG # 05-08-1641 Rev B) .189 – .196* .045 ±.005 (4.801 – 4.978) .009 (0.229) 16 15 14 13 12 11 109 REF .254 MIN .150 – .165 .229 – .244 .150 – .157** (5.817 – 6.198) (3.810 – 3.988) .0165 ±.0015 .0250 BSC RECOMMENDED SOLDER PAD LAYOUT 1 2 3 4 5 6 7 8 .015 ±.004 × 45° .0532 – .0688 .004 – .0098 (0.38 ±0.10) (1.35 – 1.75) (0.102 – 0.249) .007 – .0098 0° – 8° TYP (0.178 – 0.249) .016 – .050 .008 – .012 .0250 (0.406 – 1.270) (0.203 – 0.305) (0.635) GN16 REV B 0212 NOTE: TYP BSC 1. CONTROLLING DIMENSION: INCHES INCHES 2. DIMENSIONS ARE IN (MILLIMETERS) 3. DRAWING NOT TO SCALE 4. PIN 1 CAN BE BEVEL EDGE OR A DIMPLE * DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE ** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE 60812fd 17 For more information www.linear.com/LTC6081

LTC6081/LTC6082 packaGe DescripTion Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. MS8 Package 8-Lead Plastic MSOP (Reference LTC DWG # 05-08-1660 Rev G) 0.889 ±0.127 (.035 ±.005) 5.10 3.20 – 3.45 (.201) (.126 – .136) MIN 3.00 ±0.102 0.42 ± 0.038 0.65 (.118 ±.004) 0.52 (.0165 ±.0015) (.0256) (NOTE 3) 8 7 6 5 (.0205) TYP BSC REF RECOMMENDED SOLDER PAD LAYOUT 3.00 ±0.102 4.90 ±0.152 DETAIL “A” (.118 ±.004) 0.254 (.193 ±.006) (NOTE 4) (.010) 0° – 6° TYP GAUGE PLANE 1 2 3 4 0.53 ±0.152 (.021 ±.006) 1.10 0.86 (.043) (.034) DETAIL “A” MAX REF 0.18 (.007) SEATING PLANE 0.22 – 0.38 0.1016 ±0.0508 (.009 – .015) (.004 ±.002) TYP 0.65 MSOP (MS8) 0213 REV G (.0256) NOTE: BSC 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 60812fd 18 For more information www.linear.com/LTC6081

LTC6081/LTC6082 revision hisTory (Revision history begins at Rev B) REV DATE DESCRIPTION PAGE NUMBER B 3/10 Change LT to LTC on all part numbers in Order Information Section. 3 C 07/10 Update to Simplified Schematic 12 D 12/13 Corrected resistor value (10M) 14 60812fd Information furnished by Linear Technology Corporation is believed to be accurate and reliable. 19 However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnectioFno orf mitso crierc iunitfso rams daetsiocnrib wedw hwe.rleiinne wari.llc noomt i/nLfTriCng6e0 8on1 existing patent rights.

LTC6081/LTC6082 Typical applicaTion Single Supply Strain Gauge Amplifier 3V 3V CMRR 0.01µF 350Ω TRIM 10k 10M 9.76M 100Ω 100k 500k 350Ω 3.2V0.1µF 0.1µF LT1790B 1.25V – + LTC16/2081 AV = 1001 1/2 + 10M LTC6081 1.25V – SENSOR: OMEGA SG-3/350-LY41 STRAIN GAUGE 10M 60812 TA02 relaTeD parTs PART NUMBER DESCRIPTION COMMENTS LT1678/LT1679 Dual/Quad Precision Op Amps Low Noise, 2.7V to 36V Operation LTC2050 Zero-Drift Op Amp 2.7V Operation, SOT-23 Package LTC2051/LTC2052 Dual/Quad Zero-Drift Op Amps MS8/GN16 Packages LTC2054/LTC2055 Single/Dual Zero-Drift Op Amp Micropower, SOT-23 and DFN Packages LTC6078/LTC6079 Dual/Quad Low Noise Precision CMOS Op Amps Micropower 0.7µV/°C V Drift OS LTC6241/LTC6242 Dual/Quad Low Noise CMOS Op Amps 18MHz Bandwidth,10V/µs Slew Rate LTC6244 Dual 50MHz CMOS Op Amp Low Noise, Rail-to-Rail Out, MS8 and DFN Packages 60812fd 20 Linear Technology Corporation LT 1213 REV D • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 For more information www.linear.com/LTC6081 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com/LTC6081  LINEAR TECHNOLOGY CORPORATION 2007

Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: A nalog Devices Inc.: LTC6081IMS8#PBF LTC6082IGN#PBF LTC6081CMS8#PBF LTC6081CDD#TRPBF LTC6082CDHC#TRPBF LTC6082CGN#PBF LTC6081IMS8#TRPBF LTC6082HGN#TRPBF LTC6081HMS8#TRPBF LTC6081CMS8#TRPBF LTC6082CGN#TRPBF LTC6081IDD#PBF LTC6082HGN#PBF LTC6082IDHC#PBF LTC6081IDD#TRPBF LTC6082IDHC#TRPBF LTC6082CDHC#PBF LTC6081CDD#PBF LTC6081HMS8#PBF LTC6082IGN#TRPBF