LTC5587 6 GHz RMS Power Detector with Digital Output FEATURES DESCRIPTION n Frequency Range: 10MHz to 6GHz The LTC®5587 is a 10MHz to 6GHz, low power monolithic n Accurate Power Measurement of High Crest Factor precision RMS power detector with an integrated 12-bit (Up to 12dB) Waveforms serial analog-to-digital converter (ADC). The RMS detec- n 40dB Log Linear Dynamic Range tor uses a proprietary technique to accurately measure the n Exceptional Accuracy Over Temperature RF power of modulated signals with crest-factor as high n Single-Ended RF Input as 12dB. For an input frequency of 2.14GHz the detection n 0.014dB/Bit (12-Bit) ADC Resolution (V = 1.8V) range is from –34dBm to 6dBm. The serial digital output REF n ADC Sample Rate Up to 500ksps of the detector is a 12-bit word value that is directly pro- n SPI/MICROWIRE Serial I/O portional to the RF signal power measured in dBm. The n Compatible with 1V to 3.6V Digital Logic LTC5587 is suitable for precision power measurement n Fast Response Time: 1μs Rise, 8μs Fall for a wide variety of RF standards, including LTE, WiMAX, n Low Power: 3mA at 3.3V and 500ksps W-CDMA, TD-SCDMA, CDMA, CDMA2000, EDGE, GSM, n Small 3mm × 3mm 12-pin DFN Package etc. The DC output of the detector is connected in series with an on-chip 300Ω resistor to the analog output pin (V ). This enables further filtering of the output modu- APPLICATIONS OUT lation ripple using an off-chip capacitor before analog-to- digital conversion. The ADC features include no data latency, n LTE, WiMAX, W-CDMA, TD-SCDMA, CDMA, no missing codes, and a sampling rate of up to 500ksps. A CDMA2000, EDGE, GSM dedicated external reference pin (V ) can be tied to V n Pico-Cells, Femto-Cells RF Power Control REF DD or other suitable low-impedance voltage reference to set the n Wireless Repeaters ADC full-scale input voltage range. The ADC also features n CATV/DVB Transmitters an automatic power down after each conversion making n MIMO Wireless Access Points the LTC5587 ideal for low-power applications. n Portable RMS Power Measurement n Antenna Monitor L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. BLOCK DIAGRAM Linearity Error vs RF Input Power 2140MHz Modulated Waveforms 3 TA = 25°C 13 4 11 3 EXPOSED VOUT VDD OVDD 2 PAD OUTPUT 150kHz LPF BUFFER dB) 7 RF DETREMCSTOR 300Ω S/H 12-BIT ADC STEHRRIAELE O-SUTTAPTUET SDO 1 RROR ( 1 PORT Y E 0 T RI BIAS TLIOMGINICG COSNCKV 122 LINEA–1 CWWWCCDDMMAA, DULL 1C –2 WCDMA DL 4C CSQ EN VCC GND VREF LTE DL 1C 6 9 8 5 10 LTE DL 4C 5587 BD –3 –35 –30 –25 –20 –15 –10 –5 0 5 10 RF INPUT POWER (dBm) 5587 G12 5587f 1

LTC5587 ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION (Note 1) V , V Voltage, (Note 12) ........................................4V DD CC OV Supply Voltage ......................Min(V + 0.3V, 4V) DD DD Maximum Input Signal Power (Average) .............15dBm TOP VIEW Maximum Input Signal Power (Peak) ...................25dBm SDO 1 12 CONV DC Voltage at RF ..........................................–0.3V to 2V SCK 2 11 VDD VOUT Voltage ...................................–0.3V to VDD + 0.3V OVDD 3 13 10 VREF EN Voltage ......................................–0.3V to V + 0.3V VOUT 4 GND 9 EN DD GND 5 8 VCC SDO, SCK, CONV Voltage ................–0.3V to V + 0.3V DD CSQ 6 7 RF V Voltage ....................................–0.3V to V + 0.3V REF DD DFN PACKAGE Power Dissipation ...............................................100mW 12-LEAD (3mm × 3mm) PLASTIC DFN Maximum Junction Temperature, T ...............150°C TJMAX = 150°C, θJA = 76°C/W JMAX EXPOSED PAD (PIN 13) IS GND, MUST BE SOLDERED TO PCB Operating Temperature Range (Note 2)....–40°C to 85°C Storage Temperature Range ...................–65°C to 150°C Caution: This part is sensitive to electrostatic discharge. It is very important that proper ESD precautions be observed when handling the LTC5587. ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE LTC5587IDD#PBF LTC5587IDD#TRPBF LFRH 12-Lead (3mm × 3mm) Plastic DFN –40°C to 85°C Consult LTC Marketing for parts specified with wider operating temperature ranges. Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T = 25°C (Note 2). V = V = OV = 3.3V, V = 1.8V, EN = 3.3V, f = A CC DD DD REF SMPL f and f = f unless otherwise noted. Test circuit is shown in Figure 1. SMPL(MAX) SCK SCK(MAX) PARAMETER CONDITIONS MIN TYP MAX UNITS RF Input Input Frequency Range (Note 4) 10 to 6000 MHz Input Impedance 205||1.6 Ω||pF f = 450MHz RF RF Input Power Range Externally Matched to 50Ω Source –34 to 6 dBm Linear Dynamic Range, CW (Note 3) ±1dB Linearity Error 40 dB Linear Dynamic Range, CDMA (Note 3) ±1dB Linearity Error; CDMA 4-Carrier 40 dB Output Slope 73 LSB/dB Logarithmic Intercept (Note 5) –42 dBm Output Variation vs Temperature Normalized to Output at 25°C; P = –34dBm to 6dBm ±1 dB IN 5587f 2

LTC5587 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T = 25°C (Note 2). V = V = OV = 3.3V, V = 1.8V, EN = 3.3V, f = A CC DD DD REF SMPL f and f = f unless otherwise noted. Test circuit is shown in Figure 1. SMPL(MAX) SCK SCK(MAX) PARAMETER CONDITIONS MIN TYP MAX UNITS Output Variation vs Temperature Normalized to Output at 25°C; P = –27dBm to –10dBm ±0.5 dB IN Deviation from CW Response; TETRA π/4 DQPSK ±0.1 dB P = –34dBm to 0dBm CDMA 4-Carrier 64-Channel Fwd 1.23Mcps ±0.5 dB IN 2nd Order Harmonic Distortion At RF Input; CW Input; P = 0dBm –57 dBc IN 3rd Order Harmonic Distortion At RF Input; CW Input; P = 0dBm –52 dBc IN f = 880MHz RF RF Input Power Range CW Input: Externally Matched to 50Ω Source –34 to 6 dBm Linear Dynamic Range, CW (Note 3) ±1dB Linearity Error 40 dB Linear Dynamic Range, EDGE (Note 3) ±1dB Linearity Error; EDGE 3π/8-Shifted 8PSK 40 dB Output Slope 73 LSB/dB Logarithmic Intercept (Note 5) –42 dBm Output Variation vs Temperature Normalized to Output at 25°C; P = –34dBm to 6dBm ±1 dB IN Output Variation vs Temperature Normalized to Output at 25°C; P = –27dBm to –10dBm ±0.5 dB IN Deviation from CW Response; EDGE 3π/8 Shifted 8PSK ±0.1 dB P = –34dBm to 6dBm IN f = 2140MHz RF RF Input Power Range CW Input: Externally Matched to 50Ω Source –34 to 6 dBm Linear Dynamic Range, CW (Note 3) ±1dB Linearity Error 43 dB Linear Dynamic Range, WCDMA (Note 3) ±1dB Linearity Error; 4-Carrier WCDMA 37 dB Output Slope 73 LSB/dB Logarithmic Intercept (Note 5) –42 dBm Output Variation vs Temperature Normalized to Output at 25°C; P = –34dBm to 6dBm ±1 dB IN Output Variation vs Temperature Normalized to Output at 25°C; P = –27dBm to –10dBm ±0.5 dB IN Deviation from CW Response; WCDMA 1-Carrier Uplink ±0.1 dB P = –34dBm to –4dBm WCDMA 64-Channel 4-Carrier Downlink ±0.5 dB IN f = 2600MHz RF RF Input Power Range CW Input: Externally Matched to 50Ω Source –34 to 6 dBm Linear Dynamic Range, CW (Note 3) ±1dB Linearity Error 40 dB Output Slope 73 LSB/dB Logarithmic Intercept (Note 5) –42 dBm Output Variation vs Temperature Normalized to Output at 25°C; P = –34dBm to 6dBm ±1 dB IN Output Variation vs Temperature Normalized to Output at 25°C; P = –27dBm to –10dBm ±0.5 dB IN Deviation from CW Response; WiMax OFDMA Preamble ±0.1 dB P = –34dBm to 2dBm WiMax OFDM Burst ±0.5 dB IN f = 3500MHz RF RF Input Power Range CW Input: Externally Matched to 50Ω Source –30 to 6 dBm Linear Dynamic Range, CW (Note 3) ±1dB Linearity Error 36 dB Output Slope 73 LSB/dB Logarithmic Intercept (Note 5) –40 dBm 5587f 3

LTC5587 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T = 25°C (Note 2). V = V = OV = 3.3V, V = 1.8V, EN = 3.3V, f = A CC DD DD REF SMPL f and f = f unless otherwise noted. Test circuit is shown in Figure 1. SMPL(MAX) SCK SCK(MAX) PARAMETER CONDITIONS MIN TYP MAX UNITS Output Variation vs Temperature Normalized to Output at 25°C; P = –30dBm to 6dBm ±1 dB IN Output Variation vs Temperature Normalized to Output at 25°C; P = –27dBm to –10dBm ±0.5 dB IN Deviation from CW Response; WiMax OFDMA Preamble ±0.1 dB P = –34dBm to –4dBm WiMax OFDM Burst ±0.5 dB IN Detector Analog Output Output DC Voltage at V No Signal Applied to RF Input 180 mV OUT Output Impedance Internal Series Resistor Allows for Off-Chip Filter Cap 300 Ω Output Current Sourcing/Sinking 5/5 mA Rise Time (1000pF on V ) 0.2V to 1.6V, 10% to 90%, f = 2140MHz 1 μsec OUT RF Fall Time (1000pF on V ) 1.6V to 0.2V, 10% to 90%, f = 2140MHz 8 μsec OUT RF Power Supply Rejection Ratio (Note 6) For CW RF Input Over Operating Input Power Range 49 dB Integrated Output Voltage Noise 1 to 6.5 kHz Integration BW, P = 0dBm CW 150 μV IN RMS Peak-to-Peak ADC Output Noise C = 1000pF, P = 0dBm CW 11 LSB FILT IN ADC Resolution ADC Resolution (No Missing Codes) l 12 Bits Differential Linearity Error EN = 0V, Voltage on V = 0V to 1.8V, V = 1.8V l ±0.25 ±1 LSB OUT REF Measurement Resolution 1LSB = V /(4096 • 32mV/dB), V = 1.8V 0.014 dB/Bit REF REF ADC Digital Timing SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS f Maximum Sampling Frequency (Notes 8, 9) l 500 kHz SAMPL(MAX) f Shift Clock Frequency (Notes 8, 9) l 50 MHz SCK t Shift Clock Period l 20 ns SCK t Minimum Throughput Time, t + t l 2 μs THROUGHPUT ACQ CONV t Acquisition Time l 0.5 μs ACQ t Conversion Time l 1.5 μs CONV t Minimum Positive CONV Pulse Width (Note 8) l 1.5 μs 1 t2 SCK↑ Setup Time After CONV↓ (Note 8) l 16 ns t3 SDO Enabled Time After CONV↓ (Notes 8, 9) l 16 ns t4 SDO Data Valid Access Time After SCK↓ (Notes 8, 9, 10) l 8 ns t SCK Low Time (Note 7) l 40% t 5 SCK t SCK High Time (Note 7) l 40% t 6 SCK t7 SDO Data Valid Hold Time After SCK↓ (Notes 8, 9, 10) l 4 ns t8 SDO Into Hi-Z State Time After CONV↑ (Notes 8, 9) 6 ns ADC Digital Inputs and Outputs SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V SCK, CONV Logic High Input l 2 V IH V SCK, CONV Logic Low Input l 0.8 V IL I Logic High Input Current SCK, CONV = V l 2.5 μA IH DD I Logic Low Input Current SCK, CONV = 0V l –2.5 μA IL 5587f 4

LTC5587 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T = 25°C (Note 2). V = V = OV = 3.3V, V = 1.8V, EN = 3.3V, f = A CC DD DD REF SMPL f and f = f unless otherwise noted. Test circuit is shown in Figure 1. SMPL(MAX) SCK SCK(MAX) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS C SCK, CONV Input Capacitance 2 pF IN V SDO Logic High Output I = 200μA l V – 0.2 V OH SOURCE DD V SDO Logic Low Output I = 200μA l 0.2 V OL SINK I Hi-Z Output Leakage CONV = V l ±3 μA OZ DD C Hi-Z Output Capacitance CONV = V 4 pF OZ DD I SDO Source Current SDO Connected to GND = 0V –10 mA SOURCE I SDO Sink Current SDO Connected to V 10 mA SINK DD Detector Enable (EN) Low = Off, High = On PARAMETER CONDITIONS MIN TYP MAX UNITS EN Input High Voltage (On) l 2 V EN Input Low Voltage (Off) l 0.3 V Enable Pin Input Current EN = 3.3V 25 μA Turn ON Time; CW RF Input V within 10% of Final Value; P = 0dBm 1 μs OUT IN Turn OFF Time; CW RF Input V < 0.18V; P = 0dBm 8 μs OUT IN Power Supply OV Supply Voltage l 1 3.3 V V DD DD V Supply Voltage l 2.7 3.3 3.6 V DD V Reference Voltage l 1.4 V + 0.05 V REF DD V Supply Voltage Should Be Equal to V l 2.7 3.3 3.6 V CC DD Total Supply Current No RF Input Signal, ADC Operational at 500ksps l 3 4 mA No RF Input Signal, ADC Sleep-Mode l 1.4 2.5 mA Shutdown Current EN = 0.3V, CONV = 3.3V, ADC Sleep-Mode 0.2 10 μA Note 1: Stresses beyond those listed under Absolute Maximum Ratings Note 6: PSRR determined as the dB value of the change in converted may cause permanent damage to the device. Exposure to any Absolute output voltage over the change in V supply voltage at a given CW input CC Maximum Rating condition for extended periods may affect device power level. reliability and lifetime. The maximum RF input power rating is guaranteed Note 7: Guaranteed by design not subject to test. by design and engineering characterization, but not production tested. Note 8: Guaranteed by characterization. All input signals are specified with Note 2: The LTC5587 is guaranteed to be functional over the operating t = t = 2ns (10% to 90% of V ) and timed from a voltage level of 1.6V. R F DD temperature range from –40°C to 85°C. Note 9: All timing specifications given are with a 10pF capacitance load. Note 3: The linearity error is calculated by the difference between the With a capacitance load greater than this value, a digital buffer or latch incremental slope of the output and the average output slope from –20dBm must be used. to 0dBm. The dynamic range is defined as the range over which the Note 10: The time required for the output to cross the V or V voltage. IH IL linearity error is within ±1dB. Note 11: When pins V and V are taken below GND or above V , OUT REF DD Note 4: An external capacitor at the C pin should be used for input SQ they will be clamped by internal diodes. This product can handle input frequencies below 250MHz. Without this capacitor, lower frequency currents greater than 100mA below GND or above V without latchup. DD operation results in excessive RF ripple in the output voltage. Note 12: The V supply voltage can be the same as V and the pins can DD CC Note 5: Logarithmic intercept is an extrapolated input power level from share a common bypass capacitor of 2.2μF. the best fitted log-linear straight line, where the converted output code is 0LSB. 5587f 5

LTC5587 TYPICAL PERFORMANCE CHARACTERISTICS V = V = OV = 3.3V, V = 1.8V, EN = 3.3V, CC DD DD REF f = f and f = f unless otherwise noted. V = ADC Output (LSB) • 1.8/4096. Test circuit is shown in Figure 1. SMPL SMPL(MAX) SCK SCK(MAX) OUT Output Voltage vs Frequency Linearity Error vs Frequency RF Input Return Loss vs Frequency 2.0 3 0 TA = 25°C TA = 25°C TA = 25°C 1.8 10MHz 2 –5 1.6 450MHz V (V)OUT1011....0842 822358....165804GGGMGHHHHHzzzzz RITY ERROR (dB) 10 10MHz URN LOSS (dB)––1105 EA–1 450MHz ET–20 0.6 LIN 880MHz R L1= 3.3nH,C1=1.8pF 2.14GHz L1= 1.5nH,C1=1.8pF 0.4 –2 2.6GHz –25 L1= 0, C1=1.5pF 0.2 3.5GHz L1= 0, C1=0.7pF 5.8GHz L1= 0, C1=0 0 –3 –30 –40–35–30–25–20–15–10 –5 0 5 10 –40–35–30–25–20–15–10 –5 0 5 10 0 1 2 3 4 5 6 RF INPUT POWER (dBm) RF INPUT POWER (dBm) FREQUENCY (GHz) 5587 G01 5587 G02 5587 G03 Output Voltage and Linearity Output Voltage Temperature Linearity Error vs RF Input Power Error at 450MHz Variation from 25°C at 450MHz 450MHz Modulated Waveforms 2.0 2.5 3 3 25°C TA = 25°C 1.8 85°C 2.0 –40°C 2 2 CW 1.6 1.5 TETRA V (V)OUT11010.....04628 –1–000.1.05..50 LINEARITY ERROR (dB VARIATION (dB)–101 –8450°°CC LINEARITY ERROR(dB)–110 CDMA 4C ) 0.4 –1.5 –2 –2 0.2 –2.0 0 –2.5 –3 –3 –40–35–30–25–20–15–10 –5 0 5 10 –40–35–30–25–20–15–10 –5 0 5 10 –35 –30 –25 –20 –15 –10 –5 0 5 10 RF INPUT POWER (dBm) RF INPUT POWER (dBm) RF INPUT POWER (dBm) 5587 G04 5587 G05 5587 G06 Output Voltage and Linearity Output Voltage Temperature Linearity Error vs RF Input Power Error at 880MHz Variation from 25°C at 880MHz 880MHz Modulated Waveforms 2.0 2.5 3 3 25°C TA = 25°C 1.8 85°C 2.0 –40°C 2 2 CW 1.6 1.5 EDGE 1.4 1.0 LINEA B) 1 85°C R(dB) 1 V (V)OUT101...082 –00.05.5 RITY ERRO RIATION (d 0 –40°C RITY ERRO 0 0.6 –1.0 R (d VA–1 NEA–1 B) LI 0.4 –1.5 –2 –2 0.2 –2.0 0 –2.5 –3 –3 –40–35–30–25–20–15–10 –5 0 5 10 –40–35–30–25–20–15–10 –5 0 5 10 –35 –30 –25 –20 –15 –10 –5 0 5 10 RF INPUT POWER (dBm) RF INPUT POWER (dBm) RF INPUT POWER (dBm) 5587 G07 5587 G08 5587 G09 5587f 6

LTC5587 TYPICAL PERFORMANCE CHARACTERISTICS V = V = OV = 3.3V, V = 1.8V, EN = 3.3V, CC DD DD REF f = f and f = f unless otherwise noted. V = ADC Output (LSB) • 1.8/4096. Test circuit is shown in Figure 1. SMPL SMPL(MAX) SCK SCK(MAX) OUT Output Voltage and Linearity Output Voltage Temperature Linearity Error vs RF Input Power Error at 2140MHz Variation from 25°C at 2140MHz 2140MHz Modulated Waveforms 2.0 2.5 3 3 25°C TA = 25°C 1.8 85°C 2.0 –40°C 2 2 1.6 1.5 V (V)OUT10101.....08462 –1–00.1.005..05 LINEARITY ERROR (dB) VARIATION (dB)–110 –8450°°CC LINEARITY ERROR (dB)–110 CWWWCCDDMMAA, DULL 1C 0.4 –1.5 –2 –2 WCDMA DL 4C 0.2 –2.0 LTE DL 1C LTE DL 4C 0 –2.5 –3 –3 –40–35–30–25–20–15–10 –5 0 5 10 –40–35–30–25–20–15–10 –5 0 5 10 –35 –30 –25 –20 –15 –10 –5 0 5 10 RF INPUT POWER (dBm) RF INPUT POWER (dBm) RF INPUT POWER (dBm) 5587 G10 5587 G11 5587 G12 Output Voltage and Linearity Output Voltage Temperature Linearity Error vs RF Input Power Error at 2600MHz Variation from 25°C at 2600 MHz 2.6GHz Modulated Waveforms 2.0 2.5 3 3 25°C TA = 25°C 1.8 85°C 2.0 –40°C 2 2 1.6 1.5 1.4 1.0 LIN dB) EA B) 1 85°C R ( 1 V (V)OUT101...082 –00.05.5 RITY ERRO RIATION (d 0 –40°C RITY ERRO 0 0.6 –1.0 R (d VA–1 NEA–1 B) LI CW 0.4 –1.5 –2 –2 WiMax OFDM PREAMBLE 0.2 –2.0 WiMax OFDM BURST WiMax OFDMA PREAMBLE 0 –2.5 –3 –3 –40–35–30–25–20–15–10 –5 0 5 10 –40–35–30–25–20–15–10 –5 0 5 10 –35 –30 –25 –20 –15 –10 –5 0 5 10 RF INPUT POWER (dBm) RF INPUT POWER (dBm) RF INPUT POWER (dBm) 5587 G13 5587 G14 5587 G15 Output Voltage and Linearity Output Voltage Temperature Linearity Error vs RF Input Power Error at 3500MHz Variation from 25°C at 3500MHz 3.5GHz Modulated Waveforms 2.0 2.5 3 3 25°C TA = 25°C 1.8 85°C 2.0 –40°C 2 2 1.6 1.5 1.4 1.0 LINEA B) 1 85°C R (dB) 1 V (V)OUT101...082 –00.05.5 RITY ERRO RIATION (d 0 –40°C RITY ERRO 0 0.6 –1.0 R (d VA–1 NEA–1 B) LI 0.4 –1.5 –2 –2 CW 0.2 –2.0 WiMax OFDMA PREAMBLE WiMax OFDM BURST 0 –2.5 –3 –3 –40–35–30–25–20–15–10 –5 0 5 10 –40–35–30–25–20–15–10 –5 0 5 10 –35 –30 –25 –20 –15 –10 –5 0 5 10 RF INPUT POWER (dBm) RF INPUT POWER (dBm) RF INPUT POWER (dBm) 5587 G16 5587 G17 5587 G18 5587f 7

LTC5587 TYPICAL PERFORMANCE CHARACTERISTICS V = V = OV = 3.3V, V = 1.8V, EN = 3.3V, CC DD DD REF f = f and f = f unless otherwise noted. V = ADC Output (LSB) • 1.8/4096. Test circuit is shown in Figure 1. SMPL SMPL(MAX) SCK SCK(MAX) OUT Output Voltage and Linearity Output Voltage Temperature Linearity Error vs RF Input Power Error at 5800MHz Variation from 25°C at 5800MHz 5.8GHz Modulated Wavefroms 2.0 2.5 3 3 25°C TA = 25°C 1.8 85°C 2.0 –40°C 2 2 1.6 1.5 1.4 1.0 LIN dB) EA B) 1 85°C R ( 1 V (V)OUT101...082 –00.05.5 RITY ERRO RIATION (d 0 –40°C RITY ERRO 0 0.6 –1.0 R (d VA–1 NEA–1 B) LI 0.4 –1.5 –2 –2 0.2 –2.0 CW WiMax OFDM BURST 0 –2.5 –3 –3 –40–35–30–25–20–15–10 –5 0 5 10 –40–35–30–25–20–15–10 –5 0 5 10 –35 –30 –25 –20 –15 –10 –5 0 5 10 RF INPUT POWER (dBm) RF INPUT POWER (dBm) RF INPUT POWER (dBm) 5587 G19 5587 G20 5587 G21 Slope Distribution vs Slope vs Frequency Temperature Supply Current vs Supply Voltage 34 50 5 TA = 25°C TA = –40°C fSMPL = 500kHz TA = 25°C %) 40 TA = 85°C 4 dB) 32 BUTION ( 30 NT (mA) 3 SLOPE (mV/ 3208 CENTAGE DISTRI 20 SUPPLY CURRE 2 ER 10 1 85°C P 25°C –40°C 26 0 0 0 1 2 3 4 5 6 28 29 30 31 32 33 34 2.7 2.8 2.9 3 3.1 3.2 3.3 3.4 3.5 3.6 FREQUENCY (GHz) SLOPE (mV/dB) SUPPLY VOLTAGE (V) 5587 G23 5587 G24 5587 G25 Logarithmic Intercept vs Logarithmic Intercept Distribution Total Supply Current vs RF Input Frequency vs Temperature Power and Sample Rate –30 50 16 TA = 25°C TA = –40°C TA = 25°C TA = 25°C 14 m) %) 40 TA = 85°C A) 500kHz LOGARITHMIC INTERCEPT (dB–––344505 PERCENTAGE DISTRIBUTION ( 123000 TOTAL SUPPLY CURRENT (m11246802 120000kkHHzz –50 0 0 0 1 2 3 4 5 6 –48 –47 –46 –45 –44 –43 –42 –41 –30 –25 –20 –15 –10 –5 0 5 10 15 FREQUENCY (GHz) LOGARITHMIC INTERCEPT (dBm) RF INPUT POWER (dBm) 5587 G26 5587 G27 5587 G28 5587f 8

LTC5587 TYPICAL PERFORMANCE CHARACTERISTICS V = V = OV = 3.3V, V = 1.8V, EN = 3.3V, CC DD DD REF f = f and f = f unless otherwise noted. V = ADC Output (LSB) • 1.8/4096. Test circuit is shown in Figure 1. SMPL SMPL(MAX) SCK SCK(MAX) OUT Output Voltage and Linearity Output Transient Response with Error vs V at 2140MHz CW RF and EN Pulse CC 2.0 2.5 5000 5 TA = 25°C EN 1.8 2.0 PULSE TA = 25°C OFF EN PULSE ON 1.6 1.5 4000 0 L V (V)OUT1110....0248 001–..050.5INEARITY ERROR C OUTPUT (LSB)32000000 PPPINININ == = –1 010d0dBdBBmmm ––510 ENABLE (V) 0.6 –1.0 (d AD B) PIN = –20dBm 0.4 –1.5 1000 –15 0.2 2.7V –2.0 PIN = –30dBm 3.6V 0 –2.5 0 –20 –40–35–30–25–20–15–10 –5 0 5 10 0 10 20 30 40 50 60 70 80 90 100 RF INPUT POWER (dBm) TIME (μsec) 5587 G29 5587 G33 Output Transient Response with Output Transient Response RF Pulse and EN Pulse 5000 5 5000 5 RF RFANDEN PULSE TA = 25°C PULSE TA = 25°C OFF RF PULSE ON OFF RF AND EN PULSE ON 4000 0 4000 0 R F SB) PIN = 10dBm RF P SB) PIN = 10dBm PUL ADC OUTPUT (L32000000 PPPIINNIN == = –– 012d00BddBBmmm ––510 ULSE ENABLE (V) ADC OUTPUT (L32000000 PPPIINNIN == = –– 012d00BddBBmmm ––510 SE AND ENABLE (V 1000 –15 1000 –15 ) PIN = –30dBm PIN = –30dBm 0 –20 0 –20 0 10 20 30 40 50 60 70 80 90 100 0 10 20 30 40 50 60 70 80 90 100 TIME (μsec) TIME (μsec) 5587 G32 5587 G31 5587f 9

LTC5587 PIN FUNCTIONS SDO (Pin 1): Three-State Serial Data Output. The A/D V (Pin 8): Detector Power Supply Voltage, 2.7V to 3.6V. CC conversion result is shifted out on SDO as a serial data Can be connected to the V voltage supply. V should DD CC stream with MSB first. The data stream consists of 12 bits be bypassed with a 1μF ceramic capacitor. If V and V CC DD of conversion data followed by trailing zeros. are tied together, then bypass with 2.2μF. SCK (Pin 2): Shift Clock Input. The SCK serial clock syn- EN (Pin 9): Detector Enable. A logic low or no-connect chronizes the serial data transfer. SDO data transitions on the enable pin shuts down the detector. A logic high on the falling edge of SCK. enables the detector. An internal 500k pull-down resistor ensures the detector is off when the pin is left floating. OV (Pin 3): ADC Output Driver Supply Voltage, 1.0V DD to 3.6V. OV should be bypassed with a 1μF ceramic V (Pin 10): ADC Reference Input Voltage. V defines DD REF REF capacitor. OV can be driven separately from V and the input span of the ADC, 0V to V . The V range DD DD REF REF OV can be higher than V . is 1.4V to V . Bypass to ground with a 1μF ceramic DD DD DD capacitor. V (Pin 4): Detector Analog Voltage Output. An internal OUT series 300Ω resistor at the detector output allows for V (Pin 11): ADC Power Supply Voltage, 2.7V to 3.6V. DD simple R-C filtering with a capacitor placed on this pin to V should be bypassed with a 1μF ceramic capacitor. DD GND. A 1000pF capacitor is recommended for a corner CONV (Pin 12): Convert Input. This active high signal starts frequency of 500kHz. a conversion on the rising edge. The ADC automatically C (Pin 6): Optional low-frequency range extension powers down after conversion. A logic low on this input SQ capacitor for frequencies below 250MHz. Connect 0.01μF enables the SDO pin, allowing the data to be shifted out. from this pin to ground for 10MHz operation. GND (Pin 5, Exposed Pad Pin 13): Ground. For high- RF (Pin 7): RF Input Voltage. Should be externally frequency operation, backside ground connection should DC-blocked. A capacitor of 1000pF is recommended. This have a low-inductance connection to the pcb ground using pin has an internal 205Ω termination. many through-hole vias. See layout information. BLOCK DIAGRAM 13 4 11 3 EXPOSED VOUT VDD OVDD PAD OUTPUT BUFFER 150kHz LPF 7 RF DETREMCSTOR 300Ω S/H 12-BIT ADC STEHRRIAELE O-SUTTAPTUET SDO 1 PORT SCK 2 BIAS TIMING LOGIC CONV 12 CSQ EN VCC GND VREF 6 9 8 5 10 5587 BD 5587f 10

LTC5587 TIMING DIAGRAMS SDO Into Hi-Z State After CONV Rising Edge t8 CONV 1.6V Hi-Z SDO 5587 TD01 SDO Data Valid Hold Time After SCK Falling Edge t7 SCK 1.6V VIH SDO VIL 5587 TD02 SDO Data Valid Access Time After SCK Falling Edge t4 SCK 1.6V VIH SDO VIL 5587 TD03 5587f 11

LTC5587 TEST CIRCUIT OVDD VDD VREF VCC RF 0.018˝ EF = 4.4 GND 0.062˝ CONV DC 1 12 C8 0.018˝ GND SDO SDO CONV 1μF 2 11 C7 C5 1μF SLK SLK VDD 1μF 3 LTC5587 10 OVDD VREF 4 9 VOUT VOUT EN EN C4 5 8 C6 1μF 1000pF GND VCC L1 1.5nH 6 7 CSQ RF RF GND C3 13 10C020pF R681Ω C1.18pF 5587 F01 0.01μF REF DES VALUE SIZE PART NUMBER FREQUENCY RF MATCH IN RANGE C5, C6, C7, C8 1μF 0402 AVX 0402ZG105ZAT2A L1 C1 C3 0.01μF 0402 AVX 04023C103KAT2A 0.04 to 1.8GHz 3.3nH 1.8pF C2, C4 1000pF 0402 AVX 04025C102KAT2A 1.75 to 2.2GHz 1.5nH 1.8pF R1 68Ω 0402 CRCW040268R1FKED 2.4 to 2.9GHz 0 1.5pF 2.8 to 3.8GHz 0 0.7pF 4.5 to 6.0GHz 0 0 Figure 1. Evaluation Circuit Schematic Figure 2. Evaluation Circuit Board 5587f 12

LTC5587 APPLICATIONS INFORMATION Operation Table 1. RF Input Impedance The LTC5587 combines a proprietary high-speed power FREQUENCY INPUT S11 detector with an internal 150kHz lowpass averaging filter (MHz) IMPEDANCE (Ω) MAG ANGLE (°) and a true 12-bit successive approximation ADC with a 10 203.3-j1.4 0.605 –0.7 serial output interface. It can accurately measure the RMS 50 201.8-j7.0 0.605 –3.7 power of high crest-factor modulated RF signals. The 100 197.2-j13.7 0.606 –7.3 output voltage of the RF power detector is converted to 200 161.9-j25.8 0.608 –14.6 a 12-bit digital word that is directly proportional to the 400 142.5-j43.6 0.614 –28.9 average RF input power in dBm. The part can be oper- 500 125.3-j48.5 0.619 –35.8 ated from a single supply or dedicated supplies, allowing 800 88.0-j60.4 0.636 –55.6 the user to select a specific voltage range for the ADC 900 79.2-j62.6 0.643 –61.8 conversion in addition to interfacing with 1.8V, 2.5V, or 1000 71.8-j64.3 0.650 –67.7 3V digital systems. 1500 46.6-j68.8 0.685 –94.3 2000 31.1-j69.2 0.715 –116 Evaluation 2100 29.9-j69.0 0.721 –119.9 Figure 1 shows the simplified evaluation circuit schematic, 2500 22.4-j66.8 0.739 –134.1 and Figure 2 shows the associated board artwork. To en- 3000 15.3-j60.7 0.756 –149.6 sure proper operation, good grounding practice should be 3500 9.9-j47.3 0.768 –163.2 followed in the board layout, with liberal placement of vias 4000 6.6-j16.9 0.779 –175.5 under the exposed pad of the package and around signal 5000 9.8-j51.7 0.787 162.1 and digital lines. The evaluation board shown in Figure 2 6000 18.5-j69.4 0.792 141.4 contains additional support circuitry not shown in Figure 1 that includes an optional 3.3V regulator for the V , OV , A shunt 68Ω resistor can be used to provide a broadband DD DD and V supplies and an optional 1.8V regulator for the V match at low frequencies up to 1GHz and from 4.5GHz to CC REF reference. This onboard reference provides good accuracy 6GHz. As shown in Figure 3, a nominal broadband input (less than ±5mV) over temperature, contributing less than match can be achieved up to 1.8GHz by using an LC match- ±0.1dB error to the ADC output. To evaluate the digital ing circuit consisting of a series 3.3nH inductor (L1) and output, the QuickEval PC-based software can be used with a shunt 1.8pF capacitor (C1). This match will maintain a the DC590B USB controller interface board. This board return loss of about 10dB across the band. For matching contains a generic USB to serial peripheral interface (SPI) at higher frequencies, L1 and C1 values are listed in the controller. A 14-pin ribbon cable connects the evaluation table of Figure 1. The input reflection coefficient referenced board to the DC590B board. The DC590B allows the evalu- to the RF input pin with no external components is shown ation at approximately a 200Hz sample rate (f ). (See on the smith chart in Figure 4. Alternatively, it is possible SMPL http://cds.linear.com/docs/Reference%20Design/dc590B. to match using an impedance transformation network by pdf). For higher sample rates the digital I/O pins can be omitting R1 and transforming the 205Ω input to 50Ω. This accessed directly on the board. Contact LTC Applications narrow band matching will improve sensitivity up to about for more information on higher sample rate evaluation. 6dB max, and the dynamic range remains the same. For example: by omitting R1 and setting L1 = 1.8nH and C1 = RF Input Matching 3pF, a 2:1 VSWR match can be obtained from 1.95GHz to 2.36GHz with a sensitivity improvement of 5dB. The input resistance is about 205Ω. Input capacitance is 1.6pF. The impedance vs frequency of the RF input is detailed in the following table. 5587f 13

LTC5587 APPLICATIONS INFORMATION The RF input DC-blocking capacitor (C2) and C bias Filter Capacitor SQ decoupling capacitor (C3), can be adjusted for low-fre- The interface of the V pin of the LTC5587 is shown in OUT quency operation. For input frequencies down to 10MHz, Figure 5. It includes a push-pull output stage with a series 0.01μF is needed at C . For frequencies above 250MHz, SQ 300Ω resistor. The detector output stage is capable of the on-chip 20pF decoupling capacitor is sufficient and sourcing and sinking 5mA of current. The V pin can be OUT C may be eliminated as desired. The DC-blocking ca- SQ shorted to GND or V (or V whichever is lower) without CC DD pacitor can be as large as 2200pF for 10MHz operation damage, but going beyond the V + 0.5V or V + 0.5V CC DD or 100pF for 2GHz operation. A DC-blocking capacitor and alternatively going beyond GND – 0.5V may result in larger than 2200pF results in an undesirable RF pulse damage as the internal ESD protection diodes will start response on the falling edge due to the rectifier action of to conduct excessive current. the diode limiter/ESD protection at the RF pin. Therefore, the recommended value for C2 for general applications is conservatively set at 1000pF. VCC LTC5587 40μA VCC LTC5587 C3 0.01μF 6 CSQ INPUT 300Ω VOUT 4 VOUT FILTERED RFIN C2 205Ω 20pF VDD CFILT (MATCHED) 1000pF L1 RF 7 R1 C1 68Ω 12-BIT ADC S/H 5587 F05 5587 F03 Figure 5. Simplified Schematic of the Detector Analog Output Figure 3. Simplified Schematic of the RF Input Interface The residual ripple due to RF modulation can be reduced by adding an external capacitor, C (C4 on evaluation FILT circuit schematic) to the V pin to form a simple RC OUT lowpass filter. The internal 300Ω resistor in series with the output pin enables filtering of the output signal with just the addition of C . The filter –3dB corner frequency, FILT 6GHz fC, can be calculated with the following equation: 4GHz fC(–3dB) = 1/(2 • π • 300 • CFILT) with f in Hz and C in F. Since the bandwidth of the C FILT 10MHz 3GHz detected signal is effectively limited by the internal 150kHz filter, a choice of C = 1000pF sets the ADC –3dB input FILT 500MHz bandwidth at 530kHz and does not affect the residual modulation ripple much. C has a small effect on ADC 900MHz FILT sampling accuracy. For example, when the sample rate of 1.8GHz the ADC is changed from 25ksps to 500ksps, the output 5587 F04 value changes less than 0.2dB with any choice of C . FILT Figure 4. Input Reflection Coefficient 5587f 14

LTC5587 APPLICATIONS INFORMATION Figure 6 shows the effect of the external filter capacitor on Figure 8 shows how the peak-to-peak ripple decreases with the residual ripple level for a 4-carrier WCDMA downlink increasing external filter capacitance value. Also shown is signal at 2.14GHz with –10dBm. Adding a 0.047μF capaci- how the RF pulse response will have longer rise and fall tor to the output decreases the peak-to-peak output ripple times with the addition of this lowpass filter cap. from 150LSB to about 60LSB. 4000 3400 9 1000 TA = 25°C NO CAP RIPPLE TA = 25°C 33500000 0.047μF 33320000 AK (dB) 78 RFAISLEL RISE ADC OUTPUT (LSB)1212055500000000000 23232817090000000000 ADC OUTPUT (LSB) OUTPUT RIPPLE PEAK-TO-PE 362154 11000 TIME AND FALL TIME (μs) 0 2600 0 1 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 0.001 0.01 0.1 1 TIME (msec) EXTERNAL CAPACITOR (μF) 5587 F08 5587 F06 Figure 6. Residual Ripple, Output Transient Response for RF Figure 8. Residual Ripple, Output Transient Times for RF Pulse Pulse with WCDMA 4-Carrier Modulation with WCDMA 4-Carrier Modulation vs External Filter Capacitor C4 Figure 7 shows the transient response for a 2.6GHz WiMax signal with preamble and burst ripple reduced by a fac- Figure 9 shows the rise time and fall time is a strong tor of three using a 0.047μF external filter capacitor. The function of the RF input power when the filter capacitor average power in the preamble section is –10dBm, while is not present. the burst section has 3dB lower average power. With the capacitor, the ripple in the preamble section is about 0.5dB peak to peak. The modulation used was OFDM (WiMax 9 TA = 25°C 802.16-2004) MMDS band 1.5MHz BW, with 256 size FFT 8 s) FALL TIME and 1 burst at QPSK ¾. E (μ 7 M TI 6 L 3500 AL 5 TA = 25°C NO CAP D F 3000 0.047μF E AN 4 M 3 TI LSB)2500 RISE 2 RISE TIME T (2000 1 U P OUT1500 0–30 –25 –20 –15 –10 –5 0 5 C D INPUT POWER (dBm) A1000 5587 F09 500 Figure 9. RF Pulse Response Rise Time and Fall Time vs RF 0 Input Power 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 TIME (msec) 5587 F07 Figure 7. Residual Ripple for 2.6GHz WiMax OFDM 802.16-2004 5587f 15

LTC5587 APPLICATIONS INFORMATION For a given RF modulation type, WCDMA for example, The output voltage noise density and integrated noise are the internal 150kHz filter provides nominal filtering of the shown respectively in Figures 11 and 12 for various input residual ripple level. Additional external filtering happens power levels. The noise is a strong function of input level in the log-domain, which introduces a systematic log-er- and there is roughly a 10dB improvement in the output ror in relation to the signal’s crest factor as shown in the noise level for an input level of 0dBm versus no input. following equation in dB1: Error| = 10 • log (r + (1-r)10–CF/10) – CF • (r-1) dB 10 4.0 TA = 25°C Where CF is the crest factor and r is the duty cycle of the 3.5 measurement (or number of measurements made at the Hz) 3.0 peak envelope divided by the total number of periodic /MS R2.5 V measurements in the measurement period). It is important μ E ( 2.0 to note that the CF refers to the 150kHz low-pass filtered AG T envelope of the signal. The error will depend on the statis- VOL 1.5 E 0dBm tics and bandwidth of the modulation signal in relation to OIS 1.0 –10dBm N –20dBm the internal 150kHz filter. For example: simulations have 0.5 –30dBm shown for the case of WCDMA that it is possible to set NO RF INPUT 0 the external filter capacitor corner frequency at 15kHz and 0.1 1 10 100 1000 FREQUENCY (kHz) only introduce an error less than 0.1dB. 5587 F11 Figure 10 shows the output AC modulation ripple as a Figure 11. Output Voltage Noise Density function of modulation difference frequency for a 2-tone input signal at 2140MHz with –10dBm input power. The 2.0 resulting deviation in the output voltage of the detector TA = 25°C 1.8 shows the effect of the internal 150kHz filter. 0dBm )S 1.6 –10dBm mVRM 1.4 ––2300ddBBmm 30 TA = 25°C 0 SE ( 1.2 NO RF INPUT AC RIPPLE (dB) 122550 –––101...550DEVIATION OF OUTPU INTEGRATED NOI 10000.....08462 UT T V 0 OUTP 10 –2.0OLTAG 0.1 1 FREQUE1N0CY (kHz)100 1000 E 5 –2.5 (d 5587 F12 B ) Figure 12. Integrated Output Voltage Noise 0 –3.0 0.001 0.01 0.1 1 10 2-TONE FREQUENCY SEPARATION (MHz) 5587 F10 Figure 10. Output DC Voltage Deviation and Residual Ripple vs 2-Tone Separation Frequency 1. Steve Murray, “Beware of Spectrum Analyzer Power Averaging Techniques,” Microwaves & RF, Dec. 2006. 5587f 16

LTC5587 APPLICATIONS INFORMATION The total noise at the ADC output is dominated by the Data Transfer output noise of the detector, and the sampling noise A rising CONV edge starts a conversion and disables SDO. is insignificant. The peak-to-peak output noise is also After the conversion, the ADC automatically goes into almost independent of the sample rate. Figure 13 shows sleep mode, drawing only leakage current. CONV going the peak-to-peak noise at the ADC output as a function low enables SDO and clocks out the MSB bit, B11. SCK of the RF input level for a CW RF input. Increasing C FILT then synchronizes the data transfer with each bit being from 1000pF to 0.01μF gives roughly 2x to 3x lower noise transmitted on the falling SCK edge and can be captured over input power. on the rising SCK edge. After completing the data transfer, if further SCK clocks are applied with CONV low, SDO will 40 0.6 TA = 25°C output zeros indefinitely (see Figure 14). For example, 35 fSMPL = 500ksps 0.525 16-clocks at SCK will produce the 12-bit data and four P-P LSB)30 0.45 ADC OU trailing zeros on SDO. E (25 0.375TP NOIS20 0.3 UT N Sleep Mode PUT 15 CFILT = 1000pF 0.225OISE The LTC5587 ADC enters sleep mode to save power after UT (d ADC O10 CFILT = 0.01μF 0.15 P-PB) ebaiacsh ccuornrveenrtssi oanre if sChOuNt Vd orewmn aainnsd hoignhly. Ilne askleaegpe mcuordree,n atsll 5 0.075 remain (about 0.1μA). The sample-and-hold is in hold 0 0 –40 –30 –20 –10 0 10 mode while the ADC is in sleep mode. The ADC returns RF INPUT POWER (dBm) to sample mode after the falling edge of CONV during 5587 F13 power-up. Figure 13. Peak-to-Peak Noise at ADC Output vs RF Input Power Exiting Sleep Mode and Power-Up Time Serial Interface By taking CONV low, the ADC powers up and acquires an The LTC5587 communicates with microcontrollers, DSPs input signal completely after the acquisition time (t ). ACQ and other external circuitry via a 3-wire interface. Figure 14 After t , the ADC is ready to perform a conversion again ACQ shows the operating sequence of the serial interface. by a rising edge on CONV. BY TAKING CONV LOW, THE DEVICE POWERS UP CONV AND ACQUIRES AN INPUT ACCURATELY AFTER tACQ tCONV SLEEP MODE t2 t6 SCK RECOMMENDED HIGH OR LOW 1 2 3 4 9 10 11 12 t3 t4 t5 t7 t8 Hi-Z STATE SDO B11 B10 B9 B3 B2 B1 B0* (MSB) 5587 F14 t1 tACQ tTHROUGHPUT *AFTER COMPLETING THE DATA TRANSFER, IF FURTHER SCK CLOCKS ARE APPLIED WITH CONV LOW, THE ADC WILL OUTPUT ZEROS INDEFINITELY Figure 14. LTC5587 Serial Interface Timing Diagram 5587f 17

LTC5587 APPLICATIONS INFORMATION Conversion Range Detector Enable Pin The V pin defines the full-scale range of the ADC. The A simplified schematic of the EN pin is shown in Figure 16. REF reference voltage can range from V down to 1.4V. If To enable the LTC5587 detector it is necessary to put DD the difference between the input voltage on the V pin greater than 2V on this pin. To disable or turn off the OUT and GND exceeds V , the output code will stay fixed at detector, this voltage should be below 0.3V. At an enable REF all ones, and if this difference goes below 0V, the output voltage of 3.3V the pin draws roughly 20μA. If the EN pin code will stay fixed at all zeros. Figure 15 shows the ideal is not connected, the detector circuitry is disabled through input/output characteristics for the ADC. The code tran- an internal 500k pull-down resistor. sitions occur midway between successive integer LSB It is important that the voltage applied to the EN pin values (i.e., 0.5LSB, 1.5LSB, 2.5LSB, …, FS – 1.5LSB). should never exceed V by more than 0.5V. Otherwise, CC The output code is straight binary with 1LSB = V /4096. REF the supply current may be sourced through the upper ESD Using the onboard 1.8V reference on the evaluation board, protection diode connected at the EN pin. the conversion range can be easily calculated between LSB and dBm. For an analog output slope of 32mV/dB, we can calculate the total 40dB range is equivalent to 2912.7LSB’s at the ADC output: 40dB = (40dB • 4096LSB • 32mV/dB)/1.8V = 2912.7LSB 111...111 VCC LTC5587 111...110 E D O C EN T 9 U P T U O 300k 300k R A OL 500k P NI U 000...001 000...000 0 5587 F16 1LSB INPUT VOLTAGE (V) FS – 1LSB 5587 F15 Figure 16. Enable Pin Simplified Schematic Figure 15. ADC Transfer Characteristics 5587f 18

LTC5587 PACKAGE DESCRIPTION DD Package 12-Lead Plastic DFN (3mm × 3mm) (Reference LTC DWG # 05-08-1725 Rev A) 0.70±0.05 3.50±0.05 2.38 ±0.05 2.10±0.05 1.65 ±0.05 PACKAGE OUTLINE 0.25± 0.05 0.45 BSC 2.25 REF RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED R = 0.115 0.40± 0.10 TYP 7 12 2.38 ±0.10 3.00±0.10 (4 SIDES) 1.65 ± 0.10 PIN 1 PIN 1 NOTCH TOP MARK R = 0.20 OR (SEE NOTE 6) 0.25× 45° CHAMFER 6 1 0.200 REF 0.75±0.05 0.23± 0.05 0.45 BSC 2.25 REF (DD12) DFN 0106 REV A 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD AND TIE BARS SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 5587f Information furnished by Linear Technology Corporation is believed to be accurate and reliable. 19 However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

LTC5587 TYPICAL APPLICATION 10MHz to 6GHz Infrastructure Power Amplifier Level Control RF COUPLER RFIN POWER AMP RFOUT 3.3VDC CMATCH 50Ω DIGITAL 1 12 POWER SDO CONV 1μF CONTROL 2 11 SCK VDD 1μF 3 LTC5587 10 OVDD VREF 4 9 LMATCH VOUT EN 1μF 1000pF 5 8 0.01μF GND VCC 1000pF 6 7 CSQ RF GND 13 68Ω 5587 TA01a RELATED PARTS PART NUMBER DESCRIPTION COMMENTS RF Power Detectors LTC5505 RF Power Detectors with >40dB Dynamic Range 300MHz to 3GHz, Temperature Compensated, 2.7V to 6V Supply LTC5507 100kHz to 1000MHz RF Power Detector 100kHz to 1GHz, Temperature Compensated, 2.7V to 6V Supply LTC5508 300MHz to 7GHz RF Power Detector 44dB Dynamic Range, Temperature Compensated, SC70 Package LTC5509 300MHz to 3GHz RF Power Detector 36dB Dynamic Range, Low Power Consumption, SC70 Package LTC5530 300MHz to 7GHz Precision RF Power Detector Precision V Offset Control, Shutdown, Adjustable Gain OUT LTC5531 300MHz to 7GHz Precision RF Power Detector Precision V Offset Control, Shutdown, Adjustable Offset OUT LTC5532 300MHz to 7GHz Precision RF Power Detector Precision V Offset Control, Adjustable Gain and Offset OUT LT5534 50MHz to 3GHz Log RF Power Detector with 60dB ±1dB Output Variation over Temperature, 38ns Response Time, Log Linear Dynamic Range Response LTC5536 Precision 600MHz to 7GHz RF Power Detector with 25ns Response Time, Comparator Reference Input, Latch Enable Input, Fast Comparator Output –26dBm to +12dBm Input Range LT5537 Wide Dynamic Range Log RF/IF Detector Low Frequency to 1GHz, 83dB Log Linear Dynamic Range LT5538 75dB Dynamic Range 3.8GHz Log RF Power ±0.8dB Accuracy Over Temperature Detector LTC5582 60dB Dynamic Range RMS Detector 40MHz to 10GHz, ±0.5dB Accuracy Over Temperature LT5581 6GHz RMS Power Detector, 40dB Dynamic Range ±1dB Accuracy Over Temperature, Log Linear Response, 1.4mA at 3.3V Infrastructure LT5568 700MHz to 1050MHz High Linearity Direct 22.9dBm OIP3 at 850MHz, –160.3dBm/Hz Noise Floor, 50Ω, 0.5VDC Baseband Quadrature Modulator Interface, 3-Ch CDMA2000 ACPR = –71.4dBc at 850MHz LT5572 1.5GHz to 2.5GHz High Linearity Direct Quadrature 21.6dBm OIP3 at 2GHz, –158.6dBm/Hz Noise Floor, High-Ohmic 0.5V Baseband DC Modulator Interface, 4-Ch W-CDMA ACPR = –67.7dBc at 2.14GHz LT5579 1.5GHz to 3.8GHz High Linearity Upconverting 27.3dBm OIP3 at 2.14GHz, 9.9dB NF, 2.6dB Conversion Gain, –35dBm LO Leakage Mixer LTC5598 5MHz to 1600MHz High Linearity Direct Quadrature 27.7dBm OIP3 at 140MHz, –161.2dBm/Hz Noise Floor, 0.5V Baseband Interface, DC Modulator –55dBm LO Leakage and 50.4dBc Image Rejection at 140MHz LTC5588-1 200MHz to 6GHz Very High Linearity Direct 30dBm OIP3 at 2.14GHz, Optimizable to 35dBm, –160.5dBm/Hz Output Noise Floor, Quadrature Modulator 0.5V Baseband Interface DC 5587f 20 Linear Technology Corporation LT 0810 • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com © LINEAR TECHNOLOGY CORPORATION 2010