LTC4425 Linear SuperCap Charger with Current-Limited Ideal Diode and V/I Monitor FeaTures DescripTion n 50mΩ Ideal Diode from VIN to VOUT The LTC®4425 is a constant-current/constant-voltage linear n Smart Charge Current Profile Limits Inrush Current charger designed to charge a 2-cell supercap stack from n Internal Cell Balancer (No External Resistors) either a Li-Ion/Polymer battery, a USB port, or a 2.7V to n Programmable Output Voltage (LDO Mode) 5.5V current-limited supply. The part operates as an ideal n Programmable VIN to VOUT Current Limit diode with an extremely low 50mΩ on-resistance making n Continuous Monitoring of VIN to VOUT Current via it suitable for high peak-power/low average power ap- PROG Pin plications. The LTC4425 charges the output capacitors to n Low Quiescent Current: 20μA an externally programmed output voltage in LDO mode at n VIN Power Fail, PGOOD Indicator a constant charge current, or to VIN in normal mode with n 2.45V/2.7V Cell Protection Shunts a smart charge current profile to limit the inrush current (4.9V/5.4V SuperCap Max Top-Off Voltage) until the V to V differential is less than 250mV. In ad- IN OUT n 3A Peak Current Limit, Thermal Limiting dition the LTC4425 can be set to clamp the output voltage n Tiny Application Circuit, 3mm × 3mm × 0.75mm DFN to 4.9V or 5.4V. and 12-Lead MSOP Packages Charge current (V current limit) is programmed by OUT applicaTions connecting a resistor between PROG and GND. The volt- age on the PROG pin represents the current flowing from n High Peak Power Battery/USB Powered Equipment V to V for current monitoring. An internal active IN OUT n Industrial PDAs balancing circuit maintains equal voltages across each n Portable Instruments/Monitoring Equipment supercapacitor and clamps the peak voltage across each n Power Meters, SuperCap Backup Circuits cell to a pin-selectable maximum value. The LTC4425 n PC Card/USB Modems operates at a very low 20µA quiescent current (shutdown L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear current <3µA) and is available in a low profile 12-pin Technology Corporation. All other trademarks are the property of their respective owners. 3mm × 3mm DFN or a 12-lead MSOP package. Typical applicaTion Charging 2-Cell Series Supercapacitor from Li-Ion Source Charge Current vs V to V Differential IN OUT 0.6 + VIN VOUT ≅ VIN TO HIGH PEAK FULL CHARGE CURRENT RPVRFOBG = = V 2INk Li-Ion POWER LOAD 0.5 2.2µF 1.5M 1F A) PFI VMID T ( 0.4 N E 1F R 1.2M + – FB VIN GE CUR 0.3 CBUYR RPMENOTS L RIMDSITOEND R A 0.2 H 1/10 CHARGE 470k C CURRENT PFI_RET LTC4425 PFO 0.1 IDEAL DIODE PROG IMONITOR FORWARD VOLTAGE = 15mV FROM SEL 2.45V/2.7V 0 0 0.2 0.4 0.6 0.8 1 µC 2k EN GND VIN – VOUT (V) 4425 TA02 4425 TA01 4425fa 1 For more information www.linear.com/LTC4425 !

LTC4425 absoluTe MaxiMuM raTings (Notes 1, 2) V , V , V , FB, PFI_RET, PFO Voltage .–0.3V to 6V Storage Temperature Range ..................–65°C to 150°C IN OUT MID EN, SEL, PFI Voltage ....–0.3V to MAX(V , V ) + 0.3V Lead Temperature, MSOP Only IN OUT Operating Junction Temperature ............–40°C to 125°C (Soldering, 10 sec) ................................................300°C pin conFiguraTion TOP VIEW TOP VIEW VOUT 1 12 VIN VOUT 1 12 VIN VOUT 2 11 VIN VOUT 2 11 VIN PROG 3 13 10 VMID PROG 3 13 10 VMID SEL 4 GND 9 PFI SEL 4 GND 9 PFI FB 5 8 PFO FB 5 8 PFO EN 6 7 PFI_RET EN 6 7 PFI_RET MSE PACKAGE DD PACKAGE 12-LEAD PLASTIC MSOP 12-LEAD (3mm × 3mm) PLASTIC DFN TJMAX = 125°C, θJA = 43°C/W (Note 3) EXPOSED PATDJM (APXI N= 1132)5 I°SC ,G θNJDA ,= M 3U5°SCT/ WBE ( SNOotLeD 3E)R ED TO PCB EXPOSED PAD (PIN 13) IS GND, MUST BE SOLDERED TO PCB orDer inForMaTion (http://www.linear.com/product/LTC4425#orderinfo) LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LTC4425EDD#PBF LTC4425EDD#TRPBF LFMQ 12-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C LTC4425IDD#PBF LTC4425IDD#TRPBF LFMQ 12-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C LTC4425EMSE#PBF LTC4425EMSE#TRPBF 4425 12-Lead Plastic MSOP –40°C to 125°C LTC4425IMSE#PBF LTC4425IMSE#TRPBF 4425 12-Lead Plastic MSOP –40°C to 125°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix. 4425fa 2 For more information www.linear.com/LTC4425

LTC4425 elecTrical characTerisTics The l denotes the specifications which apply over the full operating junction temperature range, otherwise specifications are at T = 25°C, V = 3.8V. (Note 4) A IN SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V Operating Supply Range l 2.7 5.5 V IN I Quiescent Current from V V = V 20 µA Q(IN) IN IN OUT I Quiescent Current from V V = V 3 µA Q(OUT) OUT IN OUT I Quiescent Current in Shutdown EN = 0 3 µA SD Ideal Diode V Forward Voltage 15 mV FWD RFWD Open Loop Forward On-Resistance 50 mΩ Supercap Charger V Feedback Voltage l 1.18 1.2 1.22 V FB I Feedback Pin Input Leakage 100 nA FB I Charge Current in LDO Mode R = 0.5k 2 A CHG PROG (FB = 0V) R = 5k 0.2 A PROG Charge Current in Normal Mode (FB = V ) R = 0.5k, V – V < 250mV 2 A IN PROG IN OUT R = 0.5k, V – V > 750mV 0.2 A PROG IN OUT R = 5k, V – V < 250mV 200 mA PROG IN OUT R = 5k, V – V > 750mV 20 mA PROG IN OUT V PROG Pin Servo Voltage in LDO Mode FB < 1.2V 1.00 V PROG h Ratio of Charge Current to PROG Pin Current 1000 mA/mA PROG V PROG Pin Servo Voltage in Normal Mode (FB = V ) V – V < 250mV 1.00 V PROG IN IN OUT V – V > 750mV 0.1 V IN OUT I Charger Short-Circuit Current Limit PROG Pin Shorted to GND, FB = 0 2 3 4 A SC t Charger Soft Start Time FB = 0 1.5 ms SS T Junction Temperature in Constant Temperature V = 0, FB = 0, R = 0.5k 105 °C LIM OUT PROG Mode (Note 5) Voltage Clamps V Maximum Voltage Across the Top Capacitor V = Lo l 2.45 2.5 V CLAMP SEL V = Hi l 2.7 2.75 V SEL Maximum Voltage Across the Bottom Capacitor V = Lo l 2.45 2.5 V SEL V = Hi l 2.7 2.75 V SEL V V Clamp Hysteresis If Either Capacitor Reaches Clamp 50 mV RIP OUT Voltage i.e. V < V OUT IN I Top Shunt Current R = 1k, (V – V ) > V 160 mA SH(TOP) PROG OUT MID CLAMP I Bottom Shunt Current R = 1k, V > V 140 mA SH(BOT) PROG MID CLAMP 4425fa 3 For more information www.linear.com/LTC4425

LTC4425 elecTrical characTerisTics The l denotes the specifications which apply over the full operating junction temperature range, otherwise specifications are at T = 25°C, V = 3.8V. (Note 4) A IN SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Leakage Balancer V V Output Voltage V = 3.6V 1.76 1.8 1.84 V MID MID OUT V Maximum Current Sourcing Capability V < V , V < V 0.7 mA MID MID OUT/2 MID CLAMP V Maximum Current Sinking Capability V > V , V < V 1.2 mA MID MID OUT/2 MID CLAMP PFO, PFI_RET, PFI Output Low Voltage (PFO, PFI_RET) I = 5mA 65 mV PIN Pin Leakage Current (PFO, PFI_RET) V = 5V, EN = 0 1 µA PIN FB Threshold Voltage for Power Good (Rising) LDO Mode l 1.09 1.11 1.13 V Input-to-Output Differential for Power Good (Rising) Normal Mode 265 mV V PFI Threshold (Falling) l 1.18 1.2 1.22 V PFI PFI Hysteresis 10 mV I PFI Pin Input Leakage 100 nA PFI Power Good Timer Delay 200 ms Logic Inputs (EN, SEL) V Logic Low Input Voltage l 0.4 V IL V Logic High Input Voltage l 1.2 V IH I Input Current High EN, SEL Pins at 5.5V –1 1 µA IH I Input Current Low EN, SEL Pins at GND –1 1 µA IL Note 1: Stresses beyond those listed under Absolute Maximum Ratings Note 4: The LTC4425E (E grade) is guaranteed to meet specifications may cause permanent damage to the device. Exposure to any Absolute from 0°C to 85°C junction temperature. Specifications over the –40°C Maximum Rating condition for extended periods may affect device to 125°C operating junction temperature range are assured by design, reliability and lifetime. characterization and correlation with statistical process controls. The Note 2: The current limit features of this part are intended to protect the LTC4425I (I grade) is guaranteed over the full –40°C to 125°C operating IC from short term or intermittent fault conditions. Continuous operation junction temperature range. The junction temperature, TJ, is calculated above the maximum specified pin current rating may result in device from the ambient temperature, TA, and power dissipation, PD, according to degradation or failure. the formula: Note 3: Failure to solder the exposed backside of the package to the PC TJ = TA + (PD • θJA °C/W). board ground plane will result in a thermal resistance much greater than Note that the maximum ambient temperature is determined by specific 43°C/W on the DD package and greater than 35°C/W on MSE package. operating conditions in conjunction with board layout, the rated thermal package thermal resistance and other environmental factors. Note 5: V to V charge current is reduced by thermal foldback as IN OUT junction temperature approaches 105°C. 4425fa 4 For more information www.linear.com/LTC4425

LTC4425 Typical perForMance characTerisTics T = 25°C, unless otherwise noted. A LDO Regulation Voltage LDO Regulation Voltage Charger FET On-Resistance vs Charge Current vs Temperature vs Supply Voltage 3.295 3.286 80 VIN = 3.8V 3.290 3.285 VOUT SET FOR 3.3V 70 90°C 3.284 3.285 60 Ω) 3.283 m 25°C OLTAGE (V)33..228705 V (V)OUT33..228821 SISTANCE ( 5400 –45°C V3.270 3.280 N-RE 30 3.265 O 20 3.279 VIN = 3.8V 3.260 RPROG = 1k 3.278 10 VOUT SET FOR 3.3V 3.255 3.277 0 0 200 400 600 800 1000 1200 –45 –30 –15 0 15 30 45 60 75 90 2.7 3 3.3 3.6 3.9 4.2 4.5 4.8 ICHG (mA) TEMPERATURE (°C) INPUT VOLTAGE (V) 4425 G01 4425 G02 4425 G03 Charge Current PROG Pin Voltage V Quiescent Current IN vs (V –V ) Differential vs (V – V ) Differential vs Temperature (V ≥ V ) IN OUT IN OUT IN OUT 1200 1200 25 VIN = 3.8V VIN = 3.8V RPROG = 1k RPROG = 1k 1000 1000 VIN = 3.8V 20 ARGE CURRENT (mA) 864000000 LDO MODE (NFBO RGMRAOLU NMDOEDDE) ROG VOLTAGE (mV) 846000000 LDO MODEN O(FRBM GARLO MUNODDEED) CURRENT (µA) 1150 VIN = 2.7V H P C 5 200 200 0 0 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 –45 –25 –5 15 35 55 75 90 VIN TO VOUT DIFFERENTIAL (V) VIN TO VOUT DIFFERENTIAL (V) TEMPERATURE (°C) 4425 G04 4425 G05 4425 G06 Charge Current Charge Current V Quiescent Current OUT vs Junction Temperature vs V in Thermal Regulation vs Temperature (V < V ) OUT IN OUT 1200 3000 20 VIN = 3.8V VIN = 5V VOUT = 3.8V RPROG = 1k, FB GROUNDED FB, PROG PINS SHORTED TO GND 18 1000 2500 AMBIENT TEMP 25°C 16 A) A) m m 14 NT ( 800 NT (2000 µA) 12 VOUT = 2.7V RE RE T ( R 600 R1500 N 10 U U E C C R RGE 400 RGE 1000 CUR 8 HA HA 6 C C 4 200 500 THERMAL REGULATION ON-CHIP POWER DISSIPATION ~4W 2 CASE TEMP ~100°C 0 0 0 –45–30–15 0 15 30 45 60 75 90 105120 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 –45 –25 –5 15 35 55 75 90 TEMPERATURE (°C) OUTPUT VOLTAGE (V) TEMPERATURE (°C) 4425 G07 4425 G08 4425 G09 4425fa 5 For more information www.linear.com/LTC4425

LTC4425 Typical perForMance characTerisTics T = 25°C, unless otherwise noted. A Open Drain Outputs Logic Inputs (EN and SEL) (PFI_RET and PFO) PROG Pin Short Circuit Charge Threshold Voltage vs Temperature FET On-Resistance vs Temperature Current vs Temperature 0.9 18 3.00 VIN = 3.8V VIN = 3.8V VIN = 3.8V 0.8 16 VOUT = 3.3V 2.95 PROG PIN SHORTED TO GND 0.7 14 A) 0.6 Ω) 12 T ( 2.90 VOLTAGE (V) 00..45 ESISTANCE ( 180 RGE CURREN 2.85 0.3 R 6 A 2.80 H C 0.2 4 2.75 0.1 2 0 0 2.70 –45 –25 –5 15 35 55 75 90 –45 –25 –5 15 35 55 75 90 –45 –25 –5 15 35 55 75 90 TEMPERATURE (°C) TEMPERATURE (°C) TEMPERATURE (°C) 4425 G10 4425 G11 4425 G011a Charge Current vs Voltage Across Charge Current vs Voltage Across Output Voltage Transient Step Top Capacitor (V – V ) Bottom Capacitor (V ) Response Waveform (LDO Mode) OUT MID MID 3500 3500 3000 3000 mA)2500 PROG PIN GROUNDED mA)2500 PROG PIN GROUNDED 20mVV/ODUIVT NT ( NT ( (AC-COUPLED) E2000 E2000 R R R R U U GE C1500 GE C1500 ILOAD R R 800mA A A H1000 H1000 100mA C C 500 RPROG = 1k 500 RPROG = 1k VIN = 3.8V 500µs/DIV 4425 G14 SEL = 0 SEL = 0 RPROG = 500Ω 0 0 SUPERCAP VALUE = 0.55F 1.6 1.7 1.8 1.9 2 2.1 2.2 2.3 2.4 2.5 1.6 1.7 1.8 1.9 2 2.1 2.2 2.3 2.4 2.5 VOUT (DC) = 3.3V VOUT TO VMID DIFFERENTIAL (V) VMID (V) 4425 G12 4425 G13 Output Voltage Waveform When Output Voltage Waveform When PROG Pin Soft-Start Waveform V is Shorted to GND V is Shorted to V (Normal Mode) MID MID OUT VIN = 3.8V RPROG = 1k VOUT (1V/DIV) VOUT VOUT 20mV/DIV 20mV/DIV AC-COUPLED AC-COUPLED EN VIN = 3.8V 250ms/DIV 4425 G15 VIN = 3.8V 100ms/DIV 4425 G16 VIN = 5V 500µs/DIV 4425 G18 RPROG = 1k SUPERCAP VALUE = 0.55F RPROG = 1k SUPERCAP VALUE = 0.55F RPROG = 1k SEL = 0 VOUT (DC) = 2.45V SEL = 0 VOUT (DC) = 2.45V 4425fa 6 For more information www.linear.com/LTC4425

LTC4425 pin FuncTions V (Pin 1, 2): Output Pin of the Charger. Typically con- PFO (Pin 8): Open Drain Output of the Power-Fail Com- OUT nects to the top of the 2-cell supercap stack. parator. This pin is driven to logic low if at least one of the following conditions is true: (1) V is less than a value PROG (Pin 3): Charge Current Program and Charge Cur- IN programmed by an external divider via PFI, (2) V has rent Monitor Pin. A resistor connected from PROG to OUT not reached within 7.5% of its final programmed value ground programs the charge current. In LDO mode, this in LDO mode, or (3) V is not within 250mV of V in pin always servos to 1V. However, if the charge current OUT IN charge current profile mode. When all these conditions profile is turned on, this pin servos to a voltage between are false for at least 200ms, this pin goes high impedance 1V and 0.1V depending on the input-to-output differential. indicating that power is good. In all cases, the voltage on this pin always represents the actual charge current. PFI (Pin 9): Input to the Power-Fail Comparator. The input voltage below which PFO pin indicates a power-fail SEL (Pin 4): Logic Input to Select One of the Two Pos- condition can be programmed by connecting this pin to sible Clamp Voltages (V ). If the pin is a logic low, CLAMP an external resistor divider between V and PFI_RET pin. the maximum voltage across any supercap of the stack IN is 2.45V. If the pin is a logic high, it is 2.7V. Do not float V (Pin 10): Connects to the Midpoint of the 2-Cell MID this pin. supercap stack. An internal leakage balancing amplifier drives this pin to a voltage which is exactly half of V . FB (Pin 5): In LDO mode, output voltage is programmed OUT by a resistor divider from V via the FB pin. In this V (Pin 11, 12): Input Power Pin. Typically connected to a OUT IN mode, the voltage on this pin always servos to the internal DC source like a Li-Ion/Polymer battery or a USB port. This reference voltage of 1.2V. If the FB pin is pulled up to V , pin should be bypassed with a low ESR ceramic capacitor. IN the LDO mode is disabled and the charge current profile GND (Exposed Pad Pin 13): GND. The Exposed Pad should mode is turned on. Shorting the FB pin to GND turns off be connected to a continuous ground plane on the second charge current profile mode. Do not float this pin. layer of the printed circuit board by several vias directly EN (Pin 6): Digital Input to Enable the Charger. If this pin under the part to achieve optimum thermal conduction. is a logic high, the part is enabled and it draws only 20μA of quiescent current from the input or output when idle. If this pin is a logic low, the part is in shutdown mode and draws less than 3μA. Do not float this pin. PFI_RET (Pin 7): This pin connects to the bottom of the external resistor divider for the input power-fail compara- tor. In shutdown mode, an internal switch opens up this path to reduce the current drawn by the resistor divider. 4425fa 7 For more information www.linear.com/LTC4425

LTC4425 block DiagraM VIN MPSNS MPSW VOUT + ×1 ×1000 1.2V BANDGAP 1.11V VIN – 15mV – VOUT REFERENCE IDEAL DIODE 0.1V CONTROLLER PSHUNT CBIG CHARGE CURRENT VMID PROFILE GENERATOR CONSTANT-VOLTAGE/ CHARGE CURRENT 10X 1X COCCNOHSNATSRATNGATEN-RTT E-CCMIRUPCREURRIEATNTRTUY/RE VOLCTIARGCEU ICTLRAYMP NSHUNRT +LBA– CBIG VOUT/2 250mV 750mV VIN – VOUT LEAKAGE R BALANCER VIN – VOUT VSEL VIN COMPARATOR VIN + + RPF1 VOUT + 250mV – OSCILLATOR – 1.11V 2.7V 2.45V PROG PFI PGOOD + COMPARATOR PFC RPROG 1.2V – 200ms RPF2 PFI TIMER PFI_RET COMPARATOR RFB1 FB VIO EN CHARGER RFB2 ENABLE PFO GND 4425 BD Figure 1. LTC4425 Block Diagram 4425fa 8 For more information www.linear.com/LTC4425

LTC4425 operaTion The LTC4425 is a linear charger designed to charge a differential (V –V ) is more than 750mV to limit the IN OUT two-cell series supercap stack by employing a constant- power dissipation within the chip. As this differential volt- current, constant-voltage, and constant-temperature ar- age decreases from 750mV, the charge current increases chitecture. It has two modes of operation: charge current linearly to its full programmed value when V is within OUT profile mode (also referred to as normal mode) and LDO 250mV or closer to V . As V rises further, the voltage IN OUT mode. In LDO mode, the LTC4425 charges the top of the across the charger FET gets too small to support the full stack to an externally programmed output voltage with a charge current. So the charge current gradually falls off fixed charge current that is also externally programmable. In and the charger FET enters into its triode (ohmic) region of charge current profile mode, the LTC4425 charges the top operation (see Figure 2). Since the charger FET R is DS(ON) of the stack to the input voltage V with a charge current approximately 50mΩ, with a programmed charge current IN that varies based on the input-to-output differential voltage. of 2A, the FET will enter the ohmic (triode) region and the charge current will start to fall off when V is within OUT LDO Mode about 100mV of V . IN In LDO mode, the output voltage V is programmed OUT IDEAL DIODE by an external resistor divider network consisting of CONTROL REGION R and R via the FB pin and the charge current is FB1 FB2 2A programmed by an external resistor R via the PROG PROG OHMIC pin. Please refer to the Block Diagram shown in Figure 1. T (A) REGION FULL CHARGE N The charger control circuitry consists of a constant- E CURRENT R R REGION current amplifier and a constant-voltage amplifier. When CU E the part is enabled to charge a discharged supercap stack, RG HA LINEAR CHARGE initially the constant-current amplifier is in control and C CURRENT REGION 1/10 CHARGE servos the PROG pin voltage to 1V. The current through CURRENT REGION the PROG resistor gets multiplied by approximately 1000, 0.3A 0.2A the ratio of the sense MOSFET (MPSNS) and the power 15 100 250 750 4425 F02 MOSFET (MPSW), to charge the supercap stack. As the VIN – VOUT (mV) output voltage V gets close to the programmed value, Figure 2. Different Regions of Charge Current Profile OUT the constant-voltage amplifier takes over and backs off the charge current as necessary to maintain the FB pin The Ideal Diode Controller voltage equal to an internal reference voltage of 1.2V. When the input-to-output differential approaches 15mV, Since the PROG pin current is always about 1/1000 of the the ideal diode controller takes over the control from the charge current, the PROG pin voltage continues to give constant-current amplifier and backs off the charge cur- an indication of the actual charge current even when the rent by pulling up the gate of the charger FET as much constant-voltage amplifier is in control. as necessary to maintain a 15mV delta across the FET Charge Current Profile or Normal Mode (see Figure 2). As a result, VOUT can only be charged to 15mV below V . In the event V suddenly drops below IN IN The LTC4425 is in charge current profile mode when the V , the controller will quickly turn the FET completely OUT FB pin is shorted to the input voltage V . In this mode IN off to prevent any loss of charge due to the reverse flow of operation, the constant-voltage amplifier is internally of charge from the supercap back to the supply. disabled but the charge current is still programmed by the external R resistor. The charger provides 1/10 of the PROG programmed charge current if the input-to-output voltage 4425fa 9 For more information www.linear.com/LTC4425

LTC4425 operaTion Thermal Regulation event both capacitors exceed their maximum allowable voltage, V , the main charger FET completely shuts In either mode, if the die temperature starts to approach CLAMP off and both shunt devices turn on. Both shunt devices 105°C due to internal power dissipation, a thermal regula- are actually current mirrors guaranteed to shunt more tor limits the die temperature to approximately 105°C by current away than that coming through the charger FET. reducing the charge current. Even in thermal regulation, the PROG pin continues to give an indication of the charge Leakage Balancing Circuitry current. The thermal regulation protects the LTC4425 from excessive temperature and allows the user to push the The LTC4425 is equipped with an internal leakage balancing limits of the power handling capability of a given circuit amplifier, LBA, which servos the midpoint, i.e., VMID pin board without the risk of damaging the LTC4425 or the voltage, to exactly half of the output voltage, VOUT. However external components. Another benefit of this feature is that it has a very limited source and sink capability of approxi- the charge current can be set according to typical, rather mately 1mA. It is designed to handle slight mismatch of than worst-case, ambient temperatures for a given applica- the supercaps due to leakage currents; not to correct any tion with the assurance that the charger will automatically gross mismatch due to defects. The balancer is only active reduce the charge current in worst-case conditions. as long as there is an input present. The internal balancer eliminates the need for external balancing resistors. Voltage Clamp Circuitry Short-Circuit Current Limit The LTC4425 is equipped with circuitry to limit the voltage across any supercap of the stack to a maximum allowable In the event the PROG pin gets shorted to GND, the LTC4425 voltage V . There are two preset voltages, 2.45V or limits the PROG pin current to approximately 3mA which, CLAMP 2.7V, for V selectable by the SEL pin. The SEL pin in turn, limits the maximum charge current to about 3A. CLAMP should be set to logic low for lower V voltage of While in short-circuit, if one of the supercaps approaches CLAMP 2.45V and to logic high for the higher VCLAMP voltage of within 50mV of its maximum allowable voltage, VCLAMP, 2.7V. If the voltage across the bottom capacitor, i.e., the a current-limit foldback circuit cuts back the short-circuit V pin voltage reaches V first, an NMOS shunt current limit to approximately 1/10 of its full value or to MID CLAMP transistor turns on and starts to bleed charge off of the about 300mA. bottom capacitor to GND. Similarly, if the voltage across Supply Status Monitor the top capacitor, V , reaches the V voltage first, a TOP CLAMP PMOS shunt transistor turns on and starts to bleed charge The LTC4425 includes an input power-fail comparator, PFC, off of the top capacitor to the bottom one. which monitors the input voltage V via the PFI pin. At IN anytime, if V falls below a certain externally programmable When the voltage across any of the supercaps reaches IN threshold, it reports the undervoltage situation by pulling within 50mV of V , a transconductance amplifier CLAMP down the open-drain output PFO low. This under-voltage starts to cut back the charge current linearly. By the time threshold is programmed by connecting an external resis- any of the shunt devices are on, the charge current gets tor divider network (consisting of R and ) between reduced to 1/10 of the programmed value and stays at PF1 RPF2 V and the PFI_RET pins. When the part is enabled, a low this reduced level as long as the shunt device is on. This IN R (approx. 13Ω) internal pull-down transistor pulls is to prevent the shunt devices from getting damaged by DS(ON) the bottom end of R , i.e., the PFI_RET pin to GND to excessive heat. The comparators that control the shunt PF2 complete the divider network. When the part is disabled, devices have a 50mV hysteresis meaning that when the this transistor opens R from GND, thereby saving the voltage across either capacitor is reduced by 50mV, the PF2 current drawn by the divider network. The power-fail com- shunt devices turn off and normal charging resumes parator has a built-in filter to reject any transient supply with full charge current unless limited by any of the other glitch that is less than 10μS long. amplifiers controlling the gate of the charger FET. In the 4425fa 10 For more information www.linear.com/LTC4425

LTC4425 operaTion Output Status Monitor Shutdown Mode The LTC4425 has an internal comparator to always monitor The LTC4425 can be shut down by pulling the EN pin low. the output voltage V . At any time, if V falls below In shutdown mode, very minimal circuitry is alive and OUT OUT 7.5% of its final programmed value in LDO mode or more the part draws less than 3µA from the supply or from the than 250mV below the input voltage V in charge cur- output capacitors if the supply is not present. IN rent profile mode, the comparator reports the power-fail condition by pulling the same open-drain output PFO low. Charge Current Soft-Start When both input and output voltages are good for at least The LTC4425 includes a soft-start circuit to minimize 200ms, the PFO pin goes high impedance and can be the inrush current at the start of a charge cycle. When a pulled up to any external supply by a resistor to indicate charge cycle is initiated, the charge current ramps from a power good situation. In normal mode, the load should zero to full-scale over a period of approximately 1ms and not exceed 1/10th of the programmed charge current this soft-start can be monitored by observing the PROG until PFO is high. pin voltage. This has the effect of minimizing the transient current load on the power supply during start-up. V > V Operation OUT IN If the EN pin is pulled high and V is below V or floating, Thermal Shutdown IN OUT most of the circuitry including the voltage clamp circuitry The LTC4425 includes a thermal shutdown circuit in ad- is kept alive and the part draws about 20µA from the out- dition to the thermal regulator. If for any reason, the die put capacitors. However, the internal leakage balancer is temperature exceeds 160°C, the entire part shuts down. turned off under this condition. It resumes normal operation once the temperature drops by about 14°C, to approximately 146°C. 4425fa 11 For more information www.linear.com/LTC4425

LTC4425 applicaTions inForMaTion Programming the Output Voltage Programming the Charge Current In LDO mode, the LTC4425 output voltage can be pro- The LTC4425 charge current is programmed using a single grammed for any voltage between 2.7V and V by using resistor from the PROG pin to ground. The charge current IN a resistor divider from V pin to GND via the FB pin out of the V pin is 1000 times the current out of the OUT OUT such that: PROG pin. The program resistor and the charge current are calculated using the following equations: V = V • (1 + R /R ) OUT FB FB1 FB2 R = 1000 • (1V/I ), I = 1000 • (1V/R ) where V is 1.2V. See Figure 3. PROG CHRG CHRG PROG FB where I is the charge current out of the V pin. The Typical values for R are in the range of 40k to 1M. Too small CHRG OUT FB charge current out of the V pin can be determined at a resistor will result in a large quiescent current whereas OUT any time by monitoring the PROG pin voltage and using too large a resistor coupled with FB pin capacitance will the following equation: create an additional pole and may cause loop instability. I = 1000 • (V /R ) CHRG PROG PROG VIN VIN VOUT VOUT Stability Considerations RPF1 LTC4425 RFB1 In LDO mode, the LTC4425 supercapacitor charger PFI FB has two principal control loops: constant-voltage and RPF2 RFB2 constant-current. The constant-voltage loop is stable PFI_RET when connected to a supercap of at least 0.2F. However, 4425 F03 when disconnected from the supercap, the voltage loop Figure 3. Programming Output Voltage and Input requires at least 10µF capacitance in series with 500Ω Threshold for Power Fail Comparator. resistance for stability. In constant-current mode, the PROG pin voltage is in Programming the Input Voltage Threshold for Power the feedback loop, not the V pin voltage. Because of Fail Status Indicator OUT the additional pole created by the PROG pin capacitance, The input voltage below which the power fail status pin capacitance on this pin must be kept to a minimum. With PFO indicates a power-fail condition is programmed by no additional capacitance on the PROG pin, the charger using a resistor divider from the V pin to the PFI_RET IN is stable with a program resistor as high as 100k. How- pin via the PFI pin such that: ever, any additional capacitance on this node reduces the V , = V • (1 + R /R ) maximum allowed program resistor. The pole frequency IN PFO PFI PF1 PF2 at the PROG pin should be kept above 100kHz. Therefore, where V is 1.2V. See Figure 3. PFI if the PROG pin is loaded with a capacitance, C , the PROG Typical values for R are in the range of 40k to 1M. In following equation should be used to calculate the maxi- PF shutdown mode, this divider network is disconnected from mum resistance value for R : PROG ground via the PFI_RET pin to save the quiescent current R ≤ 1/(2π • 100kHz • C ) drawn by the network. PROG PROG 4425fa 12 For more information www.linear.com/LTC4425

LTC4425 applicaTions inForMaTion Board Layout Considerations 5V source, the charge current, at first, will be limited to approximately: To be able to deliver maximum charge current under all conditions, it is critical that the exposed metal pad on 105°C–25°C 80°C I = = =372mA the backside of the LTC4425’s two packages have a good CHRG (5–0)V•43°C/W 215°C/A thermal contact to the PC board ground. Correctly soldered to a 2500mm2 double-sided 1 oz. copper board, the DFN As the output voltage rises, the charge current will gradually package has a thermal resistance of approximately 43°C/W. rise to the full charge current programmed by the PROG pin Failure to make thermal contact between the exposed pad resistor as long as the constant-current loop is in control. on the backside of the package and the copper board will If the LTC4425 is programmed for a charge current of 2A, result in a thermal resistance far greater than 43°C/W. the output voltage at which the part will deliver full charge current can be determined by the following equation: Charge Current Reduction by the Thermal Regulator 105–T To protect the part against excessive heat generated by V =V – A OUT IN I •θ internal power dissipation, the LTC4425 is equipped with a CHRG JA thermal regulator which automatically reduces the charge Using the previous example, for full charge current, the current to maintain a maximum die temperature of 105°C. output voltage has to rise to at least: Ignoring the quiescent current, the power dissipation can be approximated by the following equation: (105–25)°C 80°C V =5V– =5V– =4.07V PD = (VIN – VOUT) • ICHRG OUT 2A•43°C/W 86°C/V If θ is the thermal resistance and T is the ambient tem- JA A Figure 4 shows the graph of charge current vs output perature, then the die temperature can be calculated as: voltage when the charge current profile is turned off by shorting the FB pin to GND and the charge current is T = T + P • θ limited by thermal regulation. DIE A D JA When the part is in thermal regulation, the die temperature 2.5 is 105°C and for a given V and V , the charge current VIN = 5V IN OUT RPROG = 500Ω can be determined by the following equation: TA = 25°C 2.0 FB PIN GROUNDED I = 105–TA NT(A) 4.07V CHRG (VIN–VOUT)•θJA URRE 1.5 THERMAL REGULATION C ≈ 105°C E G 1.0 For example, if the LTC4425 in the DFN package is used AR H C in LDO mode to charge a completely discharged supercap 0.5 stack (V = 0V) at a room temperature of 25°C from a OUT 372mA 0 0 1 2 3 4 5 6 OUTPUT VOLTAGE (V) 4425 F04 Figure 4. Charge Current vs Output Voltage under Thermal Regulation (LDO Mode) 4425fa 13 For more information www.linear.com/LTC4425

LTC4425 applicaTions inForMaTion Charging a Single Supercapacitor Table 1. Supercapacitor Manufacturers The LTC4425 can also be used to charge a single super- CAP-XX www.cap-xx.com capacitor by connecting two series-connected matched NESS CAP www.nesscap.com ceramic capacitors (minimum 100µF), or two matched Maxwell www.maxwell.com series resistors (~470k), in parallel with the supercapacitor Bussmann www.cooperbussmann.com as shown in Figure 5. Refer to Table 1 for supercapacitor AVX www.avx.com manufacturers. Illinois Capacitor www.illcap.com Tecate Group www.tecategroup.com LTC4425 LTC4425 VOUT VOUT VOUT VOUT C1 R1 VMID CSUP C2 VMID CSUP GND R2 C1 = C2 ≥ 100µF GND 4425 F05 R1 = R2 = 470k, 1% Figure 5. Charging a Single Supercapacitor 4425fa 14 For more information www.linear.com/LTC4425

LTC4425 Typical applicaTions USB to High Peak Power 3.3V Charging USB 5V, 500mA 3.3V VIN VOUT TLOOAD 1F 2.2µF 1.5M VMID 2.1M PFI 1F 1.2M LTC4425 FB PFI_RET VIO 1.2M SEL 470k µC PFO EN PROG 2k 4425 TA03 3 × AA Alkaline to High Peak Power 3.3V Charging 4.5V TO 3.6V 3.3V, 2A VIN VOUT TLOOAD 1F 3× AA 2.2µF 1.5M VMID 2.1M PFI 1F LTC4425 1.2M FB PFI_RET VIO 1.2M SEL 470k µC PFO EN PROG CURRENT MONITOR 500Ω 4425 TA04 Li-Ion High Peak Power Battery Buffer + VIN VOUT TLOOAD Li-Ion 2.2µF 0.6F VMID SEL 0.6F LTC4425 1.5M EN VIO 470k FB PFI PFO PROG CURRENT 1.2M MONITOR PFI-RET 500Ω 4425 TA04a 4425fa 15 For more information www.linear.com/LTC4425

LTC4425 Typical applicaTions High Current USB Charging with Power Path Control L1 3.3µH INSTANT-ON 5V USB SW VIN VBUS VOUT VIN VOUT LOAD C3 R1010k µC DD01 LDO3V3 1008µ0F5 R1.75M LTC4425 VMID 0C.S5C5F C1 D2 LTC4088 GATE M1 PFI HS203F 10µF CHRG 0805 R8 1.2M VIN NTC BAT PFI_RET FB CLPROG PROG C/X GND PFO R2 R5 + PROG 100k 8.2Ω LI-Ion µC SEL R6 C2 EN 2k R3 R4 GND 0.1µF 2.94k 2k 0603 4425 TA05 L1: COILCRAFT LPS4018-332MLC M1: SILICONIX Si2333 R2: VISHAY-DALE NTHS0603N011-N1003F C1, C3: MURATA GRM21BR61A106KE19 C2: MURATA GRM188R71C104KA01 CSC: CAP-XX HS203F 3.3V Peak-Power/Back-up Supply 2.2µH SW1 SW2 5V ≈5V VOUT VIN VIN VOUT PVIN PVOUT 31..35VA VIN VOUT 340k 6.49k 2.2µF LTC4425 1.5M VMID C0.S5C5F LTC3533 47pF HS203F OFF ON RUN/SS FB PFI 330pF 107k RT VC 1.2M VIN 10µF 4.7pF 100µF PFI_RET FB BURST PFO SGND PGND 0.1µF PROG 33.2k 200k 200k µC SEL EN 2k 4425 TA05a GND 4425fa 16 For more information www.linear.com/LTC4425

LTC4425 Typical applicaTions 12V to 5V/3.3V High Peak Power Supply 12V D1 VOUT (5V) VIN BOOST 5V 0.1µF 10µH SW VIN VOUT 3.3V HPOIGWHE PRE LAOKA-D LT3505 61.1k 68pF R7 LTC4425 C1FSP1 1.5M SHDN VMID PFI CSP2 FB 1F 2.1M RT GND VC R8 D2 10µF 1.2M 75k 69.8k 11.3k PFI_RET FB PFO PROG 1µF 70pF µC SEL R6 EN 2k 1.2M GND D1: 1N4148 D2: MBRM140 CSP1, CSP2: CAP-XX HS203F 4425 TA06 12V Input to 5V Outputs with Input Voltage Monitoring 12V VIN BOOST 2.2µF 0.1µF ON OFF RUN SW ILIM LT3663 D1 6.8µH D1: DFLS240 CSP1, CSP2: 28.7k ISENSE GND VOUT 5V INSTANT-ON 59k 22µF 5V FB VIN VOUT HIGH-PEAK POWER, 11k CSP1 OR BACKUP SUPPLY FB 1F 1.5M VMID CSP2 PFI 1F R8 LTC4425 1.2M PFI_RET PFO PROG µC SEL R6 EN GND 2k 4425 TA07 4425fa 17 For more information www.linear.com/LTC4425

LTC4425 Typical applicaTions Redundant High Peak Power Battery Supplies USB VIN VOUT TO LOAD 2.2µF 1.5M FB VMID 1F PFI 1.2M LTC4425 1F PFI_RET SEL µC EN PROG USB POWER OK PFO 2k VIN VOUT 3×AA 2.2µF 1.5M FB VMID PFI LTC4425 VIO 1.2M PFI_RET 470k SEL PFO BAT POWER OK PROG EN 500Ω 4425 TA08 4425fa 18 For more information www.linear.com/LTC4425

LTC4425 package DescripTion Please refer to http://www.linear.com/product/LTC4425#packaging for the most recent package drawings. DD Package 12-Lead Plastic DFN (3mm × 3mm) (Reference LTC DWG # 05-08-1725 Rev A) 0.70 ±0.05 3.50 ±0.05 2.38 ±0.05 2.10 ±0.05 1.65 ±0.05 PACKAGE OUTLINE 0.25 ±0.05 0.45 BSC 2.25 REF RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED R = 0.115 0.40 ±0.10 TYP 7 12 2.38 ±0.10 3.00 ±0.10 (4 SIDES) 1.65 ±0.10 PIN 1 PIN 1 NOTCH TOP MARK R = 0.20 OR (SEE NOTE 6) 0.25 × 45° CHAMFER 6 1 0.200 REF 0.75 ±0.05 0.23 ±0.05 0.45 BSC 2.25 REF (DD12) DFN 0106 REV A 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD AND TIE BARS SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 4425fa 19 For more information www.linear.com/LTC4425

LTC4425 package DescripTion Please refer to http://www.linear.com/product/LTC4425#packaging for the most recent package drawings. MSE Package 12-Lead Plastic MSOP, Exposed Die Pad (Reference LTC DWG # 05-08-1666 Rev G) BOTTOM VIEW OF EXPOSED PAD OPTION 2.845 ±0.102 2.845 ±0.102 (.112 ±.004) (.112 ±.004) 0.889 ±0.127 (.035 ±.005) 1 6 0.35 REF 5.10 1.651 ±0.102 (.201) 1.651 ±0.102 3.20 – 3.45 (.065 ±.004) 0.12 REF MIN (.065 ±.004) (.126 – .136) DETAIL “B” CORNER TAIL IS PART OF DETAIL “B” THE LEADFRAME FEATURE. FOR REFERENCE ONLY 12 7 NO MEASUREMENT PURPOSE 0.42 ±0.038 0.65 4.039 ±0.102 (.0165 ±.0015) (.0256) (.159 ±.004) TYP BSC (NOTE 3) 0.406 ±0.076 RECOMMENDED SOLDER PAD LAYOUT 121110 9 87 (.016 ±.003) REF DETAIL “A” 0.254 (.010) 3.00 ±0.102 0° – 6° TYP 4.90 ±0.152 (.118 ±.004) (.193 ±.006) GAUGE PLANE (NOTE 4) 0.53 ±0.152 (.021 ±.006) 1 2 3 4 5 6 DETAIL “A” 1.10 0.86 0.18 (.043) (.034) (.007) MAX REF SEATING PLANE 0.22 – 0.38 0.1016 ±0.0508 (.009 – .015) (.004 ±.002) TYP 0.650 NOTE: (.0256) MSOP (MSE12) 0213 REV G 1. DIMENSIONS IN MILLIMETER/(INCH) BSC 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL NOT EXCEED 0.254mm (.010") PER SIDE. 4425fa 20 For more information www.linear.com/LTC4425

LTC4425 revision hisTory REV DATE DESCRIPTION PAGE NUMBER A 02/16 Enhanced Charging a Single Supercapacitor section 14 4425fa Information furnished by Linear Technology Corporation is believed to be accurate and reliable. 21 However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconneFcotiro nm oof irtes cinirfcouritms aast idoensc wribwewd h.leinreeina rw.cillo nmot/ iLnTfrCin4g4e 2on5 existing patent rights.

LTC4425 Typical applicaTion Embedded Automotive Backup Controller 6V to 36V VIN BD VOUT (5V) 11, 12 VIN VOUT 1, 2 5V, 2A CAR 2.2µF 5 CSP1 BATTERY ON OFF RUN BOOST R7 FB 1F 0.1µF L1 1.5M 10 2.2µH VMID SW 9 CSP2 VC LT3684 PFI 1F 20k D1 R8 LTC4425 1.2M RT BIAS 330pF 590k 7 PFI_RET PROG 3 FB 28.7k 8 PG PFO R6 GND 200k 10µF 4 500Ω µC SEL 6 13 EN GND 4425 TA09 22µF L2 SVIN PVIN, 1, 2, 3 2.2µH SW1 3.3V 20pF 750k 10µF EN1 240k FB1 EN2 L3 2.5µH EN3 SW2 1.8V MODE LTC3569 20pF 300k 4.7µF RT (UD PACKAGE) 240k FB2 L4 PGOOD D1: DIODES INC. DFLS240 2.5µH L1: SUMIDA CDRH4D22/HP-2R2 SW3 1.2V L2: WURTH 7440430022 L3, L4 WURTH 744031002 SGND 20pF 150k 4.7µF CSP1, CSP2: CAP-XX HS203F PGND, 1, 2, 3 240k FB3 relaTeD parTs PART NUMBER DESCRIPTION COMMENTS LTC3225-1 150mA Supercapacitor Charger Programmable Supercapacitor Charger Designed to Charge Two LTC3225 Supercapacitors in Series to a Fixed Output Voltage (4.8V/5/3V Selectable) LT3485-0/LT3485-1/ 1.4A/0.7A/1A/2A Photoflash Capacitor Charger with Output V ; 1.8V to 10V, Charge Time = 3.7 Seconds for the LT3485-0 (0V to IN LT3485-2/LT3485-3 Voltage Monitor and IGBT 320V, 100µF, VIN = 3.6V), ISD < 1µA, 3mm × 3mm 10-Lead DFN LT3750 Capacitor Charger Controller Charges Any Size Capacitor, 10-Lead MS Package LT3751 Capacitor Controller with Regulation Charges Any Size Capacitor, 4mm × 5mm QFN-20 Package LTC4040 Buck Battery Charger + Boost Backup for Li-Ion Batteries 2.5A Backup from 3.2V Battery 4mm × 5mm QFN-24 Package LTC3643 Bi-Directional Boost Charger/Buck Backup for Electrolytic VIN; 3V to 17V, VBACKUP: Up to 40V, 2A Cap Charge Current, 3mm × Caps 5mm QFN-24 4425fa 22 Linear Technology Corporation LT 0216 REV A • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 For more information www.linear.com/LTC4425 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com/LTC4425  LINEAR TECHNOLOGY CORPORATION 2010

Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: A nalog Devices Inc.: LTC4425EDD#TRPBF LTC4425EMSE#PBF LTC4425IDD#TRPBF LTC4425EMSE#TRPBF LTC4425IMSE#PBF LTC4425IDD#PBF LTC4425IMSE#TRPBF LTC4425EDD#PBF