LTC4210-1/LTC4210-2 Hot Swap Controller in 6-Lead SOT-23 Package FEATURES DESCRIPTION n Allows Safe Board Insertion and Removal The LTC®4210 is a 6-pin SOT-23 hot swap controller that from a Live Backplane allows a board to be safely inserted and removed from a n Adjustable Analog Current Limit live backplane. An internal high side switch driver controls with Circuit Breaker the GATE of an external N-channel MOSFET for a supply n Fast Response Limits Peak Fault Current voltage ranging from 2.7V to 16.5V. The LTC4210 provides n Automatic Retry or Latch Off On Current Fault the initial timing cycle and allows the GATE to be ramped n Adjustable Supply Voltage Power-Up Rate up at an adjustable rate. n High Side Drive for External MOSFET Switch The LTC4210 features a fast current limit loop providing n Controls Supply Voltages from 2.7V to 16.5V active current limiting together with a circuit breaker timer. n Undervoltage Lockout The signal at the ON pin turns the part on and off and is n Adjustable Overvoltage Protection also used for the reset function. n Low Profile (1mm) SOT-23 (ThinSOT™) Package This part is available in two options: the LTC4210-1 for APPLICATIONS automatic retry on overcurrent fault and the LTC4210-2 for latch off on an overcurrent fault. n Hot Board Insertion L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and n Electronic Circuit Breaker ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. n Industrial High Side Switch/Circuit Breaker TYPICAL APPLICATION Single Channel 5V Hot Swap Controller BACKPLANE PCB EDGE CONNECTOR CONNECTOR (FEMALE) (MALE) RSENSE Q1 Power-Up Sequence VIN LONG 0.01Ω Si4410DY V5VOUT 5V ZO1PTIONAL R10XΩ + 4C7LO0µADF 4A CLOAD = 470µF V(2OVN/DIV) CX 0.1µF RG VCC SENSE 100Ω VTIMER (1V/DIV) RON1 GATE SHORT 20k RC ON LTC4210 100Ω RON2 C0.C01µF V(5OVU/TDIV) 10k TIMER GND CTIMER IOUT LONG 0.22µF (0.5A/DIV) GND GND Z1: ISMA10A OR SMAJ10A 4210 TA01 10ms/DIV 4210 TA02 421012fa 1 For more information www.linear.com/LTC4210-1

LTC4210-1/LTC4210-2 ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION (Note 1) Supply Voltage (V ) ................................................17V CC TOP VIEW Input Voltage (SENSE, TIMER) ... –0.3V to (V + 0.3V) CC Input Voltage (ON) .....................................–0.3V to 17V TIMER 1 6 VCC GND 2 5 SENSE Output Voltage (GATE) .......... Internally Limited (Note 3) ON 3 4 GATE Operating Temperature Range LTC4210-1C/LTC4210-2C .........................0°C to 70°C S6 PACKAGE 6-LEAD PLASTIC TSOT-23 LTC4210-1I/LTC4210-2I .......................–40°C to 85°C TJMAX = 125°C, θJA = 230°C/W Storage Temperature Range ..................–65°C to 150°C Lead Temperature (Soldering, 10 sec) ...................300°C ORDER INFORMATION http://www.linear.com/product/LTC4210-1#orderinfo Lead Free Finish TAPE AND REEL (MINI) TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE LTC4210-1CS6#TRMPBF LTC4210-1CS6#TRPBF LTYW 6-Lead Plastic TSOT-23 0°C to 70°C LTC4210-2CS6#TRMPBF LTC4210-2CS6#TRPBF LTYX 6-Lead Plastic TSOT-23 0°C to 70°C LTC4210-1IS6#TRMPBF LTC4210-1IS6#TRPBF LTF5 6-Lead Plastic TSOT-23 –40°C to 85°C LTC4210-2IS6#TRMPBF LTC4210-2IS6#TRPBF LTF6 6-Lead Plastic TSOT-23 –40°C to 85°C TRM = 500 pieces. Consult LTC Marketing for parts specified with wider operating temperature ranges. Consult LTC Marketing for information on lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ 421012fa 2 For more information www.linear.com/LTC4210-1

LTC4210-1/LTC4210-2 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T = 25°C. V = 5V, unless otherwise noted. (Note 2) A CC SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V Supply Voltage l 2.7 16.5 V CC I V Supply Current l 0.65 3.5 mA CC CC V V Undervoltage Lockout Release V Rising l 2.2 2.5 2.65 V LKOR CC CC V V Undervoltage Lockout Hysteresis 100 mV LKOHYST CC I ON Pin Input Current l –10 0 10 µA INON I SENSE Pin Input Current V = V l –10 5 10 µA INSENSE SENSE CC V Circuit Breaker Trip Voltage V = (V – V ) l 44 50 56 mV CB CB CC SENSE I GATE Pin Pull-Up Current V = 0V l –5 –10 –15 µA GATEUP GATE I GATE Pin Pull-Down Current V = 1.5V, V = 3V or 25 mA GATEDN TIMER GATE V = 0V, V = 3V or ON GATE V – V = 100mV, V = 3V CC SENSE GATE ∆VGATE External N-Channel Gate Drive VGATE – VCC, VCC = 2.7V l 4.0 6.5 8 V VGATE – VCC, VCC = 3V l 4.5 7.5 10 V VGATE – VCC, VCC = 3.3V l 5.0 8.5 12 V VGATE – VCC, VCC = 5V l 10 12 16 V VGATE – VCC, VCC = 12V l 9.0 12 16 V V – V , V = 15V l 6.0 11 18 V GATE CC CC ITIMERUP TIMER Pin Pull-Up Current Initial Cycle, VTIMER = 1V l –2 –5 –8.5 µA During Current Fault Condition, V = 1V l –25 –60 –100 µA TIMER I TIMER Pin Pull-Down Current After Current Fault Disappears, V = 1V l 2 3.5 µA TIMERDN TIMER Under Normal Conditions, V = 1V 100 µA TIMER VTIMER TIMER Pin Threshold High Threshold, TIMER Rising l 1.22 1.3 1.38 V Low Threshold, TIMER Falling l 0.15 0.2 0.25 V V TIMER Low Threshold Hysteresis 100 mV TMRHYST V ON Pin Threshold ON Threshold, ON Rising l 1.22 1.3 1.38 V ON V ON Pin Threshold Hysteresis 80 mV ONHYST t Turn-Off Time (TIMER Rise to GATE Fall) V = 0V to 2V Step, V = V = 5V 1 µs OFF(TMRHIGH) TIMER CC ON t Turn-Off Time (ON Fall to GATE Fall) V = 5V to 0V Step, V = 5V 30 µs OFF(ONLOW) ON CC t Turn-Off Time (V Fall to IC Reset) V = 5V to 2V Step, V = 5V 30 µs OFF(VCCLOW) CC CC ON Note 1: Stresses beyond those listed under Absolute Maximum Ratings Note 3: An internal Zener on the GATE pin clamps the charge pump may cause permanent damage to the device. Exposure to any Absolute voltage to a typical maximum voltage of 26V. External overdrive of the Maximum Rating condition for extended periods may affect device GATE pin beyond the internal Zener voltage may damage the device. reliability and lifetime. Without a limiting resistor, the GATE capacitance must be <0.15µF at Note 2: All currents into device pins are positive; all currents out of device maximum VCC. If a lower GATE pin clamp voltage is desired, an external pins are negative. All voltages are referenced to ground unless otherwise Zener diode may be used. specified. 421012fa 3 For more information www.linear.com/LTC4210-1

LTC4210-1/LTC4210-2 TYPICAL PERFORMANCE CHARACTERISTICS Undervoltage Lockout Threshold Supply Current vs Supply Voltage Supply Current vs Temperature vs Temperature 4.0 4.0 2.65 3.5 TA = 25°C 3.5 LD (V)2.60 O H SUPPLY CURRENT (mA)32211.....05050 SUPPLY CURRENT (mA) 32211.....05050 VVCCCC == 1152VV OLTAGE LOCKOUT THRES22222.....5544350505 VVCCCC RFAISLILNINGG VCC = 5V RV 0.5 0.5 DE2.30 VCC = 3V UN 0 0 2.25 0 2 4 6 8 10 12 14 16 18 20 –75 –50 –25 0 25 50 75 100 125 150 –75 –50 –25 0 25 50 75 100 125 150 SUPPLY VOLTAGE (V) TEMPERATURE (°C) TEMPERATURE (°C) 4210 G01 4210 G02 4210 G03 V vs Supply Voltage V vs Temperature I vs Supply Voltage GATE GATE GATEUP 40 40 –8.0 TA = 25°C TA = 25°C 35 35 –8.5 30 30 VCC = 15V –9.0 V (V)GATE122505 V (V)GATE122505 VVCCCC == 152VV I (µA)GATEUP––11–009...505 10 10 –11.0 VCC = 3V 5 5 –11.5 0 0 –12.0 0 2 4 6 8 10 12 14 16 18 20 –75 –50 –25 0 25 50 75 100 125 150 0 2 4 6 8 10 12 14 16 18 20 SUPPLY VOLTAGE (V) TEMPERATURE (°C) SUPPLY VOLTAGE (V) 4210 G04 4210 G05 4210 G06 I vs Temperature ∆V vs Supply Voltage ∆V vs Temperature GATEUP GATE GATE –8.0 18 18 TA = 25°C –8.5 16 16 14 –9.0 VCC = 5V 12 14 VCC = 12V VCC = 5V I (µA)GATEUP––11–009...505 VCC = 12V VCC = 3V ∆V (V)GATE180 ∆V (V)GATE11802 VCC = 15V 6 VCC = 15V –11.0 6 VCC = 3V 4 –11.5 2 4 –12.0 0 2 –75 –50 –25 0 25 50 75 100 125 150 0 2 4 6 8 10 12 14 16 18 20 –75 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) SUPPLY VOLTAGE (V) TEMPERATURE (°C) 4210 G07 4210 G08 4210 G09 421012fa 4 For more information www.linear.com/LTC4210-1

LTC4210-1/LTC4210-2 TYPICAL PERFORMANCE CHARACTERISTICS I (In Initial Cycle) I (In Initial Cycle) I (During Circuit Breaker TIMERUP TIMERUP TIMERUP vs Supply Voltage vs Temperature Delay) vs Supply Voltage 0 0 –20 TA = 25°C VCC = 5V TA = 25°C –1 –1 –30 –2 –2 –40 –3 –3 I (µA)TIMERUP–––456 I (µA)TIMERUP–––456 I (µA)TIMERUP–––567000 –7 –7 –80 –8 –8 –9 –9 –90 –10 –10 –100 0 2 4 6 8 10 12 14 16 18 20 –75 –50 –25 0 25 50 75 100 125 150 0 2 4 6 8 10 12 14 16 18 20 SUPPLY VOLTAGE (V) TEMPERATURE (°C) SUPPLY VOLTAGE (V) 4210 G10 4210 G11 4210 G12 I (During Circuit Breaker I (In Cool-Off Cycle) I (In Cool-Off Cycle) TIMERUP TIMERDN TIMERDN Delay) vs Temperature vs Supply Voltage vs Temperature –20 3.0 3.0 VCC = 5V TA = 25°C VCC = 5V –30 2.8 2.8 2.6 2.6 –40 2.4 2.4 I (µA)TIMERUP–––567000 I (µA)TIMERDN221...208 I (µA)TIMERDN221...208 1.6 1.6 –80 1.4 1.4 –90 1.2 1.2 –100 1.0 1.0 –75 –50 –25 0 25 50 75 100 125 150 0 2 4 6 8 10 12 14 16 18 20 –75 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) SUPPLY VOLTAGE (V) TEMPERATURE (°C) 4210 G13 4210 G14 4210 G15 TIMER High Threshold TIMER High Threshold TIMER Low Threshold vs Supply Voltage vs Temperature vs Supply Voltage 1.38 1.38 0.24 TA = 25°C VCC = 5V TA = 25°C 1.36 1.36 0.23 MER HIGH THRESHOLD (V)11111.....3332242086 MER HIGH THRESHOLD (V)11111.....3332242086 MER LOW THRESHOLD (V)00000.....2221121098 TI TI TI 1.24 1.24 0.17 1.22 1.22 0.16 0 2 4 6 8 10 12 14 16 18 20 –75 –50 –25 0 25 50 75 100 125 150 0 2 4 6 8 10 12 14 16 18 20 SUPPLY VOLTAGE (V) TEMPERATURE (°C) SUPPLY VOLTAGE (V) 4210 G16 4210 G17 4210 G18 421012fa 5 For more information www.linear.com/LTC4210-1

LTC4210-1/LTC4210-2 TYPICAL PERFORMANCE CHARACTERISTICS TIMER Low Threshold ON Pin Threshold ON Pin Threshold vs Temperature vs Supply Voltage vs Temperature 0.24 1.45 1.45 VCC = 5V TA = 25°C VCC = 5V 0.23 1.40 1.40 OLD (V)0.22 D (V)1.35 HIGH THRESHOLD D (V)1.35 HIGH THRESHOLD RESH0.21 SHOL1.30 SHOL1.30 W TH0.20 THRE1.25 LOW THRESHOLD THRE1.25 LOW THRESHOLD O0.19 N 1.20 N 1.20 ER L N PI N PI M0.18 O1.15 O1.15 TI 0.17 1.10 1.10 0.16 1.05 1.05 –75 –50 –25 0 25 50 75 100 125 150 0 2 4 6 8 10 12 14 16 18 20 –75 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) SUPPLY VOLTAGE (V) TEMPERATURE (°C) 4210 G19 4210 G20 4210 G21 t vs Supply Voltage t vs Temperature V vs Supply Voltage OFF(ONLOW) OFF(ONLOW) CB 80 80 58 TA = 25°C TA = 25°C 70 70 VCC = 15V 56 60 60 54 µs) 50 µs) 50 VCC = 12V 52 (NLOW 40 (NLOW 40 (mV)B 50 OFF,O 30 OFF,O 30 VCC = 5V VC 48 t t 20 20 46 VCC = 3V 10 10 44 0 0 42 0 2 4 6 8 10 12 14 16 18 20 –75 –50 –25 0 25 50 75 100 125 150 0 2 4 6 8 10 12 14 16 18 20 SUPPLY VOLTAGE (V) TEMPERATURE (°C) SUPPLY VOLTAGE (V) 4210 G22 4210 G23 4210 G24 Overcurrent to GATE Low V vs Temperature Propagation Delay CB 58 1k VCC = 5V 25°C 56 VCC = 5V W CGATE = 5nF 54 Os)100 Lµ V(mV)CB 55442086 VERCURRENT TO GATE PROPAGATION DELAY ( 110 O 44 42 0.1 –75 –50 –25 0 25 50 75 100 125 150 0 50 100 150 200 250 300 350 400 TEMPERATURE (°C) VIN– VSENSE (mV) 4210 G26 4210 G25 421012fa 6 For more information www.linear.com/LTC4210-1

LTC4210-1/LTC4210-2 PIN FUNCTIONS TIMER (Pin 1): Timer Input Pin. An external capacitor load current. An external R-C compensation network should C sets a 272.9ms/µF initial timing delay and a 21.7ms/ be connected to this pin for current limit loop stability. TIMER µF circuit breaker delay. The GATE pin turns off whenever SENSE (Pin 5): Current Limit Sense Input Pin. A sense the TIMER pin is pulled beyond the COMP2 threshold, resistor between the V and SENSE pins sets the analog CC such as for overvoltage detection with an external Zener. current limit. In overload, the EA controls the external GND (Pin 2): Ground Pin. MOSFET gate to maintain the SENSE pin voltage at 50mV below V . When the EA is maintaining current limit, the ON (Pin 3): ON Input Pin. The ON pin comparator has a CC TIMER circuit breaker mode is activated. The current limit low-to-high threshold of 1.3V with 80mV hysteresis and a loop/circuit breaker mode can be disabled by connecting glitch filter. When the ON pin is low, the LTC4210 is reset. the SENSE pin to the V pin. When the ON pin goes high, the GATE turns on after the CC initial timing cycle. V (Pin 6): Positive Supply Input Pin. The operating supply CC voltage range is between 2.7V to 16.5V. An undervoltage GATE (Pin 4): GATE Output Pin. This pin is the high side lockout (UVLO) circuit with a glitch filter resets the LTC4210 gate drive of an external N-channel MOSFET. An internal when a low supply voltage is detected. charge pump provides a 10µA pull-up current with Zener clamps to V and ground. In overload, the error amplifier CC (EA) controls the external MOSFET to maintain a constant 421012fa 7 For more information www.linear.com/LTC4210-1

LTC4210-1/LTC4210-2 BLOCK DIAGRAM 6 5 VCC SENSE + INITIAL UP/LATCH OFF – 50mV UVLO – + 5µA 60µA EA CURRENT LIMIT GLITCH FILTER 0.2V + COMP1 CHARGE – PUMP Z1 TIMER 12V 1 LOGIC 10µA + GATE 4 COMP2 SHUTDOWN Z2 1.3V – M5 26V INITIAL DOWN/NORMAL GLITCH FILTER 2µA 100µA GND 2 COOL OFF COMP3 – + 1.3V ON 3 4210 BD 421012fa 8 For more information www.linear.com/LTC4210-1

LTC4210-1/LTC4210-2 APPLICATIONS INFORMATION Hot Circuit Insertion The UVLO has a low-to-high threshold of 2.5V, a 100mV hysteresis and a high-to-low glitch filter of 30µs. Above When circuit boards are inserted into live backplanes, 2.5V supply voltage, the LTC4210 will start if the ON pin the supply bypass capacitors can draw large transient conditions are met. A short supply dip below 2.4V for less currents from the backplane power bus as they charge. than 30µs is ignored to allow for bus supply transients. Such transient currents can cause permanent damage to connector pins, glitches on the system supply or reset ON Function other boards in the system. The ON pin is the input to a comparator which has a The LTC4210 is designed to turn a printed circuit board’s low-to-high threshold of 1.3V, an 80mV hysteresis and a supply voltage ON and OFF in a controlled manner, allow- high-to-low glitch filter of 30µs. A low input on the ON pin ing the circuit board to be safely inserted into or removed resets the LTC4210 TIMER status and turns off the external from a live backplane. The LTC4210 can reside either on MOSFET by pulling the GATE pin to ground. A low-to-high the backplane or on the daughter board for hot circuit transition on the ON pin starts an initial cycle followed by insertion applications. a start-up cycle. A 10k pull-up resistor connecting the ON pin to the supply is recommended. The 10k resistor shunts Overview any potential static charge on the backplane and reduces The LTC4210 is designed to operate over a range of sup- the overvoltage stress at the ON pin during live insertion. plies from 2.7V to 16.5V. Upon insertion, an undervoltage Alternatively, an external resistor divider at the ON pin can lockout circuit determines if sufficient supply voltage is be used to program an undervoltage lockout value higher present. When the ON pin goes high an initial timing cycle than the internal UVLO circuit. An RC filter can be added assures that the board is fully seated in the backplane at the ON pin to increase the delay time at card insertion before the MOSFET is turned on. A single timer capacitor if the internal glitch filter delay is insufficient. sets the periods for all of the timer functions. After the initial timing cycle the LTC4210 can either start up in cur- GATE Function rent limit or with a lower load current. Once the external During hot insertion of the PCB, an abrupt application of MOSFET is fully enhanced and the supply has ramped supply voltage charges the external MOSFET drain/gate up, the LTC4210 monitors the load current through an capacitance. This can cause an unwanted gate voltage external sense resistor. Overcurrent faults are actively spike. An internal proprietary circuit holds GATE low before limited to 50mV/R for a specified circuit breaker SENSE the internal circuitry wakes up. This reduces the MOSFET timer limit. The LTC4210-1 will automatically retry after current surges substantially at insertion. The GATE pin is a current limit fault while the LTC4210-2 latches off. The held low in reset mode and during the initial timing cycle. LTC4210-1 timer function limits the retry duty cycle to In the start-up cycle the GATE pin is pulled up by a 10µA 3.8% for MOSFET cooling. current source. During an overcurrent fault condition, the error amplifier servoes the GATE pin to maintain a constant Undervoltage Lockout current to the load until the circuit breaker trips. When the An internal undervoltage lockout (UVLO) circuit resets the circuit breaker trips, the GATE pin shuts down abruptly. LTC4210 if the V supply is too low for normal operation. CC 421012fa 9 For more information www.linear.com/LTC4210-1

LTC4210-1/LTC4210-2 APPLICATIONS INFORMATION Current Limit Circuit Breaker Function CURRENT FLOW CURRENT FLOW TO LOAD TO LOAD SENSE RESISTOR The LTC4210 features a current limiting circuit breaker instead of a traditional comparator circuit breaker. When TRACK WIDTH W: 0.03" PER AMP W there is a sudden load current surge, such as a low imped- ON 1 OZ COPPER ance fault, the bus supply voltage can drop significantly 4210 F01 to a point where the power to an adjacent card is affected, causing system malfunctions. The LTC4210 fast response TO TO error amplifier (EA) instantly limits current by reducing VCC SENSE the external MOSFET GATE pin voltage. This minimizes Figure 1. Making PCB Connections to the Sense Resistor the bus supply voltage drop and permits power budgeting and fault isolation without affecting neighboring cards. A Calculating Current Limit compensation circuit should be connected to the GATE For a selected R , the nominal load current is given SENSE pin for current limit loop stability. by Equation 1. The minimum load current is given by Equation 2: Sense Resistor Consideration V 44mV The nominal fault current limit is determined by a sense I = CB(MIN) = (2) LIMIT(MIN) R R resistor connected between VCC and the SENSE pin as SENSE(MAX) SENSE(MAX) given by Equation 1. where V 50mV CB(NOM) I = = (1)  R  LIMIT(NOM) R R R =R (cid:127)1+ TOL SENSE(NOM) SENSE(NOM) SENSE(MAX) SENSE  100  The power rating of the sense resistor should be rated at The maximum load current is given by Equation 3: the fault current level. Table 2 in the Appendix lists some common sense resistors. V 56mV CB(MAX) I = = (3) LIMIT(MAX) For proper circuit breaker operation, Kelvin-sense PCB RSENSE(MIN) RSENSE(MIN) connections between the sense resistor and the LTC4210 where V and SENSE pins are strongly recommended. The CC drawing in Figure 1 illustrates the connections between  R  the LTC4210 and the sense resistor. PCB layout should RSENSE(MIN)=RSENSE(cid:127)1– TOL  100  be balanced and symmetrical to minimize wiring errors. In addition, the PCB layout for the sense resistor should include good thermal management techniques for optimal sense resistor power dissipation. 421012fa 10 For more information www.linear.com/LTC4210-1

LTC4210-1/LTC4210-2 APPLICATIONS INFORMATION If a 7mΩ sense resistor with ±1% tolerance is used for quency parasitic oscillations frequently associated with current limiting, the nominal current limit is 7.14A. From the power MOSFET. In some applications, the user may Equations 2 and 3, I = 6.22A and I = find that R helps in short-circuit transient recovery as LIMIT(MIN) LIMIT(MAX) G 8.08A. For proper operation, the minimum current limit well. However, too large of an R value will slow down the G must exceed the circuit maximum operating load current turn-off time. The recommended R range is between 5Ω G with margin. The sense resistor power rating must exceed and 500Ω. Usually, method 2 is preferred when the input V 2/R . supply voltage is greater than 10V. R limits the current CB(MAX) SENSE(MIN) G flow into the GATE pin’s internal zener clamp during tran- Frequency Compensation sient events. The recommended R and C values are the C C same as method 1. The parasitic compensation capacitor A compensation circuit should be connected to the GATE C is required when 0.2µF < load capacitance C < 9µF, pin for current limit loop stability. P L otherwise it is optional. Method 1 Parasitic MOSFET Oscillation The simplest frequency compensation network consists There are two possible parasitic oscillations when the of R and C (Figure 2a). The total GATE capacitance is: C C MOSFET operates as a source follower when ramping at C = C + C (4) GATE ISS C power-up or during current limiting. The first type of oscil- Generally, the compensation value in Figure 2a is sufficient lation occurs at high frequencies, typically above 1MHz. for a pair of input wires less than a foot in length. Applica- This high frequency oscillation is easily damped with RG tions with longer input wires may require the R or C value as mentioned in method 2. C C to be increased for better fault transient performance. For The second type of oscillation occurs at frequencies a pair of three foot input wires, users can start with C = C between 200kHz and 800kHz due to the load capacitance 47nF and R = 100Ω. Despite the wire length, the general C being between 0.2µF and 9µF, the presence of R and G rule for AC stability required is C ≥ 8nF and R ≤ 1kΩ. C C R resistance, the absence of a drain bypass capacitor, C a combination of bus wiring inductance and bus supply Method 2 output impedance. There are several ways to prevent this The compensation network in Figure 2b is similar to the second type of oscillation. The simplest way is to avoid circuitry used in method 1 but with an additional gate load capacitance below 10µF, the second choice is con- resistor R . The R resistor helps to minimize high fre- necting an external C > 1.5nF. G G P RSENSE Q1 RSENSE Q1 0.007Ω Si4410DY 0.007Ω Si4410DY V5IVN + VOUT 1V2IVN + VOUT 6 5 CL 6 5 CL VCCLTC421S0E*NSE *ADDITIONAL DETAILS VCCLTC421S0E*NSE R20G0Ω 2C.P2*n*F 4 OMITTED FOR CLARITY 4 GATE **USE CP IF 0.2µF < CL < 9µF, GATE RC OTHERWISE NOT REQUIRED RC 100Ω 100Ω CC CC 10nF 10nF (2a) (2b) 4210 F02 Method 1 Method 2 Figure 2. Frequency Compensation 421012fa 11 For more information www.linear.com/LTC4210-1

LTC4210-1/LTC4210-2 APPLICATIONS INFORMATION Whichever method of compensation is used, board level the TIMER pin until it reaches 0.2V at time point 4. The short-circuit testing is highly recommended as board initial cycle delay (time point 2 to time point 4) is related layout can affect transient performance. Beside frequency to C by equation: TIMER compensation, the total gate capacitance C also GATE t ≈ 272.9 • C ms/µF (5) INITIAL TIMER determines the GATE start-up as in Equation 6. The C GATE should be kept below 0.15µF at high supply operation as When the initial cycle terminates, a start-up cycle is the capacitive energy ( 0.5 • C • V 2 ) is discharged activated and the GATE pin ramps high. The TIMER pin GATE GATE by the LTC4210 internal pull-down transistor. This prevents continues to be pulled down towards ground. the internal pull-down transistor from overheating when the GATE turns off and/or is servoing during current limiting. 1 2 3 4 5 6 7 >2.5V Timer Function VIN The TIMER pin handles several key functions with an >1.3V external capacitor, C . There are two comparator TIMER VON thresholds: COMP1 (0.2V) and COMP2 (1.3V). The four COMP2 timing current sources are: 100µA VTIMER COMP1 5µA pull-up 5µA 10µA 60µA pull-up VGATE VTH 2µA pull-down DISCHARGE 100µA pull-down VOUT BY LOAD 4210 F03 The 100µA is a nonideal current source approximating a RESET INITIAL START-UP NORMAL MODE CYCLE CYCLE CYCLE 7k resistor below 0.4V. Figure 3. Normal Operating Sequence Initial Timing Cycle Start-Up Cycle Without Current Limit When the card is being inserted into the bus connector, the long pins mate first which brings up the supply V The GATE is released with a 10µA pull-up at time point IN at time point 1 of Figure 3. The LTC4210 is in reset mode 4 of Figure 3. At time point 5, GATE reaches the external as the ON pin is low. GATE is pulled low and the TIMER MOSFET threshold VTH and VOUT starts to follow the GATE pin is pulled low with a 100µA source. At time point 2, ramp up. If the RSENSE current is below the current limit, the short pin makes contact and ON is pulled high. At this the GATE ramps at a constant rate of: instant, a start-up check requires that the supply voltage ∆V I be above UVLO, the ON pin be above 1.3V and the TIMER GATE = GATE (6) ∆T C pin voltage be less than 0.2V. When these three conditions GATE are fulfilled, the initial cycle begins and the TIMER pin is where C is the total capacitance at the GATE pin. GATE pulled high with 5µA. At time point 3, the TIMER reaches the COMP2 threshold and the first portion of the initial cycle ends. The 100µA current source then pulls down 421012fa 12 For more information www.linear.com/LTC4210-1

LTC4210-1/LTC4210-2 APPLICATIONS INFORMATION The current through R can be divided into two com- 1 2 3 4 5 5A 5B 6 7 SENSE ponents; I due to the total load capacitance (C ) >2.5V CLOAD LOAD and I due to the noncapacitive load elements. The LOAD VIN capacitive load typically dominates. For a successful start-up without current limit, I >1.3V RSENSE < I : LIMIT VON I = I + I < I RSENSE CLOAD LOAD LIMIT COMP2 60µA 2µA  ∆V  100µA I =C (cid:127) OUT+I <I (7) VTIMER RSENSE  LOAD ∆T  LOAD LIMIT COMP1 100µA 5µA 10µA <10µA Due to the voltage follower configuration, the V ramp OUT 10µA rate approximately tracks VGATE: VGATE VTH ∆V I ∆V I OUT = CLOAD ≈ GATE = GATE (8) DISCHARGE ∆T C ∆T C BY LOAD LOAD GATE VOUT At time point 6, VOUT is approximately VIN but GATE REGULATED AT 50mV/RSENSE ramp-up continues until it reaches a maximum voltage. IRSENSE This maximum voltage is determined either by the charge 4210 F04 pump or the internal clamp. RESET INITIAL START-UP NORMAL MODE CYCLE CYCLE CYCLE Start-Up Cycle with Current Limit Figure 4. Operating Sequence with Current Limiting at Start-Up Cycle If the duration of the current limit is brief during start-up (Figure 4) and it did not last beyond the circuit breaker During current limiting, the second term in Equation 10 function time out, the GATE behaves the same as in start-up is partly modified from C • V /I to C • V / GATE IN GATE LOAD IN without current limit except for the time interval between I . The start-up time is now given by: CLOAD time point 5A and time point 5B. The servo amplifier limits V V IRSENSE by decreasing the IGATE current (<10µA). t =C (cid:127) TH +C (cid:127) IN STARTUP GATE LOAD I I 50mV GATE CLOAD (11) I =I = (9) RSENSE LIMIT V V RSENSE =CGATE(cid:127) TH +CLOAD(cid:127) IN I I –I GATE RSENSE LOAD Equations 7 and 8 are applicable but with a lower GATE and V ramp rate. For successful completion of current limit start-up cycle OUT there must be a net current to charge C and the cur- LOAD Gate Start-Up Time rent limit duration must be less than t . The second CBDELAY term in Equation 11 has to fulfill Equation 12. The start-up time without current limit is given by: V V +V C (cid:127) IN <t (12) t =C (cid:127) TH IN LOAD CBDELAY STARTUP GATE I –I I RSENSE LOAD GATE (10) V V t =C (cid:127) TH +C (cid:127) IN STARTUP GATE GATE I I GATE GATE 421012fa 13 For more information www.linear.com/LTC4210-1

LTC4210-1/LTC4210-2 APPLICATIONS INFORMATION Circuit Breaker Timer Operation A B CIRCUIT BREAKER When a current limit fault is encountered at time point A TRIPS COMP2 in Figure 5, the circuit breaker timing is activated with a LATCHED OFF (5µA PULL-UP) VTIMER OR RETRY (2µA PULL-DOWN) 60µA pull-up. The circuit breaker trips at time point B if 60µA the fault is still present and the TIMER pin voltage reaches COMP1 the COMP2 threshold and the LTC4210 shuts down. For 100µA a continuous fault, the circuit breaker delay is: 4210 F05 NORMAL FAULT MODE MODE C t =1.3V(cid:127) TIMER (13) Figure 5. A Continuous Fault Timing CBDELAY 60µA Intermittent overloads may exceed the current limit as in A1 B1 A2 B2 A3 B3 Figure 6, but if the duration is sufficiently short, the TIMER pin may not reach the COMP2 threshold and the LTC4210 ILOAD ~50mV/RSENSE will not shut down. To handle this situation, the TIMER discharges with 2µA whenever (V – SENSE) voltage is CIRCUIT BREAKER CC 60µA TRIPS below the 50mV limit and the TIMER voltage is between COMP2 60µA 60µA VTIMER the COMP1 and COMP2 thresholds. When the TIMER COMP1 2µA voltage falls below the COMP1 threshold, the TIMER pin 2µA LATCHED OFF (5µA PULL-UP) OR RETRY (2µA PULL-DOWN) is discharged with an equivalent 7k resistor (normal mode, VGATE 10µA 10µA 100µA source) when (V – SENSE) voltage is below CC the 50mV limit. If the TIMER pin does not drop below 4210 F06 CB CB CB the COMP1 threshold, any intermittent overload with an FAULT FAULT FAULT aggregate duty cycle of more than 3.8% will eventually Figure 6. Multiple Intermittent Overcurrent Condition trip the circuit breaker. Figure 7 shows the circuit breaker response time in seconds normalized to 1µF. The asym- metric charging and discharging of TIMER is a fair gauge 1 t 1.3V (cid:127) 1µF of MOSFET heating. (s/µF) = F) CTIMER 60µA (cid:127) D – 2µA µ t (s/µF)= 1.3V(cid:127)1µF (14) ME (s/ CTIMER (60µA(cid:127)D)–2µA SE TI N O P 0.1 When the circuit breaker trips, the GATE pin is pulled low. ES R The TIMER enters latchoff mode with a 5µA pull-up for the ED Z LI LTC4210-2 (latched-off version), while an auto-retry “cool- A M R off” cycle begins with a 2µA pull-down for the LTC4210-1 O N (auto-retry version). An auto-retry cool-off delay of the 0.01 0 10 20 30 40 50 60 70 80 90 100 LTC4210-1 between COMP2 and COMP1 thresholds takes: OVERLOAD DUTY CYCLE, D (%) C 4210 F07 t =1.1V(cid:127) TIMER (15) COOLOFF Figure 7. Circuit Breaker Timer Response 2µA for Intermittent Overload 421012fa 14 For more information www.linear.com/LTC4210-1

LTC4210-1/LTC4210-2 APPLICATIONS INFORMATION Auto-Retry After Current Fault (LTC4210-1) Latch-Off After Current Fault (LTC4210-2) Figure 8 shows the waveforms of the LTC4210-1 (auto- Figure 9 shows the waveforms of the LTC4210-2 (latch-off retry version) during a circuit breaker fault. At time point version) during a circuit breaker fault. At time point B, the B1, the TIMER trips the COMP2 threshold of 1.3V. The TIMER trips the COMP2 threshold. The GATE pin pulls to GATE pin pulls to ground while TIMER begins a “cool-off” ground while the TIMER pin is latched high by a 5µA pull- cycle with a 2µA pull-down to the COMP1 threshold of up. The TIMER pin eventually reaches the soft-clamped 0.2V. At time point C1, the TIMER pin pulls down with voltage (V ) of 2.3V. To clear the latchoff mode, the CLAMP approximately a 7k resistor to ground and a GATE start-up user can either pull the TIMER pin to below 0.2V externally cycle is initiated. If the fault persists, the fault auto-retry or cycle the ON pin low for more than 30µs. duty cycle is approximately 3.8%. Pulling the ON pin low for more than 30µs will stop the auto-retry function and put the LTC4210 in reset mode. A B C A1 B1 C1 A2 B2 VCLAMP COMP2 2µA 2µA 60µA 60µA COMP2 VTIMER 60µA VTIMER COMP1 COMP1 100µA VGATE VGATE 0V VOUT VOUT 0V REGULATING AT 50mV/RSENSE REGULATING AT 50mV/RSENSE ILOAD ILOAD NORMAL LATCHED OFF CYCLE NORMAL COOL OFF COOL OFF MODE 2410 F09 MODE CYCLE CYCLE CB CB CB FAULT FAULT 4210 F08 FAULT Figure 8. Automatic Retry After Overcurrent Fault Figure 9. Latchoff After Overcurrent Fault 421012fa 15 For more information www.linear.com/LTC4210-1

LTC4210-1/LTC4210-2 APPLICATIONS INFORMATION Normal Mode/External Timer Control See the section OVERVOLTAGE DETECTION USING TIMER PIN for details of the application. Whenever the TIMER pin voltage drops below the COMP1 threshold, but is not in reset mode, the TIMER enters Power-Off Cycle normal (100µA source) mode with an equivalent 7k resis- tive pull-down. Table 1 shows the relationship of t , The system can be reset by toggling the ON pin low for INITIAL t , t vs C . more than 30µs as shown at time point 7 of Figure 3. The CBDELAY COOLOFF TIMER GATE pin is pulled to ground. The TIMER capacitor is also If the TIMER pin is pulled beyond the COMP2 threshold, discharged to ground. C discharges through the load. LOAD the GATE pin is pulled to ground immediately. This allows Alternatively, the TIMER pin can be externally driven above the TIMER pin to be used for overvoltage detection, see the COMP2 threshold to turn off the GATE pin. Figure 11. Externally forcing the TIMER pin below the COMP1 POWER MOSFET SELECTION threshold will reset the TIMER to normal mode. During Power MOSFETs can be classified by R at V gate drive overvoltage detection, the TIMER’s 100µA pull-down DSON GS ratings of 10V, 4.5V, 2.5V and 1.8V. Use the typical curves current will continue to be on if (V – SENSE) voltage is CC ∆V vs Supply Voltage and ∆V vs Temperature to below 50mV. If the (V – SENSE) voltage exceeds 50mV GATE GATE CC determine whether the gate drive voltage is adequate for during the overvoltage detection, the TIMER current will be the selected MOSFET at the operating voltage. the same as described for latched-off or autoretry mode. In addition, the selected MOSFET should fulfill two V GS Table 1. t , t , t vs C INITIAL CBDELAY COOLOFF TIMER criteria: C (µF) t (ms) t (ms) t (ms) TIMER INITIAL CBDELAY COOLOFF 0.033 9.0 0.7 18.2 1. Positive VGS absolute maximum rating > LTC4210 maximum ∆V , and 0.047 12.8 1 25.9 GATE 0.068 18.6 1.5 37.4 2. Negative V absolute maximum rating > supply volt- GS 0.082 22.4 1.8 45.1 age. The gate of the MOSFET can discharge faster than 0.1 27.3 2.2 55 V when shutting down the MOSFET with a large OUT 0.22 60.0 4.8 121 C . LOAD 0.33 90.1 7.2 181.5 If one of the conditions cannot be met, an external Zener 0.47 128.3 10.2 258.5 clamp shown on Figure 10a or Figure 10b can be used. 0.68 185.6 14.7 374 The selection of R should be within the allowed LTC4210 G 0.82 223.8 17.8 451 package dissipation when discharging V via the Zener OUT 1 272.9 21.7 550 clamp. 2.2 600.5 47.7 1210 3.3 900.7 71.5 1815 421012fa 16 For more information www.linear.com/LTC4210-1

LTC4210-1/LTC4210-2 APPLICATIONS INFORMATION RSENSE Q1 RSENSE Q1 VCC VOUT VCC VOUT D1* D1* D2* *USER SELECTED VOLTAGE CLAMP (A LOW BIAS CURRENT ZENER DIODE RS IS RECOMMENDED) RS 200Ω 200Ω 1N4688 (5V) 1N4692 (7V) GATE GATE 1N4695 (9V) (10a) 1N4702 (15V) (10b) Figure 10. Gate Protection Zener Clamp BACKPLANE PCB EDGE CONNECTOR CONNECTOR (FEMALE) (MALE) RSENSE Q1 VIN LONG 0.01Ω Si4410DY 5VVOUT 5V Z1 R10XΩ Z2 1R0Bk + C47LO0µADF 4A CX 0.1µF D1 6 5 RG 1N4148 VCC SENSE 4 100Ω RON1 RTIMER GATE SHORT 20k 18Ω 3 R4 ON LTC4210 100Ω RON2 1 CC 10k TIMER 10nF GND CTIMER 2 LONG 0.22µF GND GND Z1: SMAJ10A Z2: BZX84C6V2 4210 F11 Figure 11. Supply Side Overvoltage Protection 421012fa 17 For more information www.linear.com/LTC4210-1

LTC4210-1/LTC4210-2 APPLICATIONS INFORMATION A MOSFET with a V absolute maximum rating of ±20V capacitors, since controlling the surge current to bypass GS meets the two criteria for all the LTC4210 applications capacitors at plug-in is the primary motivation for the hot ranges from 2.7V to 16.5V. Typically most 10V gate rated swap controller. Although wire harness, backplane and PCB MOSFETs have V absolute maximum ratings of ±20V or trace inductances are usually small, these can create large GS greater, so no external V Zener clamp is needed. There spikes when large currents are suddenly drawn, cut-off or GS are 4.5V gate rated MOSFETs with V absolute maximum limited. This can cause detrimental damage to board com- GS ratings of ±20V. ponents unless measures are taken. Abrupt intervention can prevent subsequent damage caused by a catastrophic In addition to the MOSFET gate drive rating and V abso- GS fault but it does cause a large supply transient. The energy lute maximum rating, other criteria such as V , I , BDSS D(MAX) stored in the lead/trace inductance is easily controlled with R , P , θ , T and maximum safe operating DS(ON) D JA J(MAX) snubbers and/or transient voltage suppressors. Even when area should also be carefully reviewed. V should BDSS ferrite beads are used for electromagnetic interference exceed the maximum supply voltage inclusive of spikes (EMI) control, the low saturating current of ferrite will not and ringing. I should be greater than the current D(MAX) pose a major problem if the transient voltage suppressors limit, I . R determines the MOSFET V which LIMIT DS(ON) DS with adequate ratings are used. The transient associated together with V yields an error in the V voltage. At CB OUT with the GATE turn off can be controlled with a snubber 2.7V supply voltage, the total of V + V of 0.1V yields DS CB and/or transient voltage suppressor. Snubbers such as RC 3.7% V error. OUT networks are effective especially at low voltage supplies. The maximum power dissipated in the MOSFET is The choice of RC is usually determined experimentally. ILIMIT2 • RDS(ON) and this should be less than the maximum The value of the snubber capacitor is usually chosen power dissipation, PD allowed in that package. Given power between 10 to 100 times the MOSFET COSS. The value dissipation, the MOSFET junction temperature, TJ can be of the snubber resistor is typically between 3Ω to 100Ω. computed from the operating temperature (TA) and the When the supply exceeds 7V or EMI beads exist in the MOSFET package thermal resistance (θJA). The operating wire harness, a transient voltage suppressor and snubber TJ should be less than the TJ(MAX) specification. are recommended to clip off large spikes and reduce the ringing. For supply voltages of 6V or below, a snubber Next review the short-circuit condition under maximum network should be sufficient to protect against transient supply V conditions and maximum current limit, IN(MAX) voltages. In many cases, a simple short-circuit test can I during the circuit breaker time-out interval LIMIT(MAX) be performed to determine the need of the transient volt- of t with the maximum safe operating area of CBDELAY age suppressor. the MOSFET. The operation during output short-circuit conditions must be well within the manufacturer’s recom- mended safe operating region with sufficient margin. To OVERVOLTAGE DETECTION USING THE TIMER PIN ensure a reliable design, fault tests should be evaluated Figure 11 shows a supply side overvoltage detection in the laboratory. circuit. A Zener diode, a diode and COMP2 threshold sets the overvoltage threshold. Resistor RB biases the Zener VIN TRANSIENT PROTECTION diode voltage. Diode D1 blocks forward current in the Zener during start-up or output short-circuit. R with Unlike most circuits, hot swap controllers typically are not TIMER C sets the overload noise filter. allowed the good engineering practice of supply bypass TIMER 421012fa 18 For more information www.linear.com/LTC4210-1

LTC4210-1/LTC4210-2 APPENDIX Table 2 lists some current sense resistors that can be subject to change, please verify the part numbers with used with the circuit breaker. Table 3 lists some power the manufacturer. MOSFETs that are available. Since this information is Table 2. Sense Resistor Selection Guide CURRENT LIMIT VALUE PART NUMBER DESCRIPTION MANUFACTURER 1A LR120601R050 0.05Ω 0.5W 1% Resistor IRC-TT 2A LR120601R025 0.025Ω 0.5W 1% Resistor IRC-TT 2.5A LR120601R020 0.02Ω 0.5W 1% Resistor IRC-TT 3.3A WSL2512R015F 0.015Ω 1W 1% Resistor Vishay-Dale 5A LR251201R010F 0.01Ω 1.5W 1% Resistor IRC-TT 10A WSR2R005F 0.005Ω 2W 1% Resistor Vishay-Dale Table 3. N-Channel Selection Guide CURRENT LEVEL (A) PART NUMBER DESCRIPTION MANUFACTURER 0 to 2 MMDF3N02HD Dual N-Channel SO-8 ON Semiconductor R = 0.1Ω, C = 455pF DS(ON) ISS 2 to 5 MMSF5N02HD Single N-Channel SO-8 ON Semiconductor R = 0.025Ω, C = 1130pF DS(ON) ISS 5 to 10 MTB50N06V Single N-Channel DD Pak ON Semiconductor R = 0.028Ω, C = 1570pF DS(ON) ISS 10 to 20 MTB75N05HD Single N-Channel DD Pak ON Semiconductor R = 0.0095Ω, C = 2600pF DS(ON) ISS 421012fa 19 For more information www.linear.com/LTC4210-1

LTC4210-1/LTC4210-2 PACKAGE DESCRIPTION Please refer to http://www.linear.com/product/LTC4210-1#packaging for the most recent package drawings. S6 Package 6-Lead Plastic TSOT-23 (Reference LTC DWG # 05-08-1636) 2.90 BSC 0.62 0.95 (NOTE 4) MAX REF 1.22 REF 1.50 – 1.75 3.85 MAX 2.62 REF 1.4 MIN 2.80 BSC (NOTE 4) PIN ONE ID RECOMMENDED SOLDER PAD LAYOUT 0.30 – 0.45 0.95 BSC PER IPC CALCULATOR 6 PLCS (NOTE 3) 0.80 – 0.90 0.20 BSC 0.01 – 0.10 1.00 MAX DATUM ‘A’ 0.30 – 0.50 REF 1.90 BSC 0.09 – 0.20 (NOTE 3) S6 TSOT-23 0302 NOTE: 1. DIMENSIONS ARE IN MILLIMETERS 2. DRAWING NOT TO SCALE 3. DIMENSIONS ARE INCLUSIVE OF PLATING 4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR 5. MOLD FLASH SHALL NOT EXCEED 0.254mm 6. JEDEC PACKAGE REFERENCE IS MO-193 421012fa 20 For more information www.linear.com/LTC4210-1

LTC4210-1/LTC4210-2 REVISION HISTORY REV DATE DESCRIPTION PAGE NUMBER A 09/16 Updated Order Information. 2 Updated graphs G04 through G09; added graph G26. 4, 6 421012fa 21 Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconnFeocrt iomno orfe it sin cfirocrumitsa atiso dne swcrwibwed.l hineereainr. wcoillm no/Lt iTnCfr4in2g1e 0on-1 existing patent rights.

LTC4210-1/LTC4210-2 TYPICAL APPLICATION 12V Hot Swap Application BACKPLANE PCB EDGE CONNECTOR CONNECTOR (FEMALE) (MALE) RSENSE Q1 VIN LONG 0.01Ω Si4410DY 1V2OVUT 12V Z1 R10XΩ + C47LO0µADF 4A CX 0.1µF 6 5 RG VCC SENSE 4 200Ω RON1 GATE SHORT 62k 3 RC ON LTC4210 100Ω RON2 1 CC 10k TIMER 10nF GND CTIMER 2 LONG 0.22µF GND GND Z1: SMAJ12A 4210 TA03 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTC1421 Two Channel, Hot Swap Controller Operates from 3V to 12V and Supports –12V LTC1422 Single Channel, Hot Swap Controller in SO-8 Operates from 2.7V to 12V, Reset Output LT1640AL/LT1640AH Negative Voltage Hot Swap Controller in SO-8 Operates from –10V to –80V LTC1642 Single Channel, Hot Swap Controller Overvoltage Protection to 33V, Foldback Current Limiting LTC1643AL/LTC1643AH PCI Hot Swap Controller 3.3V, 5V, Internal FETs for ±12V LTC1647 Dual Channel, Hot Swap Controller Operates from 2.7V to 16.5V, Separate ON pins for Sequencing LTC4211 Single Channel, Hot Swap Controller 2.5V to 16.5V, Multifunction Current Control LTC4230 Triple Channel, Hot Swap Controller 1.7V to 16.5V, Multifunction Current Control LTC4251 –48V Hot Swap Controller in SOT-23 Floating Supply, Three-Level Current Limiting LTC4252 –48V Hot Swap Controller in MSOP Floating Supply, Power Good, Three-Level Current Limiting LTC4253 –48V Hot Swap Controller with Triple Supply Sequencing Floating Supply, Three-Level Current Limiting 421012fa 22 Linear Technology Corporation LT 0916 REV A • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 For more information www.linear.com/LTC4210-1 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com/LTC4210-1  LINEAR TECHNOLOGY CORPORATION 2002

Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: A nalog Devices Inc.: LTC4210-1IS6#TR LTC4210-2IS6#PBF LTC4210-1CS6 LTC4210-2IS6#TRMPBF LTC4210-1IS6#TRPBF LTC4210-1IS6#TRM LTC4210-1IS6 LTC4210-2CS6 LTC4210-2CS6#TR LTC4210-2IS6#TRPBF LTC4210- 1CS6#PBF LTC4210-1CS6#TRMPBF LTC4210-2CS6#PBF LTC4210-1CS6#TR LTC4210-2CS6#TRMPBF LTC4210-1IS6#PBF LTC4210-2CS6#TRPBF LTC4210-2IS6 LTC4210-1CS6#TRM LTC4210-2IS6#TR LTC4210- 1IS6#TRMPBF LTC4210-1CS6#TRPBF LTC4210-2IS6#TRM LTC4210-2CS6#TRM