LTC4071 Li-Ion/Polymer Shunt Battery Charger System with Low Battery Disconnect FeaTures DescripTion n Charger Plus Pack Protection in One IC The LTC®4071 allows simple charging of Li-Ion/Polymer n Low Operating Current (550nA) batteries from very low current, intermittent or continuous n Near Zero Current (<0.1nA) Low Battery Disconnect charging sources. A near-zero current low battery latch- Function to Protect Batteries from Over-Discharge ing disconnect function protects even the lowest capacity n Pin Selectable Low Battery Disconnect Level: batteries from deep discharge and potentially irreparable 2.7V or 3.2V damage. The 550nA to 50mA operating current makes n 1% Float Voltage Accuracy Over Temperature charging possible from previously unusable sources. With n 50mA Maximum Internal Shunt Current its low operating current the LTC4071 is well suited to n Pin Selectable Float Voltage Options: 4.0V, 4.1V, 4.2V charge low capacity Li-Ion or thin film batteries in energy n Ultralow Power Pulsed NTC Float Conditioning for harvesting applications. The unique architecture of the Li-Ion/Polymer Protection LTC4071 allows for an extremely simple battery charger n Suitable for Intermittent, Continuous and Very Low solution, requiring just one external resistor. Power Charging Sources The LTC4071 offers a pin selectable float voltage with ±1% n High Battery Status Output accuracy. The integrated thermal battery qualifier extends n Thermally Enhanced, Low Profile (0.75mm) battery lifetime and improves reliability by automatically 8-Lead (2mm × 3mm) DFN and MSOP Packages reducing the battery float voltage at NTC thermistor tem- peratures above 40°C. The LTC4071 also provides two applicaTions pin selectable low battery disconnect levels and a high battery status output. n Low Capacity, Li-Ion/Polymer Battery Back-Up The device is offered in two thermally enhanced packages, n Thin Film Batteries a compact low profile (0.75mm) 8-lead (2mm × 3mm) n Energy Scavenging/Harvesting DFN and an 8-lead MSOP package. n Solar Power Systems with Back-Up n Memory Back-Up L, LT, LTC, LTM, Linear Technology, the Linear logo and Burst Mode are registered trademarks and ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the n Embedded Automotive property of their respective owners. Typical applicaTion Battery Disconnect I vs Temperature LEAK VIN 100n VBAT = 2.65V RIN 10n TO SYSTEM LOAD: VCC 1n ADJ VCC BAT A) NTC LTC4071 (K100p A 1µF ILE 10p + LBSEL GND Li-Ion 1p 4071 TA01a 0.1p –25 0 25 50 75 100 125 TEMPERATURE (°C) 4071 TA01b 4071fc 1

LTC4071 absoluTe MaxiMuM raTings (Notes 1, 2) I , I .............................................±60mA Continuous LBSEL Voltage .............................................–0.3V to 6V CC BAT I ...............................400mA for Single Pulse < 10ms Operating Junction Temperature Range ..–40°C to 125°C BAT I ...............................–400mA for Single Pulse < 10ms Storage Temperature Range ..................–65°C to 150°C CC ADJ, NTC, NTCBIAS, HBO Voltages ..–0.3V to V + 0.3V Peak Reflow Temperature .....................................260°C CC pin conFiguraTion TOP VIEW TOP VIEW NTCBIAS 1 8 VCC NTCBIAS 1 8VCC NTC 2 9 7 BAT NTC 2 9 7BAT ADJ 3 GND 6 GND ADJ 3 GND 6GND HBO 4 5LBSEL HBO 4 5 LBSEL MS8E PACKAGE 8-LEAD PLASTIC MSOP DDB PACKAGE TJMAX = 125°C, θJA = 40°C/W 8-LEAD (3mm × 2mm) PLASTIC DFN EXPOSED PAD (PIN 9) IS NOT INTERNALLY CONNECTED, TJMAX = 125°C, θJA = 76°C/W MUST BE SOLDERED TO PCB, GND TO OBTAIN θJA EXPOSED PAD (PIN 9) IS NOT INTERNALLY CONNECTED, MUST BE SOLDERED TO PCB, GND TO OBTAIN θJA orDer inForMaTion LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LTC4071EDDB#PBF LTC4071EDDB#TRPBF LFXF 8-Lead (3mm × 2mm) Plastic DFN –40°C to 125°C LTC4071IDDB#PBF LTC4071IDDB#TRPBF LFXF 8-Lead (3mm × 2mm) Plastic DFN –40°C to 125°C LTC4071EMS8E#PBF LTC4071EMS8E#TRPBF LTFXG 8-Lead Plastic MSOP –40°C to 125°C LTC4071IMS8E#PBF LTC4071IMS8E#TRPBF LTFXG 8-Lead Plastic MSOP –40°C to 125°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ elecTrical characTerisTics The l denotes the specifications which apply over the full operating junction temperature range. Conditions are V = V = V , V = GND, T = 25°C unless otherwise specified. Current into a pin NTC ADJ CC LBSEL A is positive and current out of a pin is negative. All voltages are referenced to GND unless otherwise noted. (Note 2) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V Programmable Float Voltage V = 0V, 0°C < Temp < 125°C 3.96 4.0 4.04 V FLOAT ADJ 10µA ≤ I ≤ 25mA V = 0V l 3.88 4.0 4.04 V CC ADJ V = Float, 0°C < Temp < 125°C 4.06 4.1 4.14 V ADJ V = Float l 3.98 4.1 4.14 V ADJ V = V , 0°C < Temp < 125°C 4.16 4.2 4.24 V ADJ CC V = V l 4.07 4.2 4.24 V ADJ CC I Maximum Shunt Current V > V l 50 mA CCMAX CC FLOAT I V Operating Current V Low, ADJ = V l 550 1200 nA CCQ CC HBO CC 4071fc 2

LTC4071 elecTrical characTerisTics The l denotes the specifications which apply over the full operating junction temperature range. Conditions are V = V = V , V = GND, T = 25°C unless otherwise specified. Current into a pin NTC ADJ CC LBSEL J is positive and current out of a pin is negative. All voltages are referenced to GND unless otherwise noted. (Note 2) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Low Battery Disconnect I Battery Disconnect Leakage V < V = 2.65V l 0.01 25 nA LEAK CC BAT Current 0.01 nA R Resistance of V – BAT Switch I = –1mA, V High 4 6 Ω DSON CC BAT HBO V Low Battery Disconnect V Falling, I = –1mA, LBSEL = V , 0°C < Temp < 125°C 2.60 2.70 2.79 V LBD BAT BAT CC V Falling, I = –1mA, LBSEL = V l 2.52 2.70 2.79 V BAT BAT CC V Falling, I = –1mA, LBSEL = GND, 0°C < Temp < 125°C 3.05 3.20 3.28 V BAT BAT V Falling, I = –1mA, LBSEL = GND l 2.95 3.20 3.28 V BAT BAT V Low Battery Connect V Rising, I = –1mA, LBSEL = V 2.97 V LBC_BAT BAT BAT CC V Rising, I = –1mA, LBSEL = GND 3.53 V BAT BAT V Low Battery Connect V Rising, LBSEL = V 3.6 V LBC_VCC CC CC V Rising, LBSEL = GND 4.19 V CC High Battery Status V HBO Threshold (V – V ) V Rising l 15 40 75 mV HBTH FLOAT CC CC V Hysteresis 100 mV HBHY Status Output: HBO V CMOS Output Low I = 1mA, V = 3.7V 0.5 V OL SINK CC V CMOS Output High I = –0.5mA, I = 1.5mA V – 0.6 V OH SOURCE CC CC Selection Inputs: ADJ, LBSEL V ADJ V Input Logic Low Level l 0.3 V ADJ_IL IL V ADJ V Input Logic High Level l V – 0.3 V ADJ_IH IH CC I Allowable ADJ Leakage Current l ±3 µA ADJ(Z) in Floating State V LBSEL V Input Logic Low Level l 250 mV LBSEL_IL IL V LBSEL V Input Logic High Level l 1.4 V LBSEL_IH IH I LBSEL Leakage Current 0 ≤ LBSEL ≤ V l –5 0 5 nA LBSEL CC NTC I NTC Leakage Current 0V ≤ NTC ≤ V l –5 0 5 nA NTC CC I Average NTCBIAS Sink Current Pulsed Duty Cycle < 0.002% 30 50 pA NTCBIAS NTC NTC Comparator Falling V as Percentage of V Amplitude 35.5 36.5 38 % TH1 NTC NTCBIAS Thresholds NTC 28.0 29.0 30.5 % TH2 NTC 21.8 22.8 23.8 % TH3 NTC 16.8 17.8 18.8 % TH4 NTC Hysteresis 30 mV HY ∆V Delta Float Voltage per NTC NTC Falling Below One of the NTC Thresholds FLOAT(NTC) TH Comparator Step ADJ = 0V –57 –50 –43 mV ADJ = Floating –82 –75 –68 mV ADJ = V –107 –100 –93 mV CC Note 1: Stresses beyond those listed under Absolute Maximum Ratings –40°C to 125°C operating junction temperature range are assured by may cause permanent damage to the device. Exposure to any Absolute design, characterization and correlation with statistical process controls. Maximum Rating condition for extended periods may affect device The LTC4071I is guaranteed over the full –40°C to 125°C operating reliability and lifetime. junction temperature range. Note that the maximum ambient temperature Note 2: The LTC4071 is tested under pulsed load conditions such that consistent with these specifications is determined by specific operation T ≈ T . The LTC4071E is guaranteed to meet performance specifications conditions in conjunction with board layout, the rated package thermal J A for junction temperatures from 0°C to 85°C. Specifications over the impedance and other environmental factors. 4071fc 3

LTC4071 Typical perForMance characTerisTics T = 25°C, unless otherwise noted. A LBD/LBC vs Temperature LBD/LBC vs Temperature LBC vs IBAT (LBSEL = GND) (LBSEL = VCC) 4.3 4.2 3.7 4.1 LBSEL = GND 4.0 ANDTCJ == VNCTCCBIAS LBC_VCC 3.5 ADJ = VCC LBC_VCC NTC = NTCBIAS 3.9 IBAT = –1mA IBAT = –1mA V) V) 3.8 V) 3.3 BC_V (CC 33..57 LBSEL = VCC BD/LBC ( 3.6 LBC_BAT BD/LBC ( 3.1 LBC_BAT L L L 3.4 2.9 3.3 LBD 3.1 3.2 LBD 2.7 2.9 3.0 2.5 0.01 0.1 1 10 100 –50 –25 0 25 50 75 100 125 –50 –25 0 25 50 75 100 125 IBAT (mA) TEMPERATURE (°C) TEMPERATURE (°C) 4071 G01 4071 G02 4071 G03 R vs Temperature I vs V I vs Temperature DS(ON) CC CC CCQ 5.5 2000 1000 ADJ = VCC ADJ = VCC 1800 LBSEL = VCC 900 LBSEL = VCC NTC = NTCBIAS NTC = NTCBIAS 5.0 1600 125°C RISING HBO LOW 1400 125°C FALLING 800 R (Ω)DS(ON) 44..05 I (nA)CC11802000000 22––5544°°55CC°°CC RF ARFISALISILLNIILNNGINGGG I (nA)CCQ760000 600 500 3.5 400 400 200 3.0 0 300 –50 –25 0 25 50 75 100 125 0 0.5 1 1.5 2 2.5 3 3.5 4.0 –50 –25 0 25 50 75 100 125 TEMPERATURE (°C) VCC (V) TEMPERATURE (°C) 4071 G04 4071 G05 4071 G06 HBO Thresholds vs Temperature V vs Temperature Load Regulation F 250 4.25 4.125 ALBDSJ E=L V =C VCCC LNBTSCE =L N=T VCCBCIAS ADJ = VCC ANDTCJ == FNLTOCABTIAS 200 NTC = NTCBIAS 4.20 4.120 LBSEL = VCC V) 4.15 4.115 m 150 TH/HY ( HBOHY V (V)F4.10 ADJ = FLOAT V (V)CC4.110 O 100 B H 4.05 4.105 HBOTH ADJ = GND 50 4.00 4.100 0 3.95 4.095 –50 –25 0 25 50 75 100 125 –50 –25 0 25 50 75 100 125 0 10 20 30 40 50 60 TEMPERATURE (°C) TEMPERATURE (°C) ICC (mA) 4071 G07 4071 G08 4071 G09 4071fc 4

LTC4071 Typical perForMance characTerisTics T = 25°C, unless otherwise noted. A MP1 Body Diode HBO V HBO V OH OL 1.0 2000 1200 VCC = 3.5V LBSEL = VCC LBSEL = VCC 0.9 LBSEL = GND 1800 NTC = NTCBIAS NTC = NTCBIAS 0.8 1600 ADJ = GND 900 0.7 1400 V – V (V)CCBAT 000...546 – V (mV)CCHBO 11802000000 ADJ = VCC V (mV)OL 600 VCC V=C 3C. 6=V 4.0V V 0.3 600 300 125°C 0.2 400 85°C 0.1 25°C 200 –45°C 0 0 0 0.01 0.1 1 10 100 0 0.5 1 1.5 2 2.5 0 1 2 3 4 5 6 IBAT (mA) ISOURCE (mA) ISINK (mA) 4071 G10 4071 G11 4071 G12 LBSEL V /V vs Temperature V vs NTC Temperature IL IH F 1400 4.25 4.20 ADJ = VCC 1200 VIH 4.15 1000 4.10 ADJ = FLOAT V) 4.05 m 800 V/V (ILIH 600 VIL V (V)F34..9050 ADJ = GND 400 3.90 3.85 200 3.80 LBSEL = VCC 0 3.75 –50 –25 0 25 50 75 100 125 0 20 40 60 80 100 TEMPERATURE (°C) NTC TEMPERATURE (°C) 4071 G13 4071 G14 NTCBIAS Pulse Width vs Temperature NTCBIAS Period vs Temperature 250 7 6 200 5 s) TH (µ 150 SEC) 4 WID HBO LOW OD ( HBO LOW ULSE 100 PERI 3 P 2 50 HBO HIGH HBO HIGH 1 0 0 –50 –25 0 25 50 75 100 125 –50 –25 0 25 50 75 100 125 TEMPERATURE (°C) TEMPERATURE (°C) 4071 G15 4071 G16 4071fc 5

LTC4071 pin FuncTions NTCBIAS (Pin 1): NTC Bias Pin. Connect a resistor from falls by more than (V + V ) below the effective HBTH HBHY NTCBIAS to NTC, and a thermistor from NTC to GND. Float float voltage. Refer to Table 1 for the effective float voltage. NTCBIAS when not in use. Minimize parasitic capacitance LBSEL (Pin 5): Low Battery Disconnect Select Pin. Con- on this pin. nect LBSEL to GND to select a low battery disconnect NTC (Pin 2): Input to the Negative Temperature Coefficient level of 3.2V, connect LBSEL to V to select a low battery CC Thermistor Monitoring Circuit. The NTC pin connects to disconnect level of 2.7V. Do not float. a negative temperature coefficient thermistor which is GND (Pin 6, Exposed Pad Pin 9): Ground. The exposed typically co-packaged with the battery to determine the package pad has no internal electrical connection but must temperature of the battery. If the battery temperature is too be connected to PCB ground for maximum heat transfer. high, the float voltage is reduced. Connect a low drift bias resistor from NTCBIAS to NTC and a thermistor from NTC BAT (Pin 7): Battery Pin. Battery charge current is sourced to GND. When not in use, connect NTC to VCC. Minimize from VCC through this pin when an external supply is parasitic capacitance on this pin. present. BAT supplies current to VCC from this pin when no other source of power is available. If BAT falls below ADJ (Pin 3): Float Voltage Adjust Pin. Connect ADJ to GND V this pin disconnects the battery from V protecting LBD CC to program 4.0V float voltage. Disconnect ADJ to program the battery from discharge by the load when no external 4.1V float voltage. Connect ADJ to V to program 4.2V CC power supply is present. float voltage. The float voltage is also adjusted by the NTC thermistor. VCC (Pin 8): Input Supply Pin. Attach system load to this pin. The input supply voltage is regulated to 4.0V, 4.1V, HBO (Pin 4): High Battery Monitor Output (Active High). or 4.2V depending on the ADJ pin state (see the ADJ pin HBO is a CMOS output that indicates that the battery is description for more detail). This pin can sink up to 50mA almost fully charged and current is being shunted away in order to keep the voltage regulation within accuracy from V . This pin is driven high when V rises to within CC CC limits. Decouple to GND with a capacitor, C , of at least IN V of the effective float voltage, V . The absolute HBTH FLOAT_EFF 0.1µF, use a larger decoupling cap to handle high peak value of this threshold depends on ADJ and NTC both of load currents. which affect the float voltage. HBO is driven low when V CC 4071fc 6

LTC4071 block DiagraM VIN LTC4071 VCC RIN SYSTEM ADJ 3-STATE LOAD PULSED DETECT DUTY CYCLE = 0.003% 30µs – 200µs BODY CLK + DIODE 0.9sec – 7sec OSC NTCBIAS – BAT MP1 RNOM 10k NTC ADC + T 10k LBSEL LBSEL MUST BE TIED TO VCC OR GND Li-Ion BATTERY HBO + – 1.2V 1.2V +EA MP2 – GND 4071 BD operaTion The LTC4071 provides a simple, reliable, and high per- enough for V to reach V to ensure that MP1 turns CC LBC_VCC formance battery protection and charging solution by on. The user may detect the connected state by observing preventing the battery voltage from exceeding a pro- periodic pulses at the NTCBIAS pin that only occur once grammed level. Its shunt architecture requires just one V has risen above V , and cease once V falls CC LBC_VCC CC resistor from the input supply to charge and protect the below V . Depending on the capacity of the battery and LBD battery in a wide range of battery applications. When the the input decoupling capacitor, the V voltage generally CC input supply is removed and the battery voltage is below falls to V when MP1 turns on; rather than V rising BAT BAT the high battery output threshold, the LTC4071 consumes to V . The internal PFET then reconnects the battery to CC just 550nA from the battery. If the battery voltage falls V and the charge rate is determined by the input voltage, CC below the programmable low battery disconnect level, the battery voltage, and the input resistor: the battery disconnects from V , protecting the battery CC (V −V ) from over-discharge either by the load connected to VCC I = IN BAT CHG or from the LTC4071 quiescent current. RIN When an input supply is present the battery charges As the battery voltage approaches the float voltage, the through the body diode of the internal disconnect PFET, LTC4071 shunts current away from the battery thereby MP1, until the battery voltage rises above the low- reducing the charge current. The LTC4071 can shunt up to battery connect threshold. Select an input voltage large 50mA. The shunt current limits the maximum charge current. 4071fc 7

LTC4071 operaTion In cases where the input supply may be shorted to GND Table 1. NTC Qualified Float Voltage when not supplying power, for example with a solar cell, add V AS % OF NTC a diode in series with R to prevent the input from loading ADJ ∆VFLOAT(NTC) TEMPERATURE NTCBIAS VFLOAT_EFF IN the battery. For more information, refer to the photovoltaic GND 50mV T < 40°C VNTC > 36.5 4.000 40°C ≤ T < 50°C 29.0 < V ≤ 36.5 3.950 NTC charger example in the Applications Information section. 50°C ≤ T < 60°C 22.8 < V ≤ 29.0 3.900 NTC 60°C ≤ T < 70°C 17.8 < V ≤ 22.8 3.850 NTC 70°C < T V ≤ 17.8 3.800 Adjustable Float Voltage, V NTC FLOAT Floating 75mV T < 40°C V > 36.5 4.100 NTC A built-in 3-state decoder connected to the ADJ pin pro- 40°C ≤ T < 50°C 29.0 < V ≤ 36.5 4.025 NTC 50°C ≤ T < 60°C 22.8 < V ≤ 29.0 3.950 vides three programmable float voltages: 4.0V, 4.1V, or NTC 60°C ≤ T < 70°C 17.8 < V ≤ 22.8 3.875 NTC 4.2V. The float voltage is programmed to 4.0V when ADJ 70°C < T V ≤ 17.8 3.800 NTC is tied to GND, 4.1V when ADJ is floating (disconnected), V 100mV T < 40°C V > 36.5 4.200 CC NTC and 4.2V when ADJ is tied to VCC. The state of the ADJ 40°C ≤ T < 50°C 29.0 < VNTC ≤ 36.5 4.100 50°C ≤ T < 60°C 22.8 < V ≤ 29.0 4.000 pin (and NTC pins) is sampled for about 36µs about once NTC 60°C ≤ T < 70°C 17.8 < V ≤ 22.8 3.900 NTC every 1.2 seconds when HBO is high, and when HBO is 70°C < T V ≤ 17.8 3.800 NTC low the sampling rate reduces to about once every 3.6 seconds with the same duty cycle. If V falls below CC For all ADJ pin settings the lowest float voltage setting is: V , the sampling stops. When it is being sampled, the LBD LTC4071 applies a relatively low impedance voltage at the 3.8V = VFLOAT_MIN = VFLOAT – 4 • ∆VFLOAT(NTC). ADJ pin. This technique prevents low level board leakage This occurs at NTC thermistor temperatures above 70°C, from corrupting the programmed float voltage. or if the NTC pin is grounded. NTC Qualified Float Voltage, ∆V To conserve power in the NTCBIAS and NTC resistors, the FLOAT(NTC) NTCBIAS pin is sampled at a low duty cycle at the same The NTC pin voltage is compared against an internal time that the ADJ pin state is sampled. resistor divider tied to the NTCBIAS pin. This divider has tap points that are matched to the NTC thermistor resis- High Battery Status Output: HBO tance/temperature conversion table for a Vishay curve 2 thermistor at temperatures of 40°C, 50°C, 60°C, and 70°C. The HBO pin pulls high when VCC rises to within VHBTH The curve 2 thermistor is also designated by a B25/85 of the programmed float voltage, VFLOAT_EFF, including value of 3490. NTC qualified float voltage adjustments assuming VCC has risen above V . LBC_VCC Battery temperature conditioning adjusts the float voltage down to VFLOAT_EFF when the NTC thermistor indicates If VCC drops below the float voltage by more than VHBTH + that the battery temperature is too high. For a 10k curve 2 V the HBO pin pulls low to indicate that the battery is HBHY thermistor and a 10k NTCBIAS resistor, each 10°C increase not at full charge. The input supply current to the LTC4071 in temperature above 40°C causes the float voltage to drop drops to less than 550nA (typ) as the LTC4071 no longer by a fixed amount, ∆V , depending on ADJ. If ADJ shunts current to protect the battery. And the NTCBIAS FLOAT(NTC) is at GND, the float voltage steps down by 50mV for each sample clock slows to conserve power. 10°C temperature increment. If ADJ is floating, the step For example, if the NTC thermistor requires the float voltage size is 75mV. And if ADJ is at V , the step size is 100mV. CC to be dropped by 100mV (ADJ = V and 0.29•V CC NTCBIAS Refer to Table 1 for the range of V programming. FLOAT_EFF < V < 0.36•V ) then the HBO rising threshold NTC NTCBIAS is detected when V rises past: CC V – ∆V – V FLOAT FLOAT(NTC) HBTH = 4.2V – 100mV – 40mV = 3.96V. 4071fc 8

LTC4071 operaTion Low Battery Disconnect/Connect: LBD/LBC Low Battery Select: LBSEL The low battery disconnect (V ) and connect (V ) volt- The low battery discharge cutoff voltage level is pro- LBD LBC age levels are programmed by the LBSEL pin. As shown grammed by the LBSEL pin. in the Block Diagram the battery disconnects from V by CC The LBSEL pin allows the user to trade-off battery run- shutting off MP1 when the BAT voltage falls below V . LBD time and maximum shelf life. A lower battery disconnect This disconnect function protects Li-Ion batteries from threshold maximizes run time by allowing the battery to permanent damage due to deep discharge. If the voltage fully discharge before the disconnect event. Conversely, of a Li-Ion cell drops below a certain level, the cell may be by increasing the low battery disconnect threshold more permanently damaged. Disconnecting the battery from V CC capacity remains following the disconnect event which prevents the load at V as well as the LTC4071 quiescent CC extends the shelf life of the battery. For maximum run current from further discharging the battery. time, tie LBSEL to V so that the battery disconnects at CC Once disconnected the V voltage collapses towards V = 2.7V. For extended shelf life, tie LBSEL to GND so CC CC ground. When an input supply is reconnected the bat- that the battery disconnects at V = 3.2V. If a high peak CC tery charges through the internal body diode of MP1. current event is expected, users may temporarily select The input supply voltage should be larger than V the lower disconnect threshold. This avoids disconnect- LBC_VCC to ensure that MP1 is turned on. When the V voltage ing the battery too early when the load works against the CC reaches V , MP1 turns on and connects V and battery series resistance and temporarily reduces V . LBC_VCC CC CC BAT. While disconnected, the BAT pin voltage is indirectly sensed through MP1’s body diode. Therefore V varies LBC with charge current and junction temperature. Please see the Typical Performance Characteristics section for more information. 4071fc 9

LTC4071 applicaTions inForMaTion General Charging Considerations Care must be taken in selecting the input resistor. Power dissipated in R under full charge current is given by the The LTC4071 uses a different charging methodology from IN following equation: previous chargers. Most Li-Ion chargers terminate the charging after a period of time. The LTC4071 does not have a discrete charge termination. Extensive measurements (VWALL −VBAT_MIN)2 (12V−3.2V)2 P = = =0.48W on Li-Ion cells show that the cell charge current drops DISS R 162Ω IN to very low levels with the shunt charge control circuit The charge current decreases as the battery voltage effectively terminating the charge. For improved battery increases. If the battery voltage is 40mV less than the lifetime choose 4.0V or 4.1V float voltage. programmed float voltage the LTC4071 consumes only The battery disconnect function requires some care in se- 550nA of current, and all of the excess input current flows lecting the input supply compliance for charging a battery into the battery. As the battery voltage reaches the float while powering a load at V . The internal battery discon- CC voltage, the LTC4071 shunts current from the wall adapter nect switch remains off while charging the battery through and regulates the battery voltage to V = V . The FLOAT CC the body diode of the internal switch until VCC exceeds more shunt current the LTC4071 sinks, the less charge VLBC_VCC. If the source voltage compliance is not greater current the battery gets. Eventually, the LTC4071 shunts than VLBC_VCC, then the battery will never re-connect to all the current flowing through RIN; up to the maximum VCC and the system load will not be able to run on battery shunt current. The maximum shunt current in this case, power. Users may detect that the battery is connected by with no NTC adjustment is determined by the input resistor monitoring the NTCBIAS pin as it will periodically pulse and is calculated as: high once V has risen above V , and stops pulsing CC LBC_VCC (V −V ) (12V−4.1V) once V falls below V . I = WALL FLOAT = =49mA CC LBD SHUNT_MAX R 162Ω IN The simplest application of the LTC4071 is shown in Fig- At this point the power dissipated in the input resistor is ure 2. This application requires only an external resistor 388mW. to program the charge/shunt current. Assume the wall The LTC4071 can also be used to regulate series-connected RIN = 162Ω, 0.5W battery stacks as illustrated in Figure 3. Here two LTC4071 devices are used to charge two batteries in series. A WALL ADAPTER VCC BAT single resistor sets the maximum charge/shunt current. LTC4071 RIN WALL 1µF +Li-Ion ADAPTER GND BATTERY VCC BAT LTC4071 4071 F02 1µF +Li-Ion Figure 2. Single-Cell Battery Charger BATTERY GND adapter voltage (V ) is 12V and the maximum charge WALL VCC BAT current is calculated as: LTC4071 ( ) V −V 1µF I = WALL BAT_MIN +Li-Ion MAX_CHARGE RIN GND BATTERY (12V−3.2V) = =54mA 4071 F03 162Ω Figure 3. 2-Cell Battery Charger 4071fc 10

LTC4071 applicaTions inForMaTion The GND pin of the top device is simply connected to points are shifted due to the higher negative temperature the V pin of the bottom device. Care must be taken in coefficient of the thermistor. To correct for this difference CC observing the HBO status output pin of the top device as add a resistor, R , in series with the thermistor to shift FIX this signal is no longer ground referenced. Likewise for the ratio: the control inputs of the top device; tie ADJ and LBSEL R +R of the top device to the local GND or V pins. Also, the FIX NTC CC (R +R +R ) wall adapter must have a high enough voltage rating to FIX NTC NOM charge both cells. Up to the internal resistive divider tap points: NTC TH1 through NTC . For a 100k thermistor with a B NTC Protection TH4 25/85 value of 3950, e.g. NTHS0402N01N1003F, at 70°C (with The LTC4071 measures battery temperature with a negative R = 100k) choose R = 3.92k. The temperature trip NOM FIX temperature coefficient thermistor thermally coupled to the points are found by looking up the curve 1 thermistor R/T battery. NTC thermistors have temperature characteristics values plus R that correspond to the ratios for NTC FIX TH1 which are specified in resistance-temperature conversion = 36.5%, NTC = 29%, NTC = 22.8%, and NTC TH2 TH3 TH4 tables. Internal NTC circuitry protects the battery from = 17.8%. Selecting R = 3.92k results in trip points of FIX excessive heat by reducing the float voltage for each 39.9°C, 49.4°C, 59.2°C and 69.6°C. 10°C rise in temperature above 40°C (assuming a Vishay Another technique may be used without adding an ad- thermistor with a B value of 3490). 25/85 ditional component. Instead decrease R to adjust the NOM The LTC4071 uses a ratio of resistor values to measure NTC thresholds for a given R/T thermistor profile. For TH battery temperature. The LTC4071 contains an internal example, if R = 88.7k (with the same 100k thermis- NOM fixed resistor voltage divider from NTCBIAS to GND with tor) then the temperature trip points are 41.0°C, 49.8°C, four tap points; NTCTH1–NTCTH4. The voltages at these 58.5°C and 67.3°C. tap points are periodically compared against the voltage at When using the NTC features of the LTC4071 it is important the NTC pin to measure battery temperature. To conserve to keep in mind that the maximum shunt current increases power, the battery temperature is measured periodically as the float voltage, V drops with NTC conditioning. by biasing the NTCBIAS pin to V about once every 1.5 FLOAT_EFF CC Reviewing the single-cell battery charger application with seconds. a 12V wall adapter in Figure 2; the input resistor should be The voltage at the NTC pin depends on the ratio of NTC increased to 165Ω such that the maximum shunt current thermistor value, RNTC, and a bias resistor, RNOM. Choose does not exceed 50mA at the lowest possible float voltage RNOM equal to the value of the thermistor at 25°C. RNOM due to NTC conditioning, VFLOAT_MIN = 3.8V. is 10k for a Vishay NTHS0402N02N1002F thermistor with a B value of 3490. R must be connected from Thermal Considerations 25/85 NOM NTCBIAS to NTC. The ratio of the NTC pin voltage to the At maximum shunt current, the LTC4071 may dissipate up NTCBIAS voltage when it is pulsed to V is: CC to 205mW. The thermal dissipation of the package should R NTC be taken into account when operating at maximum shunt (R +R ) current so as not to exceed the absolute maximum junc- NTC NOM tion temperature of the device. With θ of 40°C/W, in the JA When the thermistor temperature rises, the resistance MSOP package, at maximum shunt current of 50mA the drops; and the resistor divider between RNOM and the junction temperature rise is about 8°C above ambient. thermistor lowers the voltage at the NTC pin. With θ of 76°C/W in the DFN package, at maximum JA shunt current of 50mA the junction temperature rise is An NTC thermistor with a different B value may also 25/85 about 16°C above ambient. The junction temperature, T , be used with the LTC4071. However the temperature trip J is calculated depending on ambient temperature, T , power A 4071fc 11

LTC4071 applicaTions inForMaTion dissipation, PD (in W), and θ is the thermal impedance age recovers, as the capacity of the battery should provide JA of the package (in °C/W): roughly 50 hours of use for an equivalent 0.1%•20mA = 20µA load. To prevent load pulses from tripping the low T = T + (PD × θ ). J A JA battery disconnect, add a decoupling capacitor from V to CC The application shown in Figure 4 illustrates how to prevent GND. The size of this capacitor can be calculated based on triggering the low-battery disconnect function under large how much margin is required from the LBD threshold as pulsed loads due to the high ESR of thin-film batteries. well as the amplitude and pulse width of the load transient. For a 1.0mAh battery with a state-of-charge of 3.8V, the RIN SYSTEM LOAD VIN margin from LBD is 600mV with LBSEL tied to GND. For FLOAT ADJ VCC BAT CBYPASS a square-wave load pulse of 20mA with a pulse width of NTCBIAS PULSED 5ms, the minimum size of the decoupling cap required to LTC4071 10k ILOAD hold V above LBD is calculated as follows: CC NTC 20mA • 5ms GND LBSEL T + Li-Ion CBYPASS = =166.6µF 600mV 4071 F04 NTHS0402N02N1002F Take care to select a bypass capacitor with low leakage. Figure 4. Adding a Decoupling Capacitor The LTC4071 can be used to charge a battery to a 4.2V for Large Load Transients float voltage from an AC line with a bridge rectifier as Table 2 lists some thin-film batteries, their capacities shown in the simple schematic in Figure 5. In this example, and their equivalent series resistance. The ESR causes DANGER! HIGH VOLTAGE V and V to droop as a product of the load current BAT CC amplitude multiplied by the ESR. This droop may trigger R1 = 249k R2 = 249k the low-battery disconnect while the battery itself may still have ample capacity. Adding a bypass capacitor to AC 110V MB4S V prevents large low duty cycle load transients from CC pulling down on V . R3 = 249k R4 = 249k CC – + SYSTEM Table 2. Low Capacity Li-Ion and Thin-Film Batteries LOAD VENDOR P/N CAPACITY RESISTANCE V NTC ADJ VCC MIN LTC4071 CYMBET CBC012 12µAh 5k to 10k 3.0V CYMBET CBC050 50µAh 1500Ω to 3k 3.0V FLOAT NTCBIAS BAT +Li-Ion GS NanoTech N/A 500µAh 40Ω 3.0V LBSEL GND BATTERY APS-Autec LIR2025 20mAh 0.75Ω 3.0V 4071 F05 APS-Autec LIR1025 6mAh 30Ω 2.75V IPS MEC225-1P 0.13mAh 210Ω to 260Ω 2.1V DANGEROUS AND LETHAL POTENTIALS ARE PRESENT IN AC IPS MEC220-4P 0.4mAh 100Ω to 120Ω 2.1V LINE-CONNECTED CIRCUITS! BEFORE PROCEEDING ANY FURTHER, THE READER IS WARNED THAT CAUTION MUST BE IPS MEC201-10P 1.0mAh 34Ω to 45Ω 2.1V USED IN THE CONSTRUCTION, TESTING AND USE OF AC LINE-CONNECTED CIRCUITS. EXTREME CAUTION MUST BE IPS MEC202-25P 2.5mAh 15Ω to 20Ω 2.1V USED IN WORKING WITH AND MAKING CONNECTIONS TO GM Battery GMB031009 8mAh 10Ω to 20Ω 2.75V THESE CIRCUITS. ALL TESTING PERFORMED ON AC LINE-CONNECTED CIRCUITS MUST BE DONE WITH AN ISOLATION TRANSFORMER CONNECTED BETWEEN THE AC LINE For example, given a 0.1% duty cycle 5ms load pulse of AND THE CIRCUIT. USERS AND CONSTRUCTORS OF AC 20mA and a 1.0mAh IPS MEC201-10P solid-state thin-film LINE-CONNECTED CIRCUITS MUST OBSERVE THIS PRECAUTION WHEN CONNECTING TEST EQUIPMENT TO THE CIRCUIT TO battery with an equivalent series resistance of 35Ω, the AVOID ELECTRIC SHOCK. voltage drop at V can be as high as 0.7V while the load CC is on. However once the load pulse ends, the battery volt- Figure 5. 4.2V AC Line Charging, UL Leakage Okay 4071fc 12

LTC4071 applicaTions inForMaTion the four input 249k resistors are sized for acceptable UL When V reaches the programmed float voltage (4.1V CC leakage in the event that one of the resistors short. Here, with ADJ floating) then the LTC4071 shunts excess current the LTC4071 will fully charge the battery from the AC line not used by the load, limiting V to 4.1V and effectively CC while meeting the UL specification with 104µA of available reducing the battery charge current to zero. If the PV cells charge current. stop supplying current, the battery supports the load at V through the LTC4071. Add a diode in series with the A simple photovoltaic (PV) application for the LTC4071 CC PV cells to prevent reverse leakage of the PV cells from is illustrated in Figure 6. At low V voltage, PV current CC draining the battery. If the battery discharges to the point flows to both the system at V as well as the battery. CC where V falls below V (3.2V with LBSEL tied to CC LBD GND) the LTC4071 disconnects the load from the battery DS16003 SYSTEM LOAD to protect the battery from over discharge. + ** Typically, solar cells are inherently limited in current, but – this circuit may require a resistor, R , in series with the IN + ** LTC4071 for high current solar cells. Select RIN such that the LTC4071 never needs to shunt more than 50mA. – FLOAT ADJ VCC BAT The simple schematic in Figure 7 illustrates a complete + ** NTCBIAS – 1µF LTC4071 10k piezoelectric energy harvesting application using the NTC LTC4071 to charge and protect Li-Ion cells along with the + ** GND LBSEL + LTC3588-1 to rectify and regulate energy generated from T* Li-Ion – a piezoelectric generator to a fixed 3.3V load. 4071 F06 * NTHS0402N02N1002F ** JAMECO 171061 Figure 6. Simple Photovoltaic Charger MMSD4148T1 15k VCC BAT 22µF 1µF LTC4071 +Li-Ion BATTERY GND LBSEL VIN CAP PFCB-W14 PZ1 10µH 3.3V VCC BAT LTC3588-1 SW SLOYASDTEM VOUT LTC4071 1µF +LBiA-IToTnERY VIN2 PDZ12 VIN2 100µF GND LBSEL D0 GND 4.7µF 4071 F07 Figure 7. Piezoelectric Energy Harvester with Battery Backup 4071fc 13

LTC4071 applicaTions inForMaTion This system has two modes of operation, charging where CURRENT PULSE the batteries are being charged from energy harvested from TO TRIGGER SHIP-MODE the piezoelectric generator while the load is negligible. ADJ VCC BAT And discharging, where the load is pulling current from IPK 1µF NTCBIAS 0 the batteries, but insufficient energy is being harvested LBSEL LTC4071 10k NTC to power the load. GND + T* Li-Ion This application allows the load to periodically draw more current than would otherwise be available from the piezo- *NTHS0402N02N1002F 4071 F08 electric generator by storing excess charge in a stack of two Li-Ion cells. Each Li-Ion cell is protected from over- Figure 8. LTC4071 Ship-Mode Application for Extended Shelf Life charge and over discharge by a LTC4071 shunt regulator. The two LTC4071s regulate V of the LTC3588-1 to 8.2V Ship-mode is triggered by pulling enough current through IN (with both ADJ pins floating) shunting any excess current the LTC4071 so as to drop V below the LBD threshold. CC that is not used by the load once the batteries achieve The current pulse amplitude should be less than 400mA their float voltages. When the load requires more current with a duration of less than 10ms. The peak current neces- than is available from the piezoelectric generator, the sary, I , depends on the equivalent series resistance of PK voltage at V droops and current is supplied from the two the battery, B , summed with the R of the BAT-V IN ESR DSON CC Li-Ion cells to power the step-down switching regulator. FET, the battery voltage, V and the selected disconnect BAT If the load pulls enough current to discharge the batteries voltage, V : LBD below V , the LTC4071s disconnect the batteries, and LBD V −V VIN collapses until the piezoelectric generator resumes I = BAT LBD PK supplying current. R +BESR DSON The application in Figure 8 illustrates how to implement Users may test that ship mode has been triggered by “ship-mode,” where a battery is co-packaged with the simply checking if VCC is at GND and that there are no LTC4071 and then the entire device is latched-off, leaving longer any NTCBIAS pulses. the battery fully charged but with the LTC4071 switched off. Re-activation of the LTC4071 and the battery requires The co-packaged battery and LTC4071 can then be stored either applying power normally, or briefly shorting V CC with a long shelf-life before being activated for normal use. to BAT to turn it on. 4071fc 14

LTC4071 package DescripTion Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. DDB Package 8-Lead Plastic DFN (3mm × 2mm) (Reference LTC DWG # 05-08-1702 Rev B) 0.61 ±0.05 3.00 ±0.10 R = 0.115 0.40 ± 0.10 (2 SIDES) R = 0.05 TYP (2 SIDES) TYP 5 8 0.70 ±0.05 2.55 ±0.05 2.00 ±0.10 1.15 ±0.05 PIN 1 BAR (2 SIDES) PIN 1 TOP MARK R = 0.20 OR PACKAGE (SEE NOTE 6) 0.56 ± 0.05 0.25 × 45° OUTLINE (2 SIDES) 4 1 CHAMFER 0.25 ± 0.05 0.200 REF 0.75 ±0.05 0.25 ± 0.05 (DDB8) DFN 0905 REV B 0.50 BSC 0.50 BSC 2.20 ±0.05 2.15 ±0.05 (2 SIDES) (2 SIDES) 0 – 0.05 RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING CONFORMS TO VERSION (WECD-1) IN JEDEC PACKAGE OUTLINE M0-229 2.DRAWING NOT TO SCALE 3.ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6.SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 4071fc 15

LTC4071 package DescripTion Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. MS8E Package 8-Lead Plastic MSOP, Exposed Die Pad (Reference LTC DWG # 05-08-1662 Rev I) BOTTOM VIEW OF EXPOSED PAD OPTION 1.88 1 (.074) 0.29 (1..08784 ± ± 0 ..010042) 0.889 ± 0.127 1.68 REF (.035 ± .005) (.066) 0.05 REF 5.23 DETAIL “B” (.206) 1.68 ± 0.102 3.20 – 3.45 CORNER TAIL IS PART OF (.066 ± .004) (.126 – .136) MIN DETAIL “B” THE LEADFRAME FEATURE. FOR REFERENCE ONLY 8 NO MEASUREMENT PURPOSE 3.00 ± 0.102 0.65 0.42 ± 0.038 (.0256) (.118 ± .004) 0.52 (.0165 ± .0015) BSC (NOTE 3) 8 7 6 5 (.0205) TYP REF RECOMMENDED SOLDER PAD LAYOUT 3.00 ± 0.102 4.90 ± 0.152 DETAIL “A” (.118 ± .004) 0.254 (.193 ± .006) (NOTE 4) (.010) 0° – 6° TYP GAUGE PLANE 1 2 3 4 0.53 ± 0.152 (.021 ± .006) 1.10 0.86 (.043) (.034) DETAIL “A” MAX REF 0.18 (.007) SEATING PLANE 0.22 – 0.38 0.1016 ± 0.0508 (.009 – .015) (.004 ± .002) 0.65 TYP MSOP (MS8E) 0910 REV I (.0256) NOTE: BSC 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 6. EXPOSED PAD DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL NOT EXCEED 0.254mm (.010") PER SIDE. 4071fc 16

LTC4071 revision hisTory REV DATE DESCRIPTION PAGE NUMBER A 10/10 V specification replaced in Electrical Characteristics section. 3 LBD B 4/11 Updated Vishay thermistor part number. 11, 12, 13, 14, 18 C 10/11 Under Note 2, replaced “=” with “≈”. 3 Updated IPS MFR’s part numbers. 12 Updated the application example. 12 Updated MFR part number on the Typical Application circuit MEC201-10P. 18 4071fc 17 Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

LTC4071 Typical applicaTion Typical Application with 100µF Bypass Capacitor to Support Large Load Pulse 165Ω, 0.5W 5V TO 12V LOW DUTY CYCLE FLOAT ADJ VCC BAT 100µF SYSTEM LOAD NTCBIAS PULSED LTC4071 10k 200mA NTC LOAD GNDLBSEL + GMB031009 T* OR GS NANO OR MEC201-10P tON = 1ms *NTHS0402N02N1002F 4071 TA02 relaTeD parTs PART NUMBER DESCRIPTION COMMENTS LTC3105 400mA Step-Up Converter with 250mV A High Efficiency Step-Up DC/DC Converter That Can Operate from Input Voltage As Start-Up and Maximum Power Point Control Low As 200mV. A 250mV Start-Up Capability and Integrated Maximum Power Point Controller (MPPT) Enables Operation Directly from Low Voltage, High Impedance Alternative Power Sources Such As Photovoltaic Cells, Thermoelectric Generators (TEGs) and Fuel Cells. A User Programmable MPPC Set Point Maximizes the Energy That Can Be Extracted from Any Power Source. Burst Mode® Operation, with a Proprietary Self Adjusting Peak Current, Optimizes Converter Efficiency and Output Voltage Ripple Over All Operating Conditions. LTC3108/ Ultralow Power Step-Up Converter and Power A Highly Integrated DC/DC Converter Ideal for Harvesting and Managing Surplus LTC3108-1 Manager Energy from Extremely Low Input Voltage Sources Such As TEGs (Thermoelectric Generators), Thermopiles and Small Solar Cells. The Step-Up Topology Operates from Input Sources As Low As 20mV. The LTC3108 is Functionally Equivalent to the LTC3108-1 Except for its Unique Fixed V Options. OUT LTC3388 20V High Efficiency Nanopower Step-Down High Efficiency Step-Down DC/DC Converter with Internal High Side and Regulator Synchronous Power Switches, Draws Only 720nA Typical DC Supply Current at No Load. 50mA of Load Current, Accurate UVLO Disables Converter and Maintains Low Quiescent Current State When the Input Voltage Falls Below 2.3V. 10-Lead MSE and 3mm × 3mm DFN Packages. LTC3588-1 Piezoelectric Energy Harvesting Power Supply High Efficiency Hysteretic Integrated Buck DC/DC; 950nA Input Quiescent Current in 3mm × 3mm DFN and MSOP Packages (Output in Regulation – No Load), 520nA Input Quiescent Current in UVLO, 2.6V to 19.2V Input Operating Range; Integrated Low-Loss Full-Wave Bridge Rectifier, Up to 100mA of Output Current, Selectable Output Voltages of 1.8V, 2.5V, 3.3V or 3.6V. LTC4054L Standalone Linear Li-Ion Battery Charger in Low Current Version of LTC4054, 10mA ≤ I ≤ 150mA, Thermal Regulation CHG ThinSOT™ Prevents Overheating, C/10 Termination, with Integrated Pass Transistor. LTC4065L Standalone 250mA Li-Ion Battery Charger in Low Current Version of LTC4065, 15mA ≤ I ≤ 250mA, 4.2V, ±0.6% Float Voltage, CHG 2mm × 2mm DFN High Charge Current Accuracy: 5%. LTC4070 Li-Ion/Polymer Shunt Battery Charger System Low 450nA Operating Current, 50mA Maximum Internal Shunt Current, Boostable to 500mA with External PFET 4071fc 18 Linear Technology Corporation LT 1011 REV C • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com  LINEAR TECHNOLOGY CORPORATION 2010