LTC3786 Low I Synchronous Q Boost Controller FEATURES DESCRIPTION n Synchronous Operation For Highest Efficiency and The LTC®3786 is a high performance synchronous boost Reduced Heat Dissipation converter controller that drives all N-channel power n Wide V Range: 4.5V to 38V (40V Abs Max) and MOSFETs. Synchronous rectification increases efficiency, IN Operates Down to 2.5V After Start-Up reduces power losses and eases thermal requirements, n Output Voltages Up to 60V allowing the LTC3786 to be used in high power boost n ±1% 1.2V Reference Voltage applications. n R or Inductor DCR Current Sensing SENSE A 4.5V to 38V input supply range encompasses a wide n 100% Duty Cycle Capability for Synchronous MOSFET range of system architectures and battery chemistries. n Low Quiescent Current: 55µA When biased from the output of the boost converter or n Phase-Lockable Frequency (75kHz to 850kHz) another auxiliary supply, the LTC3786 can operate from n Programmable Fixed Frequency (50kHz to 900kHz) an input supply as low as 2.5V after start-up. The 55µA n Adjustable Output Voltage Soft-Start no-load quiescent current extends operating run time in n Power Good Output Voltage Monitor battery-powered systems. n Low Shutdown Current I : <8µA Q n Internal 5.4V LDO for Gate Drive Supply The operating frequency can be set for a 50kHz to 900kHz n Thermally Enhanced 16-Pin 3mm × 3mm QFN and range or synchronized to an external clock using the MSOP Packages internal PLL. The LTC3786 also features a precision 1.2V reference and a power good output indicator. The SS pin APPLICATIONS ramps the output voltage during start-up. The PLLIN/MODE pin selects among Burst Mode® operation, pulse-skipping n Industrial and Automotive Power Supplies mode or continuous inductor current mode at light loads. n Automotive Start-Stop Systems n Medical Devices All registered trademarks and trademarks are the property of their respective owners. n High Voltage Battery-Powered Systems TYPICAL APPLICATION 12V to 24V/5A Synchronous Boost Converter Efficiency and Power Loss VIN 4.5V TO 24V vs Load Current VBIAS 100 10000 SENSE+ 90 LTC3786 4mΩ 220µF BURST 80 1000 PGOOD SENSE– EFFICIENCY BURST PLLIN/MODE 3.3µH %) 70 LOSS POW RUN Y ( 60 100 ER 0.1µF FREQ TG VOUT CIENC 50 LOSS 15nF 8.66k SS SW 0.1µF 220µF 254AV EFFI 4300 10 (mW) ITH BOOST 220pF 20 VIN = 12V 1 BG VOUT = 24V 12.1k 10 Burst Mode OPERATION VFB INTVCC 0 FIGURE 8 CIRCUIT 0.1 4.7µF 0.000010.0001 0.001 0.01 0.1 1 10 232k GND OUTPUT CURRENT (A) 3786 TA01a 3786 TA01b 3786fc 1 For more information www.linear.com/LTC3786

LTC3786 ABSOLUTE MAXIMUM RATINGS (Notes 1, 3) VBIAS ........................................................–0.3V to 40V SENSE+, SENSE– ........................................–0.3V to 40V BOOST ........................................................–0.3V to 71V SENSE+ – SENSE– .....................................–0.3V to 0.3V SW .............................................................–0.3V to 65V SS, ITH, FREQ, VFB...............................–0.3V to INTV CC RUN .............................................................–0.3V to 8V Operating Junction Temperature Range (Notes 2, 3) Maximum Current Sourced into Pin LTC3786E, LTC3786I ..........................–40°C to 125°C from Source >8V ..............................................100µA LTC3786H ...........................................–40°C to 150°C PGOOD, PLLIN/MODE ..................................–0.3V to 6V Storage Temperature Range ....................–65°C to 150°C INTV , (BOOST – SW) ...............................–0.3V to 6V Lead Temperature (Soldering, 10 sec) CC MSE Package Only ............................................300°C PIN CONFIGURATION TOP VIEW TOP VIEW TG BOOST VBIAS INTVCC 16 15 14 13 VFB 1 16 PGOOD SENSE+ 2 15 SW SW 1 12 BG SENSE– 3 14 TG PGOOD 2 17 11 GND ITH 4 17 13 BOOST SS 5 GND 12 VBIAS VFB 3 GND 10 RUN PLLIN/MODE 6 11 INTVCC SENSE+ 4 9 FREQ FREQ 7 10 BG RUN 8 9 GND 5 6 7 8 TJMAX =1 615-L0E°MCAS,D θE PJ APL A=AC S4K0TA°ICCG /EMW,S θOJCP = 10°C/W –SENSE ITH SS PLLIN/MODE EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB UD PACKAGE 16-LEAD (3mm × 3mm) PLASTIC QFN TJMAX = 150°C, θJA = 68°C/W, θJC = 4.2°C/W EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB ORDER INFORMATION http://www.linear.com/product/LTC3786#orderinfo LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LTC3786EMSE#PBF LTC3786EMSE#TRPBF 3786 16-Lead Plastic MSOP –40°C to 125°C LTC3786IMSE#PBF LTC3786IMSE#TRPBF 3786 16-Lead Plastic MSOP –40°C to 125°C LTC3786HMSE#PBF LTC3786HMSE#TRPBF 3786 16-Lead Plastic MSOP –40°C to 150°C LTC3786EUD#PBF LTC3786EUD#TRPBF LFXW 16-Lead (3mm × 3mm) Plastic QFN –40°C to 125°C LTC3786IUD#PBF LTC3786IUD#TRPBF LFXW 16-Lead (3mm × 3mm) Plastic QFN –40°C to 125°C LTC3786HUD#PBF LTC3786HUD#TRPBF LFXW 16-Lead (3mm × 3mm) Plastic QFN –40°C to 150°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix. 3786fc 2 For more information www.linear.com/LTC3786

LTC3786 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating junction temperature range, otherwise specifications are at T = 25°C. V = 12V, unless otherwise noted (Note 2). A BIAS SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Main Control Loop VBIAS Chip Bias Voltage Operating Range 4.5 38 V V Regulated Feedback Voltage I = 1.2V (Note 4) l 1.188 1.200 1.212 V FB TH I Feedback Current (Note 4) ±5 ±50 nA FB V Reference Line Voltage Regulation V = 6V to 38V 0.002 0.02 %/V REFLNREG BIAS V Output Voltage Load Regulation (Note 4) LOADREG Measured in Servo Loop; l 0.01 0.1 % ∆ITH Voltage = 1.2V to 0.7V Measured in Servo Loop; l –0.01 –0.1 % ∆ITH Voltage = 1.2V to 2V g Error Amplifier Transconductance I = 1.2V 2 mmho m TH I Input DC Supply Current (Note 5) Q Pulse-Skipping or Forced Continuous Mode RUN = 5V; V = 1.25V (No Load) 0.8 mA FB Sleep Mode RUN = 5V; V = 1.25V (No Load) 55 80 µA FB Shutdown RUN = 0V 8 20 µA UVLO INTV Undervoltage Lockout Thresholds V Ramping Up l 4.1 4.3 V CC INTVCC V Ramping Down l 3.6 3.8 V INTVCC V RUN Pin On Threshold V Rising l 1.18 1.28 1.38 V RUN RUN V RUN Pin Hysteresis 100 mV RUNHYS I RUN Pin Hysteresis Current V > 1.28V 4.5 µA RUNHYS RUN I RUN Pin Current V < 1.28V 0.5 µA RUN RUN I Soft-Start Charge Current V = 0V 7 10 13 µA SS SS V Maximum Current Sense Threshold V = 1.1V l 68 75 82 mV SENSE(MAX) FB V SENSE Pins Common Mode Range (BOOST 2.5 38 V SENSE(CM) Converter Input Supply Voltage V ) IN I + SENSE+ Pin Current V = 1.1V 200 300 µA SENSE FB I – SENSE– Pin Current V = 1.1V ±1 µA SENSE FB t Top Gate Rise Time C = 3300pF (Note 6) 20 ns r(TG) LOAD t Top Gate Fall Time C = 3300pF (Note 6) 20 ns f(TG) LOAD t Bottom Gate Rise Time C = 3300pF (Note 6) 20 ns r(BG) LOAD t Bottom Gate Fall Time C = 3300pF (Note 6) 20 ns f(BG) LOAD R Top Gate Pull-Up Resistance 1.2 Ω UP(TG) R Top Gate Pull-Down Resistance 1.2 Ω DN(TG) R Bottom Gate Pull-Up Resistance 1.2 Ω UP(BG) R Bottom Gate Pull-Down Resistance 1.2 Ω DN(BG) t Top Gate Off to Bottom Gate On Switch-On C = 3300pF (Each Driver) 80 ns D(TG/BG) LOAD Delay Time t Bottom Gate Off to Top Gate On Switch-On C = 3300pF (Each Driver) 80 ns D(BG/TG) LOAD Delay Time DF Maximum BG Duty Factor 96 % MAXBG t Minimum BG On-Time (Note 7) 110 ns ON(MIN) 3786fc 3 For more information www.linear.com/LTC3786

LTC3786 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating junction temperature range, otherwise specifications are at T = 25°C. V = 12V, unless otherwise noted (Note 2). A BIAS SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS INTV Linear Regulator CC V Internal V Voltage 6V < VBIAS < 38V 5.2 5.4 5.6 V INTVCC(VIN) CC V INT INTV Load Regulation I = 0mA to 50mA 0.5 2 % LDO CC CC Oscillator and Phase-Locked Loop f Programmable Frequency R = 25k 105 kHz PROG FREQ R = 60k 335 400 465 kHz FREQ R = 100k 760 kHz FREQ f Lowest Fixed Frequency V = 0V 320 350 380 kHz LOW FREQ f Highest Fixed Frequency V = INTV 485 535 585 kHz HIGH FREQ CC f Synchronizable Frequency PLLIN/MODE = External Clock l 75 850 kHz SYNC PGOOD Output V PGOOD Voltage Low I = 2mA 0.2 0.4 V PGL PGOOD I PGOOD Leakage Current V = 5V ±1 µA PGOOD PGOOD V PGOOD Trip Level V with Respect to Set Regulated Voltage PG FB V Ramping Negative –12 –10 –8 % FB Hysteresis 2.5 % V Ramping Positive 8 10 12 % FB Hysteresis 2.5 % t PGOOD Delay PGOOD Going High to Low 25 µs PGOOD(DELAY) BOOST Charge Pump I BOOST Charge Pump Available V = 12V; V – V = 4.5V; 85 µA BOOST SW BOOST SW Output Current FREQ = 0V, Forced Continuous or Pulse-Skipping Mode Note 1: Stresses beyond those listed under Absolute Maximum Ratings where θJA = 68°C for the QFN package and θJA = 40°C for the MSOP may cause permanent damage to the device. Exposure to any Absolute package. Maximum Rating condition for extended periods may affect device Note 3: This IC includes overtemperature protection that is intended to reliability and lifetime. protect the device during momentary overload conditions. The maximum Note 2: The LTC3786 is tested under pulsed load conditions such that rated junction temperature will be exceeded when this protection is active. T ≈ T . The LTC3786E is guaranteed to meet specifications from Continuous operation above the specified absolute maximum operating J A 0°C to 85°C junction temperature. Specifications over the –40°C to junction temperature may impair device reliability or permanently damage 125°C operating junction temperature range are assured by design, the device. characterization and correlation with statistical process controls. The Note 4: The LTC3786 is tested in a feedback loop that servos V to the FB LTC3786I is guaranteed over the –40°C to 125°C operating junction output of the error amplifier while maintaining I at the midpoint of the TH temperature range. The LTC3786H is guaranteed over the –40°C to 150°C current limit range. operating temperature range. High temperatures degrade operating Note 5: Dynamic supply current is higher due to the gate charge being lifetimes; operating lifetime is derated for junction temperatures greater delivered at the switching frequency. than 125ºC. Note that the maximum ambient temperature consistent Note 6: Rise and fall times are measured using 10% and 90% levels. Delay with these specifications is determined by specific operating conditions times are measured using 50% levels. in conjunction with board layout, the rated package thermal impedance and other environmental factors. The junction temperature (T in °C) is Note 7: see Minimum On-Time Considerations in the Applications J Information section. calculated from the ambient temperature (T in °C) and power dissipation A (P in Watts) according to the formula: D TJ = TA + (PD • θJA) 3786fc 4 For more information www.linear.com/LTC3786

LTC3786 TYPICAL PERFORMANCE CHARACTERISTICS Efficiency and Power Loss Efficiency and Power Loss vs Output Current vs Output Current 100 10000 100 10000 90 90 BURST 80 1000 80 1000 EFFICIENCY BURST %) 70 POW %) 70 LOSS POW EFFICIENCY ( 465000 CCM EFFICIVVFEIIONGNUC U=TYR =1E 22 8V4 VCIRCUIT 11000 ER LOSS (mW EFFICIENCY ( 645000 11000 ER LOSS (mW 30 CCM LOSS ) 30 ) 20 BURST EFFICIENCY 1 20 VIN = 12V 1 BURST LOSS VOUT = 24V 10 PULSE-SKIPPING EFFICIENCY 10 Burst Mode OPERATION PULSE-SKIPPING LOSS FIGURE 8 CIRCUIT 0 0.1 0 0.1 0.01 0.1 1 10 0.000010.0001 0.001 0.01 0.1 1 10 OUTPUT CURRENT (A) OUTPUT CURRENT (A) 3786 G01 3786 G02 Load Step Load Step Efficiency vs Input Voltage Forced Continuous Mode Burst Mode Operation 100 ILOAD = 2A FIGURE 8 CIRCUIT LOAD STEP LOAD STEP 99 2A/DIV 2A/DIV INDUCTOR INDUCTOR 98 CURRENT CURRENT %) VOUT = 12V VOUT = 24V 5A/DIV 5A/DIV Y ( 97 C FICIEN 96 500mVV/ODUIVT 500mVV/ODUIVT F E 95 VIN = 12V 200µs/DIV 3786 G04 VIN = 12V 200µs/DIV 3786 G05 94 VOUT = 24V VOUT = 24V LOAD STEP FROM 200mA TO 2.5A LOAD STEP FROM 200mA TO 2.5A FIGURE 8 CIRCUIT FIGURE 8 CIRCUIT 93 0 5 10 15 20 25 INPUT VOLTAGE (V) 3786 G03 Load Step Pulse-Skipping Mode Inductor Current at Light Load Soft Start-Up LOAD STEP FORCED 2A/DIV CONTINUOUS INDUCTOR MODE CURRENT VOUT 5A/DIV Burst Mode 5V/DIV OPERATION 5A/DIV VOUT PULSE- 500mV/DIV SKIPPING MODE 0V VIN = 12V 200µs/DIV 3786 G06 VIN = 12V 5µs/DIV 3786 G07 VIN = 12V 2ms/DIV 3786 G08 VOUT = 24V VOUT = 24V VOUT = 24V LOAD STEP FROM 200mA TO 2.5A ILOAD = 200µA FIGURE 8 CIRCUIT FIGURE 8 CIRCUIT FIGURE 8 CIRCUIT 3786fc 5 For more information www.linear.com/LTC3786

LTC3786 TYPICAL PERFORMANCE CHARACTERISTICS Regulated Feedback Voltage Soft-Start Pull-Up Current vs Temperature vs Temperature Shutdown Current vs Temperature 1.212 11.0 12.0 11.5 VIN = 12V V) 1.209 11.0 EEDBACK VOLTAGE ( 111...222000036 RT CURRENT (µA) 1100..05 WN CURRENT (µA) 11889900......050505 ULATED F 11..119947 SOFT-STA 9.5 SHUTDO 677...505 G RE 1.191 6.0 5.5 1.188 9.0 5.0 –45–25 –5 15 35 55 75 95 115135155 –45–25 –5 15 35 55 75 95 115135155 –45–25 –5 15 35 55 75 95 115135155 TEMPERATURE (°C) TEMPERATURE (°C) TEMPERATURE (°C) 3786 G09 3786 G10 3786 G11 Shutdown Current Shutdown (RUN) Threshold vs Input Voltage Quiescent Current vs Temperature vs Temperature 20 80 1.40 VIN = 12V VFB = 1.25V 1.35 70 NT (µA)15 NT (µA) E (V) 1.30 RUN RISING RE RE 60 AG HUTDOWN CUR105 UIESCENT CUR 50 RUN PIN VOLT 11..2205 RUN FALLING S Q 40 1.15 0 30 1.10 0 5 10 15 20 25 30 35 40 –45–25 –5 15 35 55 75 95 115135155 –45–25 –5 15 35 55 75 95 115135155 INPUT VOLTAGE (V) TEMPERATURE (°C) TEMPERATURE (°C) 3786 G12 3786 G13 3786 G14 Undervoltage Lockout Threshold vs Temperature INTV Line Regulation INTV Line Regulation CC CC 4.4 5.5 5.5 NO LOAD NO LOAD 4.3 5.4 5.4 4.2 INTVCC RISING 5.3 5.3 GE (V) 44..01 GE (V) 55..12 GE (V) 55..12 OLTA 3.9 OLTA 5.0 OLTA 5.0 NTV VCC 33..78 INTVCC FALLING NTV VCC44..89 NTV VCC44..98 I I I 3.6 4.7 4.7 3.5 4.6 4.6 3.4 4.5 4.5 –45–25 –5 15 35 55 75 95 115135155 0 5 10 15 20 25 30 35 40 4.5 4.75 5.0 5.25 5.5 5.75 6.0 TEMPERATURE (°C) INPUT VOLTAGE (V) INPUT VOLTAGE (V) 3786 G15 3786 G16 3786 G17 3786fc 6 For more information www.linear.com/LTC3786

LTC3786 TYPICAL PERFORMANCE CHARACTERISTICS Oscillator Frequency INTV vs Load Current INTV vs Load Current vs Temperature CC CC 5.50 5.2 600 VIN = 12V VIN = 5V FREQ = INTVCC 5.45 5.0 550 OLTAGE (V)55..3450 OLTAGE (V) 44..68 NCY (kHz) 455000 TV VCC5.30 TV VCC 4.4 REQUE 400 IN5.25 IN F FREQ = GND 4.2 350 5.20 5.15 4.0 300 0 20 40 60 80 100 120 140 160 180 0 10 20 30 40 50 60 –45–25 –5 15 35 55 75 95 115135155 LOAD CURRENT (mA) LOAD CURRENT (mA) TEMPERATURE (°C) 3786 G20 3786 G18 3786 G19 Oscillator Frequency Maximum Current Sense SENSE Pin Input Current vs Input Voltage Threshold vs I Voltage vs Temperature TH 360 120 260 Y (kHz)333555468 FREQ = GND OLTAGE (mV)10800 PFBOUuRrLsCSt EEMD-So CKdOeIP NOPTPINIENGRU AMOTUOIOSDN EMODE A) 122280240000 VSENSE = 12VSENSE+ PIN SCILLATOR FREQUENC333334554440286 UM CURRENT SENSE V–224600000 SENSE CURRENT (µ 1111680246000000 O M 40 342 XI–40 MA 20 SENSE– PIN 340 –60 0 5 10 15 20 25 30 35 40 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 –45–25 –5 15 35 55 75 95 115135155 INPUT VOLTAGE (V) 3786 G21 ITH VOLTAGE (V) 3786 G22 TEMPERATURE (°C) 3786 G23 SENSE Pin Input Current SENSE Pin Input Current Maximum Current Sense vs I Voltage vs V Voltage Threshold vs Duty Cycle TH SENSE 260 260 120 240 VSENSE = 12V 240 mV) 220 SENSE+ PIN 220 SENSE+ PIN GE (100 A)210800 A)210800 OLTA µ µ V 80 SENSE CURRENT (1111862064000000 SENSE CURRENT (1111862064000000 M CURRENT SENSE 6400 U 40 40 M 20 XI 20 SENSE– PIN 20 SENSE– PIN MA 0 0 0 0 0.5 1 1.5 2 2.5 3 2.5 7.5 12.5 17.5 22.5 27.5 32.5 37.5 0 10 20 30 40 50 60 70 80 90 100 ITH VOLTAGE (V) VSENSE COMMON MODE VOLTAGE (V) DUTY CYCLE (%) 3786 G24 3786 G25 3786 G26 3786fc 7 For more information www.linear.com/LTC3786

LTC3786 TYPICAL PERFORMANCE CHARACTERISTICS Charge Pump Charging Current Charge Pump Charging Current vs Operating Frequency vs Switch Voltage 110 120 NT (µA) 19000 VVBSOWO =S T1 =2 V16.5V –45°C NT (µA)100 FREQ = 0V E E G CURR 7800 25°C G CURR 80 FREQ = INTVCC N N GI 60 130°C GI R R 60 A 50 A H H C C P 40 P M M 40 PU 30 155°C PU E E RG 20 RG 20 A A H 10 H C C 0 0 50 150 250 350 450 550 650 750 850 5 10 15 20 25 30 35 40 OPERATING FREQUENCY (kHz) SWITCH VOLTAGE (V) 3786 G27 3786 G28 PIN FUNCTIONS (MSOP/QFN) VFB (Pin 1/Pin 3): Error Amplifier Feedback Input. This SS (Pin 5/Pin 7): Output Soft-Start Input. A capacitor to pin receives the remotely sensed feedback voltage from ground at this pin sets the ramp rate of the output voltage an external resistive divider connected across the output. during start-up. SENSE+ (Pin 2/Pin 4): Positive Current Sense Comparator PLLIN/MODE (Pin 6/Pin 8): External Synchronization Input Input. The (+) input to the current comparator is normally to Phase Detector and Forced Continuous Mode Input. connected to the positive terminal of a current sense resis- When an external clock is applied to this pin, it will force tor. The current sense resistor is normally placed at the the controller into forced continuous mode of operation input of the boost controller in series with the inductor. and the phase-locked loop will force the rising BG signal This pin also supplies power to the current comparator. to be synchronized with the rising edge of the external SENSE– (Pin 3/Pin 5): Negative Current Sense Comparator clock. When not synchronizing to an external clock, this input determines how the LTC3786 operates at light loads. Input. The (–) input to the current comparator is normally Pulling this pin to ground selects Burst Mode operation. connected to the negative terminal of a current sense re- An internal 100k resistor to ground also invokes Burst sistor connected in series with the inductor. The common mode voltage range on the SENSE+ and SENSE– pins is Mode operation when the pin is floated. Tying this pin to INTV forces continuous inductor current operation. 2.5V to 38V (40V abs max). CC Tying this pin to a voltage greater than 1.2V and less than ITH (Pin 4/Pin 6): Current Control Threshold and Error INTV – 1.3V selects pulse-skipping operation. This can CC Amplifier Compensation Point. The voltage on this pin be done by adding a 100k resistor between the PLLIN/ sets the current trip threshold. MODE pin and INTV . CC 3786fc 8 For more information www.linear.com/LTC3786

LTC3786 PIN FUNCTIONS (MSOP/QFN) FREQ (Pin 7/Pin 9): The Frequency Control Pin for the BG (Pin 10/Pin 12): Bottom Gate. Connect to the gate of Internal VCO. Connecting the pin to GND forces the VCO the main N-channel MOSFET. to a fixed low frequency of 350kHz. Connecting the pin INTV (Pin 11/Pin 13): Output of Internal 5.4V LDO. CC to INTV forces the VCO to a fixed high frequency of CC Power supply for control circuits and gate drivers. De- 535kHz. The frequency can be programmed from 50kHz couple this pin to GND with a minimum 4.7µF low ESR to 900kHz by connecting a resistor from the FREQ pin to ceramic capacitor. GND. The resistor and an internal 20µA source current create a voltage used by the internal oscillator to set the VBIAS (Pin 12/Pin 14): Main Supply Pin. It is normally frequency. Alternatively, this pin can be driven with a DC tied to the input supply VIN or to the output of the boost voltage to vary the frequency of the internal oscillator. converter. A bypass capacitor should be tied between this pin and the GND pin. The operating voltage range on this RUN (Pin 8/Pin 10): Run Control Input. Forcing this pin pin is 4.5V to 38V (40V abs max). below 1.28V shuts down the controller. Forcing this pin below 0.7V shuts down the entire LTC3786, reducing BOOST (Pin 13/Pin 15): Floating Power Supply for the quiescent current to approximately 8µA. An external Synchronous MOSFET. Bypass to SW with a capacitor resistor divider connected to VIN can set the threshold and supply with a Schottky diode connected to INTVCC. for converter operation. There is a 0.5µA pull-up current TG (Pin 14/Pin 16): Top Gate. Connect to the gate of the for this pin. Once the RUN pin raises above 1.28V, an synchronous NMOS. additional 4.5µA pull-up current is added to the pin for SW (Pin 15/Pin 1): Switch Node. Connect to the source programmable hysteresis. of the synchronous top MOSFET, the drain of the main GND (Pin 9, Exposed Pad Pin 17/ Pin 11, Exposed Pad bottom MOSFET, and the inductor. Pin 17): Ground. Connects to the source of the bottom PGOOD (Pin 16/Pin 2): Power Good Indicator. Open-drain (main) N-channel MOSFET and the (–) terminal(s) of C IN logic output that is pulled to ground when the output volt- and C . All small-signal components and compensa- OUT age is more than ±10 % away from the regulated output tion components should also connect to this ground. voltage. To avoid false trips the output voltage must be The exposed pad must be soldered to the PCB for rated outside of the range for 25µs before this output is activated. thermal performance. 3786fc 9 For more information www.linear.com/LTC3786

LTC3786 BLOCK DIAGRAM INTVCC PGOOD BOOST DB 1.32V + S – R Q VFB TG CB + SHDN SWITCHING 1.08V – LOGIC SW VOUT AND 20µA CHARGE FREQ PUMP INTVCC COUT BG CLK VCO 0.425V + SLEEP – PFD – + ICMP IREV L + –+ +– – 2mV SENSE– 2.8V 0.7V PMLOLDINE/ SLOPE COMP SENSE+ RSENSE SYNC VIN DET 100k SENS LO + VFB CIN – 2.5V + EA– 1.2V – SS VBIAS + OV SHDN – 1.32V ITH CC 0.5µA/ 4.5µA CC2 RC 5.4V – + LDO 11V 10µA 3786 BD 3.8V SENS SHDN LO INTVCC GND RUN SS CSS 3786fc 10 For more information www.linear.com/LTC3786

LTC3786 OPERATION (Refer to the Block Diagram) Main Control Loop ance source, do not exceed the absolute maximum rating of 8V. The RUN pin has an internal 11V voltage clamp The LTC3786 uses a constant-frequency, current mode that allows the RUN pin to be connected through a resis- step-up control architecture. During normal operation, tor to a higher voltage (for example, V ), as long as the the external bottom MOSFET is turned on when the clock IN maximum current into the RUN pin does not exceed 100µA. sets the RS latch, and is turned off when the main current An external resistor divider connected to V can set the comparator, ICMP, resets the RS latch. The peak inductor IN threshold for converter operation. Once running, a 4.5µA current at which ICMP trips and resets the latch is con- current is sourced from the RUN pin allowing the user to trolled by the voltage on the ITH pin, which is the output program hysteresis using the resistor values. of the error amplifier, EA. The error amplifier compares the output voltage feedback signal at the VFB pin, (which The start-up of the controller’s output voltage, V , is OUT is generated with an external resistor divider connected controlled by the voltage on the SS pin. When the voltage across the output voltage, V , to ground) to the internal on the SS pin is less than the 1.2V internal reference, the OUT 1.200V reference voltage. In a boost converter, the required LTC3786 regulates the VFB voltage to the SS pin voltage inductor current is determined by the load current, V and instead of the 1.2V reference. This allows the SS pin to IN V . When the load current increases, it causes a slight be used to program a soft-start by connecting an external OUT decrease in VFB relative to the reference, which causes the capacitor from the SS pin to GND. An internal 10µA pull- EA to increase the ITH voltage until the average inductor up current charges this capacitor creating a voltage ramp current in each channel matches the new requirement on the SS pin. As the SS voltage rises linearly from 0V to based on the new load current. 1.2V, the output voltage rises smoothly to its final value. After the bottom MOSFET is turned off each cycle, the Light Load Current Operation—Burst Mode Operation, top MOSFET is turned on until either the inductor current Pulse-Skipping or Continuous Conduction starts to reverse, as indicated by the current comparator (PLLIN/MODE Pin) IREV, or the beginning of the next clock cycle. The LTC3786 can be enabled to enter high efficiency Burst INTV Power Mode operation, constant-frequency pulse-skipping mode CC or forced continuous conduction mode at low load cur- Power for the top and bottom MOSFET drivers and most rents. To select Burst Mode operation, tie the PLLIN/MODE other internal circuitry is derived from the INTV pin. The CC pin to ground. To select forced continuous operation, tie VBIAS LDO (low dropout linear regulator) supplies 5.4V the PLLIN/MODE pin to INTV . To select pulse-skipping from VBIAS to INTV . CC CC mode, tie the PLLIN/MODE pin to a DC voltage greater than 1.2V and less than INTV – 1.3V. Shutdown and Start-Up (RUN and SS Pins) CC When the controller is enabled for Burst Mode opera- The LTC3786 can be shut down using the RUN pin. Pulling tion, the minimum peak current in the inductor is set to this pin below 1.28V shuts down the main control loop. approximately 30% of the maximum sense voltage even Pulling this pin below 0.7V disables the controller and though the voltage on the ITH pin indicates a lower value. most internal circuits, including the INTV LDOs. In this CC If the average inductor current is higher than the required state, the LTC3786 draws only 8µA of quiescent current. current, the error amplifier, EA, will decrease the voltage Note: Do not apply load while the chip is in shutdown. The on the ITH pin. When the ITH voltage drops below 0.425V, output MOSFET will be turned off during shutdown and the internal sleep signal goes high (enabling sleep mode) the output load may cause excessive power dissipation and both external MOSFETs are turned off. The ITH pin is in the body diode. then disconnected from the output of the EA and parked The RUN pin may be externally pulled up or driven directly at 0.450V. by logic. When driving the RUN pin with a low imped- 3786fc 11 For more information www.linear.com/LTC3786

LTC3786 OPERATION (Refer to the Block Diagram) In sleep mode, much of the internal circuitry is turned off reduced RF interference as compared to Burst Mode and the LTC3786 draws only 55µA of quiescent current. operation. It provides higher low current efficiency than In sleep mode, the load current is supplied by the output forced continuous mode, but not nearly as high as Burst capacitor. As the output voltage decreases, the EA’s output Mode operation. begins to rise. When the output voltage drops enough, the ITH pin is reconnected to the output of the EA, the Frequency Selection and Phase-Locked Loop sleep signal goes low, and the controller resumes normal (FREQ and PLLIN/MODE Pins) operation by turning on the bottom external MOSFET on The selection of switching frequency is a trade-off between the next cycle of the internal oscillator. efficiency and component size. Low frequency opera- When the controller is enabled for Burst Mode operation, tion increases efficiency by reducing MOSFET switching the inductor current is not allowed to reverse. The reverse- losses, but requires larger inductance and/or capacitance current comparator (IREV) turns off the top external to maintain low output ripple voltage. MOSFET just before the inductor current reaches zero, The switching frequency of the LTC3786’s controllers can preventing it from reversing and going negative. Thus, be selected using the FREQ pin. the controller operates in discontinuous current operation. If the PLLIN/MODE pin is not being driven by an external In forced continuous operation or when clocked by an clock source, the FREQ pin can be tied to GND, tied to external clock source to use the phase-locked loop (see INTV , or programmed through an external resistor. Tying CC the Frequency Selection and Phase-Locked Loop section), FREQ to GND selects 350kHz while tying FREQ to INTV CC the inductor current is allowed to reverse at light loads or selects 535kHz. Placing a resistor between FREQ and GND under large transient conditions. The peak inductor cur- allows the frequency to be programmed between 50kHz rent is determined by the voltage on the ITH pin, just as and 900kHz, as shown in Figure 5. in normal operation. In this mode, the efficiency at light A phase-locked loop (PLL) is available on the LTC3786 loads is lower than in Burst Mode operation. However, to synchronize the internal oscillator to an external clock continuous operation has the advantages of lower output source that is connected to the PLLIN/MODE pin. The voltage ripple and less interference to audio circuitry, as LTC3786’s phase detector adjusts the voltage (through it maintains constant-frequency operation independent an internal lowpass filter) of the VCO input to align the of load current. turn-on of the external bottom MOSFET to the rising edge When the PLLIN/MODE pin is connected for pulse-skipping of the synchronizing signal. mode, the LTC3786 operates in PWM pulse-skipping mode The VCO input voltage is prebiased to the operating fre- at light loads. In this mode, constant-frequency operation quency set by the FREQ pin before the external clock is is maintained down to approximately 1% of designed applied. If prebiased near the external clock frequency, maximum output current. At very light loads, the current the PLL loop only needs to make slight changes to the comparator ICMP may remain tripped for several cycles VCO input in order to synchronize the rising edge of the and force the external bottom MOSFET to stay off for external clock’s to the rising edge of BG. The ability to the same number of cycles (i.e., skipping pulses). The prebias the loop filter allows the PLL to lock-in rapidly inductor current is not allowed to reverse (discontinuous without deviating far from the desired frequency. operation). This mode, like forced continuous operation, exhibits low output ripple as well as low audio noise and 3786fc 12 For more information www.linear.com/LTC3786

LTC3786 OPERATION (Refer to the Block Diagram) The typical capture range of the LTC3786’s PLL is from Power Good approximately 55kHz to 1MHz, and is guaranteed to lock The PGOOD pin is connected to an open-drain of an to an external clock source whose frequency is between internal N-channel MOSFET. The MOSFET turns on and 75kHz and 850kHz. pulls the PGOOD pin low when the VFB pin voltage is not The typical input clock thresholds on the PLLIN/MODE within ±10% of the 1.2V reference voltage. The PGOOD pin are 1.6V (rising) and 1.2V (falling). pin is also pulled low when the corresponding RUN pin is low (shut down). When the VFB pin voltage is within Operation When VIN > Regulated VOUT the ±10% requirement, the MOSFET is turned off and the pin is allowed to be pulled up by an external resistor to a When V rises above the regulated V voltage, the boost IN OUT source of up to 6V (abs max). controller can behave differently depending on the mode, inductor current and V voltage. In forced continuous IN Operation at Low SENSE Pin Common Mode Voltage mode, the loop keeps the top MOSFET on continuously once V rises above V . The internal charge pump delivers The current comparator in the LTC3786 is powered directly IN OUT current to the boost capacitor to maintain a sufficiently from the SENSE+ pin. This enables the common mode high TG voltage. (The amount of current the charge pump voltage of SENSE+ and SENSE– pins to operate as low can deliver is characterized by two curves in the Typical as 2.5V, which is below the INTV UVLO threshold. The CC Performance Characteristics section.) figure on the first page shows a typical application when the controller’s VBIAS is powered from V while V In pulse-skipping mode, if V is between 100% and 110% OUT IN IN supply can go as low as 2.5V. If the voltage on SENSE+ of the regulated V voltage, TG turns on if the inductor OUT drops below 2.5V, the SS pin will be held low. When the current rises above a certain threshold and turns off if the SENSE+ voltage returns to the normal operating range, the inductor current falls below this threshold. This threshold SS pin will be released, initiating a new soft-start cycle. current is set to approximately 4% of the maximum ILIM current. If the controller is programmed to Burst Mode BOOST Supply Refresh and Internal Charge Pump operation under this same V window, then TG remains IN off regardless of the inductor current. The top MOSFET driver is biased from the floating boot- strap capacitor, C , which normally recharges during each B If V rises above 110% of the regulated V voltage in IN OUT cycle through an external diode when the bottom MOSFET any mode, the controller turns on TG regardless of the turns on. There are two considerations to keep the BOOST inductor current. In Burst Mode operation, however, the supply at the required bias level. During start-up, if the internal charge pump turns off if the chip is asleep. With bottom MOSFET is not turned on within 100µs after UVLO the charge pump off, there would be nothing to prevent goes low, the bottom MOSFET will be forced to turn on the boost capacitor from discharging, resulting in an for ~400ns. This forced refresh generates enough BOOST- insufficient TG voltage needed to keep the top MOSFET SW voltage to allow the top MOSFET to be fully enhanced completely on. To prevent excessive power dissipation instead of waiting for the initial few cycles to charge the across the body diode of the top MOSFET in this situa- bootstrap capacitor, C . There is also an internal charge B tion, the chip can be switched over to forced continuous pump that keeps the required bias on BOOST. The charge or pulse-skipping mode to enable the charge pump, or a pump always operates in both forced continuous mode Schottky diode can also be placed in parallel to the top and pulse-skipping mode. In Burst Mode operation, the MOSFET. charge pump is turned off during sleep and enabled when the chip wakes up. The internal charge pump can normally supply a charging current of 85µA. 3786fc 13 For more information www.linear.com/LTC3786

LTC3786 APPLICATIONS INFORMATION The Typical Application on the first page is a basic LTC3786 Filter components mutual to the sense lines should be application circuit. LTC3786 can be configured to use either placed close to the LTC3786, and the sense lines should inductor DCR (DC resistance) sensing or a discrete sense run close together to a Kelvin connection underneath the resistor (R ) for current sensing. The choice between current sense element (shown in Figure 1). Sensing cur- SENSE the two current sensing schemes is largely a design trade- rent elsewhere can effectively add parasitic inductance off between cost, power consumption and accuracy. DCR and capacitance to the current sense element, degrading sensing is becoming popular because it does not require the information at the sense terminals and making the current sensing resistors and is more power efficient, programmed current limit unpredictable. If DCR sensing especially in high current applications. However, current is used (Figure 2b), sense resistor R1 should be placed sensing resistors provide the most accurate current limits close to the switching node, to prevent noise from coupling for the controller. Other external component selection is into sensitive small-signal nodes. driven by the load requirement, and begins with the se- lection of R (if R is used) and inductor value. Sense Resistor Current Sensing SENSE SENSE Next, the power MOSFETs are selected. Finally, input and A typical sensing circuit using a discrete resistor is shown output capacitors are selected. in Figure 2a. R is chosen based on the required SENSE output current. SENSE+ and SENSE– Pins The current comparator has a maximum threshold The SENSE+ and SENSE– pins are the inputs to the cur- V of 75mV. The current comparator threshold SENSE(MAX) rent comparators. The common mode input voltage range sets the peak of the inductor current, yielding a maximum of the current comparators is 2.5V to 38V. The current average inductor current, I , equal to the peak value MAX sense resistor is normally placed at the input of the boost controller in series with the inductor. TO SENSE FILTER, NEXT TO THE CONTROLLER The SENSE+ pin also provides power to the current com- parator. It draws ~200µA during normal operation. There is a small base current of less than 1µA that flows into the SENSE– pin. The high impedance SENSE– input to the VIN current comparators allows accurate DCR sensing. INDUCTOR OR RSENSE 3786 F01 Figure 1. Sense Lines Placement with Inductor or Sense Resistor VBIAS VIN VBIAS VIN SENSE+ SENSE+ (OPTIONAL) C1 R2 DCR SENSE– SENSE– INTVCC INTVCC INDUCTOR R1 L LTC3786 LTC3786 BOOST BOOST TG TG SW VOUT SW VOUT BG BG SGND SGND 3786 F02a 3786 F02b PLACE C1 NEAR SENSE PINS (R1||R2) • C1 = DCLR RSENSE(EQ) = DCR • R1R +2 R2 (2a) Using a Resistor to Sense Current (2b) Using the Inductor DCR to Sense Current Figure 2. Two Different Methods of Sensing Current 3786fc 14 For more information www.linear.com/LTC3786

LTC3786 APPLICATIONS INFORMATION less half the peak-to-peak ripple current, ∆I . To calculate To ensure that the application will deliver full load current L the sense resistor value, use the equation: over the full operating temperature range, choose the minimum value for the maximum current sense threshold V SENSE(MAX) (V ). R = SENSE(MAX) SENSE ∆I L IMAX + Next, determine the DCR of the inductor. Where provided, 2 use the manufacturer’s maximum value, usually given at When using the controller in low V and very high voltage 20°C. Increase this value to account for the temperature IN output applications, the maximum inductor current and coefficient of resistance, which is approximately 0.4%/°C. A correspondingly the maximum output current level will conservative value for the maximum inductor temperature be reduced due to the internal compensation required to (TL(MAX)) is 100°C. meet stability criterion for boost regulators operating at To scale the maximum inductor DCR to the desired sense greater than 50% duty factor. A curve is provided in the resistor value, use the divider ratio: Typical Performance Characteristics section to estimate this reduction in peak inductor current level depending RSENSE(EQUIV) R = upon the operating duty factor. D DCR atT MAX L(MAX) Inductor DCR Sensing C1 is usually selected to be in the range of 0.1µF to 0.47µF. For applications requiring the highest possible efficiency This forces R1|| R2 to around 2k, reducing error that might at high load currents, the LTC3786 is capable of sensing have been caused by the SENSE– pin’s ±1µA current. the voltage drop across the inductor DCR, as shown in The equivalent resistance R1|| R2 is scaled to the room Figure 2b. The DCR of the inductor can be less than 1mΩ temperature inductance and maximum DCR: for high current inductors. In a high current application requiring such an inductor, conduction loss through a L R1||R2= sense resistor could reduce the efficiency by a few percent (DCR at 20°C)•C1 compared to DCR sensing. The sense resistor values are: If the external R1||R2 • C1 time constant is chosen to be exactly equal to the L/DCR time constant, the voltage drop R1= R1||R2; R2= R1•RD across the external capacitor is equal to the drop across R 1–R D D the inductor DCR multiplied by R2/(R1 + R2). R2 scales the voltage across the sense terminals for applications where The maximum power loss in R1 is related to duty cycle, the DCR is greater than the target sense resistor value. and will occur in continuous mode at VIN = 1/2 VOUT : To properly dimension the external filter components, the (V – V )•V OUT IN IN DCR of the inductor must be known. It can be measured P = LOSS_R1 R1 using a good RLC meter, but the DCR tolerance is not always the same and varies with temperature. Consult Ensure that R1 has a power rating higher than this value. the manufacturer’s data sheets for detailed information. If high efficiency is necessary at light loads, consider this power loss when deciding whether to use DCR sensing or Using the inductor ripple current value from the inductor sense resistors. Light load power loss can be modestly value calculation section, the target sense resistor value is: higher with a DCR network than with a sense resistor, due V SENSE(MAX) to the extra switching losses incurred through R1. However, R = SENSE(EQUIV) ∆I DCR sensing eliminates a sense resistor, reduces conduc- L I + MAX tion losses and provides higher efficiency at heavy loads. 2 Peak efficiency is about the same with either method. 3786fc 15 For more information www.linear.com/LTC3786

LTC3786 APPLICATIONS INFORMATION Inductor Value Calculation The peak-to-peak gate drive levels are set by the INTV CC voltage. This voltage is typically 5.4V. Consequently, logic- The operating frequency and inductor selection are in- level threshold MOSFETs must be used in most applica- terrelated in that higher operating frequencies allow the tions. Pay close attention to the BV specification for use of smaller inductor and capacitor values. Why would DSS the MOSFETs as well; many of the logic level MOSFETs anyone ever choose to operate at lower frequencies with are limited to 30V or less. larger components? The answer is efficiency. A higher frequency generally results in lower efficiency because Selection criteria for the power MOSFETs include the on- of MOSFET gate charge and switching losses. Also, at resistance, R , Miller capacitance, C , input DS(ON) MILLER higher frequency, the duty cycle of body diode conduction voltage and maximum output current. Miller capacitance, is higher, which results in lower efficiency. In addition to C , can be approximated from the gate charge curve MILLER this basic trade-off, the effect of inductor value on ripple usually provided on the MOSFET manufacturer’s data current and low current operation must also be considered. sheet. C is equal to the increase in gate charge MILLER along the horizontal axis while the curve is approximately The inductor value has a direct effect on ripple current. flat divided by the specified change in V . This result is The inductor ripple current ∆I decreases with higher DS L then multiplied by the ratio of the application applied V inductance or frequency and increases with higher V : DS IN to the gate charge curve specified V . When the IC is DS V ⎛ V ⎞ operating in continuous mode, the duty cycles for the top ∆IL = IN ⎜1– IN ⎟ and bottom MOSFETs are given by: f•L⎝ VOUT⎠ V – V Accepting larger values of ∆I allows the use of low Main Switch Duty Cycle = OUT IN L V inductances, but results in higher output voltage ripple OUT and greater core losses. A reasonable starting point for Synchronous Switch Duty Cycle = VIN setting ripple current is ∆I = 0.3(I ). The maximum V L MAX OUT ∆I occurs at V = 1/2 V . L IN OUT If the maximum output current is I and each chan- OUT(MAX) The inductor value also has secondary effects. The tran- nel takes one-half of the total output current, the MOSFET sition to Burst Mode operation begins when the average power dissipations in each channel at maximum output inductor current required results in a peak current below current are given by: 25% of the current limit determined by R . Lower SENSE inductor values (higher ∆IL) will cause this to occur at P = (VOUT – VIN)VOUT •I 2 •(1+δ) lower load currents, which can cause a dip in efficiency in MAIN V 2 OUT(MAX) IN the upper range of low current operation. In Burst Mode I OUT(MAX) operation, lower inductance values will cause the burst •R +k•V 3 • •C •f DS(ON) OUT MILLER frequency to decrease. Once the value of L is known, an VIN inductor with low DCR and low core losses should be V P = OUT •I 2 •(1+δ)•R selected. SYNC OUT(MAX) DS(ON) V IN Power MOSFET Selection Two external power MOSFETs must be selected for the where δ is the temperature dependency of RDS(ON) (approximately 1Ω) is the effective driver resistance at the LTC3786: one N-channel MOSFET for the bottom (main) MOSFET’s Miller threshold voltage. The constant k, which switch, and one N-channel MOSFET for the top (synchro- nous) switch. 3786fc 16 For more information www.linear.com/LTC3786

LTC3786 APPLICATIONS INFORMATION accounts for the loss caused by reverse recovery current, The steady ripple voltage due to charging and discharging is inversely proportional to the gate drive current and has the bulk capacitance in a single phase boost converter is an empirical value of 1.7. given by: Both MOSFETs have I2R losses while the bottom N-channel I •(V – V ) OUT(MAX) OUT IN(MIN) equation includes an additional term for transition losses, V = V RIPPLE C •V •f which are highest at low input voltages. For high V the OUT OUT IN high current efficiency generally improves with larger where C is the output filter capacitor. MOSFETs, while for low V the transition losses rapidly OUT IN increase to the point that the use of a higher R device The steady ripple due to the voltage drop across the ESR DS(ON) with lower C actually provides higher efficiency. The is given by: MILLER synchronous MOSFET losses are greatest at high input ∆V = I • ESR ESR L(MAX) voltage when the bottom switch duty factor is low or dur- ing overvoltage when the synchronous switch is on close Multiple capacitors placed in parallel may be needed to to 100% of the period. meet the ESR and RMS current handling requirements. Dry tantalum, special polymer, aluminum electrolytic and The term (1 + δ) is generally given for a MOSFET in the ceramic capacitors are all available in surface mount form of a normalized R vs Temperature curve, but DS(ON) packages. Ceramic capacitors have excellent low ESR δ = 0.005/°C can be used as an approximation for low characteristics but can have a high voltage coefficient. voltage MOSFETs. Capacitors are now available with low ESR and high ripple current ratings (i.e., OS-CON and POSCAP). C and C Selection IN OUT The input ripple current in a boost converter is relatively Setting Output Voltage low (compared with the output ripple current), because The LTC3786 output voltage is set by an external feedback this current is continuous. The input capacitor, C , volt- IN resistor divider carefully placed across the output, as shown age rating should comfortably exceed the maximum input in Figure 3. The regulated output voltage is determined by: voltage. Although ceramic capacitors can be relatively tolerant of overvoltage conditions, aluminum electrolytic ⎛ R ⎞ capacitors are not. Be sure to characterize the input voltage VOUT =1.2V⎜1+ B ⎟ ⎝ RA ⎠ for any possible overvoltage transients that could apply excess stress to the input capacitors. Great care should be taken to route the VFB line away from noise sources, such as the inductor or the SW line. The value of the C is a function of the source impedance, IN Also, keep the VFB node as small as possible to avoid and in general, the higher the source impedance, the higher noise pickup. the required input capacitance. The required amount of input capacitance is also greatly affected by the duty cycle. High output current applications that also experience high VOUT duty cycles can place great demands on the input supply, both in terms of DC current and ripple current. LTC3786 RB VFB In a boost converter, the output has a discontinuous current, RA so C must be capable of reducing the output voltage OUT ripple. The effects of ESR (equivalent series resistance) 3786 F03 and the bulk capacitance must be considered when choos- Figure 3. Setting Output Voltage ing the right capacitor for a given output ripple voltage. 3786fc 17 For more information www.linear.com/LTC3786

LTC3786 APPLICATIONS INFORMATION Soft-Start (SS Pin) temperature, the LTC3786 INTV current is limited to CC less than 20mA in the QFN package from a 40V supply: The start-up of the V is controlled by the voltage on OUT the SS pin. When the voltage on the SS pin is less than T = 70°C + (20mA)(40V)(68°C/W) = 125°C J the internal 1.2V reference, the LTC3786 regulates the VFB In an MSOP package, the INTV current is limited to less CC pin voltage to the voltage on the SS pin instead of 1.2V. than 34mA from a 40V supply: Soft-start is enabled by simply connecting a capacitor from T = 70°C + (34mA)(40V)(40°C/W) = 125°C J the SS pin to ground, as shown in Figure 4. An internal 10µA current source charges the capacitor, providing a To prevent the maximum junction temperature from being linear ramping voltage at the SS pin. The LTC3786 will exceeded, the input supply current must be checked while regulate the V pin (and hence, V ) according to the operating in continuous conduction mode (PLLIN/MODE FB OUT voltage on the SS pin, allowing VOUT to rise smoothly = INTVCC) at maximum VBIAS. from V to its final regulated value. The total soft-start IN Topside MOSFET Driver Supply (C , D ) time will be approximately: B B External bootstrap capacitors, C , connected to the 1.2V B t =C • BOOST pin supplies the gate drive voltage for the topside SS SS 10µA MOSFET. Capacitor C in the Block Diagram is charged B though external diode, D , from INTV when the SW pin B CC LTC3786 is low. When the topside MOSFET is to be turned on, the SS driver places the C voltage across the gate-source of the B CSS desired MOSFET. This enhances the MOSFET and turns on SGND the topside switch. The switch node voltage, SW, rises to 3786 F04 V and the BOOST pin follows. With the topside MOSFET OUT Figure 4. Using the SS Pin to Program Soft-Start on, the boost voltage is above the output voltage: V BOOST = V + V . The value of the boost capacitor, C , INTV Regulator OUT INTVCC B CC needs to be 100 times that of the total input capacitance The LTC3786 features an internal P-channel low dropout of the topside MOSFET(s). The reverse breakdown of the linear regulator (LDO) that supplies power at the INTVCC external Schottky diode must be greater than VOUT(MAX). pin from the VBIAS supply pin. INTV powers the gate CC The external diode D can be a Schottky diode or silicon drivers and much of the LTC3786’s internal circuitry. The B diode, but in either case it should have low leakage and fast VBIAS LDO regulates INTV to 5.4V. It can supply at least CC recovery. Pay close attention to the reverse leakage at high 50mA and must be bypassed to ground with a minimum temperatures where it generally increases substantially. of 4.7µF ceramic capacitor. Good bypassing is needed to supply the high transient currents required by the MOSFET The topside MOSFET driver includes an internal charge gate drivers. pump that delivers current to the bootstrap capacitor from the BOOST pin. This charge current maintains the bias High input voltage applications in which large MOSFETs voltage required to keep the top MOSFET on continuously are being driven at high frequencies may cause the during dropout/overvoltage conditions. The Schottky/ maximum junction temperature rating for the LTC3786 silicon diode selected for the topside driver should have a to be exceeded. The power dissipation for the IC is equal reverse leakage less than the available output current the to VBIAS • I . The gate charge current is dependent INTVCC charge pump can supply. Curves displaying the available on operating frequency, as discussed in the Efficiency charge pump current under different operating conditions Considerations section. The junction temperature can be can be found in the Typical Performance Characteristics estimated by using the equations given in Note 2 of the section. Electrical Characteristics. For example, at 70°C ambient 3786fc 18 For more information www.linear.com/LTC3786

LTC3786 APPLICATIONS INFORMATION A leaky diode D in the boost converter can not only ously from the phase detector output, pulling up the VCO B prevent the top MOSFET from fully turning on but it can input. When the external clock frequency is less than f , OSC also completely discharge the bootstrap capacitor C and current is sunk continuously, pulling down the VCO input. B create a current path from the input voltage to the BOOST If the external and internal frequencies are the same but pin to INTV . This can cause INTV to rise if the diode exhibit a phase difference, the current sources turn on for CC CC leakage exceeds the current consumption on INTV . an amount of time corresponding to the phase difference. CC This is particularly a concern in Burst Mode operation The voltage at the VCO input is adjusted until the phase where the load on INTV can be very small. The external and frequency of the internal and external oscillators are CC Schottky or silicon diode should be carefully chosen such identical. At the stable operating point, the phase detector that INTV never gets charged up much higher than its output is high impedance and the internal filter capacitor, CC normal regulation voltage. C , holds the voltage at the VCO input. LP Typically, the external clock (on PLLIN/MODE pin) input Fault Conditions: Overtemperature Protection high threshold is 1.6V, while the input low threshold is 1.2V. At higher temperatures, or in cases where the internal Note that the LTC3786 can only be synchronized to an power dissipation causes excessive self heating on-chip external clock whose frequency is within range of the (such as an INTV short to ground), the overtemperature CC LTC3786’s internal VCO, which is nominally 55kHz to shutdown circuitry will shut down the LTC3786. When the 1MHz. This is guaranteed to be between 75kHz and 850kHz. junction temperature exceeds approximately 170°C, the overtemperature circuitry disables the INTV LDO, causing Rapid phase locking can be achieved by using the FREQ pin CC the INTV supply to collapse and effectively shut down to set a free-running frequency near the desired synchro- CC the entire LTC3786 chip. Once the junction temperature nization frequency. The VCO’s input voltage is prebiased drops back to approximately 155°C, the INTV LDO turns at a frequency corresponding to the frequency set by the CC back on. Long-term overstress (T > 125°C) should be FREQ pin. Once prebiased, the PLL only needs to adjust J avoided as it can degrade the performance or shorten the frequency slightly to achieve phase lock and synchro- the life of the part. nization. Although it is not required that the free-running frequency be near external clock frequency, doing so will Since the shutdown may occur at full load, beware that prevent the operating frequency from passing through a the load current won’t result in high power dissipation in large range of frequencies as the PLL locks. the body diodes of the top MOSFET. In this case, PGOOD output may be used to turn the system load off. 1000 900 Phase-Locked Loop and Frequency Synchronization 800 The LTC3786 has an internal phase-locked loop (PLL) Hz) 700 comprised of a phase frequency detector, a lowpass filter Y (k 600 C and a voltage-controlled oscillator (VCO). This allows the EN 500 U Q 400 turn-on of the bottom MOSFET to be locked to the rising E R F 300 edge of an external clock signal applied to the PLLIN/MODE 200 pin. The phase detector is an edge-sensitive digital type 100 that provides zero degrees phase shift between the external 0 and internal oscillators. This type of phase detector does 15 25 35 45 55 65 75 85 95 105115125 FREQ PIN RESISTOR (kΩ) not exhibit false lock to harmonics of the external clock. 3786 F05 If the external clock frequency is greater than the internal Figure 5. Relationship Between Oscillator Frequency oscillator’s frequency, f , then current is sourced continu- and Resistor Value at the FREQ Pin OSC 3786fc 19 For more information www.linear.com/LTC3786

LTC3786 APPLICATIONS INFORMATION Table 1 summarizes the different states in which the FREQ losses in LTC3786 circuits: 1) IC VBIAS current, 2) INTV CC pin can be used. regulator current, 3) I2R losses, 4) Bottom MOSFET transi- tion losses and 5) Body diode conduction losses. Table 1 1. The VBIAS current is the DC supply current given in the FREQ PIN PLLIN/MODE PIN FREQUENCY Electrical Characteristics table, which excludes MOSFET 0V DC Voltage 350kHz driver and control currents. VBIAS current typically INTV DC Voltage 535kHz CC results in a small (<0.1%) loss. Resistor DC Voltage 50kHz to 900kHz Any of the Above External Clock Phase Locked to External Clock 2. INTV current is the sum of the MOSFET driver and CC control currents. The MOSFET driver current results Minimum On-Time Considerations from switching the gate capacitance of the power MOS- Minimum on-time, t , is the smallest time duration FETs. Each time a MOSFET gate is switched from low to ON(MIN) that the LTC3786 is capable of turning on the bottom high to low again, a packet of charge, dQ, moves from MOSFET. It is determined by internal timing delays and INTV to ground. The resulting dQ/dt is a current out CC the gate charge required to turn on the top MOSFET. Low of INTV that is typically much larger than the control CC duty cycle applications may approach this minimum circuit current. In continuous mode, I = f(Q + GATECHG T on-time limit. Q ), where Q and Q are the gate charges of the topside B T B and bottom side MOSFETs. In forced continuous mode, if the duty cycle falls below what can be accommodated by the minimum on-time, 3. DC I2R losses. These arise from the resistances of the the controller will begin to skip cycles but the output will MOSFETs, sensing resistor, inductor and PC board continue to be regulated. More cycles will be skipped when traces and cause the efficiency to drop at high output V increases. Once V rises above V , the loop keeps currents. IN IN OUT the top MOSFET continuously on. The minimum on-time 4. Transition losses apply only to the bottom MOSFET(s), for the LTC3786 is approximately 110ns. and become significant only when operating at low input voltages. Transition losses can be estimated from: Efficiency Considerations The percent efficiency of a switching regulator is equal to Transition Loss = (1.7)VOUT3I •C • f MAX RSS the output power divided by the input power times 100%. V IN It is often useful to analyze individual losses to determine 5. Body diode conduction losses are more significant at high- what is limiting the efficiency and which change would er switching frequency. During the dead time, the loss in produce the greatest improvement. Percent efficiency the top MOSFETs is I • V , where V is around 0.7V. can be expressed as: OUT DS DS At higher switching frequency, the dead time becomes %Efficiency = 100% – (L1 + L2 + L3 + ...) a good percentage of switching cycle and causes the where L1, L2, etc., are the individual losses as a percent- efficiency to drop. age of input power. Other hidden losses, such as copper trace and internal Although all dissipative elements in the circuit produce battery resistances, can account for an additional efficiency losses, five main sources usually account for most of the degradation in portable systems. It is very important to include these system-level losses during the design phase. 3786fc 20 For more information www.linear.com/LTC3786

LTC3786 APPLICATIONS INFORMATION Checking Transient Response This is why it is better to look at the ITH pin signal which is in the feedback loop and is the filtered and compensated The regulator loop response can be checked by looking at control loop response. the load current transient response. Switching regulators take several cycles to respond to a step in load current. The gain of the loop will be increased by increasing When a load step occurs, V shifts by an amount equal R and the bandwidth of the loop will be increased by OUT C to ∆I •ESR, where ESR is the effective series resis- decreasing C . If R is increased by the same factor that LOAD C C tance of C . ∆I also begins to charge or discharge C is decreased, the zero frequency will be kept the same, OUT LOAD C C generating the feedback error signal that forces the thereby keeping the phase shift the same in the most OUT regulator to adapt to the current change and return V to critical frequency range of the feedback loop. The output OUT its steady-state value. During this recovery time V can voltage settling behavior is related to the stability of the OUT be monitored for excessive overshoot or ringing, which closed-loop system and will demonstrate the actual overall would indicate a stability problem. OPTI-LOOP® compen- supply performance. sation allows the transient response to be optimized over A second, more severe transient is caused by switching a wide range of output capacitance and ESR values. The in loads with large (>1µF) supply bypass capacitors. The availability of the ITH pin not only allows optimization of discharged bypass capacitors are effectively put in parallel control loop behavior, but it also provides a DC-coupled with C , causing a rapid drop in V . No regulator can OUT OUT and AC-filtered closed-loop response test point. The DC alter its delivery of current quickly enough to prevent this step, rise time and settling at this test point truly reflects the sudden step change in output voltage if the load switch closed-loop response. Assuming a predominantly second resistance is low and it is driven quickly. If the ratio of order system, phase margin and/or damping factor can be C to C is greater than 1:50, the switch rise time LOAD OUT estimated using the percentage of overshoot seen at this should be controlled so that the load rise time is limited to pin. The bandwidth can also be estimated by examining the approximately 25 • C . Thus, a 10µF capacitor would LOAD rise time at the pin. The ITH external components shown require a 250µs rise time, limiting the charging current in the Figure 8 circuit will provide an adequate starting to about 200mA. point for most applications. The ITH series R -C filter sets the dominant pole-zero Design Example C C loop compensation. The values can be modified slightly As a design example, assume V = 12V(nominal), IN to optimize transient response once the final PCB layout V = 22V (max), V = 24V, I = 4A, V IN OUT OUT(MAX) SENSE(MAX) is complete and the particular output capacitor type and = 75mV and f = 350kHz. value have been determined. The output capacitors must The inductance value is chosen first based on a 30% ripple be selected because the various types and values determine current assumption. Tie the MODE/PLLIN pin to GND, the loop gain and phase. An output current pulse of 20% generating 350kHz operation. The minimum inductance to 80% of full-load current having a rise time of 1µs to for 30% ripple current is: 10µs will produce output voltage and ITH pin waveforms that will give a sense of the overall loop stability without V ⎛ V ⎞ breaking the feedback loop. ∆I = IN ⎜1– IN ⎟ L f•L⎝ VOUT⎠ Placing a power MOSFET and load resistor directly across the output capacitor and driving the gate with an The largest ripple happens when V = 1/2V = 12V, IN OUT appropriate pulse generator is a practical way to produce where the average maximum inductor is I = I MAX OUT(MAX) a realistic load step condition. The initial output voltage • (V /V ) = 8A. A 6.8µH inductor will produce a 31% OUT IN step resulting from the step change in output current ripple current. The peak inductor current will be the maxi- may not be within the bandwidth of the feedback loop, mum DC value plus one-half the ripple current, or 9.25A. so this signal cannot be used to determine phase margin. 3786fc 21 For more information www.linear.com/LTC3786

LTC3786 APPLICATIONS INFORMATION The R resistor value can be calculated by using the 1. Put the bottom N-channel MOSFET MBOT and the top SENSE maximum current sense voltage specification with some N-channel MOSFET MTOP in one compact area with accommodation for tolerances: C . OUT 75mV 2. Are the signal and power grounds kept separate? The R ≤ =0.008Ω SENSE combined IC signal ground pin and the ground return 9.25A of C must return to the combined C (–) INTVCC OUT Choosing 1% resistors: RA = 5k and RB = 95.3k yields an terminals. The path formed by the bottom N-channel output voltage of 24.072V. MOSFET and the capacitor should have short leads and PC trace lengths. The output capacitor (–) terminals The power dissipation on the topside MOSFET in each chan- should be connected as close as possible to the (–) nel can be easily estimated. Choosing a Vishay Si7848BDP source terminal of the bottom MOSFET. MOSFET results in: R = 0.012Ω, C = 150pF. At DS(ON) MILLER maximum input voltage with T(estimated) = 50°C: 3. Does the LTC3786 VFB pin’s resistive divider connect to the (+) terminal of C ? The resistive divider must (24V –12V)24V OUT 2 PMAIN = 2 •(4A) be connected between the (+) terminal of COUT and (12V) signal ground and placed close to the VFB pin. The feedback resistor connections should not be along the •⎡⎣1+(0.005)(50°C–25°C)⎤⎦•0.008Ω high current input feeds from the input capacitor(s). +(1.7)(24V)3 4A (150pF)(350kHz)=0.7W 4. Are the SENSE– and SENSE+ leads routed together with 12V minimum PC trace spacing? The filter capacitor between C is chosen to filter the square current in the output. SENSE+ and SENSE– should be as close as possible OUT The maximum output current peak is: to the IC. Ensure accurate current sensing with Kelvin connections at the sense resistor. ⎛ RIPPLE%⎞ IOUT(PEAK) =IOUT(MAX) •⎝⎜1+ 2 ⎠⎟ 5. Is the INTVCC decoupling capacitor connected close to the IC, between the INTV and the power ground CC ⎛ 31%⎞ pin? This capacitor carries the MOSFET drivers’ cur- = 4•⎜1+ ⎟= 4.62A ⎝ 2 ⎠ rent peaks. An additional 1µF ceramic capacitor placed immediately next to the INTV and GND pins can help CC A low ESR (5mΩ) capacitor is suggested. This capacitor improve noise performance substantially. will limit output voltage ripple to 23.1mV (assuming ESR 6. Keep the switching node (SW), top gate node (TG) and dominate ripple). boost node (BOOST) away from sensitive small-signal PC Board Layout Checklist nodes. All of these nodes have very large and fast moving signals and, therefore, should be kept on the When laying out the printed circuit board, the following output side of the LTC3786 and occupy a minimal PC checklist should be used to ensure proper operation of trace area. the IC. These items are also illustrated graphically in the layout diagram of Figure 6. Figure 7 illustrates the current 7. Use a modified “star ground” technique: a low imped- waveforms present in the various branches the synchro- ance, large copper area central grounding point on nous regulator operating in the continuous mode. Check the same side of the PC board as the input and output the following in your layout: capacitors with tie-ins for the bottom of the INTVCC decoupling capacitor, the bottom of the voltage feedback resistive divider and the GND pin of the IC. 3786fc 22 For more information www.linear.com/LTC3786

LTC3786 APPLICATIONS INFORMATION PC Board Layout Debugging Investigate whether any problems exist only at higher out- put currents or only at higher input voltages. If problems It is helpful to use a DC-50MHz current probe to monitor coincide with high input voltages and low output currents, the current in the inductor while testing the circuit. Moni- look for capacitive coupling between the BOOST, SW, TG, tor the output switching node (SW pin) to synchronize and possibly BG connections and the sensitive voltage the oscilloscope to the internal oscillator and probe the and current pins. The capacitor placed across the current actual output voltage. Check for proper performance over sensing pins needs to be placed immediately adjacent to the operating voltage and current range expected in the the pins of the IC. This capacitor helps to minimize the application. The frequency of operation should be main- effects of differential noise injection due to high frequency tained over the input voltage range down to dropout and capacitive coupling. until the output load drops below the low current opera- tion threshold— typically 10% of the maximum designed An embarrassing problem, which can be missed in an current level in Burst Mode operation. otherwise properly working switching regulator results when the current sensing leads are hooked up backwards. The duty cycle percentage should be maintained from cycle The output voltage under this improper hook-up will still to cycle in a well designed, low noise PCB implementation. be maintained, but the advantages of current mode control Variation in the duty cycle at a subharmonic rate can sug- will not be realized. Compensation of the voltage loop will gest noise pick-up at the current or voltage sensing inputs be much more sensitive to component selection. This or inadequate loop compensation. Overcompensation of behavior can be investigated by temporarily shorting out the loop can be used to tame a poor PC layout if regulator the current sensing resistor—don’t worry, the regulator bandwidth optimization is not required. will still maintain control of the output voltage. Reduce V from its nominal level to verify operation with IN high duty cycle. Check the operation of the undervoltage lockout circuit by further lowering V while monitoring IN the outputs to verify operation. 3786fc 23 For more information www.linear.com/LTC3786

LTC3786 APPLICATIONS INFORMATION SENSE+ PGOOD VPULLUP SENSE– SW L1 RSENSE LTC3786 TG CB FREQ BOOST + M1 fIN PLLIN/MODE BG M2 RUN VFB VBIAS + ITH GND VIN GND INTVCC VOUT SS 3786 F06 Figure 6. Recommended Printed Circuit Layout Diagram VIN RSENSE L1 SW VOUT RIN CIN COUT RL 3786 F07 BOLD LINES INDICATE HIGH SWITCHING CURRENT. KEEP LINES TO A MINIMUM LENGTH Figure 7. Branch Current Waveforms 3786fc 24 For more information www.linear.com/LTC3786

LTC3786 APPLICATIONS INFORMATION VBIAS SENSE+ VIN LTC3786 RSENSE CIN 5V TO 24V 4mΩ 22µF SENSE– L PLLIN/MODE 3.3µH RUN TG FREQ VOUT CSS 0.1µF SW 24V SS CB 0.1µF MTOP C22OµUFTA+ COUTB 5A* BOOST 220µF CITH 15nF ×4 RITH 8.66k BG MBOT ITH D CITHA 220pF INTVCC CINT 4.7µF RA 12.1k GND VFB 100k PGOOD RS 232k 3786 F08 CIN, COUTA: TDK C4532X5R1E226M COUTB: SANYO 50CE220LX D: BAS140W L: PULSE PA1494.362NL MBOT, MTOP: RENESAS HAT2169H *WHEN VIN < 8V, MAXIMUM LOAD CURRENT AVAILABLE IS REDUCED. Figure 8. High Efficiency 24V Boost Converter VBIAS SENSE+ VIN LTC3786 RSENSE CIN 5V TO 28V 4mΩ 6.8µF SENSE– ×4 L PLLIN/MODE 3.3µH RUN TG FREQ VOUT CSS 0.1µF SW 28V SS CB 0.1µF MTOP C6.O8UµTFA+ COUTB 4A* BOOST 220µF CITH 15nF ×4 RITH 8.66k BG MBOT ITH D CITHA 220pF INTVCC CINT 4.7µF RA 12.1k GND VFB 100k PGOOD RS 261k 3786 F09 CIN, COUTA: TDK C4532X7R1H685K COUTB: SANYO 63CE220KX D: BAS140W L: PULSE PA1494.362NL MBOT, MTOP: RENESAS HAT2169H *WHEN VIN < 8V, MAXIMUM LOAD CURRENT AVAILABLE IS REDUCED. Figure 9. High Efficiency 28V Boost Converter 3786fc 25 For more information www.linear.com/LTC3786

LTC3786 APPLICATIONS INFORMATION VBIAS SENSE+ VIN LTC3786 RSENSE CIN 5V TO 36V 5mΩ 6.8µF SENSE– ×4 L PLLIN/MODE 10.2µH RUN TG FREQ VOUT CSS 0.1µF SW 36V SS CB 0.1µF MTOP C6.O8UµTFA+ COUTB 3A* BOOST 220µF CITH 15nF ×4 RITH 8.66k BG MBOT ITH D CITHA 220pF INTVCC CINT 4.7µF RA 12.1k GND VFB 100k PGOOD RS 357k CIN, COUTA: TDK C4532X7R1H685K 3786 F10 COUTB: SANYO 63CE220KX D: BAS170W L: PULSE PA2050.103NL MBOT, MTOP: RENESAS RJIC0652DPB *WHEN VIN < 9V, MAXIMUM LOAD CURRENT AVAILABLE IS REDUCED. Figure 10. High Efficiency 36V Boost Converter VBIAS SENSE+ VIN LTC3786 RSENSE CIN 5.8V TO 34V 9mΩ 22µF SENSE– L 10µH • • C 10µF PLLIN/MODE TG RUN FREQ D VOUT CSS 0.1µF SW 10.5V SS BOOST COUT 1.2A 270µF CITH 100nF BG MBOT RITH 13k ITH CITHA 10pF INTVCC CINT 4.7µF GND RA 115k 100k VFB PGOOD RS 887k 3786 F11 CIN: SANYO 50CE220LX COUT: SANYO SVPC270M D: DIODES, INC. B360A-13-F L: COOPER BUSSMANN DRQ125-100 MBOT: BSZ097NO4L Figure 11. 10.5V Nonsynchronous SEPIC Converter 3786fc 26 For more information www.linear.com/LTC3786

LTC3786 APPLICATIONS INFORMATION VBIAS VIN 4.5V TO 24V START-UP SENSE+ CIN VOLTAGE OPERATES THROUGH 22µF TRANSIENTS DOWN TO 2.5V RSENSE LTC3786 5mΩ SENSE– L 60.4k 3.2µH fSW = 400kHz RUN FREQ TG CSS SW 1V0OVUT* 0.1µF SS 0.C1BµF MTOP C22OµUFTA + C15O0UµTBF 5A 1C0ITnHF RITH BOOST ×3 4.64k BG MBOT ITH CITHA D 100pF INTVCC CINT RA 4.7µF 12.1k GND VFB 100k PLLIN/MODE RB 100k 88.7k PGOOD 3786 F12a CIN, COUTA: TDK C4532X5R1E226M COUTB: SANYO 35HVH150M L: SUMIDA CDEP106-3R2-88 MBOT, MTOP: RENESAS HAT2170 D: INFINEON BAS140W *WHEN VIN > 10V, VOUT FOLLOWS VIN. 100 VIN = 12V 98 VIN = 9V 96 %) VIN = 6V Y ( 94 C N E CI 92 FI F E 90 88 86 1 2 3 4 5 6 OUTPUT CURRENT (A) 3786 F12b Figure 12. High Efficiency 10V Boost Converter 3786fc 27 For more information www.linear.com/LTC3786

LTC3786 APPLICATIONS INFORMATION VIN SENSE+ CIN 2.7V TO 4.2V 47µF RSENSE ×2 LTC3786 6mΩ SENSE– L PLLIN/MODE 0.67µH RUN TG VOUT FREQ SW 5V CSS CB MTOP COUT 4A 0.1µF 0.1µF 47µF ×4 SS BOOST 6C.8ITnHF 5R.1IT1Hk BG D1 D2 MBOT ITH Q CITHA VBIAS 100pF INTVCC CINT 1R50Ak GND 4.7µF 100k 1M C2 VOUT VIN C1 VFB PGOOD 10µF LTC1754-5 10µF R47B5k C1FµLYF CC+– SHGDNND CIN, COUT: TDK C3225X5R1A476M 3786 F13a L: TOKO FDV0840-R67M MBOT, MTOP: INFINEON BSC046N02KS Q: VISHAY SILICONIX Si1499DH D1: INFINEON BAS140W D2: NXP PMEG2005EJ CFLY: MURATA GRM39X5R105K6.3AJ C1, C2: MURATA GRM40X5R106K6.3AJ 98 96 VIN = 4.2V VIN = 3.3V %) 94 Y ( VIN = 2.7V C N 92 E CI FI F E 90 88 86 0 1 2 3 4 OUTPUT CURRENT (A) 3786 F13b Figure 13. Low I Lithium-Ion to 5V/4A Boost Converter Q 3786fc 28 For more information www.linear.com/LTC3786

LTC3786 APPLICATIONS INFORMATION VBIAS VIN SENSE+ 5V TO 24V CIN LTC3786 C0.11µF R216%S.21k 5R3S.61k L10.2µH 22µF RUN 1% SENSE– FREQ CSS TG 0.1µF VOUT SW 24V 1C5ITnHF RITH SS BOOST 0.C1BµF MTOP C2×24OµUFTA + C22O0UµTBF 4A 8.87k ITH BG MBOT CITHA D 220pF INTVCC CINT 4.7µF RA GND 12.1k PLLIN/MODE VFB 100k PGOOD RB 232k C1: TDK C1005X7R1C104K 3786 F14a CIN, COUTA: TDK C4532X5R1E226M COUTB: SANYO, 50CE220AX L: PULSE PA2050.103NL MBOT, MTOP: RENESAS RJK0305 D: INFINEON BAS140W 100 VIN = 12V 98 96 %) Y ( 94 C N E CI 92 FI F E 90 88 86 0 1 2 3 4 OUTPUT CURRENT (A) 3786 F14b Figure 14. High Efficiency 24V Boost Converter with Inductor DCR Current Sensing 3786fc 29 For more information www.linear.com/LTC3786

LTC3786 APPLICATIONS INFORMATION DANGER HIGH VOLTAGE! OPERATION BY HIGH VOLTAGE TRAINED PERSONNEL ONLY VBIAS SENSE+ VIN LTC3786 10nF RSENSE CIN 5V TO 12V 15mΩ 22µF PLLIN/MODESENSE– 1:T10 D ×2 VOUT fSW =2 150k5kHz RUN • C68OnUFT 31500mVA CSS FREQ TG 22Ω • ×2 0.1µF SS 220pF 2C2ITnHF RITH SW 8.66k BOOST CITHA ITH BG MBOT 100pF INTVCC CINT 16.2k 4.7µF 1% GND VFB 100k PGOOD 1M 1M 1.5M 1% 1% 1% 3786 F15 CIN: TDK C3225X7R1C226M COUT: TDK C3225X7R2J683K D: VISHAY SILICONIX GSD2004S DUAL DIODE CONNECTED IN SERIES MBOT: VISHAY SILICONIX Si7850DP T: TDK DCT15EFD-U44S003 Figure 15. Low I High Voltage Flyback Power Supply Q VBIAS SENSE+ VIN LTC3786 RSENSE CIN 5V TO 24V 6mΩ 10µF SENSE– ×2 L PLLIN/MODE 10µH RUN TG FREQ D VOUT CSS 0.1µF SW 24V SS COUTA+ C47OµUFTB 2A BOOST 10µF CITH 22nF ×4 RITH 8.66k BG MBOT ITH CITHA 100pF INTVCC CINT 12.1k 4.7µF 1% GND VFB 100k PGOOD 232k 1% CIN, COUTA: MURATA GRM31CR61E106KA12 3786 F15 COUTB: KEMET T495X476K035AS D: ON SEMI MBRS340T3G L: VISAY SILICONIX IHLP-5050FD-01 10µH MBOT: VISHAY SILICONIX Si4840BDP Figure 16. Low I Nonsynchronous 24V/2A Boost Converter Q 3786fc 30 For more information www.linear.com/LTC3786

LTC3786 PACKAGE DESCRIPTION Please refer to http://www.linear.com/product/LTC3786#packaging for the most recent package drawings. MSE Package 16-Lead Plastic MSOP, Exposed Die Pad (Reference LTC DWG # 05-08-1667 Rev F) BOTTOM VIEW OF EXPOSED PAD OPTION 2.845 (cid:116)0.102 2.845 (cid:116)0.102 (.112 (cid:116).004) 0.889 (cid:116)0.127 (.112 (cid:116).004) (.035 (cid:116).005) 1 8 0.35 REF 5.10 1.651 (cid:116)0.102 3.20 – 3.45 1.651 (cid:116)0.102 (.M20IN1) (.065 (cid:116).004) (.126 – .136) (.065 (cid:116).004) 0.12 REF DETAIL “B” CORNER TAIL IS PART OF DETAIL “B” THE LEADFRAME FEATURE. FOR REFERENCE ONLY 16 9 0.305 (cid:116)0.038 0.50 NO MEASUREMENT PURPOSE (.0120 (cid:116).0015) (.0197) 4.039 (cid:116)0.102 TYP BSC (.159 (cid:116).004) (NOTE 3) 0.280 (cid:116)0.076 RECOMMENDED SOLDER PAD LAYOUT 16151413121110 9 (.011 (cid:116).003) REF DETAIL “A” 0.254 (.010) 3.00 (cid:116)0.102 0(cid:115) – 6(cid:115) TYP 4.90 (cid:116)0.152 (.118 (cid:116).004) (.193 (cid:116).006) GAUGE PLANE (NOTE 4) 0.53 (cid:116)0.152 (.021 (cid:116).006) 1234567 8 DETAIL “A” 1.10 0.86 0.18 (.043) (.034) (.007) MAX REF SEATING PLANE 0.17 – 0.27 0.1016 (cid:116)0.0508 (.007 – .011) (.004 (cid:116).002) TYP 0.50 NOTE: (.0197) MSOP (MSE16) 0213 REV F 1. DIMENSIONS IN MILLIMETER/(INCH) BSC 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL NOT EXCEED 0.254mm (.010") PER SIDE. 3786fc 31 For more information www.linear.com/LTC3786

LTC3786 PACKAGE DESCRIPTION Please refer to http://www.linear.com/product/LTC3786#packaging for the most recent package drawings. UD Package 16-Lead Plastic QFN (3mm × 3mm) (Reference LTC DWG # 05-08-1691) 0.70 (cid:112)0.05 3.50 (cid:112) 0.05 1.45 (cid:112) 0.05 2.10 (cid:112) 0.05 (4 SIDES) PACKAGE OUTLINE 0.25 (cid:112)0.05 0.50 BSC RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS BOTTOM VIEW—EXPOSED PAD R = 0.115 PIN 1 NOTCH R = 0.20 TYP 3.00 (cid:112) 0.10 0.75 (cid:112) 0.05 TYP OR 0.25 × 45(cid:111) CHAMFER (4 SIDES) 15 16 PIN 1 0.40 (cid:112) 0.10 TOP MARK (NOTE 6) 1 1.45 (cid:112) 0.10 2 (4-SIDES) (UD16) QFN 0904 0.200 REF 0.25 (cid:112) 0.05 0.00 – 0.05 0.50 BSC NOTE: 1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WEED-2) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 3786fc 32 For more information www.linear.com/LTC3786

LTC3786 REVISION HISTORY REV DATE DESCRIPTION PAGE NUMBER A 9/11 Updated the Topside MOSFET Driver Supply (C , D ) section. 18 B B Updated Figure 12. 27 B 9/16 Added H-Grade 2, 4 C 11/17 Clarified graphs G01 and G08 5 Changed INTV to GND on G20 7 CC Changed Pin 9 to Pin 8 for PLLIN/Mode pin function 8 Changed from (V • V ) to (V – V ) 15 OUT IN OUT IN 3786fc Information furnished by Linear Technology Corporation is believed to be accurate and reliable. 33 However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconneFcotiro nm oof rites cinirfcouritms aast idoens cwribwewd h.leinreeina rw.cilol nmot/ LinTfrCin3g7e 8o6n existing patent rights.

LTC3786 TYPICAL APPLICATION High Efficiency 48V Boost Converter VBIAS SENSE+ VIN LTC3786 RSENSE CIN 5V TO 38V 8mΩ 6.8µF SENSE– ×4 L PLLIN/MODE 16µH RUN TG FREQ VOUT CSS 0.1µF SW 48V SS CB 0.1µF MTOP C6.O8UµTFA+ COUTB 2A* BOOST 220µF CITH 15nF ×4 RITH 8.66k BG MBOT ITH D CITHA 220pF INTVCC CINT 4.7µF RA 12.1k GND VFB 100k PGOOD RS 475k CIN, COUTA: TDK C4532X7R1H685K 3786 TA02 COUTB: SANYO 63CE220KX D: BAS170W L: PULSE PA2050.163NL MBOT, MTOP: RENESAS RJK0652DPB *WHEN VIN < 13V, MAXIMUM LOAD CURRENT AVAILABLE IS REDUCED. RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTC3788/LTC3788-1 Dual Output, Low I Multiphase Synchronous Boost 4.5V (Down to 2.5V after Start-up) ≤ V ≤ 38V, V up to 60V, 50kHz Q IN OUT Controller to 900kHz Fixed Operating Frequency, 5mm × 5mm QFN-32, SSOP-28 LTC3787 Single Output, Low I Multiphase Synchronous Boost 4.5V (Down to 2.5V after Start-up) ≤ V ≤ 38V, V up to 60V, 50kHz Q IN OUT Controller to 900kHz Fixed Operating Frequency, 4mm × 5mm QFN-28, SSOP-28 LTC3769 60V Low I Synchronous Boost Controller 4.5V (Down to 2.3V after Start-up) ≤ V ≤ 60V, V up to 60V, Q IN OUT 50kHz to 900kHz Fixed Operating Frequency, 4mm × 4mm QFN-24, TSSOP-20 LTC3784 60V Single Output, Low I Multiphase Synchronous 4.5V (Down to 2.3V after Start-up) ≤ V ≤ 60V, V up to 60V, 50kHz Q IN OUT Boost Controller to 900kHz Fixed Operating Frequency, 4mm × 5mm QFN-28, SSOP-28 LTC3862/LTC3862-1 Single Output, Multiphase Current Mode Step-Up DC/DC 4V ≤ V ≤ 36V, 5V or 10V Gate Drive, 75kHz to 500kHz Fixed IN Controller Operating Frequency, SSOP-24, TSSOP-24, 5mm × 5mm QFN-24 LT3757/LT3758 Boost, Flyback, SEPIC and Inverting Controller 2.9V ≤ V ≤ 40V/100V, 100kHz to 1MHz Fixed Operating Frequency, IN 3mm × 3mm DFN-10 and MSOP-10E LTC1871, LTC1871-1, Wide Input Range, No R Low I Boost, Flyback and 2.5V ≤ V ≤ 36V, 50kHz to 1MHz Fixed Operating Frequency, SENSE Q IN LTC1871-7 SEPIC Controller MSOP-10 LTC3859AL Low I , Triple Output Buck/Buck/Boost Synchronous All Outputs Remain in Regulation Through Cold Crank, 4.5V(Down to Q DC/DC Controller 2.5V after Start-up) ≤ V ≤ 38V, V Up to 24V, V IN OUT(BUCKS) OUT(BOOST) Up to 60V, I = 28µA Q LTC3789 High Efficiency Synchronous 4-Switch Buck-Boost 4V ≤ VIN ≤ 38V, 0.8V ≤ VOUT ≤ 38V, SSOP-28, 4mm × 5mm QFN-28, DC/DC Controller SSOP-28 LT8710 Synchronous SEPIC/Inverting/Boost Controller with 4V ≤ V ≤ 80V, SSOP-28, TSSOP-20 IN Output Current Control 3786fc 34 LT 1117 REV C • PRINTED IN USA www.linear.com/LTC3786 For more information www.linear.com/LTC3786  LINEAR TECHNOLOGY CORPORATION 2010