LTC3714 Intel Compatible, Wide Operating Range, Step-Down Controller with Internal Op Amp FeaTures DescripTion n True Current Mode with Ultrafast Transient Response The LTC®3714 is a synchronous step-down switching n Stable with Ceramic C regulator controller for CPU power. An output voltage OUT n t < 100ns for Operation from High Input between 0.6V and 1.75V is selected by a 5-bit code (Intel ON(MIN) Ranges mobile VID specification). The controller uses a constant n Supports Active Voltage Positioning on-time, valley current control architecture to deliver very n No Sense Resistor Required low duty cycles without requiring a sense resistor. Oper- n 5-Bit VID Programmable Output Voltage: 0.6V to 1.75V ating frequency is selected by an external resistor and is n Dual N-Channel MOSFET Synchronous Drive compensated for variations in V and V . IN OUT n Programmable Output Offsets Discontinuous mode operation provides high efficiency n Power Good Output Voltage Monitor operation at light loads. A forced continuous control pin n Wide V Range: 4V to 36V IN reduces noise and RF interference and can assist second- n ±1% 0.6V Reference ary winding regulation by disabling discontinuous mode n Adjustable Frequency when the main output is lightly loaded. Internal op amp n Programmable Soft-Start allows programmable offsets to the output voltage during n Output Overvoltage Protection power saving modes. n Optional Short-Circuit Shutdown Timer n Forced Continuous Control Pin Fault protection is provided by internal foldback current n Logic Controlled Micropower Shutdown: I ≤ 30µA limiting, an output overvoltage comparator and optional Q n Available in 0.209" Wide 28-Lead SSOP Package short-circuit shutdown timer. Soft-start capability for supply sequencing is accomplished using an external applicaTions timing capacitor. The regulator current limit level is user programmable. Wide supply range allows operation from n Power Supply for Mobile Pentium® Processors and 4V to 36V at the input. Transmeta Processors n Notebook and Portable Computers L, LTC and LT are registered trademarks of Linear Technology Corporation. Pentium is a registered trademark of Intel Corporation. Typical applicaTion LTC3714 RON Transient Response of 8A to 23A Output Load Step INTVCC PGOOD ION 0C.1SµSF VIN M1 10µF 5VVIN TO 24V 1.395V RUN/SS TG 35V IRF7811 L1 ×4 CC RC ITH BOOSSWT CB, 0.22µF ×2 0.68µH + COUT V02.3O6AUVT TO 1.75V V1.O3U5TV SGND DB 270µF 50mV/DIV CMDSH-3 2V VID4 INTVBCGC MIR2F7811 D1* ×4 1.213V UPS840 5-VBIIDT VVVIIIDDD123 SENSE + 4C.V7CµCF ×03.003Ω* 23AI1L0OAA/DDIV VID0 PGND 8A VOSENSE 3714 F01 20µs/DIV 3714 TA03 *OPTIONAL Figure 1. High Efficiency Step-Down Converter 3714f 1

LTC3714 absoluTe MaxiMuM raTings pin conFiguraTion (Note 1) ORDER PART Input Supply Voltage (V ), I ..................36V to –0.3V TOP VIEW IN ON NUMBER Boosted Topside Driver Supply Voltage BG 1 28 INTVCC LTC3714EG (BOOST) ................................................... 42V to –0.3V PGND 2 27 VIN SW, SENSE Voltages .................................... 36V to –5V SENSE 3 26 EXTVCC EXTV , (BOOST – SW), RUN/SS, VID0-VID4, SW 4 25 VID4 CC TG 5 24 VID3 PGOOD, FCB Voltages ................................ 7V to –0.3V V , V Voltages .................(INTV + 0.3V) to –0.3V BOOST 6 23 VOSENSE ON RNG CC VID0 7 22 VFB I , V , V Voltages ....................... 2.7V to –0.3V TH FB OSENSE VID1 8 21 ION TG, BG, INTV , EXTV Peak Currents .................... 2A CC CC VID2 9 20 FCB TG, BG, INTV , EXTV RMS Currents ............... 50mA CC CC RUN/SS 10 19 SGND OPV , OP+, OP– ..............................................0V to 18V IN VON 11 18 OPOUT Operating Ambient Temperature Range PGOOD 12 17 OP+ LTC3714EG (Note 2) ............................–40°C to 85°C VRNG 13 16 OP– Junction Temperature (Note 3) ............................ 125°C ITH 14 15 OPVIN Storage Temperature Range ..................–65°C to 150°C G PACKAGE Lead Temperature (Soldering, 10 sec) ...................300°C 28-LEAD PLASTIC SSOP TJMAX = 125°C, θJA = 130°C/W Consult LTC Marketing for parts specified with wider operating temperature ranges. elecTrical characTerisTics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T = 25°C. V = 15V unless otherwise noted. A IN SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Main Control Loop I Input DC Supply Current Q Normal 900 2000 µA Shutdown Supply Current 15 30 µA V Feedback Reference Voltage I = 1.2V (Note 4) l 0.594 0.600 0.606 V FB TH ∆V Feedback Voltage Line Regulation V = 4V to 30V (Note 4), I = 1.2V 0.002 %/V FB(LINEREG) IN TH ∆V Feedback Voltage Load Regulation I = 0.5V to 1.9V (Note 4) l –0.05 –0.3 % FB(LOADREG) TH g Error Amplifier Transconductance I = 1.2V (Note 4) l 1.4 1.7 2 ms m(EA) TH V Forced Continuous Threshold l 0.57 0.6 0.63 V FCB I Forced Continuous Current V = 0.6V –1 –2 µA FCB FCB t On-Time I = 60µA, V = 1.5V 200 250 300 ns ON ON ON t Minimum On-Time I = 180µA, V = 0V 50 100 ns ON(MIN) ON ON t Minimum Off-Time I = 60µA, V = 1.5V 250 400 ns OFF(MIN) ON ON V Maximum Current Sense Threshold V = 1V, V = 0.56V l 113 133 153 mV SENSE(MAX) RNG FB V = 0V, V = 0.56V l 79 93 107 mV RNG FB V = INTV , V = 0.56V l 158 186 214 mV RNG CC FB V Minimum Current Sense Threshold V = 1V, V = 0.64V –67 mV SENSE(MIN) RNG FB V = 0V, V = 0.64V –33 mV RNG FB V = INTV , V = 0.64V –93 mV RNG CC FB ∆V Output Overvoltage Fault Threshold 7.5 10 12.5 % FB(OV) ∆V Output Undervoltage Fault Threshold 340 400 460 mV FB(UV) V RUN Pin Start Threshold l 0.8 1.5 2 V RUN/SS(ON) 3714f 2

LTC3714 elecTrical characTerisTics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T = 25°C. V = 15V unless otherwise noted. A IN SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V RUN Pin Latchoff Enable Threshold RUN/SS Pin Rising 4 4.5 V RUN/SS(LE) V RUN Pin Latchoff Threshold RUN/SS Pin Falling 3.5 4.2 V RUN/SS(LT) I Soft-Start Charge Current –0.5 –1.2 –3 µA RUN/SS(C) I Soft-Start Discharge Current 0.8 1.8 3 µA RUN/SS(D) V Undervoltage Lockout Threshold V Falling l 3.4 3.9 V IN(UVLO) IN V Undervoltage Lockout Threshold V Rising l 3.5 4 V IN(UVLOR) IN TG R TG Driver Pull-Up On Resistance TG High 2 3 Ω UP TG R TG Driver Pull-Down On Resistance TG Low 2 3 Ω DOWN BG R BG Driver Pull-Up On Resistance BG High 3 4 Ω UP BG R BG Driver Pull-Down On Resistance BG Low 1 2 Ω DOWN TG t TG Rise Time C = 3300pF 20 ns r LOAD TG t TG Fall Time C = 3300pF 20 ns f LOAD BG t BG Rise Time C = 3300pF 20 ns r LOAD BG t BG Fall Time C = 3300pF 20 ns f LOAD Internal V Regulator CC V Internal V Voltage 6V < V < 30V, V = 4V l 4.7 5 5.3 V INTVCC CC IN EXTVCC ∆V Internal V Load Regulation I = 0mA to 20mA, V = 4V –0.1 ±2 % LDO(LOADREG) CC CC EXTVCC V EXTV Switchover Voltage I = 20mA, V Rising l 4.5 4.7 V EXTVCC CC CC EXTVCC ∆V EXTV Switch Drop Voltage I = 20mA, V = 5V 150 300 mV EXTVCC CC CC EXTVCC ∆V EXTV Switchover Hysteresis 200 mV EXTVCC(HYS) CC PGOOD Output ∆V PGOOD Upper Threshold V Rising 7.5 10 12.5 % FBH FB ∆V PGOOD Lower Threshold V Falling –7.5 –10 –12.5 % FBL FB ∆V PGOOD Hysteresis V Returning 1 2.5 % FB(HYS) FB V PGOOD Low Voltage I = 1mA 0.15 0.4 V PGL PGOOD VID DAC V VID0-VID4 Logic Threshold Voltage 0.4 1.2 2 V VID(T) I VID0-VID4 Pull-Up Current V to V = 0V –2.5 µA VID(PULLUP) VID0 VID4 V VID0-VID4 Pull-Up Voltage V to V Open 4.5 V VID(PULLUP) VID0 VID4 I VID0-VID4 Leakage Current V to V = 5V, V = 0V 0.01 1 µA VID(LEAK) VID0 VID4 RUN/SS R Resistance from V to V 6 10 14 kΩ VID OSENSE FB ∆V DAC Output Accuracy V Programmed from –0.45 0 0.25 % OSENSE OSENSE 0.6V to 1.75V (Note 5) V = 5V unless otherwise noted. IN Internal Op Amp V Input Offset Voltage 400 1000 µV OS I Input Offset Current 4 10 nA OS I Input Bias Current 45 80 nA B CMRR Common Mode Rejection Ratio V = 0V to (V – 1V) 100 dB CM CC V = 0V to 18V 80 dB CM 3714f 3

LTC3714 elecTrical characTerisTics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T = 25°C. V = 5V unless otherwise noted. A IN SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS PSRR Power Supply Rejection Ratio OPV = 3V to 12.5V, OP = V = 1V 100 dB IN OUT O A Large-Signal Voltage Gain OPV = 5V, OP = 500mV to 4.5V, R = 10k 1500 V/mV VOL IN OUT L V Output Voltage Swing LOW OPV = 5V, I = 5mA l 165 500 mV OL IN SINK V Output Voltage Swing HIGH OPV = 5V, I = 5mA l 4.5 4.87 V OH IN SOURCE I Short-Circuit Current Short to GND 30 mA SC Short to OPV 40 mA IN I Supply Current 170 300 µA S Note 1: Absolute Maximum Ratings are those values beyond which the life Note 4: The LTC3714 is tested in a feedback loop that adjusts V to FB of a device may be impaired. achieve a specified error amplifier output voltage (I ). TH Note 2: The LTC3714E is guaranteed to meet performance specifications Note 5: The LTC3714 VID DAC is tested in a feedback loop that adjusts from 0°C to 70°C. Specifications over the –40°C to 85°C operating V to achieve a specified feedback voltage (V = 0.6V) for each DAC OSENSE FB temperature range are assured by design, characterization and correlation VID code. with statistical process controls. Note 3: T is calculated from the ambient temperature T and power J A dissipation P as follows: D LTC3714EG: T = T + (P • 130°C/W) J A D 3714f 4

LTC3714 Typical perForMance characTerisTics Transient Response Transient Response (Discontinuous Mode) Start-Up 50mVV/ODUIVT VOUT R2UVN/D/SISV 50mV/DIV VOUT 500mV/DIV 5A/DIIVL 5A/DIIVL IL 5A/DIV 20µs/DIV 3714 G01 20µs/DIV 3714 G02 VIN = 15V 50ms/DIV 3714 G03 LOAD STEP 0A TO 10A LOAD STEP 0A TO 10A VOUT = 1.25V VIN = 15V VIN = 15V RLOAD = 0.125Ω VOUT = 1.5V VOUT = 1.5V FCB = 0V FCB = INTVCC FIGURE 1 CIRCUIT FIGURE 1 CIRCUIT Efficiency vs Load Current Efficiency vs Input Voltage Frequency vs Input Voltage 95 100 300 FCB = 0V FIGURE 1 CIRCUIT 90 VIN = 8.5V 280 90 IOUT = 10A EFFICIENCY (%) 8850 VIN V= I1N5 =V 24V EFFICIENCY (%) 80 IOUT = 1I0OAUT = 1A REQUENCY (kHz) 224600 IOUT = 0A F 70 IOUT = 23A 75 VOUT = 1.35V 220 FREQUENCY = 300kHz FIGURE 1 CIRCUIT 70 60 200 0 3 6 9 12 15 18 21 0 5 10 15 20 25 30 5 10 15 20 25 LOAD CURRENT (A) INPUT VOLTAGE (V) INPUT VOLTAGE (V) 3714 G04 3714 G05 3714 G06 Current Sense Threshold Load Regulation ITH Voltage vs Load Current vs ITH Voltage 0 2.5 300 NO AVP FIGURE 1 CIRCUIT VRNG = 2V FIGURE 1 CIRCUIT V) m –0.1 2.0 D ( 200 1.4V L O 1V ∆V (%)OUT–0.2 I VOLTAGE (V)TH 11..05 CONTINMUOOUDSE T SENSE THRESH 1000 00..75VV N –0.3 DISCONTINUOUS RE 0.5 MODE UR–100 C –0.4 0 –200 0 2 4 6 8 10 0 5 10 15 0 0.5 1.0 1.5 2.0 2.5 3.0 LOAD CURRENT (A) LOAD CURRENT (A) ITH VOLTAGE (V) 3714 G07 3714 G08 3714 G09 3714f 5

LTC3714 Typical perForMance characTerisTics On-Time vs I Current On-Time vs V Voltage On-Time vs Temperature ON ON 10k 1000 300 VVON = 0V IION = 30µA IION = 30µA VVON = 0V 250 800 1k 200 ME (ns) ME (ns) 600 ME (ns) 150 N-TI N-TI 400 N-TI O O O 100 100 200 50 10 0 0 1 10 100 0 1 2 3 –50 –25 0 25 50 75 100 125 ION CURRENT (µA) VON VOLTAGE (V) TEMPERATURE (°C) 3714 G10 3714 G11 3714 G12 Maximum Current Sense Maximum Current Sense Maximum Current Sense Threshold vs V Voltage Threshold vs RUN/SS Voltage Threshold vs Temperature RNG mV)300 mV)150 VRNG = 1V mV)150 VRNG = 1V D ( D ( D ( HOL250 HOL125 HOL140 HRES200 HRES100 HRES NSE T NSE T NSE T130 NT SE150 NT SE 75 NT SE120 RRE100 RRE 50 RRE U U U M C M C M C110 U 50 U 25 U M M M MAXI 0 MAXI 0 MAXI100 0.5 0.75 1.0 1.25 1.5 1.75 2.0 1.5 2 2.5 3 3.5 –50 –25 0 25 50 75 100 125 VRNG VOLTAGE (V) RUN/SS VOLTAGE (V) TEMPERATURE (°C) 3714 G13 3714 G14 3714 G15 Feedback Reference Voltage vs Temperature Error Amplifier g vs Temperature m 0.62 2.0 V) E ( 1.8 AG0.61 T L O V CE S) 1.6 EFEREN0.60 g (mm1.4 R K C A0.59 B D 1.2 E E F 0.58 1.0 –50 –25 0 25 50 75 100 125 –50 –25 0 25 50 75 100 125 TEMPERATURE (°C) TEMPERATURE (°C) 3714 G16 3714 G17 3714f 6

LTC3714 Typical perForMance characTerisTics Input and Shutdown Currents EXTV Switch Resistance CC vs Input Voltage INTVCC Load Regulation vs Temperature 1200 60 0 10 EXTVCC OPEN 1000 50 SH –0.1 E (Ω) 8 INPUT CURRENT (µA) 462800000000 SHUTDOWN 41230000 UTDOWN CURRENT (µA) ∆INTV (%)CC–––000...432 XTV SWITCH RESISTANCCC 642 E EXTVCC = 5V 0 0 –0.5 0 0 5 10 15 20 25 30 35 0 10 20 30 40 50 –50 –25 0 25 50 75 100 125 INPUT VOLTAGE (V) INTVCC LOAD CURRENT (mA) TEMPERATURE (°C) 3714 G18 3714 G19 3714 G20 RUN/SS Pin Current FCB Pin Current vs Temperature vs Temperature 0 3 –0.25 2 A) A) T (µ –0.50 T (µ PULL-DOWN CURRENT N N 1 E E R R UR –0.75 UR C C N N 0 PI PI B –1.00 B C C F F PULL-UP CURRENT –1 –1.25 –1.50 –2 –50 –25 0 25 50 75 100 125 –50 –25 0 25 50 75 100 125 TEMPERATURE (°C) TEMPERATURE (°C) 3714 G21 3714 G22 RUN/SS Latchoff Thresholds Undervoltage Lockout Threshold vs Temperature vs Temperature 5.0 4.0 V) D ( L O H D (V) 4.5 HRES 3.5 N/SS THRESHOL 4.0 LATCHOFF ENABLE AGE LOCKOUT T 3.0 RU 3.5 OLT 2.5 LATCHOFF THRESHOLD RV E D N U 3.0 2.0 –50 –25 0 25 50 75 100 125 –50 –25 0 25 50 75 100 125 TEMPERATURE (°C) TEMPERATURE (°C) 3714 G23 3714 G24 3714f 7

LTC3714 pin FuncTions BG (Pin 1): Bottom Gate Drive. Drives the gate of the mum output current and can be set from 0.5V to 2V by a bottom N-channel MOSFET between ground and INTV . resistive divider from INTV . The sense voltage defaults CC CC to 70mV when this pin is tied to ground, 140mV when PGND (Pin 2): Power Ground. Connect this pin closely to tied to INTV . the bottom of the sense resistor or if no sense resistor is CC used, to the source of the bottom N-channel MOSFET, the ITH (Pin 14): Current Control Threshold and Error Amplifier (–) terminal of CV and the (–) terminal of C . Compensation Point. The current comparator threshold CC IN increases with this control voltage. The voltage ranges SENSE (Pin 3): Current Sense Comparator Input. The (+) from 0V to 2.4V with 0.8V corresponding to zero sense input to the current comparator is normally connected to voltage (zero current). the SW node unless using a sense resistor (see Applica- tions Information). OPV (Pin 15): Internal Op Amp Supply. Connect to IN INTV or a separate supply greater than 5V. SW (Pin 4): Switch Node. The (–) terminal of the bootstrap CC capacitor C connects here. This pin swings from a diode OP– (Pin 16): Negative Input of the Internal Op Amp. B voltage drop below ground up to V . IN OP+ (Pin 17): Positive Input of the Internal Op Amp. TG (Pin 5): Top Gate Drive. Drives the top N-channel OPOUT (Pin 18): Output of the Internal Op Amp. MOSFET with a voltage swing equal to INTV superim- CC posed on the switch node voltage SW. SGND (Pin 19): Signal Ground. All small-signal compo- nents and compensation components should connect to BOOST (Pin 6): Boosted Floating Driver Supply. The (+) this ground, which in turn connects to PGND at one point. terminal of the bootstrap capacitor C connects here. This B pin swings from a diode voltage drop below INTV up FCB (Pin 20): Forced Continous Input. Tie this pin to CC to V + INTV . ground to force continuous synchronous operation at low IN CC load, to INTV to enable discontinuous mode operation at CC VID0-VID4 (Pins 7, 8, 9, 24, 25): VID Digital Inputs. The low load or to a resistive divider from a secondary output voltage identification (VID) code sets the internal feedback when using a secondary winding. resistor divider ratio for different output voltages as shown in Table 1. If unconnected, the pins are pulled high by ION (Pin 21): On-Time Current Input. Tie a resistor from VIN internal 2.5µA current sources. to this pin to set the one-shot timer current and thereby set the switching frequency. RUN/SS (Pin 10): Run Control and Soft-Start Input. A capacitor to ground at this pin sets the ramp time to full VFB (Pin 22): Error Amplifier Feedback Input. This pin con- output current (approximately 3s/µF) and the time delay nects to both the error amplifier input and to the output for overcurrent latchoff (see Applications Information). of the internal resistive divider. It can be used to attach Forcing this pin below 0.8V shuts down the device. additional compensation components if desired. VON (Pin 11): On-Time Voltage Input. Voltage trip point for VOSENSE (Pin 23): Output Voltage Sense. The output volt- the on-time comparator. Tying this pin to the output voltage age connects here to the input of the internal resistive makes the on-time proportional to V . The comparator feedback divider. OUT input defaults to 0.7V when the pin is grounded, 2.4V when EXTV (Pin 26): External V Input. When EXTV exceeds CC CC CC the pin is tied to INTV . CC 4.7V, an internal switch connects this pin to INTV and CC PGOOD (Pin 12): Power Good Output. Open drain logic shuts down the internal regulator so that controller and output that is pulled to ground when the output voltage gate drive power is drawn from EXTVCC. Do not exceed is not within ±10% of the regulation point. 7V at this pin and ensure that EXTVCC < VIN. VRNG (Pin 13): Sense Voltage Range Input. The voltage VIN (Pin 27): Main Input Supply. Decouple this pin to at this pin is ten times the nominal sense voltage at maxi- SGND with an RC filter (1Ω, 0.1µF). 3714f 8

LTC3714 pin FuncTions INTV (Pin 28): Internal 5V Regulator Output. The driver couple this pin to power ground with a minimum of 4.7µF CC and control circuits are powered from this voltage. De- tantalum or other low ESR capacitor. FuncTional block DiagraM RON VIN 11 VON 21 ION 20 FCB 26 EXTVCC 27 VIN 4.7V + CIN 1µA + – 0.7V 2.4V 0.6V REF 1 0.6V 5V REG – + OST F BOOST 6 tON = VIIVOONN(10pF) R TG CB S Q FCNT 5 M1 SW ON 20k 4 + + SWITCH SENSE L1 ICMP IREV LOGIC 3 – – INTVCC VOUT SHDN 28 + 1.4V OV BG CVCC COUT 1 M2 VRNG PGND 13 X 2 (0.5 TO 2) PGOOD 0.7V 12 3.3µA VOSENSE 23 1 240k + 0.54V R2 1V 10k Q2 Q4 UV 5× (ALL VID PINS) Q6 – INTVCC 2.5µA 7 VID0 Q3 Q1 + Q5 OV 8 VID1 +– 0.8V – 0.66V VID 9 VID2 DAC SS RUN SHDN 24 VID3 – + 1.2µA ×5.3 EA 6V 25 VID4 + – –+ 0.6V 0.6V 14 ITHRC CC1 0.4V 10 RUN/SS CSS 22 VFB R1 19 SGND 3714 FD 15 OPVIN OP+ 17 + OP AMP 18 OPOUT OP– 16 – 19 SGND 3714f 9

LTC3714 operaTion Main Control Loop The operating frequency is determined implicitly by the top MOSFET on-time and the duty cycle required to main- The LTC3714 is a constant on-time, current mode controller tain regulation. The one-shot timer generates an on-time for DC/DC step-down converters. In normal operation, the that is proportional to the ideal duty cycle, thus holding top MOSFET is turned on for a fixed interval determined frequency approximately constant with changes in V by a one-shot timer OST. When the top MOSFET is turned IN and V . The nominal frequency can be adjusted with off, the bottom MOSFET is turned on until the current OUT an external resistor R . comparator I trips, restarting the one-shot timer and ON CMP initiating the next cycle. Inductor current is determined Overvoltage and undervoltage comparators OV and UV by sensing the voltage between the PGND and SENSE pull the PGOOD output low if the output feedback volt- pins using either the bottom MOSFET on-resistance or a age exits a ±10% window around the regulation point. separate sense resistor. The voltage on the I pin sets Furthermore, in an overvoltage condition, M1 is turned TH the comparator threshold corresponding to inductor val- off and M2 is turned on and held on until the overvoltage ley current. The error amplifier EA adjusts this voltage by condition clears. comparing the feedback signal V from the output voltage FB Foldback current limiting is provided if the output is with an internal 0.6V reference. The feedback voltage is shorted to ground. As V drops, the buffered current FB derived from the output voltage by a resistive divider DAC threshold voltage I is pulled down by clamp Q3 to THB that is set by the VID code pins VID0-VID4. If the load a 1V level set by Q2 and Q6. This reduces the inductor current increases, it causes a drop in the feedback voltage valley current level to one sixth of its maximum value as relative to the reference. The I voltage then rises until the TH V approaches ground. FB average inductor current again matches the load current. Pulling the RUN/SS pin low forces the controller into its At low load currents, the inductor current can drop to zero shutdown state, turning off both M1 and M2. Releasing and become negative. This is detected by current reversal the pin allows an internal 1.2µA current source to charge comparator I which then shuts off M2, resulting in REV up an external soft-start capacitor C . When this voltage SS discontinuous operation. Both switches will remain off reaches 1.5V, the controller turns on and begins switching, with the output capacitor supplying the load current until but with the I voltage clamped at approximately 0.6V TH the I voltage rises above the zero current level (0.8V) TH below the RUN/SS voltage. As C continues to charge, SS to initiate another cycle. Continuous synchronous opera- the soft-start current limit is removed. tion can be forced in the LTC3714 by bringing the FCB pin below 0.6V. The benefit of forced continuous operation is lower output voltage ripple, faster transient response to current load steps and a much quieter frequency spec- trum so that it won’t interfere with any neighboring noise sensitive components. 3714f 10

LTC3714 operaTion Internal Op Amp INTV /EXTV Power CC CC The internal op amp allows the user to program accurate Power for the top and bottom MOSFET drivers and most of offsets to the output voltage during power saving modes. the internal controller circuitry is derived from the INTV CC By connecting the OP+ pin to the output, the OPOUT pin pin. The top MOSFET driver is powered from a floating to the V pin and an external resistor R1 between bootstrap capacitor C . This capacitor is recharged from OSENSE B the OP– and OPOUT pins, the op amp is hooked up as INTV through an external Schottky diode D when CC B a unity-gain feedback amplifier. Resistors R2 and R3, the top MOSFET is turned off. When the EXTV pin is CC together with series switches, can then be placed on the grounded, an internal 5V low dropout regulator supplies OP– pin to allow negative offsets to be switched onto the the INTV power from V . If EXTV rises above 4.7V, CC IN CC output voltage (see Figures 2a and 2b). The accuracy of the internal regulator is turned off, and an internal switch the offset will depend on the matching of the external connects EXTV to INTV . This allows a high efficiency CC CC resistors R1 to R2 and R3.* source connected to EXTV , such as an external 5V sup- CC ply or a secondary output from the converter, to provide For applications that require less accurate output offsets, the INTV power. Voltages up to 7V can be applied to or none at all, the user can use the internal op amp for CC EXTV for additional gate drive. If the input voltage is true differential remote sensing of the output voltage by CC low and INTV drops below 3.5V, undervoltage lockout connecting OPOUT to V and using OP+ and OP– for CC OSENSE circuitry prevents the power switches from turning on. differential sensing across the output capacitor as shown in Figure 2c. *An alternate configuration, shown in Figure 2b, can be used to program offsets as well. Either configuration can be used, depending upon the logic of control signals. If offsets are not required, the op amp can be used to remotely sense the output voltage, proving true differential sense. VOUT VOUT OP+ 15 OPVIN R1 O1P7+ + 15 OPVIN 17 + OPOUT VOSENSE VID DAC R2 18 23 VID DAC 18 23 OP– 16 – VFB BATMTOERDYE OP– 16 – VFB R1 22 OFFSET 22 R2 R1 R2 R3 R3 SLEEP BATTERY 3714 F02b 3714 F02b MODE MODE SLEEP OFFSET OFFSET MODE OFFSET Figure 2a Figure 2b R OP+ 15 OPVIN VOUT+ 17 + OPOUT VOSENSE R 18 23 OP– 16 – R VOUT– 3714 F02c R Figure 2c 3714f 11

LTC3714 applicaTions inForMaTion The basic LTC3714 application circuit is shown in bottom MOSFET as the current sense element by simply Figure 1. External component selection is primarily de- connecting the SENSE pin to the switch node SW at the termined by the maximum load current and begins with drain of the bottom MOSFET. This improves efficiency, but the selection of the sense resistance and power MOSFET one must carefully choose the MOSFET on-resistance as switches. The LTC3714 can use either a sense resistor or discussed below. the on-resistance of the synchronous power MOSFET for determining the inductor current. The desired amount of Power MOSFET Selection ripple current and operating frequency largely determines The LTC3714 requires two external N-channel power the inductor value. Finally, C is selected for its ability to IN MOSFETs, one for the top (main) switch and one for the handle the large RMS current into the converter and C OUT bottom (synchronous) switch. Important parameters for is chosen with low enough ESR to meet the output voltage the power MOSFETs are the breakdown voltage V , (BR)DSS ripple and transient specification. threshold voltage V , on-resistance R , reverse (GS)TH DS(ON) transfer capacitance C and maximum current I . RSS DS(MAX) Maximum Sense Voltage and V Pin RNG The gate drive voltage is set by the 5V INTV supply. CC Inductor current is determined by measuring the volt- Consequently, logic-level threshold MOSFETs must be used age across a sense resistance that appears between the in LTC3714 applications. If the input voltage is expected PGND and SENSE pins. The maximum sense voltage is to drop below 5V, then sub-logic level threshold MOSFETs set by the voltage applied to the V pin and is equal RNG should be considered. to approximately (0.133)V . The current mode control RNG loop will not allow the inductor current valleys to exceed When the bottom MOSFET is used as the current sense (0.133)V /R . In practice, one should allow some element, particular attention must be paid to its on- RNG SENSE margin for variations in the LTC3714 and external com- resistance. MOSFET on-resistance is typically specified ponent values and a good guide for selecting the sense with a maximum value RDS(ON)(MAX) at 25°C. In this case, resistance is: additional margin is required to accommodate the rise in MOSFET on-resistance with temperature: V R = RNG SENSE R 10•IOUT(MAX) RDS(ON)(MAX) = SENSE ρT An external resistive divider from INTV can be used CC to set the voltage of the VRNG pin between 0.5V and 2V The ρT term is a normalization factor (unity at 25°C) resulting in nominal sense voltages of 50mV to 200mV. accounting for the significant variation in on-resistance Additionally, the V pin can be tied to SGND or INTV in with temperature, typically about 0.4%/°C as shown in RNG CC which case the nominal sense voltage defaults to 70mV or Figure 3. Junction-to-case temperature is about 30°C in 140mV, respectively. The maximum allowed sense voltage most applications. For a maximum ambient temperature is about 1.33 times this nominal value. of 70°C, using a value ρ100°C = 1.3 is reasonable. The power dissipated by the top and bottom MOSFETs Connecting the SENSE Pin strongly depends upon their respective duty cycles and the The LTC3714 can be used with or without a sense resis- load current. When the LTC3714 is operating in continuous tor. When using a sense resistor, it is placed between the mode, the duty cycles for the MOSFETs are: source of the bottom MOSFET M2 and ground. Connect V the SENSE pin to the source of the bottom MOSFET so D = OUT TOP that the resistor appears between the SENSE and PGND VIN pins. Using a sense resistor provides a well defined cur- V –V D = IN OUT rent limit, but adds cost and reduces efficiency. Alterna- BOT V IN tively, one can eliminate the sense resistor and use the 3714f 12

LTC3714 applicaTions inForMaTion Tying a resistor R from V to the I pin yields an 2.0 ON IN ON on-time inversely proportional to V . For a step-down IN E NC converter, this results in approximately constant frequency TA 1.5 S operation as the input supply varies: SI E R D ON- 1.0 f= VOUT E V R (10pF) LIZ VON ON A M R O 0.5 To hold frequency constant during output voltage changes, N ρ T tie the V pin to V . The V pin has internal clamps ON OUT ON that limit its input to the one-shot timer. If the pin is tied 0 –50 0 50 100 150 below 0.7V, the input to the one-shot is clamped at 0.7V. JUNCTION TEMPERATURE (°C) Similarly, if the pin is tied above 2.4V, the input is clamped 3714 F02 at 2.4V. Figure 3. R vs Temperature DS(ON) Because the voltage at the I pin is about 0.7V, the current ON The resulting power dissipation in the MOSFETs at maxi- into this pin is not exactly inversely proportional to V , IN mum output current are: especially in applications with lower input voltages. To correct for this error, an additional resistor R connected P = D I 2 ρ R ON2 TOP TOP OUT(MAX) T(TOP) DS(ON)(MAX) from the I pin to the 5V INTV supply will further help + k V 2 I C f ON CC IN OUT(MAX) RSS to stabilize the frequency. P = D I 2 ρ R BOT BOT OUT(MAX) T(BOT) DS(ON)(MAX) 5V Both MOSFETs have I2R losses and the top MOSFET RON2 = RON 0.7V includes an additional term for transition losses, which are largest at high input voltages. The constant k = 1.7A–1 Changes in the load current magnitude will also cause can be used to estimate the amount of transition loss. The frequency shift. Parasitic resistance in the MOSFET bottom MOSFET losses are greatest when the bottom switches and inductor reduce the effective voltage across duty cycle is near 100%, during a short-circuit or at high the inductance, resulting in increased duty cycle as the input voltage. load current increases. By lengthening the on-time slightly as current increases, constant frequency operation can be Operating Frequency maintained. This is accomplished with a resistive divider from the I pin to the V pin and V . The values The choice of operating frequency is a tradeoff between TH ON OUT required will depend on the parasitic resistances in the efficiency and component size. Low frequency operation specific application. A good starting point is to feed about improves efficiency by reducing MOSFET switching losses 25% of the voltage change at the I pin to the V pin but requires larger inductance and/or capacitance in order TH ON as shown in Figure 4a. Place capacitance on the V pin to maintain low output ripple voltage. ON to filter out the I variations at the switching frequency. TH The operating frequency of LTC3714 applications is de- The resistor load on I reduces the DC gain of the error TH termined implicitly by the one-shot timer that controls the amp and degrades load regulation, which can be avoided on-time t of the top MOSFET switch. The on-time is set ON by using the PNP emitter follower of Figure 4b. by the current into the I pin and the voltage at the V ON ON pin according to: V t = VON(10pF) ON I ION 3714f 13

LTC3714 applicaTions inForMaTion RVON1 RVON1 30k 3k VOUT VON VOUT VON RV1O0N0k2 C0.V0O1NµF LTC3714 INTVCC 10k R10VkON2 C0.V0O1NµF LTC3714 RC Q1 RC ITH 2N5087 ITH CC CC 3714 F04a 3714 F04b (4a) (4b) Figure 4. Correcting Frequency Shift with Load Current Changes Inductor Selection Schottky Diode D1 Selection Given the desired input and output voltages, the induc- The Schottky diode D1 shown in Figure 1 conducts during tor value and operating frequency determine the ripple the dead time between the conduction of the power MOSFET current: switches. It is intended to prevent the body diode of the ⎛V ⎞⎛ V ⎞ bottom MOSFET from turning on and storing charge during ΔIL =⎜ OUT⎟⎜1− OUT⎟ the dead time, causing a modest (about 1%) efficiency ⎝ fL ⎠⎝ V ⎠ IN loss. The diode can be rated for about one half to one fifth of the full load current since it is on for only a fraction of Lower ripple current reduces cores losses in the inductor, the duty cycle. In order for the diode to be effective, the ESR losses in the output capacitors and output voltage inductance between it and the bottom MOSFET must be ripple. Highest efficiency operation is obtained at low as small as possible, mandating that these components frequency with small ripple current. However, achieving be placed adjacently. The diode can be omitted if the ef- this requires a large inductor. There is a tradeoff between ficiency loss is tolerable. component size, efficiency and operating frequency. A reasonable starting point is to choose a ripple current C and C Selection IN OUT that is about 40% of I . The largest ripple current OUT(MAX) The input capacitance C is required to filter the square occurs at the highest V . To guarantee that ripple current IN IN wave current at the drain of the top MOSFET. Use a low does not exceed a specified maximum, the inductance ESR capacitor sized to handle the maximum RMS current. should be chosen according to: ⎛ ⎞⎛ ⎞ V V V V I ≅I OUT IN –1 L=⎝⎜⎜fΔILO(MUTAX)⎠⎟⎟⎝⎜⎜1− VINO(MUATX)⎠⎟⎟ RMS OUT(MAX) VIN VOUT This formula has a maximum at V = 2V , where Once the value for L is known, the type of inductor must be IN OUT I = I /2. This simple worst-case condition is selected. A variety of inductors designed for high current, RMS OUT(MAX) commonly used for design because even significant de- low voltage applications are available from manufacturers viations do not offer much relief. Note that ripple current such as Sumida and Panasonic. ratings from capacitor manufacturers are often based on only 2000 hours of life which makes it advisable to derate the capacitor. 3714f 14

LTC3714 applicaTions inForMaTion The selection of C is primarily determined by the store about 100 times the gate charge required by the top OUT ESR required to minimize voltage ripple and load step MOSFET. In most applications 0.1µF to 0.47µF is adequate. transients. The output ripple ∆V is approximately OUT bounded by: Discontinuous Mode Operation and FCB Pin ⎛ 1 ⎞ The FCB pin determines whether the bottom MOSFET ΔV ≤ΔI ⎜ESR+ ⎟ OUT L ⎝ 8fC ⎠ remains on when current reverses in the inductor. Tying OUT this pin above its 0.6V threshold (typically to INTV ) en- CC Since ∆I increases with input voltage, the output ripple ables discontinuous operation where the bottom MOSFET L is highest at maximum input voltage. Typically, once the turns off when inductor current reverses. The load current ESR requirement is satisfied, the capacitance is adequate at which current reverses and discontinuous operation for filtering and has the necessary RMS current rating. begins, depends on the amplitude of the inductor ripple current. The ripple current depends on the choice of in- Multiple capacitors placed in parallel may be needed to ductor value and operating frequency as well as the input meet the ESR and RMS current handling requirements. Dry and output voltages. tantalum, special polymer, POSCAP aluminum electrolytic and ceramic capacitors are all available in surface mount Tying the FCB pin below the 0.6V threshold forces continu- packages. Special polymer capacitors offer very low ESR ous synchronous operation, allowing current to reverse but have lower capacitance density than other types. at light loads. Tantalum capacitors have the highest capacitance density In addition to providing a logic input to force continuous but it is important to only use types that have been surge operation, the FCB pin provides a means to maintain a tested for use in switching power supplies. Aluminum flyback winding output when the primary is operating electrolytic capacitors have significantly higher ESR, but in discontinuous mode. The secondary output V is SEC can be used in cost-sensitive applications providing that normally set as shown in Figure 5 by the turns ratio N consideration is given to ripple current ratings and long of the transformer. However, if the controller goes into term reliability. Ceramic capacitors have excellent low ESR discontinuous mode and halts switching due to a light characteristics but can have a high voltage coefficient primary load current, then V will droop. An external SEC and audible piezoelectric effects. The high Q of ceramic resistor divider from V to the FCB pin sets a minimum SEC capacitors with trace inductance can also lead to signifi- voltage V below which continuous operation is SEC(MIN) cant ringing. When used as input capacitors, care must forced until V has risen above its minimum. SEC be taken to ensure that ringing from inrush currents and ⎛ R4⎞ switching does not pose an overvoltage hazard to the power V =0.6V⎜1+ ⎟ SEC(MIN) switches and controller. High performance through-hole ⎝ R3⎠ capacitors may also be used, but an additional ceramic capacitor in parallel is recommended to reduce the effect + VIN of their lead inductance. VIN CIN 1N4148 Top MOSFET Driver Supply (CB, DB) OPTIONAL LTC3714TG • + VSEC An external bootstrap capacitor C connected to the BOOST CONNEEXCTTVIOCNC EXTVCC SW C1µSFEC B 5V < VSEC < 7V R4 T1 • + VOUT pin supplies the gate drive voltage for the topside MOSFET. FCB SENSE 1:N COUT This capacitor is charged through diode D from INTV B CC when the switch node is low. When the top MOSFET turns R3 BG SGND PGND on, the switch node rises to V and the BOOST pin rises to IN 3714 F05 approximately V + INTV . The boost capacitor needs to IN CC Figure 5. Secondary Output Loop and EXTV Connection CC 3714f 15

LTC3714 applicaTions inForMaTion Fault Conditions: Current Limit and Foldback To further limit current in the event of a short-circuit to ground, the LTC3714 includes foldback current limiting. The maximum inductor current is inherently limited in a If the output falls by more than 50%, then the maximum current mode controller by the maximum sense voltage. sense voltage is progressively lowered to about one sixth In the LTC3714, the maximum sense voltage is controlled of its full value. by the voltage on the V pin. With valley current control, RNG the maximum sense voltage and the sense resistance Minimum Off-Time and Dropout Operation determine the maximum allowed inductor valley current. The corresponding output current limit is: The minimum off-time tOFF(MIN) is the smallest amount of time that the LTC3714 is capable of turning on the bottom V 1 I = SNS(MAX) + ΔI MOSFET, tripping the current comparator and turning the LIMIT L *RDS(ON)ρT 2 MOSFET back off. This time is generally about 250ns. The minimum off-time limit imposes a maximum duty The current limit value should be checked to ensure that cycle of t /(t + t ). If the maximum duty cycle I > I . The minimum value of current ON ON OFF(MIN) LIMIT(MIN) OUT(MAX) is reached, due to a dropping input voltage for example, limit generally occurs with the lowest V at the highest IN then the output will drop out of regulation. The minimum ambient temperature. Note that it is important to check input voltage to avoid dropout is: for self-consistency between the assumed junction tem- perature and the resulting value of I which heats the t +t LIMIT ON OFF(MIN) V =V MOSFET switches. IN(MIN) OUT t ON Caution should be used when setting the current limit based upon the R of the MOSFETs. The maximum current Output Voltage Programming DS(ON) limit is determined by the minimum MOSFET on-resistance. The output voltage is digitally set to levels between 0.6V Data sheets typically specify nominal and maximum values and 1.75V using the voltage identification (VID) inputs for R , but not a minimum. A reasonable assumption DS(ON) VID0-VID4. An internal 5-bit DAC configured as a precision is that the minimum R lies the same amount below DS(ON) resistive voltage divider sets the output voltage in incre- the typical value as the maximum lies above it. Consult the ments according to Table 1. The VID codes are compatible MOSFET manufacturer for further guidelines. with Intel Mobile Pentium® III processor specifications. Each VID input is pulled up by an internal 2.5µA current source from the INTV supply and includes a series diode CC to prevent damage from VID inputs that exceed the supply. *Use RSENSE value here if a sense resistor is connected between SENSE and PGND. 3714f 16

LTC3714 applicaTions inForMaTion INTV Regulator Table 1. VID Output Voltage Programming CC VID4 VID3 VID2 VID1 VID0 V (V) An internal P-channel low dropout regulator produces the OUT 0 0 0 0 0 1.75V 5V supply that powers the drivers and internal circuitry 0 0 0 0 1 1.70V within the LTC3714. The INTV pin can supply up to 50mA CC 0 0 0 1 0 1.65V RMS and must be bypassed to ground with a minimum of 4.7µF tantalum or other low ESR capacitor. Good bypassing 0 0 0 1 1 1.60V is necessary to supply the high transient currents required 0 0 1 0 0 1.55V by the MOSFET gate drivers. Applications using large 0 0 1 0 1 1.50V MOSFETs with a high input voltage and high frequency of 0 0 1 1 0 1.45V operation may cause the LTC3714 to exceed its maximum 0 0 1 1 1 1.40V junction temperature rating or RMS current rating. Most 0 1 0 0 0 1.35V of the supply current drives the MOSFET gates unless 0 1 0 0 1 1.30V an external EXTV source is used. In continuous mode 0 1 0 1 0 1.25V CC operation, this current is I = f(Q + Q ). 0 1 0 1 1 1.20V GATECHG g(TOP) g(BOT) The junction temperature can be estimated from the equa- 0 1 1 0 0 1.15V tions given in Note 2 of the Electrical Characteristics. For 0 1 1 0 1 1.10V example, the LTC3714EG is limited to less than 14mA 0 1 1 1 0 1.05V from a 30V supply: 0 1 1 1 1 1.00V T = 70°C + (14mA)(30V)(130°C/W) = 125°C 1 0 0 0 0 0.975V J 1 0 0 0 1 0.950V For larger currents, consider using an external supply 1 0 0 1 0 0.925V with the EXTV pin. CC 1 0 0 1 1 0.900V 1 0 1 0 0 0.875V 1 0 1 0 1 0.850V 1 0 1 1 0 0.825V 1 0 1 1 1 0.800V 1 1 0 0 0 0.775V 1 1 0 0 1 0.750V 1 1 0 1 0 0.725V 1 1 0 1 1 0.700V 1 1 1 0 0 0.675V 1 1 1 0 1 0.650V 1 1 1 1 0 0.625V 1 1 1 1 1 0.600V 3714f 17

LTC3714 applicaTions inForMaTion EXTV Connection 3. EXTV connected to an output derived boost network. CC CC The low voltage output can be boosted using a charge The EXTVCC pin can be used to provide MOSFET gate drive pump or flyback winding to greater than 4.7V. The and control power from the output or another external system will start-up using the internal linear regulator source during normal operation. Whenever the EXTV CC until the boosted output supply is available. pin is above 4.7V the internal 5V regulator is shut off and an internal 50mA P-channel switch connects the EXTV CC External Gate Drive Buffers pin to INTV . INTV power is supplied from EXTV until CC CC CC this pin drops below 4.5V. Do not apply more than 7V to The LTC3714 drivers are adequate for driving up to about the EXTV pin and ensure that EXTV ≤ V . The follow- 60nC into MOSFET switches with RMS currents of 50mA. CC CC IN ing list summarizes the possible connections for EXTV : Applications with larger MOSFET switches or operating CC at frequencies requiring greater RMS currents will benefit 1. EXTV grounded. INTV is always powered from the CC CC from using external gate drive buffers such as the LTC1693. internal 5V regulator. Alternately, the external buffer circuit shown in Figure 6 can 2. EXTV connected to an external supply. A high ef- be used. Note that the bipolar devices reduce the signal CC ficiency supply compatible with the MOSFET gate swing at the MOSFET gate, and benefit from increased drive requirements (typically 5V) can improve overall EXTV voltage of about 6V. CC efficiency. BOOST INTVCC Q1 Q3 FMMT619 FMMT619 10Ω 10Ω GATE GATE TG BG OF M1 OF M2 Q2 Q4 FMMT720 FMMT720 SW PGND 3714 F06 Figure 6. Optional External Gate Driver 3714f 18

LTC3714 applicaTions inForMaTion Soft-Start and Latchoff with the RUN/SS Pin off both power MOSFETs, shutting down the converter permanently. The RUN/SS pin must be actively pulled The RUN/SS pin provides a means to shut down the down to ground in order to restart operation. LTC3714 as well as a timer for soft-start and overcurrent latchoff. Pulling the RUN/SS pin below 1.5V puts the The overcurrent protection timer requires that the soft-start LTC3714 into a low quiescent current shutdown (I ≤ timing capacitor C be made large enough to guarantee Q SS 30µA). Releasing the pin allows an internal 1.2µA internal that the output is in regulation by the time C has reached SS current source to charge up the external timing capacitor the 4V threshold. In general, this will depend upon the C . If RUN/SS has been pulled all the way to ground, size of the output capacitance, output voltage and load SS there is a delay before starting of about: current characteristic. A minimum soft-start capacitor can be estimated from: 1.5V t = C =(1.3s/µF)C DELAY 1.2µA SS SS CSS > COUT VOUT RSENSE (10–4 [F/Vs]) Generally 0.1µF is more than sufficient. When the voltage on RUN/SS reaches 1.5V, the LTC3714 begins operating with a clamp on ITH of approximately Overcurrent latchoff operation is not always needed or 0.9V. As the RUN/SS voltage rises to 3V, the clamp on ITH desired. Load current is already limited during a short- is raised until its full 2.4V range is available. This takes an circuit by the current foldback circuitry and latchoff op- additional 1.3s/µF, during which the load current is folded eration can prove annoying during troubleshooting. The back until the output reaches 50% of its final value. The feature can be overridden by adding a pull-up current of pin can be driven from logic as shown in Figure 7. Diode >5µA to the RUN/SS pin. The additional current prevents D1 reduces the start delay while allowing C to charge the discharge of C during a fault and also shortens SS SS up slowly for the soft-start function. the soft-start period. Using a resistor to V as shown in IN Figure 7a is simple, but slightly increases shutdown cur- After the controller has been started and given adequate rent. Connecting a resistor to INTV as shown in Figure time to charge up the output capacitor, C is used as a CC SS 7b eliminates the additional shutdown current, but requires short-circuit timer. After the RUN/SS pin charges above 4V, a diode to isolate C . Any pull-up network must be able if the output voltage falls below 75% of its regulated value, SS to pull RUN/SS above the 4.5V maximum threshold that then a short-circuit fault is assumed. A 1.7µA current then arms the latchoff circuit and overcome the 4µA maximum begins discharging C . If the fault condition persists until SS discharge current. the RUN/SS pin drops to 3.5V, then the controller turns INTVCC RSS* VIN 3.3V OR 5V RUN/SS D2* RUN/SS RSS* D1 CSS CSS 3714 F07 *OPTIONAL TO OVERRIDE OVERCURRENT LATCHOFF (7a) (7b) Figure 7. RUN/SS Pin Interfacing with Latchoff Defeated 3714f 19

LTC3714 applicaTions inForMaTion Efficiency Considerations When making any adjustments to improve efficiency, the final arbiter is the total input current for the regulator at The percent efficiency of a switching regulator is equal to your operating point. If you make a change and the input the output power divided by the input power times 100%. current decreases, then you improved the efficiency. If It is often useful to analyze individual losses to determine there is no change in input current, then there is no change what is limiting the efficiency and which change would in efficiency. produce the most improvement. Although all dissipative elements in the circuit produce losses, four main sources Checking Transient Response account for most of the losses in LTC3714 circuits: The regulator loop response can be checked by looking 1. DC I2R losses. These arise from the resistances of at the load transient response. Switching regulators take the MOSFETs, inductor and PC board traces and several cycles to respond to a step in load current. When cause the efficiency to drop at high output currents. a load step occurs, V immediately shifts by an amount OUT In continuous mode the average output current flows equal to ∆I • (ESR), where ESR is the effective series LOAD through L, but is chopped between the top and bottom resistance of C . ∆I also begins to charge or dis- OUT LOAD MOSFETs. If the two MOSFETs have approximately the charge C generating a feedback error signal used by the OUT same R , then the resistance of one MOSFET can DS(ON) regulator to return V to its steady-state value. During OUT simply be summed with the resistances of L and the this recovery time, V can be monitored for overshoot board traces to obtain the DC I2R loss. For example, if OUT or ringing that would indicate a stability problem. The I TH R = 0.01Ω and R = 0.005Ω, the loss will range DS(ON) L pin external components shown in Figure 8 will provide from 15mW up to 1.5W as the output current varies adequate compensation for most applications. For a from 1A to 10A for a 1.5V output. detailed explanation of switching control loop theory see 2. Transition loss. This loss arises from the brief amount Linear Technology Application Note 76. of time the top MOSFET spends in the saturated region during switch node transitions. It depends upon the Design Example input voltage, load current, driver strength and MOSFET As a design example, take a supply with the follow- capacitance, among other factors. The loss is significant ing specifications: V = 7V to 24V (15V nominal), IN at input voltages above 20V and can be estimated from: V = 1.15V ±100mV, I = 15A, f = 300kHz. First, OUT OUT(MAX) Transition Loss ≅ (1.7A–1) VIN2 IOUT CRSS f calculate the timing resistor with VON = VOUT: 1 3. INTVCC current. This is the sum of the MOSFET driver R = =330k ON and control currents. This loss can be reduced by sup- (300kHz)(10pF) plying INTV current through the EXTV pin from a CC CC and choose the inductor for about 40% ripple current at high efficiency source, such as an output derived boost the maximum V : network or alternate supply if available. IN 1.15V ⎛ 1.15V⎞ 4. CIN loss. The input capacitor has the difficult job of L= ⎜1− ⎟=0.6µH filtering the large RMS input current to the regulator. It (300kHz)(0.4)(15A)⎝ 24V ⎠ must have a very low ESR to minimize the AC I2R loss Choosing a standard value of 0.68µH results in a maximum and sufficient capacitance to prevent the RMS current ripple current of: from causing additional upstream losses in fuses or 1.15V ⎛ 1.15V⎞ batteries. ΔI = ⎜1– ⎟=5.4A L (300kHz)(0.68µH)⎝ 24V ⎠ Other losses, including C ESR loss, Schottky diode OUT D1 conduction loss during dead time and inductor core loss generally account for less than 2% additional loss. 3714f 20

LTC3714 applicaTions inForMaTion Next, choose the synchronous MOSFET switch. Because 186mV 1 I ≥ + (5.4A)=20A of the narrow duty cycle and large current, a single SO-8 LIMIT (0.5)(1.6)(0.013Ω) 2 MOSFET will have difficulty dissipating the power lost in the switch. Choosing two IRF7811s (R = 0.013Ω, DS(ON) and double check the assumed T in the MOSFET: J C = 60pF) yields a nominal sense voltage of: RSS 2 V = (15A)(0.5)(1.3)(0.013Ω) = 127mV 24V–1.15V⎛20A⎞ SNS(NOM) P = ⎜ ⎟ (1.6)(0.013Ω)=1.98W BOT 24V ⎝ 2 ⎠ Tying V to INTV will set the current sense voltage RNG CC range for a nominal value of 140mV with current limit T = 50°C + (1.98W)(50°C/W) = 149°C occurring at 186mV. To check if the current limit is ac- J ceptable, assume a junction temperature of about 100°C above a 50°C ambient with ρ = 1.6: 150°C 9 8 CSS VID2 VID1 0.1µF 10 7 RUN/SS VID0 DB CMDSH-3 RPG 11 VON BOOST 6 CB CIN 7VVIN TO 24V 100k 12 5 0.33µF M1 L1 22µF PGOOD TG 25V IRF7811 0.68µH ×3 VOUT 1.15V 13 4 CC1 VRNG SW 15A 2.2nF RC COUT 20k 14 3 M2 270µF ITH SENSE IRF7811 2V C10C02pF19 LTC3714 2 ×2 DU1PS840 ×5 SGND PGND CION 0.01µF 21 1 ION BG CVCC 22 28 4.7µF VFB INTVCC RF CFB 100pF 20 27 1Ω FCB VIN CF 23 26 0.1µF VOSENSE EXTVCC 5V RON 24 25 330k VID3 VID4 15 18 OPVIN OPOUT 16 OP– OP+ 17 3714 F08 CIN: UNITED CHEMICON THCR70EIH226ZT COUT: PANASONIC EEFUE0D271 L1: SUMIDA CEP125-4712-T007 Figure 8. CPU Core Voltage Regulator 1.15V/15A at 300kHz without Active Voltage Positioning 3714f 21

LTC3714 applicaTions inForMaTion Because the top MOSFET is on for such a short time, a ⎛1⎞ single IRF7811 will be sufficient. Checking its power dis- ΔVOUT(STEP) =(15A)⎜ ⎟(0.025Ω)=125mV sipation at current limit with ρ = 1.2: ⎝3⎠ 80°C By positioning the output voltage 60mV above the regula- 1.15V 2 P = (20A) (1.2)(0.013Ω)+ tion point at no load, it will drop 65mV below the regulation TOP 24V point after the load step. However, when the load disap- 2 (1.7)(24V) (20A)(60pF)(300kHz) pears or the output is stepped from 15A to 0A, the 65mV is recovered. This way, a total of 65mV change is observed =0.299W+0.353W=0.652W on V in all conditions, whereas a total of ±75mV or OUT TJ = 50°C + (0.652W)(50°C/W) = 82.6°C 150mV is seen on VOUT without voltage positioning. The junction temperatures will be significantly less at Implementing active voltage positioning requires setting nominal current, but this analysis shows that careful a precise gain between the sensed current and the output attention to heat sinking will be necessary in this circuit. voltage. Because of the variability of MOSFET on-resistance, it is prudent to use a sense resistor with active voltage C is chosen for an RMS current rating of about 6A at IN positioning. In order to minimize power lost in this resis- temperature. The output capacitors are chosen for a low tor, a low value of 0.003Ω is chosen. The nominal sense ESR of 0.005Ω to minimize output voltage changes due voltage will now be: to inductor ripple current and load steps. The ripple volt- age will be only: VSNS(NOM) = (0.003Ω)(15A) = 45mV ∆V = ∆I (ESR) = (5.4A) (0.005Ω) To maintain a reasonable current limit, the voltage on the OUT(RIPPLE) L(MAX) = 27mV VRNG pin is reduced to 0.5V by connecting it between INTV and GND, corresponding to a 50mV nominal CC However, a 0A to 15A load step will cause an output sense voltage. change of up to: Next, the gain of the LTC3714 error amplifier must be ∆V = ∆I (ESR) = (15A)(0.005Ω) = ±75mV OUT(STEP) LOAD determined. The change in I voltage for a corresponding TH The complete circuit is shown in Figure 8. change in the output current is: ⎛ 12V ⎞ Active Voltage Positioning ΔI =⎜ ⎟R ΔI TH SENSE OUT ⎝V ⎠ Active voltage positioning (also termed load “deregula- RNG tion” or droop) describes a technique where the output =(24)(0.003Ω)(15A)=1.08V voltage varies with load in a controlled manner. It is useful The corresponding change in the output voltage is deter- in applications where rapid load steps are the main cause mined by the gain of the error amplifier and feedback divider. of error in the output voltage. By positioning the output The LTC3714 error amplifier has a transconductance g m voltage at or above the regulation point at zero load, and that is constant over both temperature and a wide ±40mV below the regulation point at full load, one can use more input range. Thus, by connecting a load resistance R to VP of the error budget for the load step. This allows one to the I pin, the error amplifier gain can be precisely set TH reduce the number of output capacitors by relaxing the for accurate voltage positioning. ESR requirement. ⎛0.6V⎞ In the design example, Figure 8, five 0.025Ω capacitors ΔI =g R ⎜ ⎟ΔV TH m VP OUT are required in parallel to keep the output voltage within ⎝VOUT⎠ tolerance. Using active voltage positioning, the same specification can be met with only three capacitors. In this case, the load step will cause an output voltage change of: 3714f 22

LTC3714 applicaTions inForMaTion Solving for this resistance value: nominal value of the I pin voltage when the error ampli- TH fier input is zero. To set the beginning of the load line at V ΔI RVP = OUT TH the regulation point, the ITH pin voltage must be set to (0.6V)gmΔVOUT correspond to zero output current. The relation between (1.15V)(1.08V) voltage and the output current is: = =20.3k (0.6V)(1.7mS)(60mV) ⎛ 12V ⎞ ⎛ 1 ⎞ I =⎜ ⎟R ⎜I – ΔI ⎟+0.75V TH(NOM) SENSE OUT L ⎝V ⎠ ⎝ 2 ⎠ The gain setting resistance R is implemented with two RNG VP resistors, R connected from I to ground and R ⎛12V ⎞ ⎛ 1 ⎞ VP1 TH VP2 =⎜ ⎟(0.003Ω)⎜0A– 5.4A⎟+0.75V connected from ITH to INTVCC. The parallel combination of ⎝0.5V⎠ ⎝ 2 ⎠ these resistors must equal R and their ratio determines VP =0.55V 9 8 CSS VID2 VID1 0.1µF 10 7 RUN/SS VID0 DB CMDSH-3 RRNG1 RRNG2 RPG 11 VON BOOST 6 CB CIN 7VVIN TO 24V 10k 90.1k 100k 12 5 0.33µF M1 L1 10F PGOOD TG 25V IRF7811 0.68µH ×3 VOUT 1.15V/15A 13 4 VRNG SW M2 2C.2Cn1F RC RVP2 LTC3714 I×R2F7811 DU1PS840 C27O0UµTF 20k 185k 14 3 2V ITH SENSE ×3 RVP1 CC1 23k 100pF19 2 RSENSE SGND PGND 0.003Ω CION 0.01µF 21 1 ION BG CFB 100pF CVCC 22 28 4.7µF VFB INTVCC RF 20 27 1Ω FCB VIN CF 23 26 0.1µF VOSENSE EXTVCC 5V RON 24 VID3 VID4 25 330k 15 18 INTVCC OPVIN OPOUT 0.1µF 16 OP– OP+ 17 3714 F08 CIN: UNITED CHEMICON THCR70EIH226ZT COUT: PANASONIC EEFUE0D271 L1: SUMIDA CEP125-4712-T007 Figure 9. CPU Core Voltage Regulator with Active Voltage Positioning 1.15V/15A at 300kHz 3714f 23

LTC3714 applicaTions inForMaTion Solving for the required values of the resistors: The modified circuit is shown in Figure 9. Refer to Linear Technology Design Solutions 10 for additional information 5V 5V R = R = 20.3k about output voltage positioning. VP1 VP 5V–I 5V–0.55V TH(NOM) =23k PC Board Layout Checklist 5V 5V When laying out the printed circuit board, use the follow- R = R = 20.3k=185k VP2 VP ing checklist to ensure proper operation of the controller. I 0.55V TH(NOM) CVCC + M1 LTC3714 1 28 VIN CIN D1M2 BG INTVCC CF – 2 PGND 27 VIN – 3 26 RF VOUT COUT SENSE EXTVCC + DB 4 SW VID4 25 RON 5 24 TG VID3 CB 6 23 BOOST VOSENSE 7 22 VID0 VFB CION CFB 8 21 VID1 ION 9 20 VID2 FCB CSS 10 SGND 19 RUN/SS 11 18 VON OPOUT 12 PGOOD OP+ 17 13 VRNG OP– 16 CC1 RC 14 15 ITH OPVIN CC2 BOLD LINES INDICATE HIGH CURRENT PATHS 3714 F10 Figure 10. LTC3714 Layout Diagram 3714f 24

LTC3714 applicaTions inForMaTion These items are also illustrated in Figures 10 and 11. • Keep the high dV/dT SW, BOOST and TG nodes away from sensitive small-signal nodes. • Segregate the signal and power grounds. All small signal components should return to the SGND pin at • Connect the INTV decoupling capacitor C closely CC VCC one point which is then tied to the PGND pin close to to the INTV and PGND pins. CC the source of M2. • Connect the top driver boost capacitor C closely to B • Place M2 as close to the controller as possible, keeping the BOOST and SW pins. the PGND, BG and SENSE traces short. • Connect the V pin decoupling capacitor C closely to IN F • Connect the input capacitor(s) C close to the power the V and PGND pins. IN IN MOSFETs. This capacitor carries the MOSFET AC • VID0-VID4 interface circuitry must return to SGND. current. VIN CIN CIN CIN PGND TO PGND CIN (PIN 2) SW RSENSE M1 M2 D1 SENSE TO SENSE (PIN 3) M1 M2 M2 PGND L1 COUT COUT COUT COUT VOUT 3714 F11 Figure 11. General Layout of External Power Components 3714f 25

LTC3714 Typical applicaTion Performance Data for Intel Compatible Mobile Microprocessor Power Supply with Active Voltage Positioning Line Transient Reponse from V = 9V to 17V Load Transient Reponse for I = 8A to 23A IN OUT VIN 1.395V 5V/DIV VOUT 1.35V 50mV/DIV 1.213V VOUT 50mV/DIV 23A AC-COUPLED ILOAD 10A/DIV 8A 50µs/DIV 3714 TA02 20µs/DIV 3714 TA03 Efficiency 95 VOUT = 1.35V 90 VIN = 8.5V %) VIN = 15V Y ( 85 C N E FICI 80 VIN = 24V F E 75 70 0 3 6 9 12 15 18 21 LOAD CURRENT (A) 3714 TA04 3714f 26

LTC3714 Typical applicaTion Transmeta Crusoe™ Microprocessor Power Supply with Active Voltage Positioning 200k 3.3V VID2 INTVCC VRON VID1 VID0 3.3V 1M BAT54 U1 VIN 9 8 200k 0.1µF VID2 VID1 1µF 0.01µF 10 7 200k 1k RUN/SS VID0 CMDSH-3 1k 11 6 2k 100Ω VOUT VON BOOST VIN 5V TO 24V POWER GOOD 3.2k 12 PGOOD TG 5 IRF7811 C10INF 35V 10k 220p8F2103pkF 210%k 13 VRNG SENSSWE 43 0.22µF 1.L81µH + C×2OUT 1µV08F.AO6UVT TO 1.75V 80.6k 1% 14 ITHLTC3714EPGGND 2 22×7V20F 6.3V 19 1 SGND BG IRF7811 MBRS340 BAT54 4.7µF 0.1µF 10k 20 28 FCB INTVCC 1000pF 330k 21 ION 1 VIN 0.005 0.1µF VIN 22 27 VFB VIN 100pF 23 25 VOSENSE VID4 VID3 DPSLP 3.3V 200k 24 VID3 EXTVCC 26 5V 200k 3.3V VID4 BAT54C 18 OPOUT OP+ 17 START R22 100k 15 OPVIN OP– 16 0.01µF 75k 1% VOUT 100k 453k 1% 1% START DPSLP 3714 TA01 package DescripTion G Package 28-Lead Plastic SSOP (5.3mm) (Reference LTC DWG # 05-08-1640) 10.07 – 10.33* 5.20 – 5.38** (.397 – .407) (.205 – .212) 1.73 – 1.99 2827262524232221201918171615 (.068 – .078) 0ϒ – 8ϒ 7.65 – 7.90 .13 – .22 .55 – .95 .65 (.301 – .311) (.005 – .009) (.022 – .037) (.0256) BSC .05 – .21 NOTE: .25 – .38 (.002 – .008) 1. CONTROLLING DIMENSION: MILLIMETERS (.010 – .015) MILLIMETERS 2. DIMENSIONS ARE IN (INCHES) 1 2 3 4 5 6 7 8 9 1011121314 G28 SSOP 0501 3. DRAWING NOT TO SCALE *DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED .152mm (.006") PER SIDE **DIMENSIONS DO NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED .254mm (.010") PER SIDE Crusoe is a trademark of Transmeta Corporation. 3714f Information furnished by Linear Technology Corporation is believed to be accurate and reliable. 27 However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

LTC3714 Typical applicaTion Intel Compatible Mobile Microprocessor Power Supply with Active Voltage Positioning INTVCC 3.3V VRON 200k 3.3V 9 8 200k VID2 VID1 2k 100Ω 1µF 1k 0.1µF 10 7 200k RUN/SS VID0 7V ≤ VIN ≤ 24V POWER GOOD 11 6 3.2k VON BOOST 1C0INµF 10k 12 PGOOD TG 5 0.22µF I×R2F7811 0.6L81µH 3×54V VOUT 13 4 0.6V TO 1.75V VRNG SW 23A CMDSH-3 3 IRF7811 + COUT SENSE ×3 MBRS 270µF 210%0k 220pF 20k 14 ITH LTC3714PGND 2 R0.S0E0N3SΩE 340T3 2×V4 INTVCC 220pF 19 SGND BG 1 10nF 21 28 210%.5k 100pF ION INTVCC + 4.7µF 22 VFB 1Ω 10V 0.1µF 20 27 1k FCB VIN 23 25 200k VOSENSE VID4 3.3V 200k 24 26 3.3V VID3 EXTVCC 5V 18 OPOUT OP+ 17 806k 10k INTVCC 15 OPVIN OP– 16 1% 1% 0.1µF GMUXSEL 330k 10k 1% 3714 TA01 INTVCC 806k 10k 277k 1% 1% 100Ω DPSLP# DPRSLPVR relaTeD parTs PART NUMBER DESCRIPTION COMMENTS LTC1778 Low Duty Cycle, No R ™ Step-Down Controller GN-16 Package, 0.8V Reference, Burst Mode Operation SENSE LTC3711 5-Bit Adjustable, Low Duty Cycle, No R , GN-24 Package, 5-Bit VID, 0.8V , Burst Mode Operation, SENSE REF Step-Down Controller 0.925V ≤ V ≤ 2V OUT LTC3716 Dual Phase, High Efficiency Step-Down Controller 2-Phase, 5-Bit VID (0.6V to 1.75V), Narrow 36-Pin SSOP, 3.5V ≤ V ≤ 36V IN LTC3778 Wide V , No R Step-Down Controller 4V ≤ V ≤ 36V, True Current Mode Control, 1A ≤ I ≤ 20A IN SENSE IN OUT No R is a trademark of Linear Technology Corporation. SENSE 3714f 28 Linear Technology Corporation LT/TP 0602 2K • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com  LINEAR TECHNOLOGY CORPORATION 2001