LTC3245 Wide V Range, IN Low Noise, 250mA Buck-Boost Charge Pump FeaTures DescripTion n 2.7V to 38V V Range The LTC®3245 is a switched capacitor buck-boost DC/DC IN n I = 18µA Operating; 4μA in Shutdown converter that produces a regulated output (3.3V, 5V or Q n 12V to 5V Efficiency = 81% adjustable) from a 2.7V to 38V input. The device uses n Multimode Operation (2:1, 1:1, 1:2) with Automatic switched capacitor fractional conversion to maintain Mode Switching regulation over a wide range of input voltage. Internal n Low Noise, Constant Frequency Operation circuitry automatically selects the conversion ratio to n Pin Selectable Burst Mode® Operation optimize efficiency as input voltage and load conditions n V : Fixed 3.3V, 5V or Adjustable (2.5V to 5V) vary. No inductors are required. OUT n I Up to 250mA OUT The unique constant frequency architecture provides a n Overtemperature and Short-Circuit Protection lower noise output than conventional charge pump regu- n Operating Junction Temperature: 150°C Maximum lators. To optimize efficiency at the expense of slightly n Thermally Enhanced 12-Pin MSOP and Low Profile higher output ripple, the device has pin selectable Burst 12-Pin (3mm × 4mm) DFN Packages Mode operation. applicaTions Low operating current (20μA with no load, 4μA in shut- down) and low external parts count (three small ceramic n Automotive ECU/CAN Transceiver Supplies capacitors) make the LTC3245 ideally suited for low power, n Industrial Housekeeping Supplies space constrained automotive/industrial applications. The n Low Power 12V to 5V Conversion device is short-circuit and overtemperature protected, and L, LT, LTC, LTM, Burst Mode, Linear Technology and the Linear logo are registered trademarks is available in thermally enhanced 12-pin MSOP and low and ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the profile 3mm × 4mm 12-pin DFN packages. property of their respective owners. Typical applicaTion Efficient Regulated 5V Output 5V Efficiency vs Output Current OUT 90 400 VIN = 12V 1µF 80 350 EFFICIENCY 70 300 C+ C– %) 60 250 P VIN = 2.7V TO 38V 1µF VSIENL2LTC3O2U45TSV/AODUJT 500k VIOOUUTT U =P 5 TVO 250mA EFFICIENCY ( 5400 PLOSS 210500 LOSS (mW) BURST PGOOD 10µF 30 100 SEL1 GND 20 50 3245 TA01a 10 0 0.1 1 10 100 1000 IOUT (mA) 3245 TA01b 3245fa 1 For more information www.linear.com/LTC3245

LTC3245 absoluTe MaxiMuM raTings (Note 1) V , SEL1, SEL2, BURST ............................–0.3V to 38V Operating Junction Temperature Range (Notes 2, 3) IN V , OUTS/ADJ, PGOOD ............................–0.3V to 6V (E-/I-Grade) ........................................–40°C to 125°C OUT I ......................................................................2mA (H-Grade) ...........................................–40°C to 150°C PGOOD V Short-Circuit Duration .............................Indefinite (MP-Grade) ........................................–55°C to 150°C OUT Storage Temperature Range ..................–65°C to 150°C Lead Temperature (Soldering, 10 sec) (MSE Only) ...........................................................300°C pin conFiguraTion TOP VIEW TOP VIEW VIN 1 12 GND VIN 2 11 C– VVIINN 12 1121 GC–ND VIN 3 13 10 VOUT VIN 3 13 10 VOUT BURST 4 GND 9 C+ BURST 4 GND 9 C+ SEL1 5 8 PGOOD SEL1 5 8 PGOOD SEL2 6 7 OUTS/ADJ SEL2 6 7 OUTS/ADJ MSE PACKAGE 12-LEAD PLASTIC MSOP DE PACKAGE 12-LEAD (3mm × 4mm) PLASTIC DFN TJMAX = 150°C, θJA = 40°C/W EXPOSED PAD (PIN 13) IS GND, MUST BE SOLDERED TO PCB GND TJMAX = 150°C, θJA = 43°C/W EXPOSED PAD (PIN 13) IS GND, MUST BE SOLDERED TO PCB GND orDer inForMaTion LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LTC3245EDE#PBF LTC3245EDE#TRPBF 3245 12-Lead (3mm × 4mm) Plastic DFN –40°C to 125°C LTC3245IDE#PBF LTC3245IDE#TRPBF 3245 12-Lead (3mm × 4mm) Plastic DFN –40°C to 125°C LTC3245EMSE#PBF LTC3245EMSE#TRPBF 3245 12-Lead Plastic MSOP –40°C to 125°C LTC3245IMSE#PBF LTC3245IMSE#TRPBF 3245 12-Lead Plastic MSOP –40°C to 125°C LTC3245HMSE#PBF LTC3245HMSE#TRPBF 3245 12-Lead Plastic MSOP –40°C to 150°C LTC3245MPMSE#PBF LTC3245MPMSE#TRPBF 3245 12-Lead Plastic MSOP –55°C to 150°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ elecTrical characTerisTics The l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at T = 25°C, (Note 2). V = 12V, V = 5V, C = 1µF unless otherwise A IN OUT FLY noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V Operating Input Voltage Range l 2.7 38 V IN V V Undervoltage Lockout Threshold V Rising l 2.4 2.7 V UVLO IN IN V Falling 2.2 V IN 3245fa 2 For more information www.linear.com/LTC3245

LTC3245 elecTrical characTerisTics The l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at T = 25°C, (Note 2). V = 12V, V = 5V, C = 1µF unless otherwise noted. A IN OUT FLY SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS IVIN VIN Quiescent Current SEL1 = SEL2 = 0V Shutdown, V = 0V 4 8 µA OUT V Enabled, BURST = 0V CP Enabled, Output in Regulation 18 35 µA OUT V Enabled, BURST = V CP Enabled, Output in Regulation 20 40 µA OUT IN V Fixed 5V Burst Mode Output Regulation 5V ≤ V < 38V, I ≤ 250mA l 4.8 5.2 V OUT5_BM IN OUT (OUTS/ADJ Connected to V , 4V ≤ V < 5V, I ≤ 150mA l 4.8 5.2 V OUT IN OUT BURST = 0V, SEL2 = V , SEL1 = 0V) 3.3V ≤ V < 4V, I ≤ 75mA l 4.8 5.2 V IN IN OUT (Note 5) 3V ≤ V < 3.3V, I ≤ 45mA l 4.8 5.2 V IN OUT V Fixed 5V Low Noise Output Regulation 5V ≤ V < 38V, I ≤ 200mA l 4.8 5.2 V OUT5_LN IN OUT (OUTS/ADJ Connected to V , 4V ≤ V < 5V, I ≤ 120mA l 4.8 5.2 V OUT IN OUT BURST = V , SEL2 = V , SEL1 = 0V) 3.3V ≤ V < 4V, I ≤ 60mA l 4.8 5.2 V IN IN IN OUT (Note 5) 3V ≤ V < 3.3V, I ≤ 35mA l 4.8 5.2 V IN OUT V Fixed 3.3V Burst Mode Output Regulation 5V ≤ V < 38V, I ≤ 250mA l 3.17 3.43 V OUT33_BM IN OUT (OUTS/ADJ Connected to V , 4V ≤ V < 5V, I ≤ 175mA l 3.17 3.43 V OUT IN OUT BURST = 0V, SEL2 = V , SEL1 = V ) 3.3V ≤ V < 4V, I ≤ 110mA l 3.17 3.43 V IN IN IN OUT (Note 5) 2.7V ≤ V < 3.3V, I ≤ 60mA l 3.17 3.43 V IN OUT V Fixed 3.3V Low Noise Output Regulation 5V ≤ V < 38V, I ≤ 220mA l 3.17 3.43 V OUT33_LN IN OUT (OUTS/ADJ Connected to V , 4V ≤ V < 5V, I ≤ 140mA l 3.17 3.43 V OUT IN OUT BURST = V , SEL2 = V , SEL1 = V ) 3.3V ≤ V < 4V, I ≤ 90mA l 3.17 3.43 V IN IN IN IN OUT (Note 5) 2.7V ≤ V < 3.3V, I ≤ 50mA l 3.17 3.43 V IN OUT V OUTS/ADJ Reference Voltage (Note 4) SEL2 = 0V, SEL1 = V , I = 0mA l 1.176 1.200 1.224 V ADJ IN OUT R Load Regulation (Referred to ADJ) SEL2 = 0V, SEL1 = V 0.2 mV/mA CL IN V PGOOD Rising Threshold V % of Final Regulation Voltage 95 98 % PG_RISE OUT V PGOOD Falling Threshold V % of Final Regulation Voltage 88 91 % PG_FALL OUT V PGOOD Output Low Voltage I = 0.2mA l 0.1 0.4 V PG_LOW PGOOD I PGOOD Output High Leakage V = 5V –1 0 1 µA PG_HIGH PGOOD V BURST, SEL1, SEL2 Input Voltage l 0.4 0.9 V LOW V BURST, SEL1, SEL2 input Voltage l 1.2 2 V HIGH I BURST, SEL1, SEL2 Input Current V = 0V –1 0 1 µA LOW PIN I BURST, SEL1, SEL2 Input Current V = 38V 0.5 1 3 µA HIGH PIN I I Short-Circuit Current V = GND 900 mA SHORT_CKT VOUT OUT R Charge Pump Output Impedance 2:1 Step-Down Mode 3 Ω OUT 1:1 Step-Down Mode 3.5 Ω 1:2 Step-Up Mode (V = 3.3V) 14 Ω IN f Oscillator Frequency l 450 500 kHz OSC Note 1: Stresses beyond those listed under Absolute Maximum Ratings greater than 150°C. Note that the maximum ambient temperature consistent may cause permanent damage to the device. Exposure to any Absolute with these specifications is determined by specific operating conditions in Maximum Rating condition for extended periods may affect device conjunction with board layout, the rated package thermal resistance and reliability and lifetime. This IC has overtemperature protection that is other environmental factors. intended to protect the device during momentary overload conditions. Note 3: The junction temperature (T , in °C) is calculated from the ambient J Junction temperatures will exceed 150°C when overtemperature is active. temperature (T , in °C) and power dissipation (P , in Watts) according to A D Continuous operation above the specified maximum operating junction the formula: temperature may impair device reliability. TJ = TA + (PD • θJA) where θJA (in °C/W) is the package thermal Note 2: The LTC3245E is guaranteed to meet performance specifications impedance. from 0°C to 85°C. Specifications over the –40°C to 125°C operating junction Note 4: V programming range is from 2.5V to 5V. See the OUT temperature range are assured by design, characterization and correlation Programming the Output Voltage section for more detail. with statistical process controls. The LTC3245I is guaranteed over the Note 5: The maximum operating junction temperature of 150°C must be –40°C to 125°C operating junction temperature range. The LTC3245H is followed. Certain combinations of input voltage and output current will guaranteed over the –40°C to 150°C operating junction temperature range cause the junction temperature to exceed 150°C and must be avoided. See and the LTC3245MP is tested and guaranteed over the full –55°C to 150°C Thermal Management section for information on calculating maximum operating junction temperature range. High junction temperatures degrade operating conditions. operating lifetimes; operating lifetime is derated for junction temperatures 3245fa 3 For more information www.linear.com/LTC3245

LTC3245 Typical perForMance characTerisTics T = 25°C, unless otherwise noted. A Input Operating Current Input Shutdown Current Oscillator Frequency vs Input Voltage vs Input Voltage vs Temperature 50 20 500 BURST = 0V 45 18 475 40 16 150°C 450 35 14 425 A) 30 A) 12 Hz) I (µCC 2250 VOUT = 5V I (µSD 108 125°C f (kOSC347050 15 VOUT = 3.3V 6 25°C 350 10 4 –55°C 325 5 2 0 0 300 0 5 10 15 20 25 30 35 40 0 5 10 15 20 25 30 35 40 –60 –30 0 30 60 90 120 150 VIN (V) VIN (V) TEMPERATURE (°C) 3245 G01 3245 G02 3245 G03 5V Fixed Output Voltage 5V Fixed Output Voltage vs Input Voltage (Burst Mode vs Input Voltage (Low Noise 5V Fixed Efficiency Operation) Operation) vs Output Current 5.20 5.20 100 VIN = 12V 90 5.15 5.15 Burst Mode OPERATION 80 5.10 5.10 70 V (V)OUT455...900505 IOUTIO =U T0 m= A150mA V (V)OUT455...900505 IOUT = 1IO5U0Tm =A 0mA EFFICIENCY (%) 645000 LOW NOISE IOUT = 250mA 30 4.90 4.90 IOUT = 250mA 20 4.85 4.85 10 4.80 4.80 0 2 3 4 5 6 7 8 9 10 11 12 131415 2 3 4 5 6 7 8 9 10 11 12 131415 0.1 1 10 100 1000 VIN (V) VIN (V) IOUT (mA) 3245 G06 3245 G04 3245 G05 3.3V Fixed Output Voltage 3.3V Fixed Output Voltage vs Input Voltage (Burst Mode vs Input Voltage (Low Noise 3.3V Fixed Output Efficiency Operation) Operation) vs Output Current 3.50 3.50 100 VIN = 9V 90 3.45 3.45 80 3.40 3.40 Burst Mode OPERATION 70 V (V)OUT333...233505 IOUTIO =U T2 5=0 0mmAA IOUT = 150mA V (V)OUT333...233505 IOUIOT U=T 2=5 00mmAAIOUT = 150mA EFFICIENCY (%) 64350000 LOW NOISE 3.20 3.20 20 3.15 3.15 10 3.10 3.10 0 2 3 4 5 6 7 8 9 10 11 12 131415 2 3 4 5 6 7 8 9 10 11 12 131415 0.1 1 10 100 1000 VIN (V) VIN (V) IOUT (mA) 3245 G09 3245 G07 3245 G08 3245fa 4 For more information www.linear.com/LTC3245

LTC3245 Typical perForMance characTerisTics T = 25°C, unless otherwise noted. A 5V Fixed Output Voltage 3.3V Fixed Output Voltage vs Falling Input Voltage vs Falling Input Voltage ADJ Regulation Voltage (Burst Mode Operation) (Burst Mode Operation) vs Temperature 5.100 3.400 1.220 5.075 3.375 1.215 5.050 IOUT = 1mA 3.350 IOUT = 1mA 1.210 5.025 3.325 1.205 V (V)OUT5.000 V (V)OUT3.300 ADJ (V)1.200 4.975 3.275 1.195 4.950 IOUT = 250mA 3.250 IOUT = 250mA 1.190 –55°C –55°C 4.925 25°C 3.225 25°C 1.185 125°C 125°C 4.900 3.200 1.180 2 3 4 5 6 7 8 9 10 11 12 131415 2 3 4 5 6 7 8 9 10 11 12 131415 –60 –30 0 30 60 90 120 150 VIN (V) VIN (V) TEMPERATURE (°C) 3245 G10 3245 G11 3245 G12 5V Output Impedance 3.3V Output Impedance Output Current vs Input Voltage vs Temperature (Boost Mode) vs Temperature (Boost Mode) (V 5% Below Regulation) OUT 30 40 800 5V Burst Mode 5V LOW NOISE 25 VIN = 2.7V 35 VIN = 3.3V VIN = 2.7V 700 OPERATION VIN = 3.3V 30 LOW NOISE 600 20 25 500 Ω) LOW NOISE Ω) mA) R (OUT 15 R (OUT 1250 I (OUT340000 3.3V LOW NOISE 10 3.3V Burst Mode Burst Mode OPERATION 10 Burst Mode OPERATION 200 OPERATION 5 5 100 0 0 0 –60 –30 0 30 60 90 120 150 –60 –30 0 30 60 90 120 150 2 3 4 5 6 7 8 9 10 11 12 13 14 TEMPERATURE (°C) TEMPERATURE (°C) VIN (V) 3245 G13 3245 G14 3245 G15 Operating Mode Transition Operating Mode Transition Operating Mode Transition Voltage vs Input Voltage Voltage vs Input Voltage Voltage vs Input Voltage 12 12 12 IOUT = 1mA IOUT = 150mA BUCK IOUT = 250mA BUCK 11 BUCK 11 11 10 10 10 RISING 9 9 9 8 8 RISING LDO 8 LDO RISING LDO FALLING V) 7 FALLING V) 7 FALLING V) 7 V (IN 65 V (IN 65 RISING V (IN 65 RISING RISING 4 4 BOOST 4 BOOST BOOST FALLING 3 FALLING 3 FALLING 3 2 2 2 1 1 1 0 0 0 2.5 3 3.5 4 4.5 5 2.5 3 3.5 4 4.5 5 2.5 3 3.5 4 4.5 5 VOUT (V) VOUT (V) VOUT (V) 3245 G16 3245 G17 3245 G18 3245fa 5 For more information www.linear.com/LTC3245

LTC3245 Typical perForMance characTerisTics T = 25°C, unless otherwise noted. A 5V Output Transient Response 3.3V Output Transient Response Burst Mode Burst Mode OPERATION OPERATION AC 50mV/DIV AC 50mV/DIV LOW NOISE LOW NOISE AC 50mV/DIV AC 50mV/DIV 200mA 150mA IOUT 5mA IOUT 5mA 3245 G19 3245 G20 VIN = 12V VIN = 12V VOUT = 5V VOUT = 3.3V 3245fa 6 For more information www.linear.com/LTC3245

LTC3245 pin FuncTions V (Pins 1, 2, 3): Power Input Pins. Input voltage for both OUTS/ADJ (Pin 7): V Sense / Adjust Input Pin. This pin IN OUT charge pump and IC control circuitry. The V pin oper- acts as V sense (OUTS) for 5V or 3.3V fixed outputs IN OUT ates from 2.7V to 38V. All V pins should be connected and adjust (ADJ) for adjustable output through external IN together at pins. feedback. The ADJ pin servos to 1.2V when the device is enabled in adjustable mode. (OUTS / ADJ are selected by BURST (Pin 4): Burst Mode Logic Input. A logic high on SEL1 and SEL2 pins; See Table 1) the BURST pin operates the charge pump in low noise constant frequency. A logic low will operates the charge PGOOD (Pin 8): Power Good Open Drain Logic Output. pump in Burst Mode operation for higher efficiency at The PGOOD pin goes high impedance when V is about OUT low output currents. The BURST pin has a 1μA (typical) 6% of its final operating voltage. PGOOD is intended to pull-down current to ground and can tolerate 38V inputs be pulled up to V or other low voltage supply with an OUT allowing it to be pin-strapped to V . external resistor. IN SEL1 (Pin 5): Logic Input Pin. See Table 1 for SEL1/SEL2 C+ (Pin 9): Flying Capacitor Positive Connection. operating logic. The SEL1 pin has a 1μA (typical) pull-down V (Pin 10): Charge Pump Output Voltage. If V drops OUT IN current to ground and can tolerate 38V inputs allowing it below its UVLO threshold, the connection from V be- IN to be pin-strapped to V . IN comes high impedance with no reverse leakage from SEL2 (Pin 6): Logic Input Pin. See Table 1 for SEL1/SEL2 V to V . V regulation only takes place above the OUT IN OUT operating logic. The SEL2 pin has a 1μA (typical) pull-down UVLO threshold. V can be programmed to regulate OUT current to ground and can tolerate 38V inputs allowing it from 2.5V to 5V. to be pin-strapped to V . IN C– (Pin 11): Flying Capacitor Negative Connection. Table 1: V Operating Modes OUT GND (Pin 12, Exposed Pad Pin 13): Ground. The exposed SEL2 SEL1 MODE package pad is ground and must be soldered to the PC LOW LOW Shutdown board ground plane for proper functionality and for rated LOW HIGH Adjustable VOUT thermal performance. HIGH LOW Fixed 5V HIGH HIGH Fixed 3.3V 3245fa 7 For more information www.linear.com/LTC3245

LTC3245 siMpliFieD block DiagraM C+ C– VIN CHARGE PUMP VOUT EN BURST DETECTED BURST OUTS/ADJ OVERTEMPERATURE ADJ 3.3V – MUX PGOOD + 1.2V 5V – SD + 1.14V SEL1 SEL2 GND 3245 BD 3245fa 8 For more information www.linear.com/LTC3245

LTC3245 applicaTions inForMaTion General Operation capacitor. As the load on V increases, V will drop OUT OUT slightly increasing the amount of charge transferred until The LTC3245 uses switched capacitor based DC/DC the output current matches the output load. This method conversion to provide the efficiency advantages associ- of regulation applies regardless of the conversion ratio. ated with inductor based circuits as well as the cost and simplicity advantages of a linear regulator. The LTC3245’s The optimal conversion ratio is chosen based on V , IN unique constant frequency architecture provides a low V and output load conditions. Two internal compara- OUT noise regulated output as well as lower input noise than tors are used to select the default conversion ratio. Each conventional switch capacitor charge pump regulators. The comparator has an adjustable offset built in that increases LTC3245 uses an internal switch network and fractional (decreases) in proportion to the increasing (decreasing) conversion ratios to achieve high efficiency and regula- output load current. In this manner, the conversion ratio tion over widely varying V and output load conditions. IN switch point is optimized to provide peak efficiency over Internal control circuitry selects the appropriate conver- all supply and load conditions while maintaining regulation. sion ratio based on V and load conditions. The device Each comparator also has built-in hysteresis to reduce the IN has three possible conversion modes: 2:1 step-down tendency of oscillating between modes when a transition mode, 1:1 step-down mode and 1:2 step-up mode. Only point is reached. one external flying capacitor is needed to operate in all Low Noise vs Burst Mode Operation three modes. 2:1 mode is chosen when V is greater than IN two times the desired V . 1:1 mode is chosen when OUT Burst Mode operation is selected by driving the BURST V falls between two times V and V . 1:2 mode is IN OUT OUT pin low. In Burst Mode operation the LTC3245 delivers a chosen when V falls below the desired V . An internal IN OUT minimum amount of charge each cycle forcing V above OUT load current sense circuit controls the switch point of the regulation at light output loads. When the LTC3245 detects conversion ratio as needed to maintain output regulation that V is above regulation the device stops charge OUT over all load conditions. transfer and goes into a low current sleep state. During Regulation is achieved by sensing the output voltage and this sleep state, the output load is supplied by the output regulating the amount of charge transferred per cycle. This capacitor. The device will remain in the sleep state until the method of regulation provides much lower input and output output drops enough to require another burst of charge. ripple than that of conventional switched capacitor charge Burst Mode operation allows the LTC3245 to achieve high pumps. The constant frequency charge transfer also makes efficiency even at light loads. If the output load exceeds additional output or input filtering much less demanding the minimum charge transferred per cycle, then the device than conventional switched capacitor charge pumps. will operate continuously to maintain regulation. The LTC3245 has a Burst Mode operation pin that allows Unlike traditional charge pumps who’s burst current is the user to trade output ripple for better efficiency/lower dependant on many factors (i.e., supply, switch strength, quiescent current. The device has two SEL pins that select capacitor selection, etc.), the LTC3245 burst current is the output regulation (fixed 5V, fixed 3.3V or adjustable) regulated which helps to keep burst output ripple voltage as well as shutdown. The device includes soft-start func- relatively constant and is typically 50mV for C = 10μF. OUT tion to limit in-rush current at startup. The device is also Driving the BURST pin high puts the LTC3245 in low noise short-circuit and overtemperature protected. operation. In low noise operation the minimum amount of charge delivered each cycle and sleep hysteresis V Regulation and Mode Selection OUT are reduced compared to Burst Mode operation. This As shown in the Simplified Block Diagram, the device uses results in lower burst output ripple (typically 20mV for a control loop to adjust the strength of the charge pump to C = 10µF) and will transition to constant frequency OUT match the current required at the output. The error signal operation at lighter loads. of this loop is stored directly on the output charge storage 3245fa 9 For more information www.linear.com/LTC3245

LTC3245 applicaTions inForMaTion Short-Circuit/Thermal Protection Driving both SEL1 and SEL2 low shuts down the device causing V to go high impedance. The LTC3245 has built-in short-circuit current limiting as OUT well as overtemperature protection. During short-circuit conditions the device will automatically limit the output LTC3245 VOUT VOUT FIXED 3.3V OR current. FIXED 5V OUTS The LTC3245 has thermal protection that will shut COUT down the device if the junction temperature exceeds the GND overtemperature threshold (typically 175°C). Thermal 3245 F01 shutdown is included to protect the IC in cases of exces- Figure 1: Fixed Output Operation sively high ambient temperatures, or in cases of excessive power dissipation inside the IC. The charge transfer will Adjustable output programming is accomplished by con- reactivate once the junction temperature drops back to necting ADJ (OUTS/ADJ pin) to a resistor divider between approximately 165°C. V and GND as shown in Figure 2. Adjustable operation OUT When the thermal protection is active, the junction tem- is enabled by driving SEL1 high and SEL2 low. Driving perature is beyond the specified operating range. Thermal both SEL1 and SEL2 low shuts down the device causing protection is intended for momentary overload conditions V to go high impedance. OUT outside normal operation. Continuous operation above the specified maximum operating junction temperature may LTC3245 impair device reliability. VOUT VOUT Soft-Start Operation RA 1.2V( 1 + RR AB ) ADJ To prevent excessive current flow at V during start-up, COUT IN RB the LTC3245 has built-in soft-start circuitry. Soft-start is GND achieved by increasing the amount of current available to 3245 F02 the output charge storage capacitor linearly over a period Figure 2: Adjustable Output Operation of approximately 500μs. Soft-start is enabled whenever the device is brought out of shutdown, and is disabled Using adjustable operation the output (V ) can be OUT shortly after regulation is achieved. programmed to regulate from 2.5V to 5V. The limited programming range provides the required V operating Programming the Output Voltage (OUTS/ADJ Pin) OUT voltage without overstressing the V pin. OUT The LTC3245 output voltage programming is very flexible The desired adjustable output voltage is programmed by offering a fixed 3.3V output, fixed 5V output as well as solving the following equation for R and R : adjustable output that is programmed through an external A B resistor divider. The desired output regulation method is R V A = OUT –1 selected through the SET pins. R 1.2V B For a fixed output simply short OUTS (OUTS/ADJ pin) to VOUT as shown in Figure 1. Fixed 3.3V operation is enabled Select a value for RB in the range of 1k to 1M and solve by driving both SEL1 and SEL2 pins high, while fixed 5V for RA. Note that the resistor divider current adds to the total no load operating current. Thus a larger value for R operating is selected by driving SEL2 high with SEL1 low. B will result in lower operating current. 3245fa 10 For more information www.linear.com/LTC3245

LTC3245 applicaTions inForMaTion 2:1 Step-Down Charge Pump Operation 1:2 Step-Up Charge Pump Operation When the input supply is greater than about two times When the input supply is less than the output voltage the the output voltage, the LTC3245 will operate in 2:1 step- LTC3245 will operate in 1:2 step-up mode. Charge trans- down mode. Charge transfer happens in two phases. On fer happens in two phases. On the first phase the flying the first phase the flying capacitor (C ) is connected capacitor (C ) is connected between V and GND. On FLY FLY IN between V and V . On this phase C is charged up this phase C is charged up. On the second phase the IN OUT FLY FLY and current is delivered to V . On the second phase the flying capacitor (C ) is connected between V and V OUT FLY IN OUT flying capacitor (C ) is connected between V and and the charge stored on C during the first phase is FLY OUT FLY GND. The charge stored on C during the first phase transferred to V . When in 1:2 step-up mode the input FLY OUT is transferred to V on the second phase. When in 2:1 current will be approximately twice the total output cur- OUT step-down mode the input current will be approximately rent. Thus efficiency (η) and chip power dissipation (P ) D half of the total output current. The efficiency (η) and chip in 1:2 are approximately: power dissipation (P ) in 2:1 are approximately: D P V •I V η≅ OUT = OUT OUT= OUT P V •I 2V η≅ OUT = OUT OUT= OUT PIN VIN•2IOUT 2VIN P 1 V IN V • I IN P =(2V –V )I IN 2 OUT D IN OUT OUT V  PD= IN–VOUTIOUT  2  Due to the limited drive in 1:2 step-up mode the device always operates in Burst Mode operation when operating 1:1 Step-Down Charge Pump Operation at this conversion ratio. This is done to delay the onset of dropout at the expense of more output ripple. When the input supply is less than about two times the output voltage but more than the programmed output PGOOD Output Operation voltage, the LTC3245 will operate in 1:1 step-down mode. The LTC3245 includes an open-drain power good (PGOOD) This method of regulation is very similar to a linear regula- output pin. If the chip is in shutdown or under UVLO con- tor. Charge is delivered directly from V to V through IN OUT ditions (V < 2.2V typical), PGOOD is low impedance to most of the oscillator period. The charge transfer is briefly IN ground. PGOOD becomes high impedance when V rises interrupted at the end of the period. The interruption in OUT to 95% (typical) of its regulation voltage. PGOOD stays charge transfer improves stability and transient response. high impedance until V is shut down or drops below When in 1:1 step-down mode the input current will be OUT the PGOOD threshold (91% typical) due to an overload approximately equal to the total output current. Thus condition. A pull-up resistor can be inserted between efficiency (η) and chip power dissipation (P ) in 1:1 are D PGOOD and a low voltage positive logic supply (such as approximately: V ) to signal a valid power good condition. The use of OUT P V •I V a large pull-up resistor on PGOOD and a capacitor placed η≅ OUT = OUT OUT= OUT between PGOOD and GND can be used to delay the PGOOD P V • I V IN IN OUT IN signal if desired. P =(V –V )I D IN OUT OUT V Ripple and Capacitor Selection OUT The type and value of capacitors used with the LTC3245 determine several important parameters such as regula- tor control loop stability, output ripple and charge pump 3245fa 11 For more information www.linear.com/LTC3245

LTC3245 applicaTions inForMaTion strength. The value of C directly controls the amount necessary for input bypassing is very dependant on the OUT of output ripple for a given load current when operating applied source impedance as well as existing bypassing in constant frequency mode. Increasing the size of C already on the V node. For optimal input noise and ripple OUT IN will reduce the output ripple. reduction, it is recommended that a low ESR ceramic capacitor be used for C bypassing. An electrolytic or To reduce output noise and ripple, it is suggested that a IN tantalum capacitor may be used in parallel with the ce- low ESR (equivalent series resistance < 0.1Ω) ceramic ramic capacitor on C to increase the total capacitance, capacitor (10μF or greater) be used for C . Tantalum IN OUT but due to the higher ESR it is not recommended that an and aluminum capacitors can be used in parallel with a electrolytic or tantalum capacitor be used alone for input ceramic capacitor to increase the total capacitance but bypassing. The LTC3245 will operate with capacitors less are not recommended to be used alone because of their than 1μF but depending on the source impedance input high ESR. noise can feed through to the output causing degraded Both the style and value of COUT can significantly affect the performance. For best performance 1μF or greater total stability of the LTC3245. As shown in the Block Diagram, capacitance is suggested for C . IN the device uses a control loop to adjust the strength of the charge pump to match the current required at the output. Flying Capacitor Selection The error signal of this loop is stored directly on the output Warning: A polarized capacitor such as tantalum or alumi- charge storage capacitor. The charge storage capacitor also num should never be used for the flying capacitors since serves to form the dominant pole for the control loop. To the voltage can reverse upon start-up of the LTC3245. prevent ringing or instability it is important for the output Ceramic capacitors should always be used for the flying capacitor to maintain at least 4μF of capacitance over all capacitors. The flying capacitors control the strength of conditions (see Ceramic Capacitor Selection Guidelines). the charge pump. In order to achieve the rated output Likewise excessive ESR on the output capacitor will tend current, it is necessary for the flying capacitor to have to degrade the loop stability of the LTC3245. The closed at least 0.4μF of capacitance over operating temperature loop output resistance of the device is designed to be 0.3Ω with a bias voltage equal to the programmed V (see OUT for a 5V output and 0.2Ω for a 3.3V output. For a 250mA Ceramic Capacitor Selection Guidelines). If only 100mA load current change, the output voltage will change by or less of output current is required for the application, about 1.5%V. If the output capacitor has more ESR than the flying capacitor minimum can be reduced to 0.15μF. the closed loop impedance, the closed loop frequency The voltage rating of the ceramic capacitor should be response will cease to roll off in a simple 1-pole fashion V + 1V or greater. OUT and poor load transient response or instability could result. Ceramic capacitors typically have exceptional ESR perfor- Ceramic Capacitor Selection Guidelines mance, and combined with a tight board layout, should Capacitors of different materials lose their capacitance yield excellent stability and load transient performance. with higher temperature and voltage at different rates. For example, a ceramic capacitor made of X5R or X7R V Capacitor Selection IN material will retain most of its capacitance from –40°C The constant frequency architecture used by the LTC3245 to 85°C, whereas a Z5U or Y5V style capacitor will lose makes input noise filtering much less demanding than with considerable capacitance over that range (60% to 80% conventional regulated charge pumps. Depending on the loss typical). Z5U and Y5V capacitors may also have a mode of operation the input current of the LTC3245 can very strong voltage coefficient, causing them to lose an vary from I to 0mA on a cycle-by-cycle basis. Low ESR additional 60% or more of their capacitance when the rated OUT will reduce the voltage steps caused by changing input voltage is applied. Therefore, when comparing different current, while the absolute capacitor value will determine capacitors, it is often more appropriate to compare the the level of ripple. The total amount and type of capacitance amount of achievable capacitance for a given case size 3245fa 12 For more information www.linear.com/LTC3245

LTC3245 applicaTions inForMaTion rather than discussing the specified capacitance value. For Because of the wide input operating range it is possible to example, over rated voltage and temperature conditions, exceed the specified operating junction temperature and a 4.7μF, 10V, Y5V ceramic capacitor in an 0805 case may even reach thermal shutdown. Figure 3 shows the avail- not provide any more capacitance than a 1μF, 10V, X5R able output current vs temperature to ensure the 150°C or X7R available in the same 0805 case. In fact, over bias operating junction temperature is not exceed for input and temperature range, the 1μF, 10V, X5R or X7R will voltages less than 20V. provide more capacitance than the 4.7μF, 10V, Y5V. The Figure 3 assumes worst-case operating conditions. Under capacitor manufacturer’s data sheet should be consulted some operating conditions the part can supply more current to determine what value of capacitor is needed to ensure than shown without exceeding the 150°C operating junc- minimum capacitance values are met over operating tion temperature. When operating outside the constraints temperature and bias voltage. Below is a list of ceramic of Figure 3 it is the responsibility of the user to calculate capacitor manufacturers and how to contact them: worst-case operating conditions (temperature and power) MANUFACTURER WEBSITE to make sure the LTC3245’s specified operating junction temperature is not exceeded for extended periods of time. AVX www.avxcorp.com The 2:1 Step-Down, 1:1 Step-Down, and 1:2 Step-Up Kemet www.kemet.com Charge Pump Operation sections provide equations for Murata www.murata.com calculating power dissipation (P ) in each mode. Taiyo Yuden www.t-yuden.com D TDK www.tdk.com 300 VIN < 20V Layout Considerations 250 Due to the high switching frequency and transient cur- rents produced by the LTC3245, careful board layout is 200 necessary for optimal performance. A true ground plane A) and short connections to all capacitors will optimize m (UT150 performance, reduce noise and ensure proper regulation O I over all conditions. 100 When using the LTC3245 with an external resistor divider 50 it is important to minimize any stray capacitance to the ADJ (OUTS/ADJ pin) node. Stray capacitance from ADJ 0 to C+ or C– can degrade performance significantly and 70 80 90 100 110 120 130 140 150 TEMPERATURE (°C) should be minimized and/or shielded if necessary. 3245 F03 Thermal Management Figure 3. Available Output Current vs Temperature The on chip power dissipation in the LTC3245 will cause the For example, if it is determined that the maximum power junction to ambient temperature to rise at rate of 40°C/W dissipation (P ) is 1.2W under normal operation, then the D or more. To reduce the maximum junction temperature, a junction to ambient temperature rise will be: good thermal connection to the PC board is recommended. Junction to ambient = 1.2W • 40°C/W = 48°C Connecting the die paddle (Pin 13) with multiple vias to a large ground plane under the device can reduce the thermal Thus, the ambient temperature under this condition cannot resistance of the package and PC board considerably. Poor exceed 102°C if the junction temperature is to remain below board layout and failure to connect the die paddle (Pin 13) 150°C and if the ambient temperature exceeds about 127°C to a large ground plane can result in thermal junction to the device will cycle in and out of the thermal shutdown. ambient impedance well in excess of 40°C/W. 3245fa 13 For more information www.linear.com/LTC3245

LTC3245 Typical applicaTions Regulated 5V Low Noise Output 1µF C+ C– LTC3245 VIN VOUT IVVOOUUTT =U 5PV TO 250mA + 12V BURST OUTS/ADJ 100k LEAD ACID 1µF BATTERY SEL2 PGOOD 10µF SEL1 GND 3245 TA02 High Efficiency 3.3V Microcontroller Supply from 9V Alkaline (with Power-On Reset Delay) 1µF C+ C– MICROCONTROLLER LTC3245 VOUT = 3.3V VIN VOUT VDD + 9V SEL1 OUTS/ADJ 510k 10µF ALKALINE 1µF BATTERY SEL2 PGOOD POR BURST 1µF GND GND 3245 TA03 Wide Input Range Low Noise 3.6V Supply 1µF C+ C– LTC3245 VIN = 2.7V TO 38V VIN VOUT VOUT = 3.6V BURST 499k 1µF SEL1 OUTS/ADJ 10µF SEL2 PGOOD 249k GND 3245 TA04 3245fa 14 For more information www.linear.com/LTC3245

LTC3245 package DescripTion Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. MSE Package 12-Lead Plastic MSOP, Exposed Die Pad (Reference LTC DWG # 05-08-1666 Rev G) BOTTOM VIEW OF EXPOSED PAD OPTION 2.845 ±0.102 2.845 ±0.102 (.112 ±.004) (.112 ±.004) 0.889 ±0.127 (.035 ±.005) 1 6 0.35 REF 5.10 1.651 ±0.102 (.201) 1.651 ±0.102 3.20 – 3.45 (.065 ±.004) 0.12 REF MIN (.065 ±.004) (.126 – .136) DETAIL “B” CORNER TAIL IS PART OF DETAIL “B” THE LEADFRAME FEATURE. FOR REFERENCE ONLY 12 7 NO MEASUREMENT PURPOSE 0.42 ±0.038 0.65 4.039 ±0.102 (.0165 ±.0015) (.0256) (.159 ±.004) TYP BSC (NOTE 3) 0.406 ±0.076 RECOMMENDED SOLDER PAD LAYOUT 121110 9 87 (.016 ±.003) REF DETAIL “A” 0.254 (.010) 3.00 ±0.102 0° – 6° TYP 4.90 ±0.152 (.118 ±.004) (.193 ±.006) GAUGE PLANE (NOTE 4) 0.53 ±0.152 (.021 ±.006) 1 2 3 4 5 6 DETAIL “A” 1.10 0.86 0.18 (.043) (.034) (.007) MAX REF SEATING PLANE 0.22 – 0.38 0.1016 ±0.0508 (.009 – .015) (.004 ±.002) TYP 0.650 NOTE: (.0256) MSOP (MSE12) 0213 REV G 1. DIMENSIONS IN MILLIMETER/(INCH) BSC 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL NOT EXCEED 0.254mm (.010") PER SIDE. 3245fa 15 For more information www.linear.com/LTC3245

LTC3245 package DescripTion Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. DE/UE Package 12-Lead Plastic DFN (4mm × 3mm) (Reference LTC DWG # 05-08-1695 Rev D) 0.70 ±0.05 3.30 ±0.05 3.60 ±0.05 2.20 ±0.05 1.70 ± 0.05 PACKAGE OUTLINE 0.25 ± 0.05 0.50 BSC 2.50 REF RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 4.00 ±0.10 R = 0.115 0.40 ± 0.10 (2 SIDES) TYP 7 12 R = 0.05 TYP 3.30 ±0.10 3.00 ±0.10 (2 SIDES) 1.70 ± 0.10 PIN 1 PIN 1 NOTCH TOP MARK R = 0.20 OR (NOTE 6) 0.35 × 45° CHAMFER 6 1 (UE12/DE12) DFN 0806 REV D 0.200 REF 0.75 ±0.05 0.25 ± 0.05 0.50 BSC 2.50 REF 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING PROPOSED TO BE A VARIATION OF VERSION (WGED) IN JEDEC PACKAGE OUTLINE M0-229 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 3245fa 16 For more information www.linear.com/LTC3245

LTC3245 revision hisTory REV DATE DESCRIPTION PAGE NUMBER A 7/13 Added MP-grade in MSOP package to Order Information table 2 Modified Note 2 to add MP-grade 3 3245fa 17 Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconnFecotrio mn oofr ites icnirfcourimts aasti doens cwriwbewd. hlienreeianr .wciollm no/tL iTnfCri3n2g4e o5n existing patent rights.

LTC3245 Typical applicaTion Wide V 5V Supply with Battery Backup IN 1µF 12V TO 24V C+ C– LTC3245 + VIN VOUT IVVOOUUTT =U 5PV TO 250mA SEL2 OUTS/ADJ + 1µF 10µF BURST PGOOD + 4 × AA SEL1 + GND 3245 TA05 relaTeD parTs PART NUMBER DESCRIPTION COMMENTS LTC1751-3.3/ 100mA, 800kHz Regulated Doubler V : 2V to 5V, V = 3.3V/5V, I = 20μA, I < 2μA, MS8 Package IN OUT(MAX) Q SD LTC1751-5 LTC1983-3/ 100mA, 900kHz Regulated Inverter V : 3.3V to 5.5V, V = –3V/–5V, I = 25μA, I < 2μA, ThinSOT™ Package IN OUT(MAX) Q SD LTC1983-5 LTC3200-5 100mA, 2MHz Low Noise, Doubler/ V : 2.7V to 4.5V, V = 5V, I = 3.5mA, I < 1μA, ThinSOT Package IN OUT(MAX) Q SD White LED Driver LTC3202 125mA, 1.5MHz Low Noise, Fractional V : 2.7V to 4.5V, V = 5.5V, I = 2.5mA, I < 1μA, DFN, MS Packages IN OUT(MAX) Q SD White LED Driver LTC3204-3.3/ Low Noise, Regulated Charge Pumps V : 1.8V to 4.5V (LTC3204B-3.3), 2.7V to 5.5V (LTC3204B-5), I = 48μA, B Version without IN Q LTC3204B-3.3/ in (2mm × 2mm) DFN Package Burst Mode Operation, 6-Lead (2mm × 2mm) DFN Package LTC3204-5/ LTC3204B-5 LTC3440 600mA (I ) 2MHz Synchronous 95% Efficiency, V : 2.5V to 5.5V, V = 2.5V, I = 25μA, I ≤ 1μA, 10-Lead MS OUT IN OUT(MIN) Q SD Buck-Boost DC/DC Converter Package LTC3441 High Current Micropower 1MHz 95% Efficiency, V : 2.5V to 5.5V, V = 2.5V, I = 25μA, I ≤ 1μA, DFN Package IN OUT(MIN) Q SD Synchronous Buck-Boost DC/DC Converter LTC3443 High Current Micropower 600kHz 96% Efficiency, V : 2.4V to 5.5V, V = 2.4V, I = 28μA, I < 1μA, DFN Package IN OUT(MIN) Q SD Synchronous Buck-Boost DC/DC Converter LTC3240-3.3/ 3.3V/2.5V Step-Up/Step-Down Charge V : 1.8V to 5.5V, V = 3.3V / 2.5V, I = 65μA, I < 1μA, (2mm × 2mm) DFN Package IN OUT(MAX) Q SD LTC3240-2.5 Pump DC/DC Converter LTC3260 Low Noise Dual Supply Inverting V Range: 4.5V to 32V, I = 100µA, 100mA Charge Pump, 50mA Positive LDO, 50mA IN Q Charge Pump Negative LDO LTC3261 High Voltage Low I Inverting Charge V Range: 4.5V to 32V, I = 60µA, 100mA Charge Pump Q IN Q Pump 3245fa 18 Linear Technology Corporation LT 0713 REV A • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 For more information www.linear.com/LTC3245 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com/LTC3245  LINEAR TECHNOLOGY CORPORATION 2013