LTC3025 300mA Micropower VLDO Linear Regulator FEATURES DESCRIPTION n Wide Input Voltage Range: 0.9V to 5.5V The LTC®3025 is a micropower, VLDOTM (very low drop- n Stable with Ceramic Capacitors out) linear regulator which operates from input voltages as n Very Low Dropout: 45mV at 300mA low as 0.9V. The device is capable of supplying 300mA of n Adjustable Output Range: 0.4V to 3.6V output current with a typical dropout voltage of only 45mV. n ±2% Voltage Accuracy over Temperature A BIAS supply is required to run the internal reference and Supply Load LDO circuitry while output current comes directly from n Low Noise: 80μV (10Hz to 100kHz) the IN supply for high effi ciency regulation. The low 0.4V RMS n BIAS Voltage Range: 2.5V to 5.5V internal reference voltage allows the LTC3025 output to n Fast Transient Recovery be programmed to much lower voltages than available in n Shutdown Disconnects Load from V and V common LDOs (range of 0.4V to 3.6V). The output voltage IN BIAS n Low Operating Current: I = 4μA, I = 50μA Typ is programmed via two ultrasmall SMD resistors. IN BIAS n Low Shutdown Current: I = 1μA, I = 0.01μA Typ IN BIAS The LTC3025’s low quiescent current makes it an ideal n Output Current Limit choice for use in battery-powered systems. For 3-cell n Thermal Overload Protection NiMH and single cell Li-Ion applications, the BIAS voltage n Available in 6-Lead (2mm × 2mm) DFN Package can be supplied directly from the battery while the input APPLICATIONS can come from a high effi ciency buck regulator, providing a high effi ciency, low noise output. n Low Power Handheld Devices Other features include high output voltage accuracy, n Low Voltage Logic Supplies excellent transient response, stability with ultralow ESR n DSP Power Supplies ceramic capacitors as small as 1μF, short-circuit and n Cellular Phones thermal overload protection and output current limiting. n Portable Electronic Equipment The LTC3025 is available in a tiny, low profi le (0.75mm) n Handheld Medical Instruments 6-lead DFN (2mm × 2mm) package. n Post Regulator for Switching Supply Noise Rejection L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and VLDO and ThinSOT are trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. TYPICAL APPLICATION 1.2V Output Voltage from 1.5V Input Supply 1MHz V Supply Rejection IN 50 0.1μF BIAS OUT 1μF VIOOUUTT ≤ = 3 10.02mVA 45 COUT = 10μF Li-Ion 1.5V HIGH LTC3025 80.6k 40 OR EFFICIENCY 1.5V 3-NCiEMLHL DBCU/CDKC 0.1μF IN ADJ 40.2k N (dB) 3350 COUT = 1μF OFF ON SHDN GND TIO 25 C 3025 TA01 EJE 20 R 15 10 5 BIAS = 3.6V IOUT = 100mA VOUT = 1.2V IOUT = 300mA 0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 VIN (V) 3025 TA01b 3025fd 1

LTC3025 ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION (Notes 1, 2) V , V to GND .........................................–0.3V to 6V TOP VIEW BIAS IN SHDN to GND ...............................................–0.3V to 6V BIAS 1 6 SHDN ADJ to GND ..................................................–0.3V to 6V GND 2 7 5 ADJ V ........................................–0.3V to V + 0.3V or 6V OUT IN IN 3 4 OUT Operating Junction Temperature Range (Note 3) ..................................................–40°C to 125°C DC6 PACKAGE Storage Temperature Range ...................–65°C to 125°C 6-LEAD (2mm (cid:115) 2mm) PLASTIC DFN Output Short-Circuit Duration ..........................Indefi nite TJMAX = 125°C, θJA = 102°C/W, θJC = 20°C/W EXPOSED PAD (PIN 7) IS GND, MUST BE SOLDERED TO PCB ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LTC3025EDC#PBF LTC3025EDC#TRPBF LBDY 6-Lead (2mm × 2mm) Plastic DFN –40°C to 125°C LTC3025IDC#PBF LTC3025IDC#TRPBF LBDY 6-Lead (2mm × 2mm) Plastic DFN –40°C to 125°C LEAD BASED FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LTC3025EDC LTC3025EDC#TR LBDY 6-Lead (2mm × 2mm) Plastic DFN –40°C to 125°C LTC3025IDC LTC3025IDC#TR LBDY 6-Lead (2mm × 2mm) Plastic DFN –40°C to 125°C Consult LTC Marketing for parts specifi ed with wider operating temperature ranges. *The temperature grade is identifi ed by a label on the shipping container. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifi cations, go to: http://www.linear.com/tapeandreel/ ELECTRICAL CHARACTERISTICS The l denotes the specifi cations which apply over the full operating temperature range, otherwise specifi cations are at T = 25°C. V = 1.5V, V = 3.6V, V = 1.2V, C = 1μF, C = 0.1μF, A IN BIAS OUT OUT IN C = 0.1μF (all capacitors ceramic) unless otherwise noted. (Note 3) BIAS PARAMETER CONDITIONS MIN TYP MAX UNITS V Operating Voltage (Note 4) l 0.9 5.5 V IN V Operating Voltage (Note 4) l 2.5 5.5 V BIAS V Undervoltage Lockout l 2.2 2.5 V BIAS V Operating Current I = 10μA l 4 10 μA IN OUT V Operating Current I = 10μA l 50 80 μA BIAS OUT V Shutdown Current V = 0V 1 5 μA IN SHDN V Shutdown Current V = 0V 0.01 1 μA BIAS SHDN V Regulation Voltage (Note 5) 1mA ≤ I ≤ 300mA, 1.5V ≤ V ≤ 5V 0.395 0.4 0.405 V ADJ OUT IN 1mA ≤ I ≤ 300mA, 1.5V ≤ V ≤ 5V l 0.392 0.4 0.408 V OUT IN I ADJ Input Current V = 0.45V –50 0 50 nA ADJ ADJ OUT Load Regulation (Referred to ADJ Pin) ∆IOUT = 1mA to 300mA –0.2 mV V Line Regulation (Referred to ADJ Pin) V = 1.5V to 5V, V = 3.6V, V = 1.2V, 0.07 mV IN IN BIAS OUT I = 1mA OUT BIAS Line Regulation (Referred to ADJ Pin) V = 1.5V, V = 2.6V to 5V, V = 1.2V l 1.7 5.5 mV IN BIAS OUT I = 1mA OUT 3025fd 2

LTC3025 ELECTRICAL CHARACTERISTICS The l denotes the specifi cations which apply over the full operating temperature range, otherwise specifi cations are at T = 25°C. V = 1.5V, V = 3.6V, V = 1.2V, C = 1μF, C = 0.1μF, A IN BIAS OUT OUT IN C = 0.1μF (all capacitors ceramic) unless otherwise noted. (Note 3) BIAS PARAMETER CONDITIONS MIN TYP MAX UNITS V to V Dropout Voltage (Notes 4, 6, 7) V = 2.8V, V = 1.5V, V = 0.37V, I = 300mA l 45 100 mV IN OUT BIAS IN ADJ OUT V to V Dropout Voltage (Note 4) l 1.4 V BIAS OUT I Continuous Output Current l 300 mA OUT I Current Limit V = 0V 680 mA OUT ADJ e Output Voltage Noise f = 10Hz to 100kHz, I = 300mA 80 μV n OUT RMS V SHDN Input High Voltage l 0.9 V IH V SHDN Input Low Voltage l 0.3 V IL I SHDN Input High Current SHDN = 1.2V –1 1 μA IH I SHDN Input Low Current SHDN = 0V –1 1 μA L Note 1: Stresses beyond those listed under Absolute Maximum Ratings Note 4: For the LTC3025, a regulated output voltage will only be available may cause permanent damage to the device. Exposure to any Absolute when the minimum IN and BIAS Operating Voltages as well as the IN to Maximum Rating condition for extended periods may affect device OUT and BIAS to OUT Dropout Voltages are all satisfi ed. reliability and lifetime. Note 5: Operating conditions are limited by maximum junction Note 2: This IC includes overtemperature protection that is intended temperature. The regulated output voltage specifi cation will not apply to protect the device during momentary overload conditions. Junction for all possible combinations of input voltage and output current. When temperature will exceed 125°C when overtemperature protection is active. operating at maximum input voltage, the output current range must be Continuous operation above the specifi ed maximum operating junction limited. When operating at maximum output current, the input voltage temperature may impair device reliability. range must be limited. Note 3: The LTC3025 regulator is tested and specifi ed under pulse Note 6: Dropout voltage is minimum input to output voltage differential load conditions such that T ≈ T . The LTC3025 is 100% production needed to maintain regulation at a specifi ed output current. In dropout, the J A tested at 25°C. Performance at –40°C and 125°C is assured by design, output voltage will be equal to VIN – VDROPOUT. characterization and correlation with statistical process control. The Note 7: The DFN output FET on-resistance in dropout is guaranteed by LTC3025I is guaranteed to meet performance specifi cations over the full correlation to wafer level measurements. –40°C and 125°C operating junction temperature range. TYPICAL PERFORMANCE CHARACTERISTICS Operating BIAS Current Dropout Voltage vs I vs Output Load BIAS No Load Operating Current OUT 70 400 80 VBIAS = 2.8V VIN = 1.5V 60 350 70 VOUT = 1.2V mV) 50 TA = 125°C 300 60 OUT VOLTAGE ( 4300 TA = 25°C I (μA)BIAS212055000 25°C125°C I (μA)BIAS 435000 1–2450°°CC 25°C ROP 20 TA = –40°C –40°C D 100 20 10 50 10 0 0 0 0 50 100 150 200 250 300 0.01 0.1 1 10 100 1000 2.5 3 3.5 4 4.5 5 5.5 IOUT (mA) IOUT (mA) VBIAS (V) 3025 G01 3025 G02 3025 G03 3025fd 3

LTC3025 TYPICAL PERFORMANCE CHARACTERISTICS V No Load Operating Current V Shutdown Current Adjust Voltage vs Temperature IN IN 14 7 405 VBIAS = 5V VBIAS = 5V VBIAS = 3.6V 12 VOUT = 0.8V 6 404 VIN = 1.5V 403 IOUT = 10μA 10 125°C 5 mV)402 I (μA)IN 86 2855°C°C I (μA)IN 43 –40°C T VOLTAGE (344900901 –40°C 25°C US 4 2 DJ398 A 85°C 397 2 1 396 0 0 395 0.5 1.5 2.5 3.5 4.5 5.5 0.5 1.5 2.5 3.5 4.5 5.5 –50 –25 0 25 50 75 100 125 VIN (V) VIN (V) TEMPERATURE (°C) 3025 G04 3025 G05 3025 G06 Burst Mode DC/DC Buck Ripple SHDN Threshold vs Temperature Current Limit vs V Voltage Rejection IN 1000 1600 VBIAS = 3.6V 900 1400 VOUT = 0V VIN 800 AC LD (mV)760000 VBIAS = 5V T (mA)11200000 100mV/DIV N THRESHO450000 VBIAS = 2.5V RRENT LIMI 860000 10mVV/ODAUICVT D300 U H C S 400 200 100 200 VIN = 1.8V 10μs/DIV 3025 G09 VOUT = 1.5V 0 0 COUT = 1μF –50 –25 0 25 50 75 100 125 0 1 2 3 4 5 6 IOUT = 50mA TEMPERATURE (°C) VIN (V) 3025 G07 3025 G08 V Ripple Rejection BIAS Ripple Rejection IN vs Frequency vs Frequency 70 70 60 60 COUT = 10μF COUT = 10μF 50 50 B) B) d d N ( 40 N ( 40 TIO COUT = 1μF TIO EC 30 EC 30 REJ REJ COUT = 1μF 20 20 VBIAS = 3.6V VBIAS = 3.6V 10 VIN = 1.5V 10 VIN = 1.5V VOUT = 1.2V VOUT = 1.2V IOUT = 100mA IOUT = 100mA 0 0 100 1k 10k 100k 1M 10M 100 1k 10k 100k 1M 10M FREQUENCY (Hz) FREQUENCY (Hz) 3025 G10 3025 G11 3025fd 4

LTC3025 TYPICAL PERFORMANCE CHARACTERISTICS 3MHz V Supply Rejection Transient Response IN 50 45 250mA 40 COUT = 10μF IOUT 10mA B) 35 COUT = 1μF N (d 30 CTIO 25 VOUT JE 20 AC RE 10mV/DIV 15 10 50 VVBOIUATS == 13..26VV IIOOUUTT == 130000mmAA VVVIOBNIUA =TS =1= . 153.V.26VV 100μs/DIV 3025 G13 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 COUT = 1μF VIN (V) 3025 G12 PIN FUNCTIONS BIAS (Pin 1): BIAS Input Voltage. BIAS provides internal capacitor of at least 1μF is required to ensure stability. power for LTC3025 circuitry. The BIAS pin should be lo- Larger output capacitors may be required for applications cally bypassed to ground if the LTC3025 is more than a with large transient loads to limit peak voltage transients. few inches away from another source of bulk capacitance. See the Applications Information section for more informa- In general, the output impedance of a battery rises with tion on output capacitance. frequency, so it is usually advisable to include an input ADJ (Pin 5): Adjust Input. This is the input to the error bypass capacitor in battery-powered circuits. A capacitor amplifi er. The ADJ pin reference voltage is 0.4V referenced in the range of 0.01μF to 0.1μF is usually suffi cient. to ground. The output voltage range is 0.4V to 3.6V and is GND (Pin 2): Ground. Connect to a ground plane. typically set by connecting ADJ to a resistor divider from OUT to GND. See Figure 2. IN (Pin 3): Input Supply Voltage. The output load current is supplied directly from IN. The IN pin should be locally SHDN (Pin 6): Shutdown Input, Active Low. This pin is bypassed to ground if the LTC3025 is more than a few inches used to put the LTC3025 into shutdown. The SHDN pin away from another source of bulk capacitance. In general, current is typically less than 10nA. The SHDN pin cannot the output impedance of a battery rises with frequency, so be left fl oating and must be tied to a valid logic level (such it is usually advisable to include an input bypass capacitor as BIAS) if not used. when supplying IN from a battery. A capacitor in the range GND (Exposed Pad Pin 7): Ground and Heat Sink. Must of 0.1μF to 1μF is usually suffi cient. be soldered to PCB ground plane or large pad for optimal OUT (Pin 4): Regulated Output Voltage. The OUT pin thermal performance. supplies power to the load. A minimum ceramic output 3025fd 5

LTC3025 BLOCK DIAGRAM BIAS 1 REFERENCE SOFT-START IN SHDN 3 6 SHDN 0.4V + – 6μA OUT GND 4 2 ADJ 5 3025 BD APPLICATIONS INFORMATION Operation (Refer to Block Diagram) 300mA The LTC3025 is a micropower, VLDO (very low dropout) IOUT 0mA linear regulator which operates from input voltages as low as 0.9V. The device provides a high accuracy output that is capable of supplying 300mA of output current with a typical dropout voltage of only 45mV. A single ceramic VOUT capacitor as small as 1μF is all that is required for output AC 20mV/DIV bypassing. A low reference voltage allows the LTC3025 output to be programmed to much lower voltages than available in common LDOs (range of 0.4V to 3. 6V). VIN = 1.5V 100μs/DIV 3025 F01 VOUT = 1.2V As shown in the Block Diagram, the BIAS input supplies VBIAS = 3.6V COUT = 1μF the internal reference and LDO circuitry while all output current comes directly from the IN input for high effi ciency Figure 1. LTC3025 Transient Response regulation. The low quiescent supply currents I = 4μA, IN I = 50μA drop to I = 1μA, I = 0.01μA typical in Adjustable Output Voltage BIAS IN BIAS shutdown making the LTC3025 an ideal choice for use in The output voltage is set by the ratio of two external resis- battery-powered systems. tors as shown in Figure 2. The device servos the output The device includes current limit and thermal overload to maintain the ADJ pin voltage at 0.4V (referenced to protection. The fast transient response of the follower ground). Thus the current in R1 is equal to 0.4V/R1. For output stage overcomes the traditional tradeoff between good transient response, stability, and accuracy, the current dropout voltage, quiescent current and load transient in R1 should be at least 8μA, thus the value of R1 should response inherent in most LDO regulator architectures. be no greater than 50k. The current in R2 is the current in The LTC3025 also includes overshoot detection circuitry R1 plus the ADJ pin bias current. Since the ADJ pin bias which brings the output back into regulation when going current is typically <10nA, it can be ignored in the output from heavy to light output loads (see Figure 1). voltage calculation. The output voltage can be calculated 3025fd 6

LTC3025 APPLICATIONS INFORMATION using the formula in Figure 2. Note that in shutdown the increase the effective output capacitor value. High ESR output is turned off and the divider current will be zero tantalum and electrolytic capacitors may be used, but once C is discharged. a low ESR ceramic capacitor must be in parallel at the OUT output. There is no minimum ESR or maximum capacitor The LTC3025 operates at a relatively high gain of –0.7μV/ size requirements. mA referred to the ADJ input. Thus a load current change of 1mA to 300mA produces a –0.2mV drop at the ADJ Extra consideration must be given to the use of ceramic input. To calculate the change referred to the output sim- capacitors. Ceramic capacitors are manufactured with a ply multiply by the gain of the feedback network (i. e. ,1 variety of dielectrics, each with different behavior across + R2/R1). For example, to program the output for 1.2V temperature and applied voltage. The most common di- choose R2/R1 = 2. In this example, an output current electrics used are Z5U, Y5V, X5R and X7R. The Z5U and change of 1mA to 300mA produces –0.2mV • (1 + 2) = Y5V dielectrics are good for providing high capacitances 0.6mV drop at the output. in a small package, but exhibit large voltage and tem- perature coeffi cients as shown in Figures 3 and 4. When Because the ADJ pin is relatively high impedance (depend- used with a 2V regulator, a 1μF Y5V capacitor can lose as ing on the resistor divider used) , stray capacitance at this much as 75% of its initial capacitance over the operating pin should be minimized (<10pF) to prevent phase shift in the error amplifi er loop. Additionally, special attention 20 should be given to any stray capacitances that can couple BOTH CAPACITORS ARE 1μF, 10V, 0603 CASE SIZE external signals onto the ADJ pin producing undesirable 0 output ripple. For optimum performance connect the ADJ %) X5R pin to R1 and R2 with a short PCB trace and minimize all E (–20 U L other stray capacitance to the ADJ pin. VA N –40 E I Y5V G N A–60 ( ) CH OUT VOUT = 0.4V 1 (cid:11)RR21 –80 R2 ADJ COUT –100 0 2 4 6 8 10 R1 DC BIAS VOLTAGE (V) GND 3025 F03 3025 F02 Figure 3. Ceramic Capacitor DC Bias Characteristics Figure 2. Programming the LTC3025 20 Output Capacitance and Transient Response 0 The LTC3025 is designed to be stable with a wide range of %) X5R ceramic output capacitors. The ESR of the output capaci- UE (–20 Y5V L A tor affects stability, most notably with small capacitors. A N V–40 minimum output capacitor of 1μF with an ESR of 0.05Ω E I G N or less is recommended to ensure stability. The LTC3025 HA–60 C is a micropower device and output transient response –80 will be a function of output capacitance. Larger values BOTH CAPACITORS ARE 1μF, 10V, 0603 CASE SIZE of output capacitance decrease the peak deviations and –100 –50 –25 0 25 50 75 provide improved transient response for larger load current TEMPERATURE (°C) changes. Note that bypass capacitors used to decouple 3025 F04 individual components powered by the LTC3025 will Figure 4. Ceramic Capacitor Temperature Characteristics 3025fd 7

LTC3025 APPLICATIONS INFORMATION temperature range. The X5R and X7R dielectrics result in Calculating Junction Temperature more stable characteristics and are usually more suitable Example: Given an output voltage of 1.2V, an input voltage for use as the output capacitor. The X7R type has better of 1.8V to 3V, an output current range of 0mA to 100mA stability across temperature, while the X5R is less expensive and a maximum ambient temperature of 50°C, what will and is available in higher values. In all cases, the output the maximum junction temperature be? capacitance should never drop below 0.4μF, or instability or degraded performance may occur. The power dissipated by the device will be equal to: Thermal Considerations IOUT(MAX) (VIN(MAX) – VOUT) The power handling capability of the device will be limited where: by the maximum rated junction temperature (125°C). The I = 100mA OUT(MAX) power dissipated by the device will be the output current V = 3V multiplied by the input/output voltage differential: IN(MAX) So: (I ) (V – V ) OUT IN OUT P = 100mA(3V – 1.2V) = 0.18W Note that the BIAS current is less than 300μA even under heavy loads, so its power consumption can be ignored Even under worst-case conditions, the LTC3025’s BIAS pin for thermal calculations. power dissipation is only about 1mW, thus can be ignored. Assuming a junction-to-ambient thermal resistance of The LTC3025 has internal thermal limiting designed to 102°C/W, the junction temperature rise above ambient protect the device during momentary overload conditions. will be approximately equal to: For continuous normal conditions, the maximum junction temperature rating of 125°C must not be exceeded. It is 0.18W(102°C/W) = 18.4°C important to give careful consideration to all sources of The maximum junction temperature will then be equal to thermal resistance from junction to ambient. Additional the maximum junction temperature rise above ambient heat sources mounted nearby must also be considered. plus the maximum ambient temperature or: For surface mount devices, heat sinking is accomplished by using the heat-spreading capabilities of the PC board T = 50°C + 18.4°C = 68.4°C and its copper traces. Copper board stiffeners and plated through holes can also be used to spread the heat gener- Short-Circuit/Thermal Protection ated by power devices. The LTC3025 has built-in short-circuit current limiting as The LTC3025 2mm × 2mm DFN package is specifi ed as hav- well as overtemperature protection. During short-circuit ing a junction-to-ambient thermal resistance of 102°C/W, conditions, internal circuitry automatically limits the output which assumes a minimal heat spreading copper plane. The current to approximately 600mA. At higher temperatures, or actual thermal resistance can be reduced substantially by in cases where internal power dissipation causes excessive connecting the package directly to a good heat spreading self heating on chip, the thermal shutdown circuitry will ground plane. When soldered to 2500mm2 double-sided shut down the LDO when the junction temperature exceeds 1 oz. copper plane, the actual junction-to-ambient thermal approximately 150°C. It will re enable the LDO once the resistance can be less than 60°C/W. junction temperature drops back to approximately 140°C. 3025fd 8

LTC3025 APPLICATIONS INFORMATION The LTC3025 will cycle in and out of thermal shutdown V Start-Up and Supply Sequencing OUT without latch-up or damage until the overstress condition During power-up, the output shutdown circuitry is not is removed. Long term overstress (T > 125°C) should be J active below V of about 0.65V DC (typical). As a result, IN avoided as it can degrade the performance or shorten the the output voltage can drift up during power-up due to life of the part. leakage current (<1 mA typical) from V to V . At 0.9V IN OUT input, the shutdown circuitry is active and the output is Soft-Start Operation actively held off. This usually causes no circuit problems The LTC3025 includes a soft-start feature to prevent and is similar to 3-terminal regulators such as the LT3080, excessive current fl ow during start-up. When the LDO is LT1086 and LT317 which have no ground pin and can have enabled, the soft-start circuitry gradually increases the LDO the output rise under some conditions. A slowly rising reference voltage from 0V to 0.4V over a period of about V with the part enabled may result in non-monotonic IN 600μs. There is a short 700μs delay from the time the ramping of V due to LDO circuitry becoming active at OUT part is enabled until the LDO output starts to rise. Figure 5 V of about 0.65V (typical) as well. IN shows the start-up and shutdown output waveform. With fast rising inputs (>1V/ms) or with suffi cient resis- tive load on V , output voltage rise during power-up is OUT ON SHDN reduced or eliminated. Such conditions also reduce or OFF eliminate non-monotonic initial power-up with the part 1.2V enabled. If V is sequenced up before V , the leakage BIAS IN current from V to V may increase until the shutdown IN OUT circuitry is active at a V of about 0.65V typical. Thus, IN VOUT to minimize V rise during start-up, sequence up V 200mV/DIV OUT IN before V . At V = 0.9V, the output is actively held off BIAS IN in shutdown or it is actively held on when enabled under all conditions. 0V TA = 25°C 500μs/DIV 3025 F05 VIN = 1.5V VBIAS = 3.6V COUT = 1μF RLOAD = 4Ω Figure 5. Output Start-Up and Shutdown 3025fd 9

LTC3025 PACKAGE DESCRIPTION DC Package 6-Lead Plastic DFN (2mm × 2mm) (Reference LTC DWG # 05-08-1703 Rev B) 0.70 (cid:112)0.05 2.55 (cid:112)0.05 1.15 (cid:112)0.050.61 (cid:112)0.05 (2 SIDES) PACKAGE OUTLINE 0.25 (cid:112) 0.05 0.50 BSC 1.42 (cid:112)0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS R = 0.125 0.40 (cid:112) 0.10 TYP 0.56 (cid:112) 0.05 4 6 (2 SIDES) 2.00 (cid:112)0.10 PIN 1 NOTCH PIN 1 BAR (4 SIDES) R = 0.20 OR TOP MARK 0.25 (cid:115) 45(cid:111) (SEE NOTE 6) CHAMFER R = 0.05 (DC6) DFN REV B 1309 TYP 3 1 0.25 (cid:112) 0.05 0.200 REF 0.75 (cid:112)0.05 0.50 BSC 1.37 (cid:112)0.05 (2 SIDES) 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WCCD-2) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 3025fd 10

LTC3025 REVISION HISTORY (Revision history begins at Rev C) REV DATE DESCRIPTION PAGE NUMBER C 07/10 Added (Note 3) notation to “The l denotes” statement in Electrical Characteristics section 2, 3 Updated Pin 7 in Pin Functions 6 Added “V Start-Up and Supply Sequencing” section 9 OUT Updated Related Parts section 12 D 01/11 Updated graph G11 4 3025fd Information furnished by Linear Technology Corporation is believed to be accurate and reliable. 11 However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

LTC3025 TYPICAL APPLICATION High Effi ciency 1.5V Step-Down Converter with Effi cient 1.2V VLDO Output OFF ON 1 4 BIAS OUT VOUT = 1.2V 0.1μF 1μF IOUT ≤ 300mA LTC3025 80.6k VIN 4 3 2.2μH* 3 5 2.7V VIN SW IN ADJ TO 5.5V CIN** 4.7μF LTC3406-1.5 VOUT 40.2k CER 1.5V 6 2 1 5 600mA OFF ON SHDN GND RUN VOUT COUT+ 3025 TA02 GND 10μF CER *MURATA LQH32CN2R2M33 **TAIYO YUDEN JMK212BJ475MG †TAIYO YUDEN JMK316BJ106ML Effi ciency vs Output Current 100 90 VOUT = 1.5V %) 80 CY ( VOUT = 1.2V N 70 E CI FI F E 60 50 40 0.1 1 10 100 1000 OUTPUT CURRENT (mA) 3025 TA03 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LT®1761 100mA, Low Noise Micropower, LDO V : 1.8V to 20V, V = 1.22V, V = 0.30V, I = 20μA, I < 1μA, IN OUT(MIN) DO Q SD V = Adj, 1.5V, 1.8V, 2V, 2.5V, 2.8V, 3V, 3.3V, 5V, ThinSOTTM Package. OUT Low Noise < 20μV , Stable with 1μF Ceramic Capacitors RMSP-P LT1762 150mA, Low Noise Micropower LDO V : 1.8V to 20V, V = 1.22V, V = 0.30V, I = 25μA, I < 1μA, IN OUT(MIN) DO Q SD V = Adj, 2.5V, 3V, 3.3V, 5V, MS8 Package. Low Noise < 20μV OUT RMSP-P LTC1844 150mA, Very Low Dropout LDO V : 1.6V to 6.5V, V = 1.25V, V = 0.08V, I = 40μA, I < 1μA, IN OUT(MIN) DO Q SD V = Adj, 1.5V, 1.8V, 2.5V, 2.8V, 3.3V, ThinSOT Package. OUT Low Noise < 30μV , Stable with 1μF Ceramic Capacitors RMSP-P LT1962 300mA, Low Noise Micropower LDO V : 1.8V to 20V, V = 1.22V, V = 0.27V, I = 30μA, I < 1μA, IN OUT(MIN) DO Q SD V = 1.5, 1.8V, 2.5V, 3V, 3.3V, 5V, MS8 Package. Low Noise < 20μV OUT RMSP-P LT1964 200mA, Low Noise Micropower, Negative LDO V : –0.9V to –20V, V = –1.21V, V = 0.34V, I = 30μA, I < 3μA, IN OUT(MIN) DO Q SD V = Adj, –5V, ThinSOT Package. OUT Low Noise < 30μV , Stable with Ceramic Capacitors RMSP-P LT3020 100mA, Low Voltage, VLDO V : 0.9V to 10V, V = 0.20V, V = 0.15V, I = 120μA, I < 3μA, IN OUT(MIN) DO Q SD V = Adj, DFN, MS8 Package OUT 3025fd 12 Linear Technology Corporation LT 0111 REV D • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com © LINEAR TECHNOLOGY CORPORATION 2004