LTC3025-1/LTC3025-2/ LTC3025-3/LTC3025-4 500mA Micropower VLDO Linear Regulators FeaTures DescripTion n Wide Input Voltage Range: 0.9V to 5.5V The LTC®3025-X is a micropower, VLDO™ (very low drop- n Stable with Ceramic Capacitors out) linear regulator which operates from input voltages as n Very Low Dropout: 85mV at 500mA low as 0.9V. The device is capable of supplying 500mA of n Adjustable Output Range: 0.4V to 3.6V (LTC3025-1) output current with a typical dropout voltage of only 85mV. n Fixed Output: 1.2V (LTC3025-2), 1.5V (LTC3025-3), A BIAS supply is required to run the internal reference and 1.8V (LTC3025-4) LDO circuitry while output current comes directly from the n ±2% Voltage Accuracy over Temperature, IN supply for high efficiency regulation. The LTC3025-1 Supply and Load features an adjustable output with a low 0.4V reference n Low Noise: 80µV (10Hz to 100kHz) while the LTC3025-2, LTC3025-3, and LTC3025-4 have RMS n BIAS Voltage Range: 2.5V to 5.5V fixed 1.2V, 1.5V and 1.8V output voltages respectively. n Fast Transient Recovery The LTC3025-X’s low quiescent current makes it an ideal n Shutdown Disconnects Load from V and V IN BIAS choice for use in battery-powered systems. For 3-cell NiMH n Low Operating Current: I = 4µA, I = 50µA Typ IN BIAS and single cell Li-Ion applications, the BIAS voltage can n Low Shutdown Current: I = 1µA, I = 0.01µA Typ IN BIAS be supplied directly from the battery while the input can n Output Current Limit come from a high efficiency buck regulator, providing a n Thermal Overload Protection high efficiency, low noise output. n Available in 6-Lead (2mm × 2mm) DFN Package Other features include high output voltage accuracy, applicaTions excellent transient response, stability with ultralow ESR ceramic capacitors as small as 1µF, short-circuit and n Low Power Handheld Devices thermal overload protection and output current limiting. n Low Voltage Logic Supplies The LTC3025-X is available in a tiny, low profile (0.75mm) n DSP Power Supplies 6-lead DFN (2mm × 2mm) package. n Cellular Phones L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and VLDO n Portable Electronic Equipment and ThinSOT are trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents including 7224204, 7218082. n Handheld Medical Instruments n Post Regulator for Switching Supply Noise Rejection Typical applicaTion 1MHz V Supply Rejection IN 1.2V Output Voltage from 1.5V Input Supply 50 45 COUT = 10µF BIAS OUT VOUT = 1.2V 40 0.1µF 1µF IOUT ≤ 500mA 3-LNCi-iEOMIoLRHnL E1F.F5DBIVCCU I/HCEDKINCGCHY 1.5V 0.1µF IN LTC3025S-E2NSE TION (dB) 233550 COUT = 1µF C OFF ON SHDN GND REJE 20 15 30251234 TA01 10 5 BIAS = 3.6V IOUT = 100mA VOUT = 1.2V IOUT = 300mA 0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 VIN (V) 30251234 TA01b 30251234ff 1

LTC3025-1/LTC3025-2/ LTC3025-3/LTC3025-4 absoluTe MaxiMuM raTings pin conFiguraTion (Notes 1, 2) V , V to GND .........................................–0.3V to 6V TOP VIEW BIAS IN SHDN to GND ...............................................–0.3V to 6V BIAS 1 6 SHDN SENSE, ADJ to GND .....................................–0.3V to 6V GND 2 7 5 ADJ/SENSE* V ........................................–0.3V to V + 0.3V or 6V OUT IN IN 3 4 OUT Operating Junction Temperature Range (Note 3) ..................................................–40°C to 125°C DC6 PACKAGE Storage Temperature Range ...................–65°C to 125°C 6-LEAD (2mm × 2mm) PLASTIC DFN Output Short-Circuit Duration ..........................Indefinite TJMAX = 125°C, θJA = 102°C/W, θJC = 20°C/W EXPOSED PAD (PIN 7) IS GND, MUST BE SOLDERED TO PCB *ADJ FOR LTC3025-1, SENSE FOR LTC3025-2, LTC3025-3, LTC3025-4 orDer inForMaTion LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LTC3025EDC-1#PBF LTC3025EDC-1#TRPBF LDDW 6-Lead (2mm × 2mm) Plastic DFN –40°C to 125°C LTC3025IDC-1#PBF LTC3025IDC-1#TRPBF LDDW 6-Lead (2mm × 2mm) Plastic DFN –40°C to 125°C LTC3025EDC-2#PBF LTC3025EDC-2#TRPBF LDMK 6-Lead (2mm × 2mm) Plastic DFN –40°C to 125°C LTC3025IDC-2#PBF LTC3025IDC-2#TRPBF LDMK 6-Lead (2mm × 2mm) Plastic DFN –40°C to 125°C LTC3025EDC-3#PBF LTC3025EDC-3#TRPBF LDQS 6-Lead (2mm × 2mm) Plastic DFN –40°C to 125°C LTC3025IDC-3#PBF LTC3025IDC-3#TRPBF LDQS 6-Lead (2mm × 2mm) Plastic DFN –40°C to 125°C LTC3025EDC-4#PBF LTC3025EDC-4#TRPBF LDPQ 6-Lead (2mm × 2mm) Plastic DFN –40°C to 125°C LTC3025IDC-4#PBF LTC3025IDC-4#TRPBF LDPQ 6-Lead (2mm × 2mm) Plastic DFN –40°C to 125°C LEAD BASED FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LTC3025EDC-1 LTC3025EDC-1#TR LDDW 6-Lead (2mm × 2mm) Plastic DFN –40°C to 125°C LTC3025IDC-1 LTC3025IDC-1#TR LDDW 6-Lead (2mm × 2mm) Plastic DFN –40°C to 125°C LTC3025EDC-2 LTC3025EDC-2#TR LDMK 6-Lead (2mm × 2mm) Plastic DFN –40°C to 125°C LTC3025IDC-2 LTC3025IDC-2#TR LDMK 6-Lead (2mm × 2mm) Plastic DFN –40°C to 125°C LTC3025EDC-3 LTC3025EDC-3#TR LDQS 6-Lead (2mm × 2mm) Plastic DFN –40°C to 125°C LTC3025IDC-3 LTC3025IDC-3#TR LDQS 6-Lead (2mm × 2mm) Plastic DFN –40°C to 125°C LTC3025EDC-4 LTC3025EDC-4#TR LDPQ 6-Lead (2mm × 2mm) Plastic DFN –40°C to 125°C LTC3025IDC-4 LTC3025IDC-4#TR LDPQ 6-Lead (2mm × 2mm) Plastic DFN –40°C to 125°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ 30251234ff 2

LTC3025-1/LTC3025-2/ LTC3025-3/LTC3025-4 elecTrical characTerisTics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T = 25°C. V = 1.5V, V = 3.6V, C = 1µF, C = 0.1µF, C = 0.1µF A IN BIAS OUT IN BIAS (all capacitors ceramic) unless otherwise noted. (Note 3) PARAMETER CONDITIONS MIN TYP MAX UNITS V Operating Voltage (Note 4) LTC3025-1 l 0.9 5.5 V IN LTC3025-2 l 1.4 5.5 V LTC3025-3 l 1.7 5.5 V LTC3025-4 l 2.0 5.5 V V Operating Voltage (Note 4) LTC3025-1 l 2.5 5.5 V BIAS LTC3025-2 l 2.7 5.5 V LTC3025-3 l 3.0 5.5 V LTC3025-4 l 3.3 5.5 V V Undervoltage Lockout l 2.2 2.5 V BIAS V Operating Current I = 10µA, V = 1.2V, LTC3025-1 l 4 10 µA IN OUT OUT V Operating Current I = 0µA, LTC3025-2/LTC3025-3/LTC3025-4 l 4 10 µA IN OUT V Operating Current I = 10µA, V = 1.2V, LTC3025-1 l 50 80 µA BIAS OUT OUT V Operating Current I = 0µA, LTC3025-2/LTC3025-3/LTC3025-4 l 50 80 µA BIAS OUT V Shutdown Current V = 0V 1 5 µA IN SHDN V Shutdown Current V = 0V 0.01 1 µA BIAS SHDN V Regulation Voltage (Note 5) 1mA ≤ I ≤ 500mA, V = 1.2V, 1.5V ≤ V ≤ 5V, LTC3025-1 0.395 0.4 0.405 V ADJ OUT OUT IN 1mA ≤ I ≤ 500mA, V = 1.2V, 1.5V ≤ V ≤ 5V, LTC3025-1 l 0.392 0.4 0.408 V OUT OUT IN V Regulation Voltage (Note 5) 1mA ≤ I ≤ 500mA, 1.5V ≤ V ≤ 5V, LTC3025-2 1.185 1.2 1.215 V SENSE OUT IN 1mA ≤ I ≤ 500mA, 1.5V ≤ V ≤ 5V, LTC3025-2 l 1.176 1.2 1.224 V OUT IN V Regulation Voltage (Note 5) 1mA ≤ I ≤ 500mA, 1.7V ≤ V ≤ 5V, LTC3025-3 1.481 1.5 1.519 V SENSE OUT IN 1mA ≤ I ≤ 500mA, 1.7V ≤ V ≤ 5V, LTC3025-3 l 1.470 1.5 1.530 V OUT IN V Regulation Voltage (Note 5) 1mA ≤ I ≤ 500mA, 2.0V ≤ V ≤ 5V, LTC3025-4 1.777 1.8 1.823 V SENSE OUT IN 1mA ≤ I ≤ 500mA, 2.0V ≤ V ≤ 5V, LTC3025-4 l 1.764 1.8 1.836 V OUT IN I ADJ Input Current V = 0.45V, LTC3025-1 –50 0 50 nA ADJ ADJ OUT Load Regulation (Referred to ADJ Pin) ∆I = 1mA to 500mA, LTC3025-1 –0.35 mV OUT OUT Load Regulation ∆I = 1mA to 500mA, LTC3025-2 –1 mV OUT ∆I = 1mA to 500mA, LTC3025-3 –1.3 mV OUT ∆I = 1mA to 500mA, LTC3025-4 –1.5 mV OUT V Line Regulation (Referred to ADJ Pin) V = 1.5V to 5V, V = 3.6V, V = 1.2V, 0.07 mV IN IN BIAS OUT I = 1mA, LTC3025-1 OUT V Line Regulation V = 1.5V to 5V, V = 3.6V, I = 1mA, LTC3025-2 0.21 mV IN IN BIAS OUT V = 1.8V to 5V, V = 3.6V, I = 1mA, LTC3025-3 0.26 mV IN BIAS OUT V = 2.1V to 5V, V = 3.6V, I = 1mA, LTC3025-4 0.32 mV IN BIAS OUT V Line Regulation V = 1.5V, V = 2.7V to 5V, V = 1.2V, I = 1mA, l 4.5 16.5 mV BIAS IN BIAS OUT OUT LTC3025-1 V Line Regulation V = 1.5V, V = 2.7V to 5V, I = 1mA, LTC3025-2 l 4.5 16.5 mV BIAS IN BIAS OUT V = 1.8V, V = 3.0V to 5V, I = 1mA, LTC3025-3 l 4.5 16.5 mV IN BIAS OUT V = 2.1V, V = 3.3V to 5V, I = 1mA, LTC3025-4 l 4.5 16.5 mV IN BIAS OUT V to V Dropout Voltage (Notes 4, 6) V = 3V, V = 1.5V, I = 500mA, 85 120 mV IN OUT BIAS IN OUT V = 0.37V(LTC3025-1), V = 1.15V(LTC3025-2) l 170 mV ADJ SENSE V to V Dropout Voltage (Notes 4, 6) V = 3.1V, V = 1.7V, I = 500mA, 90 130 mV IN OUT BIAS IN OUT V = 1.45V(LTC3025-3) l 185 mV SENSE V to V Dropout Voltage (Notes 4, 6) V = 3.4V, V = 2.0V, I = 500mA, 90 130 mV IN OUT BIAS IN OUT V = 1.75V(LTC3025-4) l 185 mV SENSE V to V Dropout Voltage (Note 4) LTC3025-1 l 1.5 V BIAS OUT 30251234ff 3

LTC3025-1/LTC3025-2/ LTC3025-3/LTC3025-4 elecTrical characTerisTics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T = 25°C. V = 1.5V, V = 3.6V, C = 1µF, C = 0.1µF, C = 0.1µF A IN BIAS OUT IN BIAS (all capacitors ceramic) unless otherwise noted. (Note 3) PARAMETER CONDITIONS MIN TYP MAX UNITS I Continuous Output Current l 500 mA OUT I Current Limit V = 0V(LTC3025-1), 1130 mA OUT ADJ V = 0V(LTC3025-2/LTC3025-3/LTC3025-4) SENSE e Output Voltage Noise f = 10Hz to 100kHz, I = 300mA 80 µV n OUT RMS V SHDN Input High Voltage l 0.9 V IH V SHDN Input Low Voltage l 0.3 V IL I SHDN Input High Current SHDN = 1.2V –1 1 µA IH I SHDN Input Low Current SHDN = 0V –1 1 µA L Note 1: Stresses beyond those listed under Absolute Maximum Ratings Note 4: For the LTC3025-1, a regulated output voltage will only be available may cause permanent damage to the device. Exposure to any Absolute when the minimum IN and BIAS operating voltages as well as the IN to Maximum Rating condition for extended periods may affect device OUT and BIAS to OUT dropout voltages are all satisfied. For the reliability and lifetime. LTC3025-2/LTC3025-3/LTC3025-4 the minimum IN operating voltage Note 2: This IC includes overtemperature protection that is intended assumes IOUT = 500mA. For correct regulation at IOUT < 500mA the to protect the device during momentary overload conditions. Junction minimum IN operating voltage decreases to the maximum VSENSE temperature will exceed 125°C when overtemperature protection is active. Regulation Voltage as IOUT decreases to 0mA (i.e. VINMIN = 1.312V at IOUT Continuous operation above the specified maximum operating junction = 250mA for the LTC3025-2). temperature may impair device reliability. Note 5: Operating conditions are limited by maximum junction Note 3: The LTC3025-X regulators are tested and specified under pulse temperature. The regulated output voltage specification will not apply load conditions such that T ≈ T . The LTC3025E-X are guaranteed to for all possible combinations of input voltage and output current. When J A meet performance specifications from 0°C and 125°C. Specifications over operating at maximum input voltage, the output current range must be the –40°C to 125°C operating junction temperature range are assured by limited. When operating at maximum output current, the input voltage design, characterization and correlation with statistical process controls. range must be limited. The LTC3025I-X are guaranteed to meet performance specifications over Note 6: Dropout voltage is minimum input to output voltage differential the full –40°C to 125°C operating junction temperature range. needed to maintain regulation at a specified output current. In dropout, the output voltage will be equal to V – V . IN DROPOUT 30251234ff 4

LTC3025-1/LTC3025-2/ LTC3025-3/LTC3025-4 Typical perForMance characTerisTics (T = 25°C unless otherwise noted) A V to V Dropout Voltage Operating BIAS Current IN OUT vs I vs Output Current BIAS No Load Operating Current OUT 120 500 80 VBIAS = 2.8V VIN = 1.5V VIN = 1.4V 450 70 VOUT = 1.2V 100 V) TA = 125°C 400 60 m 350 E ( 80 TA = 25°C 50 125°C OUT VOLTAG 60 I (µA)BIAS232005000 25°C125°C –40°C I (µA)BIAS 4300 –40°C 25°C OP 40 TA = –40°C 150 DR 20 100 20 10 50 0 0 0 0 50 100 150200250300350400 450500 0.01 0.1 1 10 100 1000 2.5 3 3.5 4 4.5 5 5.5 IOUT (mA) IOUT (mA) VBIAS (V) 30251234 G01 30251234 G02 30251234 G03 VIN No Load Operating Current VIN Shutdown Current Adjust Voltage vs Temperature 14 7 405 VBIAS = 5V VBIAS = 5V VBIAS = 3.6V 12 VOUT = 0.8V 6 404 VIN = 1.5V 403 IOUT = 10µA 10 125°C 5 mV)402 I (µA)IN 86 2855°C°C I (µA)IN 43 –40°C T VOLTAGE (344900901 –40°C 25°C US 4 2 DJ398 A 85°C 397 2 1 396 0 0 395 0.5 1.5 2.5 3.5 4.5 5.5 0.5 1.5 2.5 3.5 4.5 5.5 –50 –25 0 25 50 75 100 125 VIN (V) VIN (V) TEMPERATURE (°C) 30251234 G04 30251234 G05 30251234 G06 Burst Mode DC/DC Buck Ripple SHDN Threshold vs Temperature Current Limit vs V Voltage Rejection IN 1000 1600 900 1400 VIN 800 AC OLD (mV)760000 VBIAS = 5V MIT (mA)11200000 100mV/DIV N THRESH450000 VBIAS = 2.5V RRENT LI 860000 10mVV/ODAUICVT SHD300 CU 400 200 200 VIN = 1.8V 10µs/DIV 30251234 G09 100 VOUT = 1.5V 0 0 COUT = 1µF –50 –25 0 25 50 75 100 125 0 1 2 3 4 5 6 IOUT = 50mA TEMPERATURE (°C) VIN (V) 30251234 G07 30251234 G08 30251234ff 5

LTC3025-1/LTC3025-2/ LTC3025-3/LTC3025-4 Typical perForMance characTerisTics (T = 25°C unless otherwise noted) A V Ripple Rejection BIAS Ripple Rejection IN vs Frequency vs Frequency 3MHz V Supply Rejection IN 70 70 50 45 60 COUT = 10µF 60 COUT = 10µF 40 COUT = 10µF REJECTION (dB)435000 COUT = 1µF REJECTION (dB) 43520000 COUT = 1µF REJECTION (dB) 1223350550 COUT = 1µF 1200 VVBINIA =S 1=. 53V.6V 10 VVVBIONIUA =TS =1= . 153.V.26VV 150 VBIAS = 3.6V IOUT = 100mA VOUT = 1.2V IOUT = 100mA VOUT = 1.2V IOUT = 300mA IOUT = 100mA 0 0 0 100 1k 10k 100k 1M 10M 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 100 1k 10k 100k 1M 10M FREQUENCY (Hz) VIN (V) FREQUENCY (Hz) 30251234 G11 30251234 G12 30251234 G10 V to V Dropout Voltage V to V Dropout Voltage IN OUT IN OUT Transient Response vs V (25°C) LTC3025-1 vs V (90°C) LTC3025-1 IN IN 0.300 0.300 250mA 0.275 BIAS = 2.7V 0.275 IOUT 0.250 0.250 10mA 0.225 0.225 BIAS = 3V BIAS = 3.3V 0.200 0.200 V) V) T ( 0.175 T ( 0.175 OU 0.150 OU 0.150 VOAUCT ROP 0.125 BIAS = 3.8V ROP 0.125 BIAS = 3.8V 10mV/DIV D 0.100 D 0.100 BIAS = 5V 0.075 BIAS = 5V 0.075 BIAS = 3.3V VVVIOBNIUA =TS =1= . 153.V.26VV 100µs/DIV 30251234 G13 00..0025500 IOVUATDT J=A = 5= 00 20.35m8°AC5 00..0025500 BIAS =B I2A.7SV = 3V IOVUATDT J=A = 5= 00 90.30m8°AC5 COUT = 1µF 1 1.5 2 2.5 3 3.5 4 4.5 1 1.5 2 2.5 3 3.5 4 4.5 VIN (V) VIN (V) 30251234 G14 30251234 G15 30251234ff 6

LTC3025-1/LTC3025-2/ LTC3025-3/LTC3025-4 pin FuncTions BIAS (Pin 1): BIAS Input Voltage. BIAS provides internal See the Applications Information section for more informa- power for LTC3025-X circuitry. The BIAS pin should be tion on output capacitance. locally bypassed to ground if the LTC3025-X is more than a ADJ (Pin 5) LTC3025-1: Adjust Input. This is the input to few inches away from another source of bulk capacitance. the error amplifier. The ADJ pin reference voltage is 0.4V In general, the output impedance of a battery rises with referenced to ground. The output voltage range is 0.4V to frequency, so it is usually advisable to include an input 3.6V and is typically set by connecting ADJ to a resistor bypass capacitor in battery-powered circuits. A capacitor divider from OUT to GND. See Figure 2. in the range of 0.01µF to 0.1µF is usually sufficient. SENSE (Pin 5) LTC3025-2, LTC3025-3, LTC3025-4: Output GND (Pin 2): Ground. Connect to a ground plane. Sense. The sense is the input to the resistor divider driving IN (Pin 3): Input Supply Voltage. The output load current the error amplifier. Optimum regulation will be obtained at is supplied directly from IN. The IN pin should be locally the point where SENSE is connected to OUT. The SENSE pin bypassed to ground if the LTC3025-X is more than a few bias current is 10µA at the nominal rated output voltage. inches away from another source of bulk capacitance. SHDN (Pin 6): Shutdown Input, Active Low. This pin is In general, the output impedance of a battery rises with used to put the LTC3025-X into shutdown. The SHDN pin frequency, so it is usually advisable to include an input current is typically less than 10nA. The SHDN pin cannot bypass capacitor when supplying IN from a battery. A be left floating and must be tied to a valid logic level (such capacitor in the range of 0.1µF to 1µF is usually sufficient. as BIAS) if not used. OUT (Pin 4): Regulated Output Voltage. The OUT pin GND (Exposed Pad Pin 7): Ground and Heat Sink. Must supplies power to the load. A minimum ceramic output be soldered to PCB ground plane or large pad for optimal capacitor of at least 1µF is required to ensure stability. thermal performance. Larger output capacitors may be required for applications with large transient loads to limit peak voltage transients. block DiagraM LTC3025-1 LTC3025-2, LTC3025-3, LTC3025-4 BIAS BIAS 1 1 REFERENCE SOFT-START IN REFERENCE SOFT-START IN SHDN 3 SHDN 3 6 SHDN 0.4V + 6 SHDN 0.4V + – – 6µA 6µA OUT OUT GND 4 GND 4 2 2 ADJ SENSE 5 5 R1 R2 40k 80k (LTC3025-2) 110k (LTC3025-3) 140k (LTC3025-4) 30251234 BD 30251234ff 7

LTC3025-1/LTC3025-2/ LTC3025-3/LTC3025-4 applicaTions inForMaTion Operation (Refer to Block Diagram) Adjustable Output Voltage (LTC3025-1) The LTC3025-X is a micropower, VLDO (very low dropout) The output voltage is set by the ratio of two external resis- linear regulator which operates from input voltages as low tors as shown in Figure 2. The device servos the output as 0.9V. The device provides a highly accurate output that to maintain the ADJ pin voltage at 0.4V (referenced to is capable of supplying 500mA of output current with a ground). Thus, the current in R1 is equal to 0.4V/R1. For typical dropout voltage of only 85mV. A single ceramic good transient response, stability, and accuracy, the current capacitor as small as 1µF is all that is required for output in R1 should be at least 8µA, thus the value of R1 should bypassing. A low reference voltage allows the LTC3025-1 be no greater than 50k. The current in R2 is the current in output to be programmed to much lower voltages than R1 plus the ADJ pin bias current. Since the ADJ pin bias available in common LDOs (range of 0.4V to 3. 6V). The current is typically <10nA, it can be ignored in the output LTC3025-2/LTC3025-3/LTC3025-4 have fixed outputs of voltage calculation. The output voltage can be calculated 1.2V, 1.5V and 1.8V respectively, eliminating the need for using the formula in Figure 2. Note that in shutdown the an external resistor divider. output is turned off and the divider current will be zero once C is discharged. As shown in the Block Diagram, the BIAS input supplies OUT the internal reference and LDO circuitry while all output The LTC3025-1 operates at a relatively high gain of –0.7µV/ current comes directly from the IN input for high efficiency mA referred to the ADJ input. Thus a load current change regulation. The low quiescent supply currents I = 4µA, of 1mA to 500mA produces a –0.35mV drop at the ADJ IN I = 50µA drop to I = 1µA, I = 0.01µA typical in input. To calculate the change referred to the output BIAS IN BIAS shutdown making the LTC3025-X an ideal choice for use simply multiply by the gain of the feedback network in battery-powered systems. (i. e. ,1 + R2/R1). For example, to program the output for 1.2V choose R2/R1 = 2. In this example, an output current The device includes current limit and thermal overload change of 1mA to 500mA produces –0.35mV • (1 + 2) = protection. The fast transient response of the follower 1.05mV drop at the output. output stage overcomes the traditional tradeoff between dropout voltage, quiescent current and load transient Because the ADJ pin is relatively high impedance (depend- response inherent in most LDO regulator architectures. ing on the resistor divider used), stray capacitance at this The LTC3025-X also includes overshoot detection circuitry pin should be minimized (<10pF) to prevent phase shift which brings the output back into regulation when going in the error amplifier loop. Additionally, special attention from heavy to light output loads (see Figure 1). should be given to any stray capacitances that can couple external signals onto the ADJ pin producing undesirable output ripple. For optimum performance connect the ADJ 300mA pin to R1 and R2 with a short PCB trace and minimize all IOUT 0mA other stray capacitance to the ADJ pin. ( ) OUT VOUT = 0.4V 1 +RR21 VOUT R2 AC 20mV/DIV ADJ COUT R1 GND VIN = 1.5V 100µs/DIV 30251234 F01 VOUT = 1.2V 30251234 F02 VBIAS = 3.6V COUT = 1µF Figure 2. Programming the LTC3025-1 Figure 1. LTC3025-X Transient Response 30251234ff 8

LTC3025-1/LTC3025-2/ LTC3025-3/LTC3025-4 applicaTions inForMaTion Output Capacitance and Transient Response 20 BOTH CAPACITORS ARE 1µF, The LTC3025-X is designed to be stable with a wide range 10V, 0603 CASE SIZE 0 of ceramic output capacitors. The ESR of the output capaci- %) X5R tor affects stability, most notably with small capacitors. A E (–20 U L minimum output capacitor of 1µF with an ESR of 0.05Ω or VA N –40 less is recommended to ensure stability. The LTC3025-X is E I Y5V G N a micropower device and output transient response will be A–60 H C a function of output capacitance. Larger values of output –80 capacitance decrease the peak deviations and provide im- proved transient response for larger load current changes. –100 0 2 4 6 8 10 Note that bypass capacitors used to decouple individual DC BIAS VOLTAGE (V) components powered by the LTC3025-X will increase the 30251234 F03 effective output capacitor value. High ESR tantalum and Figure 3. Ceramic Capacitor DC Bias Characteristics electrolytic capacitors may be used, but a low ESR ceramic capacitor must be in parallel at the output. There is no 20 minimum ESR or maximum capacitor size requirements. 0 Extra consideration must be given to the use of ceramic %) X5R capacitors. Ceramic capacitors are manufactured with a E (–20 U Y5V variety of dielectrics, each with different behavior across AL V N –40 temperature and applied voltage. The most common di- E I G electrics used are Z5U, Y5V, X5R and X7R. The Z5U and AN–60 H C Y5V dielectrics are good for providing high capacitances –80 in a small package, but exhibit large voltage and tem- BOTH CAPACITORS ARE 1µF, perature coefficients as shown in Figures 3 and 4. When 10V, 0603 CASE SIZE –100 –50 –25 0 25 50 75 used with a 2V regulator, a 1µF Y5V capacitor can lose as TEMPERATURE (°C) much as 75% of its initial capacitance over the operating 30251234 F04 temperature range. The X5R and X7R dielectrics result in Figure 4. Ceramic Capacitor Temperature Characteristics more stable characteristics and are usually more suitable for use as the output capacitor. The X7R type has better stability across temperature, while the X5R is less expensive and is available in higher values. In all cases, the output capacitance should never drop below 0.4µF, or instability or degraded performance may occur. 30251234ff 9

LTC3025-1/LTC3025-2/ LTC3025-3/LTC3025-4 applicaTions inForMaTion Thermal Considerations The power dissipated by the device will be equal to: The power handling capability of the device will be limited I (V – V ) OUT(MAX) IN(MAX) OUT by the maximum rated junction temperature (125°C). The where: power dissipated by the device will be the output current multiplied by the input/output voltage differential: IOUT(MAX) = 100mA (IOUT) (VIN – VOUT) VIN(MAX) = 3V Note that the BIAS current is less than 500µA even under So: heavy loads, so its power consumption can be ignored P = 100mA(3V – 1.2V) = 0.18W for thermal calculations. Even under worst-case conditions, the LTC3025-X’s BIAS The LTC3025-X has internal thermal limiting designed to pin power dissipation is only about 1mW, thus can be ig- protect the device during momentary overload conditions. nored. Assuming a junction-to-ambient thermal resistance For continuous normal conditions, the maximum junction of 102°C/W, the junction temperature rise above ambient temperature rating of 125°C must not be exceeded. It is will be approximately equal to: important to give careful consideration to all sources of 0.18W(102°C/W) = 18.4°C thermal resistance from junction to ambient. Additional heat sources mounted nearby must also be considered. The maximum junction temperature will then be equal to For surface mount devices, heat sinking is accomplished the maximum junction temperature rise above ambient by using the heat-spreading capabilities of the PC board plus the maximum ambient temperature or: and its copper traces. Copper board stiffeners and plated T = 50°C + 18.4°C = 68.4°C through holes can also be used to spread the heat gener- J ated by power devices. Short-Circuit/Thermal Protection The LTC3025-X 2mm × 2mm DFN package is specified The LTC3025-X has built-in short-circuit current limiting as having a junction-to-ambient thermal resistance of as well as overtemperature protection. During short-circuit 102°C/W, which assumes a minimal heat spreading cop- conditions, internal circuitry automatically limits the output per plane. The actual thermal resistance can be reduced current to approximately 1130mA. At higher temperatures, substantially by connecting the package directly to a good or in cases where internal power dissipation causes exces- heat spreading ground plane. When soldered to 2500mm2 sive self heating on chip, the thermal shutdown circuitry double-sided 1 oz. copper plane, the actual junction-to- will shut down the LDO when the junction temperature ambient thermal resistance can be less than 60°C/W. exceeds approximately 150°C. It will re enable the LDO once the junction temperature drops back to approximately Calculating Junction Temperature 140°C. The LTC3025-X will cycle in and out of thermal Example: Given an output voltage of 1.2V, an input voltage shutdown without latch-up or damage until the overstress of 1.8V to 3V, an output current range of 0mA to 100mA condition is removed. Long term overstress (T > 125°C) J and a maximum ambient temperature of 50°C, what will should be avoided as it can degrade the performance or the maximum junction temperature be? shorten the life of the part. 30251234ff 10

LTC3025-1/LTC3025-2/ LTC3025-3/LTC3025-4 applicaTions inForMaTion Soft-Start Operation V Start-Up and Supply Sequencing OUT The LTC3025-X includes a soft-start feature to prevent During power-up, the output shutdown circuitry is not excessive current flow during start-up. When the LDO is active below V of about 0.65V DC (typical). As a result, IN enabled, the soft-start circuitry gradually increases the the output voltage can drift up during power-up due to LDO reference voltage from 0V to 0.4V over a period of leakage current (<1 mA typical) from V to V . At 0.9V IN OUT about 600µs. There is a short 700µs delay from the time input, the shutdown circuitry is active and the output is the part is enabled until the LDO output starts to rise. Fig- actively held off. This usually causes no circuit problems ure 5 shows the start-up and shutdown output waveform. and is similar to 3-terminal regulators such as the LT3080, LT1086 and LT317 which have no ground pin and can have the output rise under some conditions. A slowly rising ON V with the part enabled may result in non-monotonic SHDN IN OFF ramping of V due to LDO circuitry becoming active at OUT 1.2V VIN of about 0.65V (typical) as well. With fast rising inputs (>1V/ms) or with sufficient resis- tive load on V , output voltage rise during power-up OUT VOUT is reduced or eliminated. Such conditions also reduce or 200mV/DIV eliminate non-monotonic initial power-up with the part enabled. If V is sequenced up before V , the leakage BIAS IN current from V to V may increase until the shutdown 0V IN OUT TA = 25°C 500µs/DIV 30251234 F05 circuitry is active at a VIN of about 0.65V typical. Thus, VIN = 1.5V VBIAS = 3.6V to minimize VOUT rise during start-up, sequence up VIN COUT = 1µF before V . At V = 0.9V, the output is actively held off RLOAD = 4Ω BIAS IN in shutdown or it is actively held on when enabled under Figure 5. Output Start-Up and Shutdown all conditions. 30251234ff 11

LTC3025-1/LTC3025-2/ LTC3025-3/LTC3025-4 package DescripTion DC Package 6-Lead Plastic DFN (2mm × 2mm) (Reference LTC DWG # 05-08-1703 Rev B) 0.70 ±0.05 2.55 ±0.05 1.15 ±0.050.61 ±0.05 (2 SIDES) PACKAGE OUTLINE 0.25 ± 0.05 0.50 BSC 1.42 ±0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS R = 0.125 0.40 ± 0.10 TYP 0.56 ± 0.05 4 6 (2 SIDES) 2.00 ±0.10 PIN 1 NOTCH PIN 1 BAR (4 SIDES) R = 0.20 OR TOP MARK 0.25 × 45° (SEE NOTE 6) CHAMFER R = 0.05 (DC6) DFN REV B 1309 TYP 3 1 0.25 ± 0.05 0.200 REF 0.75 ±0.05 0.50 BSC 1.37 ±0.05 (2 SIDES) 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WCCD-2) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 30251234ff 12 Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

LTC3025-1/LTC3025-2/ LTC3025-3/LTC3025-4 revision hisTory (Revision history begins at Rev E) REV DATE DESCRIPTION PAGE NUMBER E 07/10 Added (Note 3) notation to “The l denotes” statement in Electrical Characteristics section 3, 4 Updated Pin 7 in Pin Functions 7 Added “V Start-Up and Supply Sequencing” section 11 OUT Updated Related Parts section 14 F 04/11 Updated y-axis on graphs G14 and G15 6 30251234ff 13

LTC3025-1/LTC3025-2/ LTC3025-3/LTC3025-4 Typical applicaTion High Efficiency 1.5V Step-Down Converter with Efficient 1.2V VLDO Output OFF ON 1 4 BIAS OUT VOUT = 1.2V 0.1µF 1µF IOUT ≤ 500mA LTC3025-1 80.6k VIN 4 3 2.2µH* 3 5 2.7V VIN SW IN ADJ TO 5.5V CIN** 4.7µF LTC3406-1.5 VOUT 40.2k CER 1.5V 6 2 1 5 600mA SHDN GND RUN VOUT COUT† 30251234 TA02 GND 10µF *MURATA LQH32CN2R2M33 CER **TAIYO YUDEN JMK212BJ475MG †TAIYO YUDEN JMK316BJ106ML Efficiency vs Output Current 100 VIN = 3.6V LTC3406-1.5 90 VOUT = 1.5V %) 80 LTC3025-1 CY ( VOUT = 1.2V N 70 E CI EFFI 60 50 40 0.1 1 10 100 1000 OUTPUT CURRENT (mA) 30251234 TA03 relaTeD parTs PART NUMBER DESCRIPTION COMMENTS LT1761 100mA, Low Noise Micropower, LDO V : 1.8V to 20V, V = 1.22V, V = 0.30V, I = 20µA, I < 1µA, IN OUT(MIN) DO Q SD V = Adj, 1.5V, 1.8V, 2V, 2.5V, 2.8V, 3V, 3.3V, 5V, ThinSOTTM Package. OUT Low Noise < 20µV , Stable with 1µF Ceramic Capacitors RMSP-P LT1762 150mA, Low Noise Micropower LDO V : 1.8V to 20V, V = 1.22V, V = 0.30V, I = 25µA, I < 1µA, IN OUT(MIN) DO Q SD V = Adj, 2.5V, 3V, 3.3V, 5V, MS8 Package. Low Noise < 20µV OUT RMSP-P LTC1844 150mA, Very Low Dropout LDO V : 1.6V to 6.5V, V = 1.25V, V = 0.08V, I = 40µA, I < 1µA, IN OUT(MIN) DO Q SD V = Adj, 1.5V, 1.8V, 2.5V, 2.8V, 3.3V, ThinSOT Package. OUT Low Noise < 30µV , Stable with 1µF Ceramic Capacitors RMSP-P LT1962 300mA, Low Noise Micropower LDO V : 1.8V to 20V, V = 1.22V, V = 0.27V, I = 30µA, I < 1µA, IN OUT(MIN) DO Q SD V = 1.5, 1.8V, 2.5V, 3V, 3.3V, 5V, MS8 Package. Low Noise < 20µV OUT RMSP-P LT1964 200mA, Low Noise Micropower, Negative LDO V : –0.9V to –20V, V = –1.21V, V = 0.34V, I = 30µA, I < 3µA, IN OUT(MIN) DO Q SD V = Adj, –5V, ThinSOT Package. OUT Low Noise < 30µV , Stable with Ceramic Capacitors RMSP-P LT3020 100mA, Low Voltage, VLDO V : 0.9V to 10V, V = 0.20V, V = 0.15V, I = 120µA, I < 3µA, IN OUT(MIN) DO Q SD V = Adj, DFN, MS8 Package OUT LTC3025 300mA Micropower VLDO Linear Regulator 45mV Dropout Voltage, Low Noise: 80µV , V : 0.9V to 5.5V, Low I = 54µA, RMS IN Q 2mm × 2mm 6-Lead DFN Package LTC3026 1.5A, Low Input Voltage VLDO Regulator V : 1.14V to 3.5V (Boost Enabled), 1.14V to 5.5V (with External 5V Rail), IN V = 0.1V, I = 950µA, Stable with 10µF Ceramic Capacitors, DO Q DFN-10 and MSOP-10 Packages 30251234ff 14 Linear Technology Corporation LT 0411 REV F • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com  LINEAR TECHNOLOGY CORPORATION 2007