LTC2942 Battery Gas Gauge with Temperature, Voltage Measurement FeaTures DescripTion n Indicates Accumulated Battery Charge and The LTC®2942 measures battery charge state, battery Discharge voltage and chip temperature in handheld PC and portable n High Accuracy Analog Integration product applications. Its operating range is perfectly suited n ADC Measures Battery Voltage and Temperature for single-cell Li-Ion batteries. A precision coulomb counter n Integrated Temperature Sensor integrates current through a sense resistor between the n High Side Sense battery’s positive terminal and the load or charger. Battery n 1% Voltage and Charge Accuracy voltage and on-chip temperature are measured with an n ±50mV Sense Voltage Range internal 14-bit No Latency ∆∑™ ADC. The three measured n SMBus/I2C Interface quantities (charge, voltage and temperature) are stored in n Configurable Alert Output/Charge Complete Input internal registers accessible via the onboard SMBus/I2C n 2.7V to 5.5V Operating Range interface. n Quiescent Current Less than 100µA The LTC2942 features programmable high and low thresh- n Small 6-Pin 2mm × 3mm DFN package olds for all three measured quantities. If a programmed threshold is exceeded, the device communicates an alert applicaTions using either the SMBus alert protocol or by setting a flag in the internal status register. n Low Power Handheld Products n Cellular Phones The LTC2942 requires only a single low value sense resis- n MP3 Players tor to set the measured current range. n Cameras L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and n GPS No Latency ∆Σ, ThinSOT and Bat-Track are trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Typical applicaTion Total Charge Error vs Differential Sense Voltage 2.0 VSENSE+ = 3.6V 1.5 CHARGER LOAD SENSE+ 0.1µF %) 1.0 LTC2942 RSENSE OR ( 0.5 I2CTO/S MHOBSuTs ASLD/ACC SENSE– 100mΩ E ERR 0 SCL G GND + 1-CELL HAR–0.5 Li-Ion C –1.0 2942 TA01a –1.5 –2.0 0.1 1 10 100 VSENSE (mV) 2942 TA01b 2942fa 1

LTC2942 absoluTe maximum raTings pin conFiguraTion (Notes 1, 2) Supply Voltage (SENSE+) .............................–0.3V to 6V TOP VIEW SCL, SDA, AL/CC .........................................–0.3V to 6V SENSE– ..................................–0.3V to (VSENSE+ + 0.3V) SENSE+ 1 6 SENSE– Operating Ambient Temperature Range GND 2 7 5 AL/CC LTC2942C ................................................0°C to 70°C SCL 3 4 SDA LTC2942I..............................................–40°C to 85°C Storage Temperature Range ...................–65°C to 150°C DCB PACKAGE 6-LEAD (2mm × 3mm) PLASTIC DFN TJMAX = 150°C, θJA = 120°C/W EXPOSED PAD (PIN 7), DO NOT CONNECT orDer inFormaTion Lead Free Finish TAPE AND REEL (MINI) TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LTC2942CDCB#TRMPBF LTC2942CDCB#TRPBF LDVN 6-Lead (2mm × 3mm) Plastic DFN 0°C to 70°C LTC2942IDCB#TRMPBF LTC2942IDCB#TRPBF LDVN 6-Lead (2mm × 3mm) Plastic DFN –40°C to 85°C TRM = 500 pieces. *Temperature grades are identified by a label on the shipping container. Consult LTC Marketing for parts specified with wider operating temperature ranges. Consult LTC Marketing for information on lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ elecTrical characTerisTics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T = 25°C. (Note 2) A SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Power Requirements VSENSE+ Supply Voltage 2.7 5.5 V I Supply Current (Note 3) Battery Gas Gauge On, ADC Sleep l 70 100 µA SUPPLY Battery Gas Gauge On, ADC Converting Voltage l 300 350 µA Battery Gas Gauge On, ADC Converting Temperature l 350 420 µA Shutdown l 2.5 µA Shutdown, VSENSE+ ≤ 4.2V 1 µA VUVLO Undervoltage Lockout Threshold VSENSE+ Falling l 2.5 2.6 2.7 V Coulomb Counter VSENSE Sense Voltage Differential Input VSENSE+ – VSENSE– l ±50 mV Range R Differential Input Resistance, 400 kΩ IDR Across SENSE+ and SENSE– (Note 8) 2942fa 2

LTC2942 elecTrical characTerisTics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T = 25°C. (Note 2) A SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS q Charge LSB (Note 4) Prescaler M = 128 (Default), R = 50mΩ 0.085 mAh LSB SENSE TCE Total Charge Error (Note 5) 10mV ≤ |V | ≤ 50mV DC ±1 % SENSE 10mV ≤ |VSENSE| ≤ 50mV DC, VSENSE + ≤ 4.2V l ±1.5 % 1mV ≤ |V | < 50mV DC (Note 8) l ±3.5 % SENSE Voltage Measurement ADC Resolution (No Missing Codes) (Note 8) l 14 Bits V Full-Scale Voltage l 6 V FS ∆VLSB Quantization Step of 14-Bit (Note 6) 366.2 µV Voltage ADC TUE Voltage Total Unadjusted Error 1 % V l 1.3 % Gain Gain Accuracy l 1.3 % V Offset Extrapolated from Measurements at 5.5V and 2.7V ±1 ±10 LSB OS INL Integral Nonlinearity l ±1 ±4 LSB t Conversion Time l 15 ms CONV Temperature Measurement ADC Resolution (No Missing Code) (Note 8) 10 Bits T Full-Scale Temperature l 600 K FS ∆TLSB Quantization Step of 10-Bit (Note 6) 0.586 K Temperature ADC TUET Temperature Total Unadjusted VSENSE+ ≥ 2.8V (Note 8) l ±5 K Error ±3 K t Conversion Time l 15 ms CONV Digital Inputs and Digital Outputs VITH Logic Input Threshold, AL/CC, l 0.3 • VSENSE+ 0.7 • VSENSE+ V SCL, SDA V Low Level Output Voltage, AL/CC, I = 3mA l 0.4 V OL SDA IIN Input Leakage, AL/CC, SCL, SDA VIN = VSENSE+/2 l 1 µA C Input Capacitance, AL/CC, SCL, (Note 8) l 10 pF IN SDA t Minimum Charge Complete (CC) 1 µs PCC Pulse Width I2C Timing Characteristics f Maximum SCL Clock Frequency l 400 900 kHz SCL(MAX) t Bus Free Time Between STOP/ l 1.3 µs BUF(MIN) START t Minimum Repeated START l 600 ns SU,STA(MIN) Set-Up Time t Minimum Hold Time (Repeated) l 600 ns HD,STA(MIN) START Condition t Minimum Set-Up Time for STOP l 600 ns SU,STO(MIN) Condition t Minimum Data Set-Up l 100 ns SU,DAT(MIN) Time Input t Minimum Data Hold Time Input l 0 µs HD,DATI(MIN) 2942fa 3

LTC2942 elecTrical characTerisTics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T = 25°C. (Note 2) A SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS t Data Hold Time Output l 0.3 0.9 µs HD,DATO t Data Output Fall Time (Notes 7, 8) l 20 + 0.1 • C 300 ns OF B Note 1: Stresses beyond those listed under Absolute Maximum Ratings Note 5: Deviation of qLSB from its nominal value. may cause permanent damage to the device. Exposure to any Absolute Note 6: The quantization step of the 14-bit ADC in voltage mode and Maximum Rating condition for extended periods may affect device 10-bit ADC in temperature mode is not to be mistaken with the LSB of the reliability and lifetime. combined 16-bit voltage registers (I, J) and 16-bit temperature registers Note 2: All currents into pins are positive, all voltages are referenced to (M, N). GND unless otherwise specified Note 7: C = Capacitance of one bus line in pF (10pF ≤ C ≤ 400pF). See B B Note 3: ISUPPLY = ISENSE+ + ISENSE– Voltage and Temperature Registers section for more information. Note 4: The equivalent charge of an LSB in the accumulated charge Note 8: Guaranteed by design, not subject to test. register depends on the value of R and the setting of the internal SENSE prescaling factor M: 50mΩ M q =0.085mAh• • LSB R 128 SENSE See Choosing R and Choosing Coulomb Counter Prescaler M section SENSE for more information. 1mAh = 3.6C (coulombs). Timing Diagram tof SDA tSU, DAT tHD, DATO, tSU, STA tBUF tHD, DATI tHD, STA tSU, STO 2942 F01 SCL tHD, STA START REPEATED START STOP START CONDITION CONDITION CONDITION CONDITION Figure 1. Definition of Timing on I2C Bus 2942fa 4

LTC2942 Typical perFormance characTerisTics Total Charge Error vs Differential Total Charge Error Sense Voltage vs Supply Voltage Total Charge Error vs Temperature 3 1.00 1.00 0.75 0.75 2 0.50 0.50 R (%) 1 R (%) 0.25 R (%) 0.25 O O O R R R GE ER 0 GE ER 0 GE ER 0 HAR –1 HAR–0.25 HAR–0.25 C C C –0.50 –0.50 –2 VSENSE+ = 2.7V –0.75 VSENSE = –50mV –0.75 VSENSE = –50mV VSENSE+ = 4.2V VSENSE = –10mV VSENSE = –10mV –3 –1.00 –1.00 0.1 1 10 100 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 –50 –25 0 25 50 75 100 VSENSE (mV) VSENSE+ (V) TEMPERATURE (°C) 2942 G01 2942 G02 2942 G03 Shutdown Supply Current Voltage Measurement ADC Supply Current vs Supply Voltage vs Supply Voltage Total Unadjusted Error 100 2.0 10 TA = 25°C TA = –40°C 8 90 TA = 85°C mV) 6 I (µA)SUPPLY 678000 I (µA)SHUTDOWN11..05 NADJUSTED ERROR ( –2042 TA =T A8 5=° –C45°C U –4 0.5 L 50 TA = 25°C OTA –6 TA = 25°C TA = –40°C T –8 TA = 85°C 40 0 –10 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 VSENSE+ (V) VSENSE+ (V) VSENSE– (V) 2942 G04 2942 G05 2942 G06 Voltage Measurement ADC Integral Nonlinearity Temperature Error vs Temperature 1.0 3 TA = 85°C 2 0.5 OR (°C) 1 )B RR S E INL (VL 0 TA = –40°C RATURE 0 E –1 TA = 25°C MP –0.5 E T –2 –1.0 –3 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 –50 –25 0 25 50 75 100 VSENSE– (V) TEMPERATURE (°C) 2942 G07 2942 G08 2942fa 5

LTC2942 pin FuncTions SENSE+ (Pin 1): Positive Current Sense Input and Power alert response protocol. It behaves as an open-drain logic Supply. Connect to the load/charger side of the sense output that pulls to GND when any threshold register value resistor. V + operating range is 2.7V to 5.5V. is exceeded. When configured as a charge complete input, SENSE connect to the charge complete output from the battery GND (Pin 2): Device Ground. Connect directly to the nega- charger circuit. A high level at CC sets the value of the tive battery terminal. accumulated charge (registers C, D) to FFFFh. SCL (Pin 3): Serial Bus Clock Input. SENSE– (Pin 6): Negative Current Sense Input. Connect SDA (Pin 4): Serial Bus Data Input and Output. SENSE– to the positive battery terminal side of the sense resistor. The voltage between SENSE– and SENSE+ must AL/CC (Pin 5): Alert Output or Charge Complete Input. remain within ±50mV in normal operation. SENSE– is also Configured either as an SMBus alert output or charge the input for the ADC in voltage measurement mode. complete input by control register bits B[2:1]. At power-up, the pin defaults to alert mode conforming to the SMBus Exposed Pad (Pin 7): Do Not Connect. block Diagram LTC2942 VSUPPLY SENSE+ 1 CC ACCUMULATED COULOMB COUNTER CHARGE REGISTER REF CLK AL AL/CC 5 TEMPERATURE REFERENCE OSCILLATOR I2C/ SCL SENSOR GENERATOR 3 SMBus SDA REF+ CLK 4 DATA AND MUX IN ADC CONTROL SENSE– REGISTERS 6 REF– GND 2 2942 BD 2942fa 6

LTC2942 operaTion Overview A programmable prescaler effectively increases integration time by a factor M programmable from 1 to 128. At each The LTC2942 is a battery gas gauge device designed for underflow or overflow of the prescaler, the accumulated use with single Li-Ion cells and other battery types with a charge register (ACR) value is incremented or decremented terminal voltage at 2.7V to 5.5V. It measures battery charge one count. The value of accumulated charge is read via and discharge, battery voltage and chip temperature. the I2C interface. A precision coulomb counter integrates current through a sense resistor between the battery’s positive terminal and Voltage and Temperature ADC the load or charger. Battery voltage and on-chip temperature The LTC2942 includes a 14-bit No Latency ∆Σ analog-to- are measured with an internal 14-bit/10-bit ADC. digital converter, with internal clock and voltage reference circuits. Coulomb Counter The ADC can either be used to monitor the battery voltage Charge is the time integral of current. The LTC2942 mea- at SENSE– or to convert the output of the on-chip tempera- sures battery current by monitoring the voltage developed ture sensor. The sensor generates a voltage proportional to across a sense resistor and then integrates this information temperature with a slope of 2.5mV/K resulting in a voltage to infer charge. The differential voltage between SENSE+ of 750mV at 27°C. and SENSE– is applied to an auto-zeroed differential analog integrator to convert the measured current to charge. Conversion of either temperature or voltage is triggered by setting the control register via the I2C interface. The When the integrator output ramps to REFHI or REFLO LTC2942 features an automatic mode where a voltage and levels, switches S1, S2, S3 and S4 toggle to reverse the a temperature conversion are executed every two seconds. ramp direction. By observing the condition of the switches At the end of each conversion the corresponding registers and the ramp direction, polarity is determined. are updated and the converter goes to sleep to minimize quiescent current. CHARGER LOAD REFHI + VCC CONTROL SENSE+ S1 LOGIC 1 – – S2 M RSENSE S3 PRESCALER ACR + SENSE– + IBAT 6 S4 POLARITY DETECTION + GND REFLO – BATTERY 2 2942 F02 Figure 2. Coulomb Counter Section of the LTC2942 2942fa 7

LTC2942 operaTion Power-Up Sequence accumulated charge register is set to mid-scale (7FFFh), all low threshold registers are set to 0000h and all high When SENSE+ rises above a threshold of approximately threshold registers are set to FFFFh. The alert mode is 2.5V, the LTC2942 generates an internal power-on reset enabled and the coulomb counter prescaling factor M is (POR) signal and sets all registers to their default state. set to 128. In the default state, the coulomb counter is active while the voltage and temperature ADC is switched off. The applicaTions inFormaTion I2C/SMBus Interface The sixteen internal registers are organized as shown in Table 1. The LTC2942 communicates with a bus master using a 2-wire interface compatible with I2C and SMBus. The 7-bit Table 1. Register Map hard-coded I2C address of the LTC2942 is 1100100. ADDRESS NAME REGISTER DESCRIPTION R/W DEFAULT The LTC2942 is a slave-only device. Therefore the serial 00h A Status R See Below clock line (SCL) is an input only while the serial data line 01h B Control R/W 3Ch (SDA) is bidirectional. The device supports I2C standard 02h C Accumulated Charge MSB R/W 7Fh and fast mode. For more details refer to the I2C Protocol 03h D Accumulated Charge LSB R/W FFh section. 04h E Charge Threshold High MSB R/W FFh 05h F Charge Threshold High LSB R/W FFh Internal Registers 06h G Charge Threshold Low MSB R/W 00h The LTC2942 integrates current through a sense resistor, 07h H Charge Threshold Low LSB R/W 00h measures battery voltage and temperature and stores the 08h I Voltage MSB R XXh results in internal 16-bit registers accessible via I2C. High 09h J Voltage LSB R XXh and low limits can be programmed for each measurement 0Ah K Voltage Threshold High R/W FFh quantity. The LTC2942 continuously monitors these limits 0Bh L Voltage Threshold Low R/W 00h and sets a flag in the onboard status register when a limit 0Ch M Temperature MSB R XXh is exceeded. If the alert mode is enabled, the AL/CC pin 0Dh N Temperature LSB R XXh pulls low. 0Eh O Temperature Threshold High R/W FFh 0Fh P Temperature Threshold Low R/W 00h R = Read, W = Write, XX = Unknown 2942fa 8

LTC2942 applicaTions inFormaTion Status Register (A) The hard-coded bit A[7] of the status register enables the host to distinguish the LTC2942 from the pin compatible The status of the charge, voltage and temperature alerts LTC2941, allowing the same software to be used with is reported in the status register shown in Table 2. both devices. Table 2. Status Register A (Read only) Control Register (B) BIT NAME OPERATION DEFAULT A[7] Chip Identification 0: LTC2942 0 The operation of the LTC2942 is controlled by program- 1: LTC2941 ming the control register. Table 3 shows the organization A[6] Reserved 0 of the 8-bit control register B[7:0]. A[5] Accumulated Charge Indicates that the value of the 0 Overflow/Underflow ACR hit either top or bottom. Table 3. Control Register B A[4] Temperature Alert Indicates one of the 0 BIT NAME OPERATION Default temperature limits was exceeded. B[7:6] ADC Mode [11] Automatic Mode. [00] Performs voltage and temperature A[3] Charge Alert High Indicates that the ACR value 0 conversion every second. exceeded the charge threshold high limit. [10] Manual Voltage Mode. Performs single voltage A[2] Charge Alert Low Indicates that the ACR value 0 conversion, then sleeps. dropped below the charge [01] Manual Temperature Mode. threshold low limit. Performs single temperature A[1] Voltage Alert Indicates one of the battery 0 conversion, then sleeps. voltage limits was exceeded. [00] Sleep. A[0] Undervoltage Indicates recovery from X B[5:3] Prescaler M Sets coulomb counter prescaling [111] Lockout Alert undervoltage. If set to 1, a factor M between 1 and 128. UVLO has occurred and the Default is 128. contents of the registers are uncertain. M = 2(4 • B[5] + 2 • B[4] + B[3]) B[2:1] AL/CC Configure Configures the AL/CC pin. [10] All status register bits except A[7] are cleared after being [10] Alert Mode. read by the host, if the conditions which set these bits Alert functionality enabled. Pin becomes logic output. have been removed. [01] Charge Complete Mode. Pin becomes logic input and As soon as one of the three measured quantities exceeds accepts “charge complete” signal the programmed limits, the corresponding bit A[4], A[3], (e.g., from a charger) to set A[2] or A[1] in the status register is set. accumulated charge register (C, D) to FFFFh. Bit A[5] is set if the LTC2942’s accumulated charge registers [00] AL/CC pin disabled. (ACR) overflows or underflows. In these cases, the ACR [11] Not allowed. stays at FFFFh or 0000h and does not roll over. B[0] Shutdown Shut down analog section to [0] reduce I . SUPPLY The undervoltage lockout (UVLO) bit of the status register A[0] is set if, during operation, the voltage on SENSE+ Power Down B[0] pin drops below 2.7V without reaching the POR level. Setting B[0] to 1 shuts down the analog parts of the The analog parts of the coulomb counter are switched off LTC2942, reducing the current consumption to less than while the digital register values are retained. After recov- 1µA. All analog circuits are inoperative while the values ery of the supply voltage the coulomb counter resumes in the registers are retained. Note that any charge flowing integrating with the stored value in the accumulated while B[0] is 1 is not measured and the charge information charge registers but it has missed any charge flowing below 1LSB of the accumulated charge register is lost. while SENSE+ < 2.7V. 2942fa 9

LTC2942 applicaTions inFormaTion Alert/Charge Complete Configuration B[2:1] The choice of the external sense resistor value influences the gain of the coulomb counter. A larger sense resistor The AL/CC pin is a dual function pin configured by the gives a larger differential voltage between SENSE+ and control register. By setting bits B[2:1] to [10] (default) SENSE– for the same current which results in more precise the AL/CC pin is configured as an alert pin following the coulomb counting. Thus the amount of charge represented SMBus protocol. In this configuration the AL/CC pin is a by the least significant bit (q ) of the accumulated charge digital output and is pulled low if one of the three mea- LSB (registers C, D) is equal to: sured quantities (charge, voltage, temperature) exceeds its high or low threshold or if the value of the accumulated 50mΩ M q =0.085mAh• • charge register overflows or underflows. An alert response LSB R 128 SENSE procedure started by the master resets the alert at the or AL/CC pin. For further information see the Alert Response Protocol section. 50mΩ q =0.085mAh• LSB R Setting the control bits B[2:1] to [01] configures the AL/CC SENSE pin as a digital input. In this mode, a high input on the when the prescaler is set to its default value of M = 128. AL/CC pin communicates to the LTC2942 that the battery is full and the accumulated charge register is set to its Note that 1mAh = 3.6C (coulomb). maximum value FFFFh. The AL/CC pin would typically Choosing R = 50mV/I is not sufficient in ap- SENSE MAX be connected to the “charge complete” output from the plications where the battery capacity (Q ) is very large BAT battery charger circuitry. compared to the maximum current (I ): MAX If neither the alert nor the charge complete functionality Q > I • 5.5 Hours BAT MAX is desired, bits B[2:1] should be set to [00]. The AL/CC For such low current applications with a large battery, pin is then disabled and should be tied to GND. choosing R according to R = 50mV/I can SENSE SENSE MAX Avoid setting B[2:1] to [11] as it enables the alert and the lead to a q smaller than Q /216 and the 16-bit accu- LSB BAT charge complete modes simultaneously. mulated charge register may underflow before the battery is exhausted or overflow during charge. Choose, in this Choosing R SENSE case, a maximum R of: SENSE To achieve the specified precision of the coulomb counter, 16 the differential voltage between SENSE+ and SENSE– must 0.085mAh•2 R ≤ •50mΩ SENSE stay within ±50mV. For differential input signals up to Q BAT ±300mV the LTC2942 will remain functional but the preci- In an example application where the maximum current is sion of the coulomb counter is not guaranteed. I = 100mA, calculating R = 50mV/I would MAX SENSE MAX The required value of the external sense resistor, R , SENSE lead to a sense resistor of 500mΩ. This gives a q of LSB is determined by the maximum input range of V and SENSE 8.5µAh and the accumulated charge register can represent the maximum current of the application: a maximum battery capacity of Q = 8.5µAh • 65535 = BAT 50mV 557mAh. If the battery capacity is larger, RSENSE must be R ≤ SENSE I lowered. For example, RSENSE must be reduced to 150mΩ MAX if a battery with a capacity of 1800mAh is used. 2942fa 10

LTC2942 applicaTions inFormaTion Choosing Coulomb Counter Prescaler M B[5:3] Note that the internal digital resolution of the coulomb counter is higher than indicated by q . The digitized If the battery capacity (Q ) is very small compared to LSB BAT charge q is M • 8 times smaller than q . q the maximum current (I ) (Q < I • 0.1 Hours) INTERNAL LSB INTERNAL MAX BAT MAX is typically 299µAs for a 50mΩ sense resistor. the prescaler value M should be changed from its default value (128). ADC Mode B[7:6] In these applications with a small battery but a high The LTC2942 features an ADC which measures either maximum current, q can get quite large with respect LSB voltage on SENSE– (battery voltage) or temperature via to the battery capacity. For example, if the battery capacity an internal temperature sensor. The reference voltage and is 100mAh and the maximum current is 1A, the standard clock for the ADC are generated internally. equation leads to choosing a sense resistor value of 50mΩ, resulting in: The ADC has four different modes of operation, as shown in Table 3. These modes are controlled by bits B[7:6] of q = 0.085mAh = 306mC LSB the control register. At power-up, bits B[7:6] are set to The battery capacity then corresponds to only 1176 q s [00] and the ADC is in sleep mode. LSB and less than 2% of the accumulated charge register is A single voltage conversion is initiated by setting the bits utilized. B[7:6] to [10]. A single temperature conversion is started To preserve digital resolution in this case, the LTC2942 by setting bits B[7:6] to [01]. After a single voltage or includes a programmable prescaler. Lowering the pres- temperature conversion, the ADC resets B[7:6] to [00] caler factor M allows reducing q to better match the and goes to sleep. LSB accumulated charge register to the capacity of the battery. The LTC2942 also offers an automatic scan mode where The prescaling factor M can be chosen between 1 and its the ADC converts voltage, then temperature, then sleeps default value 128. The charge LSB then becomes: for approximately two seconds before repeating the voltage 50mΩ M and temperature conversions. The LTC2942 is set to this q =0.085mAh• • LSB R 128 automatic mode by setting B[7:6] to [11] and stays in this SENSE mode until B[7:6] are reprogrammed by the host. To use as much of the range of the accumulated charge Programming B[7:6] to [00] puts the ADC to sleep. If register as possible the prescaler factor M should be control bits B[7:6] change within a conversion, the ADC chosen for a given battery capacity Q and a sense BAT will complete the current conversion before entering the resistor R as: SENSE newly selected mode. Q R M≥128• BAT • SENSE A conversion of either voltage or temperature requires 10ms 216 •0.085mAh 50mΩ conversion time (typical). At the end of each conversion, the corresponding registers are updated. If the converted M can be set to 1, 2, 4, 8, … 128 by programming B[5:3] of quantity exceeds the values programmed in the threshold the control register as M = 2(4 • B[5] + 2 • B[4] + B[3]). The default registers, a flag is set in the status register and the AL/CC value after power up is M = 128 = 27 (B[5:3] = 111). pin is pulled low (if alert mode is enabled). In the above example of a 100mAh battery and an RSENSE During a voltage conversion, the SENSE– pin is connected of 50mΩ, the prescaler should be programmed to M = 4. through a small resistor to a sampling circuit with an The q then becomes 2.656µAh and the battery capacity LSB equivalent resistance of 2MΩ, leading to a mean input corresponds to roughly 37650 q s. LSB current of I = V –/2MΩ. SENSE 2942fa 11

LTC2942 applicaTions inFormaTion Accumulated Charge Register (C, D) The actual temperature can be obtained from the two byte register C[7:0]D[7:0] by: The coulomb counter of the LTC2942 integrates current through the sense resistor. The result of this charge inte- RESULT RESULT T=600K• h =600K• DEC gration is stored in the 16-bit accumulated charge register FFFF 65535 h (registers C, D). As the LTC2942 does not know the actual battery status at power-up, the accumulated charge register Example: a register value of C[7:0] = 80 D[7:0] = 00 h h (ACR) is set to mid-scale (7FFFh). If the host knows the corresponds to 300K or 27°C. status of the battery, the accumulated charge (C[7:0]D[7:0]) can be either programmed to the correct value via I2C or Threshold Registers (E, F, G, H, K, L, O, P) it can be set after charging to FFFFh (full) by pulling the For each of the measured quantities (battery charge, volt- AL/CC pin high if charge complete mode is enabled via age and temperature) the LTC2942 features a high and a bits B[2:1]. Before writing the accumulated charge regis- low threshold registers. At power-up, the high thresholds ters, the analog section should be shut down by setting are set to FFFFh while the low thresholds are set to 0000h. B[0] to 1. In order to avoid a change in the accumulated All thresholds can be programmed to a desired value via charge registers between reading MSBs C[7:0] and LSBs I2C. As soon as a measured quantity exceeds the high D[7:0], it is recommended to read them sequentially, as threshold or falls below the low threshold, the LTC2942 shown in Figure 10. sets the corresponding flag in the status register and pulls the AL/CC pin low if alert mode is enabled via bits Voltage and Temperature Registers (I, J), (M, N) B[2:1]. Note that the voltage and temperature threshold The result of the 14-bit ADC conversion of the voltage at registers are single-byte registers and only the 8 MSBs of SENSE– is stored in the voltage registers (I, J), whereas the corresponding quantity are checked. To set a low level the temperature measurement result is stored in the tem- threshold for the battery voltage of 3V, register L should perature registers (M, N). The voltage and temperature be programmed to 80h; a high temperature limit of 60°C registers are read only. is programmed by setting register O to 8Eh. As the ADC resolution is 14-bit in voltage mode and 10-bit I2C Protocol in temperature mode, the lowest two bits of the combined voltage registers (I, J) and the lowest six bits of the The LTC2942 uses an I2C/SMBus compatible 2-wire open- combined temperature registers (M, N) are always zero. drain interface supporting multiple devices and masters From the result of the 16-bit voltage registers I[7:0]J[7:0] on a single bus. The connected devices can only pull the the measured voltage can be calculated as: bus wires LOW and they never drive the bus HIGH. The bus wires must be externally connected to a positive sup- RESULT RESULT V – =6V• h =6V• DEC ply voltage via a current source or pull-up resistor. When SENSE FFFF 65535 h the bus is idle, both SDA and SCL are HIGH. Data on the I2C bus can be transferred at rates of up to 100kbit/s in Example: a register value of I[7:0] = B0 and J[7:0] = 1C h h standard mode and up to 400kbit/s in fast mode. corresponds to a voltage on SENSE– of: Each device on the I2C/SMBus is recognized by a unique B01C 45084 V –=6V• h=6V• DEC ≈4.12776V address stored in that device and can operate as either a SENSE FFFF 65535 h transmitter or receiver, depending on the function of the device. In addition to transmitters and receivers, devices can also be classified as masters or slaves when perform- ing data transfers. A master is the device which initiates a data transfer on the bus and generates the clock signals to permit that transfer. At the same time any device ad- 2942fa 12

LTC2942 applicaTions inFormaTion dressed is considered a slave. The LTC2942 always acts group takes nine SCL cycles. The transmitter releases as a slave. the SDA line during the acknowledge clock pulse and the receiver issues an acknowledge (ACK) by pulling SDA Figure 3 shows an overview of the data transmission for LOW or leaves SDA HIGH to indicate a not acknowledge fast and standard mode on the I2C bus. (NACK) condition. Change of data state can only happen while SCL is LOW. START and STOP Conditions When the bus is idle, both SCL and SDA must be HIGH. A Write Protocol bus master signals the beginning of a transmission with a The master begins a write operation with a START condi- START condition by transitioning SDA from HIGH to LOW tion followed by the seven bit slave address 1100100 while SCL is HIGH. When the master has finished com- and the R/W bit set to zero, as shown in Figure 4. The municating with the slave, it issues a STOP condition by LTC2942 acknowledges this by pulling SDA LOW and transitioning SDA from LOW to HIGH while SCL is HIGH. then the master sends a command byte which indicates The bus is then free for another transmission. When which internal register the master is to write. The LTC2942 the bus is in use, it stays busy if a repeated START (Sr) acknowledges and latches the command byte into its is generated instead of a STOP condition. The repeated internal register address pointer. The master delivers the START (Sr) conditions are functionally identical to the data byte, the LTC2942 acknowledges once more and START (S). latches the data into the desired register. The transmission is ended when the master sends a STOP condition. If the Data Transmission master continues by sending a second data byte instead After a START condition, the I2C bus is considered busy of a STOP, the LTC2942 acknowledges again, increments and data transfer begins between a master and a slave. its address pointer and latches the second data byte in As data is transferred over I2C in groups of nine bits the following register, as shown in Figure 5. (eight data bits followed by an acknowledge bit), each SDA a6 - a0 b7 - b0 b7 - b0 SCL 1 - 7 8 9 1 - 7 8 9 1 - 7 8 9 S P ADDRESS R/W ACK DATA ACK DATA ACK START STOP CONDITION CONDITION Figure 3. Data Transfer Over I2C or SMBus 2942 F03 S ADDRESS W A REGISTER A DATA A P S ADDRESS W A REGISTER A DATA A DATA A P 1100100 0 0 01h 0 FCh 0 1100100 0 0 02h 0 F0h 0 01h 0 2942 F04 2942 F05 FROM MASTER TO SLAVE A: ACKNOWLEDGE (LOW) Figure 5. Writing F001h to the LTC2942 A: NOT ACKNOWLEDGE (HIGH) FROM SLAVE TO MASTER Accumulated Charge Register (C, D) S: START CONDITION P: STOP CONDITION R: READ BIT (HIGH) W: WRITE BIT (LOW) Figure 4. Writing FCh to the LTC2942 Control Register (B) 2942fa 13

LTC2942 applicaTions inFormaTion Read Protocol tents of the requested register. The transmission is ended when the master sends a STOP condition. If the master The master begins a read operation with a START condition acknowledges the transmitted data byte, the LTC2942 followed by the seven bit slave address 1100100 and the increments its address pointer and sends the contents of R/W bit set to zero, as shown in Figure 6. The LTC2942 the following register as depicted in Figure 7. acknowledges and then the master sends a command byte which indicates which internal register the master is Alert Response Protocol to read. The LTC2942 acknowledges and then latches the command byte into its internal register address pointer. The In a system where several slaves share a common inter- master then sends a repeated START condition followed rupt line, the master can use the alert response address by the same seven bit address with the R/W bit now set (ARA) to determine which device initiated the interrupt to one. The LTC2942 acknowledges and sends the con- (Figure 8). S ADDRESS W A REGISTER A S ADDRESS R A DATA A P 1100100 0 0 00h 0 1100100 1 0 01h 1 2942 F06 Figure 6. Reading the LTC2942 Status Register (A) S ADDRESS W A REGISTER A S ADDRESS R A DATA A DATA A P 1100100 0 0 08h 0 1100100 1 0 F1h 0 24h 1 2942 F07 Figure 7. Reading the LTC2942 Voltage Register (I, J) S ALERT RESPONSE ADDRESS R A DEVICE ADDRESS A P 0001100 1 0 11001001 1 2942 F08 Figure 8. LTC2942 Serial Bus SDA Alert Response Protocol S ADDRESS W A REGISTER A DATA P 10ms S ADDRESS W A REGISTER A S ADDRESS R A DATA A DATA A P 1100100 0 0 01h 0 BC 1100100 0 0 08h 0 1100100 1 0 F1h 0 80h 1 2942 F09 Figure 9. Voltage Conversion Sequence S ADDRESS W A REGISTER A S ADDRESS R A DATA A DATA A P 1100100 0 0 02h 0 1100100 1 0 80h 0 01h 1 2942 F10 Figure 10. Reading the LTC2942 Accumulated Charge Registers (C, D) 2942fa 14

LTC2942 applicaTions inFormaTion The master initiates the ARA procedure with a START con- is successfully completed, the LTC2942 will stop pulling dition and the special 7-bit ARA bus address (0001100) down the AL/CC pin and will not respond to further ARA followed by the read bit (R) = 1. If the LTC2942 is asserting requests until a new Alert event occurs. the AL/CC pin in alert mode, it acknowledges and responds PC Board Layout Suggestions by sending its 7-bit bus address (1100100) and a 1. While it is sending its address, it monitors the SDA pin to see Keep all traces as short as possible to minimize noise and if another device is sending an address at the same time inaccuracy. Use a 4-wire Kelvin sense connection for the using standard I2C bus arbitration. If the LTC2942 is send- sense resistor, locating the LTC2942 close to the resistor ing a 1 and reads a 0 on the SDA pin on the rising edge of with short sense traces to the SENSE+ and SENSE– pins. SCL, it assumes another device with a lower address is Use wider traces from the resistor to the battery, load sending and the LTC2942 immediately aborts its transfer and/or charger (see Figure 11). Put the bypass capacitor and waits for the next ARA cycle to try again. If transfer close to SENSE+ and GND. TO CHARGER/LOAD RSENSE TO BATTERY 1 6 C 2 LTC2942 5 3 4 2942 F10 Figure 11. Kelvin Connection on Sense Resistor 2942fa 15

LTC2942 package DescripTion Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. DCB Package 6-Lead Plastic DFN (2mm × 3mm) (Reference LTC DWG # 05-08-1715) 0.70 ±0.05 1.65 ±0.05 3.55 ±0.05 (2 SIDES) 2.15 ±0.05 PACKAGE OUTLINE 0.25 ± 0.05 0.50 BSC 1.35 ±0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS 2.00 ±0.10 R = 0.115 0.40 ± 0.10 (2 SIDES) TYP R = 0.05 4 6 TYP 3.00 ±0.10 1.65 ± 0.10 (2 SIDES) (2 SIDES) PIN 1 BAR PIN 1 NOTCH TOP MARK R0.20 OR 0.25 (SEE NOTE 6) × 45° CHAMFER 3 1 (DCB6) DFN 0405 0.25 ± 0.05 0.200 REF 0.75 ±0.05 0.50 BSC 1.35 ±0.10 (2 SIDES) 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (TBD) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 2942fa 16

LTC2942 revision hisTory REV DATE DESCRIPTION PAGE NUMBER A 8/10 Revised Exposed Pad description in the Pin Configuration and Pin Functions sections. 2, 6 2942fa Information furnished by Linear Technology Corporation is believed to be accurate and reliable. 17 However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

LTC2942 Typical applicaTion Single-Cell Lithium-Ion Coulomb Counter with Battery Charger for Charge and Discharge Currents of Up to 500mA 500mA V5IVN 4 VCC BAT 3 LOAD 3.3V 0.1µF 1µF L(TCCH4A0R5G7E-4R.2) SENSE+ 1 2k 2k 2k 5 PROG SHDN 1 VDD 5 AL/CLTCC2942 R10S0EmNSΩE 4 6 2k GND µP 3 SDA SENSE– + 2 SCL 1-CELL GND Li-Ion 2 2942 TA02 relaTeD parTs PART NUMBER DESCRIPTION COMMENTS Battery Gas Gauges LTC2942-1 Battery Gas Gauge with I2C Interface and Voltage and 2.7V to 5.5V Operation, 14-Bit ∆∑-ADC, Pin Compatible with LTC2941-1 Temperature ADC; Integrated Sense Resistor LTC2941 Battery Gas Gauge with I2C Interface 2.7V to 5.5V Operation, Pin Compatible with LTC2942 LTC2941-1 Battery Gas Gauge with I2C Interface and Integrated 2.7V to 5.5V Operation, Pin Compatible with LTC2942-1 50mΩ Sense Resistor LTC4150 Coulomb Counter/Battery Gas Gauge 2.7V to 8.5V Operation, 10-Pin MSOP Package Battery Chargers LTC1734 Lithium-Ion Battery Charger in ThinSOT™ Simple ThinSOT Charger, No Blocking Diode, No Sense Resistor Needed LTC4002 Switch Mode Lithium-Ion Battery Charger Standalone, 4.7V ≤ V ≤ 24V, 500kHz Frequency IN LTC4052 Monolithic Lithium-Ion Battery Pulse Charger No Blocking Diode or External Power FET Required, ≤1.5A Charge Current LTC4053 USB Compatible Monolithic Li-Ion Battery Charger Standalone Charger with Programmable Timer, Up to 1.25A Charge Current LTC4057 Lithium-Ion Linear Battery Charger Up to 800mA Charge Current, Thermal Regulation, ThinSOT Package LTC4058 Standalone 950mA Lithium-Ion Charger in DFN C/10 Charge Termination, Battery Kelvin Sensing, ±7% Charge Accuracy LTC4059 900mA Linear Lithium-Ion Battery Charger 2mm × 2mm DFN Package, Thermal Regulation, Charge Current Monitor Output LTC4061 Standalone Linear Li-Ion Battery Charger with 4.2V, ±0.35% Float Voltage, Up to 1A Charge Current, 3mm × 3mm DFN Thermistor Input Package LTC4063 Li-Ion Charger with Linear Regulator Up to 1A Charge Current, 100mA, 125mV LDO, 3mm × 3mm DFN Package LTC4088 High Efficiency Battery Charger/USB Power Manager Maximizes Available Power from USB Port, Bat-Track™, Instant-On Operation, 1.5A Max Charge Current, 180mΩ Ideal Diode with <50mΩ Option, 3.3V/25mA Always-On LDO, 4mm × 3mm DFN-14 Package 2942fa 18 Linear Technology Corporation LT 0810 REV A • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com  LINEAR TECHNOLOGY CORPORATION 2010

Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: A nalog Devices Inc.: LTC2942CDCB#TRMPBF LTC2942CDCB#PBF LTC2942IDCB#TRPBF LTC2942IDCB#TRMPBF LTC2942CDCB#TRPBF LTC2942IDCB#PBF