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  • 型号: LTC2864IS-2#PBF
  • 制造商: LINEAR TECHNOLOGY
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LTC2864IS-2#PBF产品简介:

ICGOO电子元器件商城为您提供LTC2864IS-2#PBF由LINEAR TECHNOLOGY设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 LTC2864IS-2#PBF价格参考。LINEAR TECHNOLOGYLTC2864IS-2#PBF封装/规格:接口 - 驱动器,接收器,收发器, 1/1 Transceiver Full RS422, RS485 14-SO。您可以下载LTC2864IS-2#PBF参考资料、Datasheet数据手册功能说明书,资料中有LTC2864IS-2#PBF 详细功能的应用电路图电压和使用方法及教程。

产品参数 图文手册 常见问题
参数 数值
产品目录

集成电路 (IC)

描述

IC TRANSCEIVER RS485 14-SOIC

产品分类

接口 - 驱动器,接收器,收发器

品牌

Linear Technology

数据手册

http://www.linear.com/docs/40761

产品图片

产品型号

LTC2864IS-2#PBF

PCN设计/规格

点击此处下载产品Datasheet

rohs

无铅 / 符合限制有害物质指令(RoHS)规范要求

产品系列

-

供应商器件封装

14-SO

其它名称

LTC2864IS2PBF

包装

管件

协议

RS422,RS485

双工

安装类型

表面贴装

封装/外壳

14-SOIC(0.154",3.90mm 宽)

工作温度

-40°C ~ 85°C

接收器滞后

25mV

数据速率

250kbps

标准包装

55

电压-电源

3 V ~ 5.5 V

类型

收发器

驱动器/接收器数

1/1

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PDF Datasheet 数据手册内容提取

LTC2862/LTC2863/ LTC2864/LTC2865 ±60V Fault Protected 3V to 5.5V RS485/RS422 Transceivers FeaTures DescripTion n Protected from Overvoltage Line Faults to ±60V The LTC®2862/LTC2863/LTC2864/LTC2865 are low power, n 3V to 5.5V Supply Voltage 20Mbps or 250kbps RS485/RS422 transceivers operating n 20Mbps or Low EMI 250kbps Data Rate on 3V to 5.5V supplies that feature ±60V overvoltage fault n ±15kV ESD Interface Pins, ±8kV All Other Pins protection on the data transmission lines during all modes n Extended Common Mode Range: ±25V of operation, including power-down. Low EMI slew rate n Guaranteed Failsafe Receiver Operation limited data transmission is available in a logic-selectable n High Input Impedance Supports 256 Nodes 250kbps mode in the LTC2865 and in 250kbps versions of n 1.65V to 5.5V Logic Supply Pin (V ) for Flexible the LTC2862-LTC2864. Enhanced ESD protection allows L Digital Interface (LTC2865) these parts to withstand ±15kV HBM on the transceiver n MP-Grade Option Available (–55°C to 125°C) interface pins without latchup or damage. n Fully Balanced Differential Receiver Thresholds for Extended ±25V input common mode range and full fail- Low Duty Cycle Distortion safe operation improve data communication reliability in n Current Limited Drivers and Thermal Shutdown electrically noisy environments and in the presence of n Pin Compatible with LT1785 and LT1791 large ground loop voltages. n Available in DFN and Leaded Packages proDucT selecTion GuiDe applicaTions PART MAX DATA NUMBER DUPLEX ENABLES RATE (bps) V PIN n Supervisory Control and Data Acquisition (SCADA) L LTC2862-1 HALF YES 20M NO n Industrial Control and Instrumentation Networks n Automotive and Transportation Electronics LTC2862-2 HALF YES 250k NO n Building Automation, Security Systems and HVAC LTC2863-1 FULL NO 20M NO n Medical Equipment LTC2863-2 FULL NO 250k NO n Lighting and Sound System Control LTC2864-1 FULL YES 20M NO LTC2864-2 FULL YES 250k NO L, LT, LTC, LTM, Linear Technology the Linear logo and µModule are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. LTC2865 FULL YES 20M/250k YES Typical applicaTion LTC2865 Receiving 10Mbps ±200mV Differential Signal with 1MHz ±25V Common Mode Sweep RS485 Link With Large Ground Loop Voltage LTC2862 LTC2862 A,B A,B VCC1 VCC2 50V/DIV RO1 R R RO2 A-B RE1 RE2 A-B DE1 Rt Rt DE2 0.5V/DIV DI1 D D DI2 RO RO V GROUND LOOP 5V/DIV GND1 ≤25V PEAK GND2 2862345 TA01a 100ns/DIV 2862345 TA01b 2862345fc 1 For more information www.linear.com/LTC2862

LTC2862/LTC2863/ LTC2864/LTC2865 absoluTe MaxiMuM raTinGs (Note 1) Supply Voltages Receiver Output (RO) V .............................................................–0.3 to 6V (LTC2865) ..................................–0.3V to (V + 0.3V) CC L V ..............................................................–0.3 to 6V Operating Ambient Temperature Range (Note 4) L Logic Input Voltages (RE, DE, DI, SLO) ..........–0.3 to 6V LTC286xC ................................................0°C to 70°C Interface I/O: A, B, Y, Z ..............................–60V to +60V LTC286xI .............................................–40°C to 85°C Receiver Output (RO) LTC286xH ..........................................–40°C to 125°C (LTC2862-LTC2864) ...................–0.3V to (V +0.3V) LTC286xMP .......................................–55°C to 125°C CC Storage Temperature Range ..................–65°C to 150°C Lead Temperature (Soldering, 10 sec) ...................300°C pin conFiGuraTion LTC2862-1, LTC2862-2 LTC2862-1, LTC2862-2 TOP VIEW TOP VIEW RO 1 8 VCC RO 1 8 VCC RE 2 7 B RE 2 7 B DE 3 6 A 9 DE 3 6 A DI 4 5 GND DI 4 5 GND S8 PACKAGE 8-LEAD (150mil) PLASTIC SO DD PACKAGE TJMAX = 150°C, θJA = 150°C/W, θJC = 39°C/W 8-LEAD (3mm × 3mm) PLASTIC DFN EXPOSED PAD (PIN 9) CONNECT TO PCB GND TJMAX = 150°C, θJA = 43°C/W, θJC = 3°C/W LTC2863-1, LTC2863-2 LTC2863-1, LTC2863-2 TOP VIEW TOP VIEW VCC 1 8 A VCC 1 8 A RO 2 7 B RO 2 7 B DI 3 6 Z 9 DI 3 6 Z GND 4 5 Y GND 4 5 Y S8 PACKAGE 8-LEAD (150mil) PLASTIC SO DD PACKAGE TJMAX = 150°C, θJA = 150°C/W, θJC = 39°C/W 8-LEAD (3mm × 3mm) PLASTIC DFN EXPOSED PAD (PIN 9) CONNECT TO PCB GND TJMAX = 150°C, θJA = 43°C/W, θJC = 3°C/W LTC2864-1, LTC2864-2 LTC2864-1, LTC2864-2 TOP VIEW TOP VIEW NC 1 14 VCC RO 1 10 VCC RO 2 13 NC RE 2 9 A RE 3 12 A DE 3 11 8 B DE 4 11 B DI 4 7 Z GND 5 6 Y DI 5 10 Z GND 6 9 Y DD PACKAGE GND 7 8 NC 10-LEAD (3mm × 3mm) PLASTIC DFN EXPOSED PAD (PIN 11) CONNECT TO PCB GND S PACKAGE TJMAX = 150°C, θJA = 43°C/W, θJC = 3°C/W 14-LEAD (150mil) PLASTIC SO TJMAX = 150°C, θJA = 88°C/W, θJC = 37°C/W 2862345fc 2 For more information www.linear.com/LTC2862

LTC2862/LTC2863/ LTC2864/LTC2865 pin conFiGuraTion LTC2865 LTC2865 TOP VIEW TOP VIEW RROE 12 1121 VACC RO 1 12 VCC DE 3 10 B RE 2 11 A 13 DI 4 9 Z DE 3 10 B VL 5 8 Y 13 GND 6 7 SLO DI 4 9 Z MSE PACKAGE VL 5 8 Y 12-LEAD PLASTIC MSOP GND 6 7 SLO EXPOSED PAD (PIN 13) CONNECT TO PCB GND TJMAX = 150°C, θJA = 40°C/W, θJC = 10°C/W DE PACKAGE 12-LEAD (4mm × 3mm) PLASTIC DFN EXPOSED PAD (PIN 13) CONNECT TO PCB GND TJMAX = 150°C, θJA = 43°C/W, θJC = 4.3°C/W orDer inForMaTion LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LTC2862CS8-1#PBF LTC2862CS8-1#TRPBF 28621 8-Lead (150mil) Plastic SO 0°C to 70°C LTC2862IS8-1#PBF LTC2862IS8-1#TRPBF 28621 8-Lead (150mil) Plastic SO –40°C to 85°C LTC2862HS8-1#PBF LTC2862HS8-1#TRPBF 28621 8-Lead (150mil) Plastic SO –40°C to 125°C LTC2862CS8-2#PBF LTC2862CS8-2#TRPBF 28622 8-Lead (150mil) Plastic SO 0°C to 70°C LTC2862IS8-2#PBF LTC2862IS8-2#TRPBF 28622 8-Lead (150mil) Plastic SO –40°C to 85°C LTC2862HS8-2#PBF LTC2862HS8-2#TRPBF 28622 8-Lead (150mil) Plastic SO –40°C to 125°C LTC2862CDD-1#PBF LTC2862CDD-1#TRPBF LFXK 8-Lead (3mm × 3mm) Plastic DFN 0°C to 70°C LTC2862IDD-1#PBF LTC2862IDD-1#TRPBF LFXK 8-Lead (3mm × 3mm) Plastic DFN –40°C to 85°C LTC2862HDD-1#PBF LTC2862HDD-1#TRPBF LFXK 8-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C LTC2862CDD-2#PBF LTC2862CDD-2#TRPBF LFXM 8-Lead (3mm × 3mm) Plastic DFN 0°C to 70°C LTC2862IDD-2#PBF LTC2862IDD-2#TRPBF LFXM 8-Lead (3mm × 3mm) Plastic DFN –40°C to 85°C LTC2862HDD-2#PBF LTC2862HDD-2#TRPBF LFXM 8-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C LTC2863CS8-1#PBF LTC2863CS8-1#TRPBF 28631 8-Lead (150mil) Plastic SO 0°C to 70°C LTC2863IS8-1#PBF LTC2863IS8-1#TRPBF 28631 8-Lead (150mil) Plastic SO –40°C to 85°C LTC2863HS8-1#PBF LTC2863HS8-1#TRPBF 28631 8-Lead (150mil) Plastic SO –40°C to 125°C LTC2863CS8-2#PBF LTC2863CS8-2#TRPBF 28632 8-Lead (150mil) Plastic SO 0°C to 70°C LTC2863IS8-2#PBF LTC2863IS8-2#TRPBF 28632 8-Lead (150mil) Plastic SO –40°C to 85°C LTC2863HS8-2#PBF LTC2863HS8-2#TRPBF 28632 8-Lead (150mil) Plastic SO –40°C to 125°C LTC2863CDD-1#PBF LTC2863CDD-1#TRPBF LFXN 8-Lead (3mm × 3mm) Plastic DFN 0°C to 70°C LTC2863IDD-1#PBF LTC2863IDD-1#TRPBF LFXN 8-Lead (3mm × 3mm) Plastic DFN –40°C to 85°C LTC2863HDD-1#PBF LTC2863HDD-1#TRPBF LFXN 8-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C LTC2863CDD-2#PBF LTC2863CDD-2#TRPBF LFXP 8-Lead (3mm × 3mm) Plastic DFN 0°C to 70°C LTC2863IDD-2#PBF LTC2863IDD-2#TRPBF LFXP 8-Lead (3mm × 3mm) Plastic DFN –40°C to 85°C LTC2863HDD-2#PBF LTC2863HDD-2#TRPBF LFXP 8-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C 2862345fc 3 For more information www.linear.com/LTC2862

LTC2862/LTC2863/ LTC2864/LTC2865 orDer inForMaTion LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LTC2864CS-1#PBF LTC2864CS-1#TRPBF LTC2864S-1 14-Lead (150mil) Plastic SO 0°C to 70°C LTC2864IS-1#PBF LTC2864IS-1#TRPBF LTC2864S-1 14-Lead (150mil) Plastic SO –40°C to 85°C LTC2864HS-1#PBF LTC2864HS-1#TRPBF LTC2864S-1 14-Lead (150mil) Plastic SO –40°C to 125°C LTC2864CS-2#PBF LTC2864CS-2#TRPBF LTC2864S-2 14-Lead (150mil) Plastic SO 0°C to 70°C LTC2864IS-2#PBF LTC2864IS-2#TRPBF LTC2864S-2 14-Lead (150mil) Plastic SO –40°C to 85°C LTC2864HS-2#PBF LTC2864HS-2#TRPBF LTC2864S-2 14-Lead (150mil) Plastic SO –40°C to 125°C LTC2864CDD-1#PBF LTC2864CDD-1#TRPBF LFXQ 10-Lead (3mm × 3mm) Plastic DFN 0°C to 70°C LTC2864IDD-1#PBF LTC2864IDD-1#TRPBF LFXQ 10-Lead (3mm × 3mm) Plastic DFN –40°C to 85°C LTC2864HDD-1#PBF LTC2864HDD-1#TRPBF LFXQ 10-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C LTC2864CDD-2#PBF LTC2864CDD-2#TRPBF LFXR 10-Lead (3mm × 3mm) Plastic DFN 0°C to 70°C LTC2864IDD-2#PBF LTC2864IDD-2#TRPBF LFXR 10-Lead (3mm × 3mm) Plastic DFN –40°C to 85°C LTC2864HDD-2#PBF LTC2864HDD-2#TRPBF LFXR 10-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C LTC2865CMSE#PBF LTC2865CMSE#TRPBF 2865 12-Lead Plastic MSOP 0°C to 70°C LTC2865IMSE#PBF LTC2865IMSE#TRPBF 2865 12-Lead Plastic MSOP –40°C to 85°C LTC2865HMSE#PBF LTC2865HMSE#TRPBF 2865 12-Lead Plastic MSOP –40°C to 125°C LTC2865CDE#PBF LTC2865CDE#TRPBF 2865 12-Lead (4mm × 3mm) Plastic DFN 0°C to 70°C LTC2865IDE#PBF LTC2865IDE#TRPBF 2865 12-Lead (4mm × 3mm) Plastic DFN –40°C to 85°C LTC2865HDE#PBF LTC2865HDE#TRPBF 2865 12-Lead (4mm × 3mm) Plastic DFN –40°C to 125°C LTC2862MPS8-1#PBF LTC2862MPS8-1#TRPBF 28621 8-Lead (150mm) Plastic SO –55°C to 125°C LTC2862MPS8-2#PBF LTC2862MPS8-2#TRPBF 28622 8-Lead (150mm) Plastic SO –55°C to 125°C LTC2863MPS8-1#PBF LTC2863MPS8-1#TRPBF 28631 8-Lead (150mm) Plastic SO –55°C to 125°C LTC2863MPS8-2#PBF LTC2863MPS8-2#TRPBF 28632 8-Lead (150mm) Plastic SO –55°C to 125°C LTC2864MPS-1#PBF LTC2864MPS-1#TRPBF LTC2864S-1 14-Lead (150mm) Plastic SO –55°C to 125°C LTC2864MPS-2#PBF LTC2864MPS-2#TRPBF LTC2864S-2 14-Lead (150mm) Plastic SO –55°C to 125°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ elecTrical characTerisTics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T = 25°C. V = V = 3.3V unless otherwise noted. (Note 2) A CC L SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Supplies V Primary Power Supply l 3 5.5 V CC V Logic Interface Power Supply LTC2865 Only l 1.65 V V L CC I Supply Current in Shutdown Mode DE = 0V, RE = V = V l 0 5 µA CCS CC L (C-, I-Grade) (N/A LTC2863) Supply Current in Shutdown Mode DE = 0V, RE = V = V l 0 40 µA CC L (H-, MP-Grade) (N/A LTC2863) I Supply Current with Both Driver and No Load, DE = V = V , RE = 0V l 900 1300 µA CCTR CC L Receiver Enabled (LTC2862-1, LTC2863-1, LTC2864-1, LTC2865 with SLO High) 2862345fc 4 For more information www.linear.com/LTC2862

LTC2862/LTC2863/ LTC2864/LTC2865 elecTrical characTerisTics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T = 25°C. V = V = 3.3V unless otherwise noted. (Note 2) A CC L SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS I Supply Current with Both Driver and No Load, DE = V = V , RE = 0V l 3.3 8 mA CCTRS CC L Receiver Enabled (LTC2862-2, LTC2863-2, LTC2864-2, LTC2865 with SLO Low) Driver |V | Differential Driver Output Voltage R = ∞ (Figure 1) l 1.5 V V OD CC R = 27Ω (Figure 1) l 1.5 5 V R = 50Ω (Figure 1) l 2 V V CC Δ|V | Change in Magnitude of Driver Differential R = 27Ω or 50Ω (Figure 1) l 0.2 V OD Output Voltage V Driver Common-Mode Output Voltage R = 27Ω or 50Ω (Figure 1) l 3 V OC Δ|V | Change in Magnitude of Driver R = 27Ω or 50Ω (Figure 1) l 0.2 V OC Common-Mode Output Voltage I Maximum Driver Short-Circuit Current –60V ≤ (Y or Z) ≤ 60V (Figure 2) l ±150 ±250 mA OSD I Driver Three-State (High Impedance) DE = 0V, V = 0V or 3.3V, V = –25V, l ±30 µA OZD CC O Output Current on Y and Z 25V Receiver I Receiver Input Current (A,B) V = 0V or 3.3V, V = 12V (Figure 3) l 125 µA IN CC IN (C-, I-Grade LTC2863, LTC2864, LTC2865) V = 0V or 3.3V, V = –7V (Figure 3) l –100 µA CC IN Receiver Input Current (A,B) V = 0V or 3.3V, V = 12V (Figure 3) l 143 µA CC IN (H-, MP-Grade LTC2863, LTC2864, V = 0V or 3.3V, V = –7V (Figure 3) l –100 µA LTC2865; C-, I-, H-, MP-Grade LTC2862) CC IN R Receiver Input Resistance 0 ≤ V ≤ 5.5V, V = –25V or 25V 112 kΩ IN CC IN (Figure 3) V Receiver Common Mode Input Voltage l –25 25 V CM (A + B)/2 V Differential Input Signal Threshold –25V ≤ V ≤ 25V l ±200 mV TH CM Voltage (A – B) ΔV Differential Input Signal Hysteresis V = 0V 150 mV TH CM Differential Input Failsafe Threshold Voltage –25V ≤ V ≤ 25V l –200 –50 0 mV CM Differential Input Failsafe Hysteresis V = 0V 25 mV CM V Receiver Output High Voltage I(RO) = –3mA (Sourcing) l V –0.4V V OH CC V ≥ 2.25V, I(RO) = –3mA (LTC2865) l V –0.4V L L V < 2.25V, I(RO) = –2mA (LTC2865) l V –0.4V L L V Receiver Output Low Voltage I(RO) = 3mA (Sinking) l 0.4 V OL I Receiver Three-State (High Impedance) RE = High, RO = 0V or V l ±5 µA OZR CC Output Current on RO RO = 0V or V (LTC2865) L I Receiver Short-Circuit Current RE = Low, RO = 0V or V l ±20 mA OSR CC RO = 0V or V (LTC2865) L Logic (LTC2862, LTC2863, LTC2864) V Input Threshold Voltage (DE, DI, RE) 3.0 ≤ V ≤ 5.5V l 0.33 • V 0.67 • V V TH CC CC CC I Logic Input Current (DE, DI, RE) 0 ≤ V ≤ V l 0 ±5 µA INL IN CC Logic (LTC2865) V Input Threshold Voltage (DE, DI, RE, SLO) 1.65V ≤ V ≤ 5.5V l 0.33 • V 0.67 • V V TH L L L I Logic Input Current (DE, DI, RE, SLO) 0 ≤ V ≤ V l 0 ±5 µA INL IN L 2862345fc 5 For more information www.linear.com/LTC2862

LTC2862/LTC2863/ LTC2864/LTC2865 swiTchinG characTerisTics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T = 25°C. V = V = 3.3V unless otherwise noted. (Note 2) A CC L SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Driver – High Speed (LTC2862-1, LTC2863-1, LTC2864-1, LTC2865 with SLO High) f Maximum Data Rate (Note 3) l 20 Mbps MAX t , t Driver Input to Output R = 54Ω, C = 100pF (Figure 4) l 25 50 ns PLHD PHLD DIFF L Δt Driver Input to Output Difference R = 54Ω, C = 100pF (Figure 4) l 2 9 ns PD DIFF L |t – t | PLHD PHLD t Driver Output Y to Output Z R = 54Ω, C = 100pF (Figure 4) l ±10 ns SKEWD DIFF L t , t Driver Rise or Fall Time R = 54Ω, C = 100pF (Figure 4) l 4 15 ns RD FD DIFF L t , t , Driver Enable or Disable Time R = 500Ω, C = 50pF, RE = 0V l 180 ns ZLD ZHD L L t , t (Figure 5) LZD HZD t , t Driver Enable from Shutdown R =500Ω, C = 50pF, RE = High l 9 µs ZHSD ZLSD L L (Figure 5) t Time to Shutdown R = 500Ω, C = 50pF, RE = High l 180 ns SHDND L L (Figure 5) Driver – Slew Rate Limited ( LTC2862-2, LTC2863-2, LTC2864-2, LTC2865 with SLO Low) f Maximum Data Rate (Note 3) l 250 kbps MAX t , t Driver Input to Output R = 54Ω, C = 100pF (Figure 4) l 850 1500 ns PLHD PHLD DIFF L Δt Driver Input to Output Difference R = 54Ω, C = 100pF (Figure 4) l 50 500 ns PD DIFF L |t – t | PLHD PHLD t Driver Output Y to Output Z R = 54Ω, C = 100pF (Figure 4) l ±500 ns SKEWD DIFF L t , t Driver Rise or Fall Time R = 54Ω, C =100pF (Figure 4) l 500 800 1200 ns RD FD DIFF L t , t Driver Enable Time R = 500Ω, C = 50pF, RE = 0V l 1200 ns ZLD ZHD L L (Figure 5) t , t Driver Disable Time R = 500Ω, C = 50pF, RE = 0V l 180 ns LZD HZD L L (Figure 5) t , t Driver Enable from Shutdown R = 500Ω, C = 50pF, RE = High l 10 µs ZHSD ZLSD L L (Figure 5) t Time to Shutdown R =500Ω, C = 50pF, RE = High l 180 ns SHDND L L (Figure 5) Receiver t , t Receiver Input to Output C = 15pF, V = 1.5V, |V | = 1.5V, l 50 65 ns PLHR PHLR L CM AB t and t < 4ns (Figure 6) R F t Differential Receiver Skew C = 15pF (Figure 6) 2 9 ns SKEWR L |t – t | PLHR PHLR t , t Receiver Output Rise or Fall Time C = 15pF (Figure 6) l 3 12.5 ns RR FR L t , t , Receiver Enable/Disable Time R = 1k, C = 15pF, DE = High (Figure 7) l 40 ns ZLR ZHR L L t , t LZR HZR t , t Receiver Enable from Shutdown R = 1k, C = 15pF, DE = 0V, (Figure 7) l 9 µs ZHSR ZLSR L L t Time to Shutdown R = 1k, C = 15pF, DE = 0V, (Figure 7) l 100 ns SHDNR L L Note 1. Stresses beyond those listed under Absolute Maximum Ratings Note 3. Maximum data rate is guaranteed by other measured parameters may cause permanent damage to the device. Exposure to any Absolute and is not tested directly. Maximum Rating condition for extended periods may affect device Note 4. This IC includes overtemperature protection that is intended reliability and lifetime. to protect the device during momentary overload conditions. Junction Note 2. All currents into device pins are positive; all currents out of device temperature will exceed 150ºC when overtemperature protection is active. pins are negative. All voltages are referenced to device ground unless Continuous operation above the specified maximum operating temperature otherwise specified. may result in device degradation or failure. 2862345fc 6 For more information www.linear.com/LTC2862

LTC2862/LTC2863/ LTC2864/LTC2865 Typical perForMance characTerisTics T = 25°C, V = V = 3.3V, unless otherwise noted. A CC L Supply Current vs V Supply Current vs Temperature Supply Current vs Data Rate CC 4.5 10000 20 250 4.0 ICCTRS bps) RCLD I=F F1 =0 05p4FΩ D NT (mA)33..05 ICCTRS NT (µA)1010000 ICCTR LIMITED) (M1126 SLEW LIMITED 210500ATA RATE (S RE2.5 RE W LE SUPPLY CUR2110....0505 ICCTR SUPPLY CUR 101 ICCS ATA RATE (NON SLE 84 NON SLEW LIMITED 15000W LIMITED) (kbps) D 0 0 0 3.0 3.5 4.0 4.5 5.0 5.5 0.1 30 35 40 45 50 55 60 –50 0 50 100 150 VCC (V) TEMPERATURE (°C) SUPPLY CURRENT (mA) 2862345 G01 2862345 G02 2862345 G03 Driver Propagation Delay vs Driver Output Short-Circuit Driver Skew vs Temperature Temperature Current vs Voltage 1.5 120 35 1000 200 RIVER SKEW (NON SLEW LIMITED) (ns)––00101.....05050 RCLD I=F F1 =0 05p4FΩ NSOLNEW S LLEIMWI TLEIMDITED 64218000000DRIVER SKEW (SLEW LIMITED) (ns) RIVER DELAY (NON SLEW LIMITED) (ns)2350 RCLD IS=F FL1 E=N0W 0O5p 4NLFΩ ISMLIETWED LIMITED 890000DRIVER DELAY (SLEW LIMITED) (ns) OUTPUT CURRENT (mA)–––11115055050000000 OUTPUT LOW OUTPUT HIGH D D –1.5 0 20 700 –200 –50 0 50 100 150 –50 0 50 100 150 –60 –40 –20 0 20 40 60 TEMPERATURE (°C) TEMPERATURE (°C) OUTPUT VOLTAGE (V) 2862345 G04 2862345 G05 2862345 G06 Driver Output Low/High Voltage Driver Differential Output Voltage vs Output Current vs Temperature V Supply Current vs Data Rate L 3.5 2.5 600 CL (RO) = 15pF 3.0 VCC = 5V V) VOH 2.3 RDIFF = 100Ω 500 GE ( 2.5 µA) VL = 5V PUT VOLTA 2.0 (V)OD 2.1 CURRENT ( 340000 VL = 3.3V ER OUT 11..50 V 1.9 RDIFF = 54Ω UPPLY 200 V S DRI 0.5 VOL 1.7 V L100 VL = 2.5V VL = 1.8V 0.0 1.5 0 10 20 30 40 50 –50 0 50 100 150 0 0 5 10 15 20 OUTPUT CURRENT (mA) TEMPERATURE (°C) DATA RATE (Mbps) 2862345 G07 2862345 G08 2862345 G09 2862345fc 7 For more information www.linear.com/LTC2862

LTC2862/LTC2863/ LTC2864/LTC2865 Typical perForMance characTerisTics T = 25°C, V = V = 3.3V, unless otherwise noted. A CC L Receiver Output Voltage vs Receiver Propagation Delay Output Current (Source and Sink) vs Temperature Receiver Skew vs Temperature 6.0 58 –1.6 VL = 5.5V VAB = 1.5V VAB = 1.5V CL = 15pF CL = 15pF E (V) 5.0 56 –1.8 RECEIVER OUTPUT VOLTAG 3214....0000 VVLL == 32..32V5VVL = 1.65V RECEIVER DELAY (ns) 55452084 RECEIVER SKEW (ns)–––222...240 VL = 1.65V TO 5.5V 0.0 46 –2.6 0.0 2.0 4.0 6.0 8.0 –50 0 50 100 150 –50 0 50 100 150 OUTPUT CURRENT (ABSOLUTE VALUE) (mA) TEMPERATURE (°C) TEMPERATURE (°C) 2862345 G10 2862345 G11 2862345 G12 pin FuncTions PIN NUMBER PIN LTC2864 LTC2864 NAME LTC2862 LTC2863 (DFN) (SO) LTC2865 DESCRIPTION RO 1 2 1 2 1 Receiver Output. If the receiver output is enabled (RE low) and A–B > 200mV, then RO will be high. If A–B < –200mV, then RO will be low. If the receiver inputs are open, shorted, or terminated without a signal, RO will be high. RE 2 - 2 3 2 Receiver Enable. A low input enables the receiver. A high input forces the receiver output into a high impedance state. If RE is high with DE low, the part will enter a low power shutdown state. DE 3 - 3 4 3 Driver Enable. A high input on DE enables the driver. A low input will force the driver outputs into a high impedance state. If DE is low with RE high, the part will enter a low power shutdown state. DI 4 3 4 5 4 Driver Input. If the driver outputs are enabled (DE high), then a low on DI forces the driver noninverting output Y low and inverting output Z high. A high on DI, with the driver outputs enabled, forces the driver noninverting output Y high and inverting output Z low. V - - - - 5 Logic Supply: 1.65V ≤ V ≤ V . Bypass with 0.1µF ceramic capacitor. Powers L L CC RO, RE, DE, DI and SLO interfaces on LTC2865 only. GND 5 4 5 6, 7 6 Ground. Exposed Pad 9 9 11 - 13 Connect the exposed pads on the DFN and MSOP packages to GND SLO - - - - 7 Slow Mode Enable. A low input switches the transmitter to the slew rate limited 250kbps max data rate mode. A high input supports 20Mbps. Y - 5 6 9 8 Noninverting Driver Output for LTC2863, LTC2864, LTC2865. High-impedance when driver disabled or unpowered. Z - 6 7 10 9 Inverting Driver Output for LTC2863, LTC2864, LTC2865. High-impedance when driver disabled or unpowered. B 7 7 8 11 10 Inverting Receiver Input (and Inverting Driver Output for LTC2862). Impedance is > 96kΩ in receive mode or unpowered. A 6 8 9 12 11 Noninverting Receiver Input (and Noninverting Driver Output for LTC2862). Impedance is > 96kΩ in receive mode or unpowered. V 8 1 10 14 12 Power Supply. 3V < V < 5.5V. Bypass with 0.1µF ceramic capacitor to GND. CC CC NC 1, 8, 13 Unconnected Pins. Float or connect to GND. 2862345fc 8 For more information www.linear.com/LTC2862

LTC2862/LTC2863/ LTC2864/LTC2865 FuncTion Tables LTC2862 LTC2864, LTC2865: LOGIC INPUTS MODE A, B RO LOGIC INPUTS MODE A, B Y, Z RO DE RE DE RE 0 0 Receive R Active 0 0 Receive R High-Z Active IN IN 0 1 Shutdown R High-Z 0 1 Shutdown R High-Z High-Z IN IN 1 0 Transceive Active Active 1 0 Transceive R Active Active IN 1 1 Transmit Active High-Z 1 1 Transmit R Active High-Z IN block DiaGraMs LTC2862 LTC2863 VCC VCC A* RO RO RECEIVER RECEIVER B* RE A* MODE CONTROL DE LOGIC B* Z* DI DRIVER Y* DI DRIVER GND 2862345 BDb *15kV ESD GND 2862345 BDa *15kV ESD LTC2864 LTC2865 VCC VCC VL A* A* RO RO RECEIVER RECEIVER B* B* RE RE MODE CONTROL MODE CONTROL DE LOGIC DE LOGIC Z* Z* DI DI DRIVER DRIVER Y* Y* SLO GND 2862345 BDc GND 2862345 BDd *15kV ESD *15kV ESD 2862345fc 9 For more information www.linear.com/LTC2862

LTC2862/LTC2863/ LTC2864/LTC2865 TesT circuiTs Y** Y** GND + R GND IOSD OR DI DRIVER VOD OR DI DRIVER VCC* – R + VCC* + VOC – –60V TO 60V – Z** Z** 2862345 FO1 2862345 FO2 *LTC2865 ONLY: SUBSTITUTE VL FOR VCC *LTC2865 ONLY: SUBSTITUTE VL FOR VCC **LTC2862 ONLY: SUBSTITUTE A, B FOR Y, Z **LTC2862 ONLY: SUBSTITUTE A, B FOR Y, Z Figure 1. Driver DC Characteristics Figure 2. Driver Output Short-Circuit Current IIN A OR B RECEIVER + VIN – B OR A 2862345 FO3 RIN =VIN IIN Figure 3. Receiver Input Current and Input Resistance Y** VCC* DI tPLHD tPHLD CL 0V DI DRIVER RDIFF tSKEWD CL Y, Z VO 1/2 VO Z** 2862345 FO4 90% 90% (Y–Z) 0 0 10% 10% tRD tFD **LTC2862 ONLY: SUBSTITUTE A, B FOR Y, Z 2862345 F04b *LTC2865 ONLY: SUBSTITUTE VL FOR VCC Figure 4. Driver Timing Measurement 2862345fc 10 For more information www.linear.com/LTC2862

LTC2862/LTC2863/ LTC2864/LTC2865 TesT circuiTs Y** RL GONRD VCC* VCC DE 1/2 VCC* VOCRC* DI DRIVER CL V0CVC ttZZLLDSD, tLZD GND RL VOCRC Y OR ZVOL 1/2 VCC 0.5V DE Z** GND CL VOH 0.5V Z OR Y 1/2 VCC 0V tZHD, tHZD, 2862345 F05b *LTC2865 ONLY: SUBSTITUTE VL FOR VCC tZHSD tSHDN **LTC2862 ONLY: SUBSTITUTE A, B FOR Y, Z 2862345 FO5 *LTC2865 ONLY: SUBSTITUTE VL FOR VCC Figure 5. Driver Enable and Disable Timing Measurements tSKEWR = |tPLHR – tPHLR| VAB ±VAB/2 A A–B 0 VCM B RECEIVER RO –VVCACB* 90% tPLHR 90%tPHLR ±VAB/2 CL RO 0 10% 1/2 VCC* 1/2 VCC* 10% tRR tFR 2862345 F06b 2862345 FO6a *LTC2865 ONLY: SUBSTITUTE VL FOR VCC Figure 6. Receiver Propagation Delay Measurements VCC* tZLR, 0V OR VCC A RECEIVER RO RL VOCRC* REVC0CV* tZLSR 1/2 VCC* tLZR B GND VCC OR 0V CL RO 1/2 VCC* VOL 0.5V DI = 0V OR VCC* RE VOH 0.5V RO 1/2 VCC* 0V 2862345 FO7a tZHR, tHZR, 2862345 F07b tZHSR tSHDNR *LTC2865 ONLY: SUBSTITUTE VL FOR VCC *LTC2865 ONLY: SUBSTITUTE VL FOR VCC Figure 7. Receiver Enable/Disable Time Measurements 2862345fc 11 For more information www.linear.com/LTC2862

LTC2862/LTC2863/ LTC2864/LTC2865 applicaTions inForMaTion ±60V Fault Protection ±25V Extended Common Mode Range The LTC2862-LTC2865 devices answer application needs To further increase the reliability of operation and extend for overvoltage fault-tolerant RS485/RS422 transceivers functionality in environments with high common mode operating from 3V to 5.5V power supplies. Industrial voltages due to electrical noise or local ground potential installations may encounter common mode voltages differences due to ground loops, the LTC2862-LTC2865 between nodes far greater than the –7V to 12V range devices feature an extended common mode operating specified by the RS485 standards. Standard RS485 range of –25V to 25V. This extended common mode transceivers can be damaged by voltages above their typical range allows the LTC2862-LTC2865 devices to transmit absolute maximum ratings of –8V to 12.5V. The limited and receive under conditions that would cause data errors overvoltage tolerance of standard RS485 transceivers and possible device damage in competing products. makes implementation of effective external protection networks difficult without interfering with proper data ±15kV ESD Protection network performance within the –7V to 12V region of The LTC2862 series devices feature exceptionally robust RS485 operation. Replacing standard RS485 transceivers ESD protection. The transceiver interface pins (A,B,Y,Z) with the rugged LTC2862-LTC2865 devices may eliminate feature protection to ±15kV HBM with respect to GND field failures due to overvoltage faults without using costly without latchup or damage, during all modes of operation external protection devices. or while unpowered. All the other pins are protected to ±8kV The ±60V fault protection of the LTC2862 series is HBM to make this a component capable of reliable operation achieved by using a high-voltage BiCMOS integrated circuit under severe environmental conditions. technology. The naturally high breakdown voltage of this Driver technology provides protection in powered-off and high- impedance conditions. The driver outputs use a progressive The driver provides full RS485/RS422 compatibility. When foldback current limit design to protect against overvoltage enabled, if DI is high, Y–Z is positive for the full-duplex faults while still allowing high current output drive. devices (LTC2863-LTC2865) and A–B is positive for the half-duplex device (LTC2862). The LTC2862 series is protected from ±60V faults even with GND open, or VCC open or grounded. Additional precautions When the driver is disabled, both outputs are high- must be taken in the case of VCC present and GND open. impedance. For the full-duplex devices, the leakage on The LTC2862 series chip will protect itself from damage, the driver output pins is guaranteed to be less than 30µA but the chip ground current may flow out through the ESD over the entire common mode range of –25V to 25V. On diodes on the logic I/O pins and into associated circuitry. the half-duplex LTC2862, the impedance is dominated by The system designer should examine the susceptibility the receiver input resistance, R . IN of the associated circuitry to damage if the condition of a GND open fault with V present is anticipated. Driver Overvoltage and Overcurrent Protection CC The high voltage rating of the LTC2862 series makes it The driver outputs are protected from short circuits to any simple to extend the overvoltage protection to higher voltage within the Absolute Maximum range of –60V to levels using external protection components. Compared 60V. The maximum current in a fault condition is ±250mA. to lower voltage RS485 transceivers, external protection The driver includes a progressive foldback current limiting devices with higher breakdown voltages can be used, so circuit that continuously reduces the driver current limit as not to interfere with data transmission in the presence with increasing output fault voltage. The fault current is of large common mode voltages. The Typical Applications less than ±15mA for fault voltages over ±40V. section shows a protection network against faults up to All devices also feature thermal shutdown protection that ±360V peak, while still maintaining the extended ±25V disables the driver and receiver in case of excessive power common mode range on the signal lines. dissipation (see Note 4). 2862345fc 12 For more information www.linear.com/LTC2862

LTC2862/LTC2863/ LTC2864/LTC2865 applicaTions inForMaTion Full Failsafe Operation the positive and negative thresholds. If this condition persists for more than about 3µs the failsafe condition is When the absolute value of the differential voltage between asserted and the RO pin is forced to the logic 1 state. This the A and B pins is greater than 200mV with the receiver circuit provides full failsafe operation with no negative enabled, the state of RO will reflect the polarity of (A–B). impact to receiver duty cycle symmetry, as shown in These parts have a failsafe feature that guarantees the Figure 8. The input signal in Figure 8 was obtained by receiver output will be in a logic 1 state (the idle state) driving a 10Mbps RS485 signal through 1000 feet of cable, when the inputs are shorted, left open, or terminated but thereby attenuating it to a ±200mV signal with slow rise not driven, for more than about 3µs. The delay allows and fall times. Good duty cycle symmetry is observed at normal data signals to transition through the threshold RO despite the degraded input signal. region without being interpreted as a failsafe condition. This failsafe feature is guaranteed to work for inputs spanning Enhanced Receiver Noise Immunity the entire common mode range of –25V to 25V. An additional benefit of the fully symmetric receiver Most competing devices achieve the failsafe function by a thresholds is enhanced receiver noise immunity. The simple negative offset of the input threshold voltage. This differential input signal must go above the positive causes the receiver to interpret a zero differential voltage threshold to register as a logic 1 and go below the as a logic 1 state. The disadvantage of this approach is negative threshold to register as a logic 0. This provides the input offset can introduce duty cycle asymmetry at the a hysteresis of 150mV (typical) at the receiver inputs for receiver output that becomes increasingly worse with low any valid data signal. (An invalid data condition such as input signal levels and slow input edge rates. a DC sweep of the receiver inputs will produce a different observed hysteresis due to the activation of the failsafe Other competing devices use internal biasing resistors to circuit.) Competing devices that employ a negative offset create a positive bias at the receiver inputs in the absence of the input threshold voltage generally have a much of an external signal. This type of failsafe biasing is smaller hysteresis and subsequently have lower receiver ineffective if the network lines are shorted, or if the network noise immunity. is terminated but not driven by an active transmitter. RS485 Network Biasing A, B RS485 networks are usually biased with a resistive divider 200mV/DIV to generate a differential voltage of ≥200mV on the data lines, which establishes a logic 1 state (the idle state) A–B when all the transmitters on the network are disabled. The 200mV/DIV values of the biasing resistors are not fixed, but depend on the number and type of transceivers on the line and RO the number and value of terminating resistors. Therefore, 1.6V/DIV the values of the biasing resistors must be customized to each specific network installation, and may change if nodes 40ns/DIV 2862345 F08 are added to or removed from the network. Figure 8. Duty Cycle of Balanced Receiver with ±200mV 10Mbps Input Signal The internal failsafe feature of the LTC2862-LTC2865 eliminates the need for external network biasing resistors The LTC2862 series uses fully symmetric positive and provided they are used in a network of transceivers with negative receiver thresholds (typically ±75mV) to maintain similar internal failsafe features. The LTC2862-LTC2865 good duty cycle symmetry at low signal levels. The failsafe transceivers will operate correctly on biased, unbiased, operation is performed with a window comparator to or under-biased networks. determine when the differential input voltage falls between 2862345fc 13 For more information www.linear.com/LTC2862

LTC2862/LTC2863/ LTC2864/LTC2865 applicaTions inForMaTion Hi-Z State There are no power-up sequence restrictions on the LTC2865. However, correct operation is not guaranteed for The receiver output is internally driven high (to V or V ) CC L V > V . or low (to GND) with no external pull-up needed. When the L CC receiver is disabled the RO pin becomes Hi-Z with leakage Shutdown Mode Delay of less than ±5μA for voltages within the supply range. The LTC2862, LTC2864, and LTC2865 feature a low power High Receiver Input Resistance shutdown mode that is entered when both the driver and the receiver are simultaneously disabled (pin DE low and The receiver input load from A or B to GND for the LTC2863, RE high). A shutdown mode delay of approximately 250ns LTC2864, and LTC2865 is less than one-eighth unit load, (not tested in production) is imposed after this state is permitting a total of 256 receivers per system without received before the chip enters shutdown. If either DE goes exceeding the RS485 receiver loading specification. All high or RE goes low during this delay, the delay timer is grades of the LTC2862 and the H- and MP-grade devices reset and the chip does not enter shutdown. This reduces of the LTC2863, LTC2864, and LTC2865 have an input the chance of accidentally entering shutdown if DE and load less than one-seventh unit load over the complete RE are driven in parallel by a slowly changing signal or if temperature range of –40°C to 125°C. The increased input DE and RE are driven by two independent signals with a load specification for these devices is due to increased timing skew between them. junction leakage at high temperature and the transmitter circuitry sharing the A and B pins on the LTC2862. The This shutdown mode delay does not affect the outputs of input load of the receiver is unaffected by enabling/disabling the transmitter and receiver, which start to switch to the the receiver or by powering/unpowering the part. high impedance state upon the reception of their respec- tive disable signals as defined by the parameters t Supply Current SHDND and t . The shutdown mode delay affects only the The unloaded static supply currents in these devices SHDNR time when all the internal circuits that draw DC power are low —typically 900μA for non slew limited devices from V are turned off. and 3.3mA for slew limited devices. In applications CC with resistively terminated cables, the supply current is High Speed Considerations dominated by the driver load. For example, when using two 120Ω terminators with a differential driver output voltage A ground plane layout with a 0.1µF bypass capacitor placed of 2V, the DC load current is 33mA, which is sourced by less than 7mm away from the VCC pin is recommended. The the positive voltage supply. Power supply current increases PC board traces connected to signals A/B and Z/Y should with toggling data due to capacitive loading and this term be symmetrical and as short as possible to maintain good can increase significantly at high data rates. A plot of differential signal integrity. To minimize capacitive effects, the supply current vs data rate is shown in the Typical the differential signals should be separated by more than Performance Characteristics of this data sheet. the width of a trace and should not be routed on top of each other if they are on different signal planes. During fault conditions with a positive voltage larger than the supply voltage applied to the transmitter pins, or during Care should be taken to route outputs away from any transmitter operation with a high positive common mode sensitive inputs to reduce feedback effects that might voltage, positive current of up to 80mA may flow from the cause noise, jitter, or even oscillations. For example, in transmitter pins back to V . If the system power supply the full-duplex devices, DI and A/B should not be routed CC or loading cannot sink this excess current, a 5.6V 1W near the driver or receiver outputs. 1N4734 Zener diode may be placed between V and GND CC The logic inputs have a typical hysteresis of 100mV to to prevent an overvoltage condition on V . CC provide noise immunity. Fast edges on the outputs can cause glitches in the ground and power supplies which are 2862345fc 14 For more information www.linear.com/LTC2862

LTC2862/LTC2863/ LTC2864/LTC2865 applicaTions inForMaTion exacerbated by capacitive loading. If a logic input is held lengths, these transition times become a significant part near its threshold (typically V /2 or V /2), a noise glitch of the signal bit time. Jitter and intersymbol interference CC L from a driver transition may exceed the hysteresis levels on aggravate this so that the time window for capturing valid the logic and data input pins, causing an unintended state data at the receiver becomes impossibly small. change. This can be avoided by maintaining normal logic The boundary at 20Mbps in Figure 9 represents the levels on the pins and by slewing inputs faster than 1V/ guaranteed maximum operating rate of the LTC2862 μs. Good supply decoupling and proper driver termination series. The dashed vertical line at 10Mbps represents the also reduce glitches caused by driver transitions. specified maximum data rate in the RS485 standard. This boundary is not a limit, but reflects the maximum data RS485 Cable Length vs Data Rate rate that the specification was written for. Many factors contribute to the maximum cable length It should be emphasized that the plot in Figure 9 shows that can be used for RS485 or RS422 communication, a typical relation between maximum data rate and including driver transition times, receiver threshold, duty cable length. Results with the LTC2862 series will vary, cycle distortion, cable properties and data rate. A typical depending on cable properties such as conductor gauge, curve of cable length versus maximum data rate is shown characteristic impedance, insulation material, and solid in Figure 9. Various regions of this curve reflect different versus stranded conductors. performance limiting factors in data transmission. At frequencies below 100kbps, the maximum cable length is Low EMI 250kbps Data Rate determined by DC resistance in the cable. In this example, The LTC2862-2, LTC2863-2, and the LTC2864-2 feature a cable longer than 4000ft will attenuate the signal at the slew rate limited transmitters for low electromagnetic far end to less than what can be reliably detected by the interference (EMI) in sensitive applications. In addition, receiver. the LTC2865 has a logic-selectable 250kbps transmit rate. For data rates above 100kbps the capacitive and inductive The slew rate limit circuit maintains consistent control of properties of the cable begin to dominate this relationship. transmitter slew rates across voltage and temperature to The attenuation of the cable is frequency and length ensure low EMI under all operating conditions. Figure 10 dependent, resulting in increased rise and fall times at demonstrates the reduction in high frequency content the far end of the cable. At high data rates or long cable achieved by the 250kbps mode compared to the 20Mbps mode. 10k 20 80 0 60 B) NON SLEW LIMITED BLE LENGTH (FT) 1k SLLOMOW O= D EGEMNID N SLEW LIMITED) (d –––462000 20400 Y–Z (SLEW LIMITED CA100 RS485 –Z (NO –80 –20) (dB) Y STANDARD –100 –40 SPEC SLEW LIMITED 10 –120 –60 10k 100k 1M 10M 100M 0 2 4 6 8 10 12 DATA RATE (bps) FREQUENCY (MHz) 2862345 F09 2862345 F10 Figure 9. Cable Length vs Data Rate (RS485/RS422 Standard Figure 10. High Frequency EMI Reduction of Slew Limited Shown in Vertical Solid Line) 250kbps Mode Compared to Non Slew Limited 20Mbps Mode 2862345fc 15 For more information www.linear.com/LTC2862

LTC2862/LTC2863/ LTC2864/LTC2865 applicaTions inForMaTion The 250kbps mode has the added advantage of reducing cable to attenuate the transmitted signal to meet the signal reflections in an unterminated network, and there- PROFIBUS upper limit of 7V while still providing enough by increasing the length of a network that can be used drive strength to meet the lower limit of 4V. without termination. Using the rule of thumb that the rise 4. The LTC2865 family transceiver should be powered by time of the transmitter should be greater than four times a 5% tolerance 5V supply (4.75V to 5.25V) to ensure the one-way delay of the signal, networks of up to 140 that the PROFIBUS V tolerances are met. OD feet can be driven without termination. Auxiliary Protection For IEC Surge, EFT and ESD PROFIBUS Compatible Interface An interface transceiver used in an industrial setting PROFIBUS is an RS485-based field bus. In addition may be exposed to extremely high levels of electrical to the specifications of TIA/EIA-485-A, the PROFIBUS overstress due to phenomena such as lightning surge, specification contains additional requirements for cables, electrical fast transient (EFT) from switching high current interconnects, line termination, and signal levels. The inductive loads, and electrostatic discharge (ESD) from following discussion applies to the PROFIBUS Type A cables the discharge of electrically charged personnel or equip- with associated connectors and termination. The Type A ment. Test methods to evaluate immunity of electronic cable is a twisted pair shielded cable with a characteristic equipment to these phenomenon are defined in the IEC impedance of 135Ω to 165Ω and a loop resistance of standards 61000-4-2, 61000-4-4, and 61000-4-5, which < 110Ω/km. address ESD, EFT, and surge, respectively. The transi- The LTC2865 family of RS485 transceivers may be used ents produced by the EFT and particularly the surge tests in PROFIBUS compatible equipment if the following contain much more energy than the ESD transients. The considerations are implemented. (Please refer to the LTC2865 family is designed for high robustness against schematic of the PROFIBUS Compatible Interface in the ESD, but the on-chip protection is not able to absorb the Typical Applications Section.) energy associated with the 61000-4-5 surge transients. Therefore, a properly designed external protection network 1. The polarity of the PROFIBUS signal is opposite to the is necessary to achieve a high level of surge protection, polarity convention used in this data sheet. The PRO- and can also extend the ESD and EFT performance of the FIBUS B wire is driven by a non-inverted signal, while LTC2865 family to extremely high levels. the A wire is driven by an inverted signal. Therefore, it is necessary to swap the output connections from In addition to providing surge, EFT and ESD protection, the transceiver. Pin A is connected to the PROFIBUS B an external network should preserve or extend the ability wire, and Pin B is connected to the PROFIBUS A wire. of the LTC2865 family to withstand overvoltage faults, operate over a wide common mode, and communicate 2. Each end of the PROFIBUS line is terminated with a at high frequencies. In order to meet the first two 220Ω resistor between B and A, a 390Ω pull-up resis- requirements, protection components with suitably high tor between B and V , and a 390Ω pull-down resistor CC conduction voltages must be chosen. A means to limit be-tween A and GND. This provides suitable termination current must be provided to prevent damage in case for the 150Ω twisted pair transmission cable. a secondary protection device or the ESD cell on the 3. The peak to peak differential voltage VOD received at LTC2865 family fires and conducts. The capacitance of the end of a 100m cable with the cable and termina- these components must be kept low in order to permit high tions described above must be greater than 4V and less frequency communication over a network with multiple than 7V. The LTC2865 family produces signal levels in nodes. Meeting the requirements for conducting very high excess of 7V when driving this network directly. 8.2Ω energy electrical transients while maintaining high hold-off resistors may be inserted between the A and B pins of voltages and low capacitance is a considerable challenge. the transceiver and the B and A pins of the PROFIBUS 2862345fc 16 For more information www.linear.com/LTC2862

LTC2862/LTC2863/ LTC2864/LTC2865 applicaTions inForMaTion A protection network shown in the Typical Applications The gas discharge tubes (GDTs) provide the primary pro- section (network for IEC level 4 protection against surge, tection against electrical surges. These devices provide a EFT and ESD) meets this challenge. The network provides very low impedance and high current carrying capability the following protection: when they fire, safely discharging the surge current to GND. The transient blocking units (TBUs) are solid state • IEC 61000-4-2 ESD Level 4: ±30KV contact, ±30kV air devices that switch from a low impedance pass through (line to GND, direct discharge to bus pins with transceiver state to a high impedance current limiting state when a and protection circuit mounted on a ground referenced specified current level is reached. These devices limit the test card per Figure 4 of the standard) current and power that can pass through to the secondary • IEC 61000-4-4 EFT Level 4: ±5KV (line to GND, 5kHz protection. The secondary protection consists of a repetition rate, 15ms burst duration, 60 second test bidirectional thyristor, which triggers above 35V to protect duration, discharge coupled to bus pins through 100pF the bus pins of the LTC2865 family transceiver. The high capacitor per paragraph 7.3.2 of the standard) trigger voltage of the secondary protection maintains the full ±25V common mode range of the receivers. The final • IEC 61000-4-5 Surge Level 4: ±5KV (line to GND, line to component of the network is the metal oxide varistors line, 8/20µs waveform, each line coupled to generator (MOVs) which are used to clamp the voltage across the through 80Ω resistor per Figure 14 of the standard) TBUs to protect them against fast ESD and EFT transients This protection circuit adds only ~8pF of capacitance per which exceed the turn-on time of the GDT. line (line to GND), thereby providing an extremely high level The high performance of this network is attributable to of protection without significant impact to the performance the low capacitance of the GDT and thyristor primary of the LTC2865 family transceivers at high data rates. and secondary protection devices. The high capacitance MOV floats on the line and is shunted by the TBU, so it contributes no appreciable capacitive load on the signal. Typical applicaTions PROFIBUS Compatible Line Interface VCC (4.75V TO 5.25V) VCC VCC LTC2862-1 390Ω 390Ω RO A* 8.2Ω B WIRE 100m B WIRE RE 220Ω 220Ω VOD B* 8.2Ω A WIRE DI 5.5Ω/WIRE A WIRE 390Ω 390Ω DE GND 4VP-P ≤ VOD ≤ 7VP-P AT 12Mbps * THE POLARITY OF A AND B IN THIS DATA SHEET IS OPPOSITE THE POLARITY DEFINED BY PROFIBUS. 2862345 TA02 2862345fc 17 For more information www.linear.com/LTC2862

LTC2862/LTC2863/ LTC2864/LTC2865 Typical applicaTions Bidirectional ±60V 20Mbps Level Shifter/Isolator C LTC2863-1 LTC2863-1 A R1 Y VCC VCC RO DI DATA OUT 2 R2 DATA IN 2 R1 B Z C C Y R1 A DI RO DATA IN 1 R2 DATA OUT 1 R1 GND Z B VCC GND C VCC ±60V 2862345 TA03 R1 = 100k 1%. PLACE R1 RESISTORS NEAR A AND B PINS. R2 = 10k C = 47pF, 5%, 50 WVDC. MAY BE OMITTED FOR DATA RATES ≤ 100kbps. Failsafe O Application (Idle State = Logic O) 5V RO LTC2862 RO I1 VCC R B “A” DE A DE “B” DI/ D DI I2 GND 2862345 TA04 2862345fc 18 For more information www.linear.com/LTC2862

LTC2862/LTC2863/ LTC2864/LTC2865 packaGe DescripTion Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. S8 Package 8-Lead Plastic Small Outline (Narrow .150 Inch) (Reference LTC DWG # 05-08-1610 Rev G) .189 – .197 .045 ±.005 (4.801 – 5.004) .050 BSC NOTE 3 8 7 6 5 .245 MIN .160 ±.005 .150 – .157 .228 – .244 (3.810 – 3.988) (5.791 – 6.197) NOTE 3 .030 ±.005 TYP 1 2 3 4 RECOMMENDED SOLDER PAD LAYOUT .010 – .020 × 45° .053 – .069 (0.254 – 0.508) (1.346 – 1.752) .004 – .010 .008 – .010 (0.203 – 0.254) 0°– 8° TYP (0.101 – 0.254) .016 – .050 .014 – .019 .050 (0.406 – 1.270) (0.355 – 0.483) (1.270) NOTE: INCHES TYP BSC 1. DIMENSIONS IN (MILLIMETERS) 2. DRAWING NOT TO SCALE 3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm) SO8 REV G 0212 4. PIN 1 CAN BE BEVEL EDGE OR A DIMPLE 2862345fc 19 For more information www.linear.com/LTC2862

LTC2862/LTC2863/ LTC2864/LTC2865 packaGe DescripTion Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. DD Package 8-Lead Plastic DFN (3mm × 3mm) (Reference LTC DWG # 05-08-1698 Rev C) 0.70 ±0.05 3.5 ±0.05 1.65 ±0.05 2.10 ±0.05 (2 SIDES) PACKAGE OUTLINE 0.25 ± 0.05 0.50 BSC 2.38 ±0.05 RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED R = 0.125 0.40 ± 0.10 TYP 5 8 3.00 ±0.10 1.65 ± 0.10 (4 SIDES) (2 SIDES) PIN 1 TOP MARK (NOTE 6) (DD8) DFN 0509 REV C 4 1 0.200 REF 0.75 ±0.05 0.25 ± 0.05 0.50 BSC 2.38 ±0.10 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON TOP AND BOTTOM OF PACKAGE 2862345fc 20 For more information www.linear.com/LTC2862

LTC2862/LTC2863/ LTC2864/LTC2865 packaGe DescripTion Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. S Package 14-Lead Plastic Small Outline (Narrow .150 Inch) (Reference LTC DWG # 05-08-1610 Rev G) .337 – .344 .045 ±.005 (8.560 – 8.738) .050 BSC NOTE 3 14 13 12 11 10 9 8 N N .245 MIN .160 ±.005 .228 – .244 .150 – .157 (5.791 – 6.197) (3.810 – 3.988) NOTE 3 1 2 3 N/2 N/2 .030 ±.005 TYP RECOMMENDED SOLDER PAD LAYOUT 1 2 3 4 5 6 7 .010 – .020 × 45 .053 – .069 (0.254 – 0.508) (1.346 – 1.752) .008 – .010 .004 – .010 (0.203 – 0.254) 0° – 8° TYP (0.101 – 0.254) .016 – .050 .014 – .019 .050 (0.406 – 1.270) (0.355 – 0.483) (1.270) TYP BSC NOTE: INCHES S14 REV G 0212 1. DIMENSIONS IN (MILLIMETERS) 2. DRAWING NOT TO SCALE 3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm) 4. PIN 1 CAN BE BEVEL EDGE OR A DIMPLE 2862345fc 21 For more information www.linear.com/LTC2862

LTC2862/LTC2863/ LTC2864/LTC2865 packaGe DescripTion Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. DD PacDkDag Peackage 10-Lea1d0 -PLleasatdic P DlaFsNt i(c3 mDFmN × ( 33mmmm )× 3mm) (Refere(nRceef eLrTeCn DceW LGT C# 0D5W-0G8 -#1 60959- 0R8e-v1 6C9)9 Rev C) 0.70 ±0.05 3.55 ±0.05 1.65 ±0.05 2.15 ±0.05 (2 SIDES) PACKAGE OUTLINE 0.25 ± 0.05 0.50 BSC 2.38 ±0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS R = 0.125 0.40 ± 0.10 TYP 6 10 3.00 ±0.10 1.65 ± 0.10 (4 SIDES) (2 SIDES) PIN 1 NOTCH PIN 1 R = 0.20 OR TOP MARK 0.35 × 45° (SEE NOTE 6) CHAMFER (DD) DFN REV C 0310 5 1 0.200 REF 0.75 ±0.05 0.25 ± 0.05 0.50 BSC 2.38 ±0.10 (2 SIDES) 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2). CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 2862345fc 22 For more information www.linear.com/LTC2862

LTC2862/LTC2863/ LTC2864/LTC2865 packaGe DescripTion Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. DE/UE Package 12-Lead Plastic DFN (4mm × 3mm) (Reference LTC DWG # 05-08-1695 Rev D) 0.70 ±0.05 3.30 ±0.05 3.60 ±0.05 2.20 ±0.05 1.70 ± 0.05 PACKAGE OUTLINE 0.25 ± 0.05 0.50 BSC 2.50 REF RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 4.00 ±0.10 R = 0.115 0.40 ± 0.10 (2 SIDES) TYP 7 12 R = 0.05 TYP 3.30 ±0.10 3.00 ±0.10 (2 SIDES) 1.70 ± 0.10 PIN 1 PIN 1 NOTCH TOP MARK R = 0.20 OR (NOTE 6) 0.35 × 45° CHAMFER 6 1 (UE12/DE12) DFN 0806 REV D 0.200 REF 0.75 ±0.05 0.25 ± 0.05 0.50 BSC 2.50 REF 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING PROPOSED TO BE A VARIATION OF VERSION (WGED) IN JEDEC PACKAGE OUTLINE M0-229 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 2862345fc 23 For more information www.linear.com/LTC2862

LTC2862/LTC2863/ LTC2864/LTC2865 packaGe DescripTion Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. MSE Package 12-Lead PlasMticS ME SPOaPc,k Eaxgpeosed Die Pad 12(-RLeefaerde nPclea LsTtCic D MWSGO #P 0,5 E-0x8p-o16s6e6d RDeive G P)ad (Reference LTC DWG # 05-08-1666 Rev G) BOTTOM VIEW OF EXPOSED PAD OPTION 2.845 ±0.102 2.845 ±0.102 (.112 ±.004) (.112 ±.004) 0.889 ±0.127 (.035 ±.005) 1 6 0.35 REF 5.10 1.651 ±0.102 (.201) 1.651 ±0.102 3.20 – 3.45 (.065 ±.004) 0.12 REF MIN (.065 ±.004) (.126 – .136) DETAIL “B” CORNER TAIL IS PART OF DETAIL “B” THE LEADFRAME FEATURE. FOR REFERENCE ONLY 12 7 NO MEASUREMENT PURPOSE 0.42 ±0.038 0.65 4.039 ±0.102 (.0165 ±.0015) (.0256) (.159 ±.004) TYP BSC (NOTE 3) 0.406 ±0.076 RECOMMENDED SOLDER PAD LAYOUT 121110 9 87 (.016 ±.003) REF DETAIL “A” 0.254 (.010) 3.00 ±0.102 0° – 6° TYP 4.90 ±0.152 (.118 ±.004) (.193 ±.006) GAUGE PLANE (NOTE 4) 0.53 ±0.152 (.021 ±.006) 1 2 3 4 5 6 DETAIL “A” 1.10 0.86 0.18 (.043) (.034) (.007) MAX REF SEATING PLANE 0.22 – 0.38 0.1016 ±0.0508 (.009 – .015) (.004 ±.002) TYP 0.650 NOTE: (.0256) MSOP (MSE12) 0213 REV G 1. DIMENSIONS IN MILLIMETER/(INCH) BSC 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL NOT EXCEED 0.254mm (.010") PER SIDE. 2862345fc 24 For more information www.linear.com/LTC2862

LTC2862/LTC2863/ LTC2864/LTC2865 revision hisTory REV DATE DESCRIPTION PAGE NUMBER A 03/13 Added MP-Grade to Data Sheet 2, 4 Updated S8 and S Package 17, 19 B 01/14 Changed I for H-/MP-Grade. 4 CCS Added V Supply Current vs Data Rate graph. 7 L Added Shutdown Mode Delay section. 14 Added PROFIBUS Compatible Interface section, Auxiliary protection For IEC Surge, EFT and ESD section, and 16, 17 PROFIBUS Compatible Line Interface schematic. Replaced RS485 Network with 120V AC Line Fault Protection schematic with Network for IEC Level 4 Protection 26 Against Surge, EFT and ESD Plus 360V Overvoltage Protection schematic. C 03/14 Changed part marking for DE package 4 2862345fc 25 Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconneFctoiorn m ofo irtse c iinrcfuoirtsm aas tdioesnc rwibwedw h.elirneeina wr.cilol nmot/ LinTfrCin2g8e6 o2n existing patent rights.

LTC2862/LTC2863/ LTC2864/LTC2865 Typical applicaTion Network for IEC Level 4 Protection Against Surge, EFT and ESD Plus 360V Overvoltage Protection MOV RS485 A (EXTERNAL) VCC LTC2862-1 DE TBU RO GDT SCR A R GND DI B T GDT SCR RE TBU GND RS485 B 2862345 TA05 (EXTERNAL) MOV GDT: BOURNS 2031-42T-SM; 420V GAS DISCHARGE TUBE TBU: BOURNS TBU-CA085-300-WH; 850V TRANSIENT BLOCKING UNIT MOV: BOURNS MOV-7D391K; 390V 25J METAL OXIDE VARISTOR SCR: BOURNS TISP4P035L1NR-S; 35V BIDIRECTIONAL THYRISTOR relaTeD parTs PART NUMBER DESCRIPTION COMMENTS LT1785, LT1791 ±60V Fault Protected RS485/RS422 Transceivers ±60V Tolerant, ±15kV ESD, 250kbps LTC2850-53 3.3V 20Mbps ±15kV RS485 Transceivers Up to 256 Transceivers Per Bus LTC2854, LTC2855 3.3V 20Mbps RS485 Transceivers with Integrated Switchable Termination ±25kV ESD (LTC2854), ±15kV ESD (LTC2855) LTC2856-1 Family 5V 20Mbps and Slew Rate Limited RS485 Transceivers ±15kV ESD LTC2859, LTC2861 5V 20Mbps RS485 Transceivers with Integrated Switchable Termination ±15kV ESD LTC1535 Isolated RS485 Transceiver 2500V Isolation, Requires External Transceiver RMS LTM2881 Complete 3.3V Isolated RS485/RS422 μModule® Transceiver + Power 2500V Isolation with Integrated Isolated DC/DC RMS Converter, 1W Power, Low EMI, ±15kV ESD, 30kV/µs Common Mode Transient Immunity 2862345fc 26 Linear Technology Corporation LT 0314 REV C • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 For more information www.linear.com/LTC2862 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com/LTC2862  LINEAR TECHNOLOGY CORPORATION 2011