LTC2630 Single 12-/10-/8-Bit Rail-to- Rail DACs with 10ppm/°C Reference in SC70 Features Description n Integrated Precision Reference The LTC®2630 is a family of 12-, 10-, and 8-bit voltage- 2.5V Full Scale 10ppm/°C (LTC2630-L) output DACs with an integrated, high-accuracy, low-drift 4.096V Full Scale 10ppm/°C (LTC2630-H) reference in a 6-lead SC70 package. It has a rail-to-rail n Maximum INL Error: 1 LSB (LTC2630A-12) output buffer and is guaranteed monotonic. n Low Noise: 0.7mV , 0.1Hz to 200kHz P-P The LTC2630-L has a full-scale output of 2.5V, and n Guaranteed Monotonic over Temperature operates from a single 2.7V to 5.5V supply. The n Selectable Internal Reference or Supply as Reference LTC2630-H has a full-scale output of 4.096V, and oper- n 2.7V to 5.5V Supply Range (LTC2630-L) ates from a 4.5V to 5.5V supply. Each DAC can also oper- n Low Power Operation: 180µA at 3V ate in supply as reference mode, which sets the full-scale n Power Down to 1.8µA Maximum (C and I Grades) output to the supply voltage. n Power-on Reset to Zero or Mid-Scale Options n SPI Serial Interface The parts use a simple SPI/MICROWIRE™ compatible n Double-Buffered Data Latches 3-wire serial interface which operates at clock rates up n Tiny 6-Lead SC70 Package to 50MHz. The LTC2630 incorporates a power-on reset circuit. applications Options are available for reset to zero or reset to mid- scale after power-up. n Mobile Communications n Process Control and Industrial Automation L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Analog Devices, Inc. All other trademarks are the property of their respective owners. Protected by U.S. n Automatic Test Equipment Patents, including 5396245, 5859606, 6891433, 6937178 and 7414561. n Portable Equipment n Automotive Block Diagram Integral Nonlinearity (LTC2630A-LZ12) VCC INTERNAL REFERENCE 1.0 VCC = 3V SDI VFS = 2.5V 0.5 CONTROL RESISTOR DECODE LOGIC DIVIDER SCK RE2SG4HI-SBIFTITTER NL (LSB) 0 I DACREF –0.5 CS/LD INPUT DAC VOUT DAC REGISTER REGISTER –1.0 0 1024 2048 3072 4095 CODE GND 2630 TA03 2630 BD 2630fg 1 For more information www.linear.com/LTC2630

LTC2630 aBsolute maximum ratings pin conFiguration (Notes 1, 2) Supply Voltage (VCC) ...................................–0.3V to 6V TOP VIEW CS/LD, SCK, SDI ..........................................–0.3V to 6V CS/LD 1 6 VOUT VOUT ..................................–0.3V to min(VCC + 0.3V, 6V) SCK 2 5 GND Operating Temperature Range SDI 3 4 VCC LTC2630C ................................................0°C to 70°C SC6 PACKAGE LTC2630I .............................................–40°C to 85°C 6-LEAD PLASTIC SC70 LTC2630H ..........................................–40°C to 125°C TJMAX = 150°C (Note 5), θJA = 300°C/W Maximum Junction Temperature ..........................150°C Storage Temperature Range ..................–65°C to 150°C Lead Temperature (Soldering, 10 sec) ...................300°C orDer inFormation http://www.linear.com/product/LTC2630#orderinfo LTC2630 A C SC6 –L M 12 #TRM PBF LEAD FREE DESIGNATOR TAPE AND REEL TR = 2,500-Piece Tape and Reel TRM = 500-Piece Tape and Reel RESOLUTION 12 = 12-Bit 10 = 10-Bit 8 = 8-Bit POWER-ON RESET M = Reset to Mid-Scale Z = Reset to Zero-Scale FULL-SCALE VOLTAGE, INTERNAL REFERENCE MODE L = 2.5V H = 4.096V PACKAGE TYPE SC6 = 6-Lead SC70 TEMPERATURE GRADE C = Commercial Temperature Range (0°C to 70°C) I = Industrial Temperature Range (–40°C to 85°C) H = Automotive Temperature Range (–40°C to 125°C) ELECTRICAL GRADE (OPTIONAL) A = ±1 LSB Maximum INL (12-Bit) PRODUCT PART NUMBER Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix. 2630fg 2 For more information www.linear.com/LTC2630

LTC2630 proDuct selection guiDe PART NUMBER PART MARKING* V WITH INTERNAL REFERENCE POWER-ON RESET TO CODE RESOLUTION V MAXIMUM INL FS CC LTC2630A-LM12 LCZB 2.5V • (4095/4096) Mid-Scale 12-Bit 2.7V–5.5V ±1LSB LTC2630A-LZ12 LCSB 2.5V • (4095/4096) Zero 12-Bit 2.7V–5.5V ±1LSB LTC2630A-HM12 LCWR 4.096V • (4095/4096) Mid-Scale 12-Bit 4.5V–5.5V ±1LSB LTC2630A-HZ12 LCZC 4.096V • (4095/4096) Zero 12-Bit 4.5V–5.5V ±1LSB LTC2630-LM12 LCZB 2.5V • (4095/4096) Mid-Scale 12-Bit 2.7V–5.5V ±2LSB LTC2630-LM10 LCZF 2.5V • (1023/1024) Mid-Scale 10-Bit 2.7V–5.5V ±1LSB LTC2630-LM8 LCYW 2.5V • (255/256) Mid-Scale 8-Bit 2.7V–5.5V ±0.5LSB LTC2630-LZ12 LCSB 2.5V • (4095/4096) Zero 12-Bit 2.7V–5.5V ±2LSB LTC2630-LZ10 LCZD 2.5V • (1023/1024) Zero 10-Bit 2.7V–5.5V ±1LSB LTC2630-LZ8 LCYV 2.5V • (255/256) Zero 8-Bit 2.7V–5.5V ±0.5LSB LTC2630-HM12 LCWR 4.096V • (4095/4096) Mid-Scale 12-Bit 4.5V–5.5V ±2LSB LTC2630-HM10 LCZH 4.096V • (1023/1024) Mid-Scale 10-Bit 4.5V–5.5V ±1LSB LTC2630-HM8 LCYY 4.096V • (255/256) Mid-Scale 8-Bit 4.5V–5.5V ±0.5LSB LTC2630-HZ12 LCZC 4.096V • (4095/4096) Zero 12-Bit 4.5V–5.5V ±2LSB LTC2630-HZ10 LCZG 4.096V • (1023/1024) Zero 10-Bit 4.5V–5.5V ±1LSB LTC2630-HZ8 LCYX 4.096V • (255/256) Zero 8-Bit 4.5V–5.5V ±0.5LSB *The temperature grade is identified by a label on the shipping container. 2630fg 3 For more information www.linear.com/LTC2630

LTC2630 electrical characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T = 25°C. V = 2.7V to 5.5V, V unloaded unless otherwise specified. A CC OUT LTC2630-LM12/-LM10/-LM8/-LZ12/-LZ10/-LZ8, LTC2630A-LM12/-LZ12 (V = 2.5V) FS LTC2630-8 LTC2630-10 LTC2630-12 LTC2630A-12 SYMBOLPARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS DC Performance Resolution l 8 10 12 12 Bits Monotonicity V = 3V, Internal Ref. (Note 3) l 8 10 12 12 Bits CC DNL Differential V = 3V, Internal Ref. (Note 3) l ±0.5 ±0.5 ±1 ±1 LSB CC Nonlinearity INL Integral Nonlinearity V = 3V, Internal Ref. (Note 3) l ±0.05 ±0.5 ±0.2 ±1 ±1 ±2 ±0.5 ±1 LSB CC ZSE Zero Scale Error V = 3V, Internal Ref., Code = 0 l 0.5 5 0.5 5 0.5 5 0.5 5 mV CC V Offset Error V = 3V, Internal Ref. (Note 4) l ±0.5 ±5 ±0.5 ±5 ±0.5 ±5 ±0.5 ±5 mV OS CC V V Temperature V = 3V, Internal Ref. (Note 4) ±10 ±10 ±10 ±10 µV/°C OSTC OS CC Coefficient FSE Full Scale Error V = 3V, Internal Ref. l ±0.2 ±0.8 ±0.2 ±0.8 ±0.2 ±0.8 ±0.2 ±0.8 %FSR CC V Full Scale Voltage V = 3V, Internal Ref. (Note 9) FSTC CC Temperature C-Grade ±10 ±10 ±10 ±10 ppm/°C Coefficient I-Grade ±10 ±10 ±10 ±10 ppm/°C H-Grade ±10 ±10 ±10 ±10 ppm/°C Load Regulation Internal Ref., Mid-Scale, V = 3V ±10%, –5mA ≤ I ≤ 5mA l 0.008 0.016 0.03 0.064 0.13 0.256 0.13 0.256 LSB/mA CC OUT V = 5V ±10%, –10mA ≤ I ≤ 10mA l 0.008 0.016 0.03 0.064 0.13 0.256 0.13 0.256 LSB/mA CC OUT ROUT DC Output Internal Ref., Mid-Scale, Impedance VCC = 3V ±10%, –5mA ≤ IOUT ≤ 5mA l 0.08 0.156 0.08 0.156 0.08 0.156 0.08 0.156 Ω V = 5V ±10%, –10mA ≤ I ≤ 10mA l 0.08 0.156 0.08 0.156 0.08 0.156 0.08 0.156 Ω CC OUT SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V DAC Output Span Supply as Reference 0V to V V OUT CC Internal Reference 0V to 2.5 V PSR Power Supply Rejection V = 3V ±10% or 5V ±10% –80 dB CC I Short Circuit Output Current (Note 5) V = V = 5.5V SC FS CC Sinking Zero Scale; V Shorted to V l 27 50 mA OUT CC Sourcing Full Scale; V Shorted to GND l –28 –50 mA OUT Power Supply V Power Supply Voltage For Specified Performance l 2.7 5.5 V CC I Supply Current (Note 6) V = 3V, Supply as Reference l 160 220 µA CC CC V = 3V, Internal Reference l 180 240 µA CC V = 5V, Supply as Reference l 180 250 µA CC V = 5V, Internal Reference l 190 260 µA CC I Supply Current in Power-Down Mode V = 5V, C-Grade, I-Grade l 0.36 1.8 µA SD CC (Note 6) V = 5V, H-Grade l 0.36 5 µA CC Digital I/O V Digital Input High Voltage V = 3.6V to 5.5V l 2.4 V IH CC V = 2.7V to 3.6V l 2.0 V CC V Digital Input Low Voltage V = 4.5V to 5.5V l 0.8 V IL CC V = 2.7V to 4.5V l 0.6 V CC I Digital Input Leakage V = GND to V l ±1 µA LK IN CC C Digital Input Capacitance (Note 7) l 2.5 pF IN 2630fg 4 For more information www.linear.com/LTC2630

LTC2630 electrical characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T = 25°C. V = 2.7V to 5.5V, V unloaded unless otherwise specified. A CC OUT LTC2630-LM12/-LM10/-LM8/-LZ12/-LZ10/-LZ8, LTC2630A-LM12/-LZ12 (V = 2.5V) FS SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS AC Performance tS Settling Time VCC = 3V (Note 8) ±0.39% (±1LSB at 8 Bits) 3.2 µs ±0.098% (±1LSB at 10 Bits) 3.9 µs ±0.024% (±1LSB at 12 Bits) 4.4 µs Voltage Output Slew Rate 1.0 V/µs Capacitive Load Driving 500 pF Glitch Impulse At Mid-Scale Transition 2 nV•s e Output Voltage Noise Density At f = 1kHz, Supply as Reference 140 nV/√Hz n At f = 10kHz, Supply as Reference 130 nV/√Hz At f = 1kHz, Internal Reference 160 nV/√Hz At f = 10kHz, Internal Reference 150 nV/√Hz Output Voltage Noise 0.1Hz to 10Hz, Supply as Reference 20 µV P-P 0.1Hz to 10Hz, Internal Reference 20 µV P-P 0.1Hz to 200kHz, Supply as Reference 650 µV P-P 0.1Hz to 200kHz, Internal Reference 700 µV P-P timing characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T = 25°C. V = 2.7V to 5.5V. (See Figure 1) (Note 7). A CC LTC2630-LM12/-LM10/-LM8/-LZ12/-LZ10/-LZ8, LTC2630A-LM12/-LZ12 (V = 2.5V) FS SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS t SDI Valid to SCK Setup l 4 ns 1 t SDI Valid to SCK Hold l 4 ns 2 t SCK High Time l 9 ns 3 t SCK Low Time l 9 ns 4 t CS/LD Pulse width l 10 ns 5 t SCK High to CS/LD High l 7 ns 6 t CS/LD Low to SCK High l 7 ns 7 t CS/LD High to SCK Positive Edge l 7 ns 10 SCK Frequency 50% Duty Cycle l 50 MHz 2630fg 5 For more information www.linear.com/LTC2630

LTC2630 electrical characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T = 25°C. V = 4.5V to 5.5V, V unloaded unless otherwise specified. A CC OUT LTC2630-HM12/-HM10/-HM8/-HZ12/-HZ10/-HZ8, LTC2630A-HM12/-HZ12 (V = 4.096V) FS LTC2630-8 LTC2630-10 LTC2630-12 LTC2630A-12 SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS DC Performance Resolution l 8 10 12 12 Bits Monotonicity V = 5V, Internal Ref. (Note 3) l 8 10 12 12 Bits CC DNL Differential V = 5V, Internal Ref. (Note 3) l ±0.5 ±0.5 ±1 ±1 LSB CC Nonlinearity INL Integral V = 5V, Internal Ref. (Note 3) l ±0.05 ±0.5 ±0.2 ±1 ±1 ±2 ±0.5 ±1 LSB CC Nonlinearity ZSE Zero Scale Error V = 5V, Internal Ref., Code = 0 l 0.5 5 0.5 5 0.5 5 0.5 5 mV CC V Offset Error V = 5V, Internal Ref. (Note 4) l ±0.5 ±5 ±0.5 ±5 ±0.5 ±5 ±0.5 ±5 mV OS CC V V Temperature V = 5V, Internal Ref. (Note 4) ±10 ±10 ±10 ±10 µV/°C OSTC OS CC Coefficient FSE Full Scale Error V = 5V, Internal Ref. l ±0.2 ±0.8 ±0.2 ±0.8 ±0.2 ±0.8 ±0.2 ±0.8 %FSR CC V Full Scale Voltage V = 5V, Internal Ref. (Note 9) FSTC CC Temperature C-Grade ±10 ±10 ±10 ±10 ppm/°C Coefficient I-Grade ±10 ±10 ±10 ±10 ppm/°C H-Grade ±10 ±10 ±10 ±10 ppm/°C Load Regulation V = 5V ±10%, Internal Ref., l 0.006 0.01 0.025 0.04 0.10 0.16 0.10 0.16 LSB/ CC Mid-Scale, –10mA ≤ I ≤ 10mA mA OUT R DC Output V = 5V ±10%, Internal Ref., l 0.1 0.156 0.1 0.156 0.1 0.156 0.1 0.156 Ω OUT CC Impedance Mid-Scale, –10mA ≤ I ≤ 10mA OUT SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V DAC Output Span Supply as Reference 0V to V V OUT CC Internal Reference 0V to 4.096 V PSR Power Supply Rejection V = 5V ±10% –80 dB CC I Short Circuit Output Current (Note 5) V = V = 5.5V SC FS CC Sinking Zero Scale; V Shorted to V l 27 50 mA OUT CC Sourcing Full Scale; V Shorted to GND l –28 –50 mA OUT Power Supply V Power Supply Voltage For Specified Performance l 4.5 5.5 V CC I Supply Current (Note 6) V = 5V, Supply as Reference l 180 260 µA CC CC V = 5V, Internal Reference l 200 280 µA CC I Supply Current in Power-Down Mode V = 5V, C-Grade, I-Grade l 0.36 1.8 µA SD CC (Note 6) V = 5V, H-Grade l 0.36 5 µA CC Digital I/O V Digital Input High Voltage l 2.4 V IH V Digital Input Low Voltage l 0.8 V IL I Digital Input Leakage V = GND to V l ±1 µA LK IN CC C Digital Input Capacitance (Note 7) l 2.5 pF IN 2630fg 6 For more information www.linear.com/LTC2630

LTC2630 electrical characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T = 25°C. V = 4.5V to 5.5V, V unloaded unless otherwise specified. A CC OUT LTC2630-HM12/-HM10/-HM8/-HZ12/-HZ10/-HZ8, LTC2630A-HM12/-HZ12 (V = 4.096V) FS SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS AC Performance tS Settling Time VCC = 5V (Note 8) ±0.39% (±1LSB at 8 Bits) 3.7 µs ±0.098% (±1LSB at 10 Bits) 4.4 µs ±0.024% (±1LSB at 12 Bits) 4.8 µs Voltage Output Slew Rate 1.0 V/µs Capacitive Load Driving 500 pF Glitch Impulse At Mid-Scale Transition 2.4 nV•s e Output Voltage Noise Density At f = 1kHz, Supply as Reference 140 nV/√Hz n At f = 10kHz, Supply as Reference 130 nV/√Hz At f = 1kHz, Internal Reference 210 nV/√Hz At f = 10kHz, Internal Reference 200 nV/√Hz Output Voltage Noise 0.1Hz to 10Hz, Supply as Reference 20 µV P-P 0.1Hz to 10Hz, Internal Reference 20 µV P-P 0.1Hz to 200kHz, Supply as Reference 650 µV P-P 0.1Hz to 200kHz, Internal Reference 750 µV P-P timing characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T = 25°C. V = 4.5V to 5.5V. (See Figure 1) (Note 7). A CC LTC2630-HM12/-HM10/-HM8/-HZ12/-HZ10/-HZ8, LTC2630A-HM12/-HZ12 (V = 4.096V) FS SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS t SDI Valid to SCK Setup l 4 ns 1 t SDI Valid to SCK Hold l 4 ns 2 t SCK High Time l 9 ns 3 t SCK Low Time l 9 ns 4 t CS/LD Pulse width l 10 ns 5 t SCK High to CS/LD High l 7 ns 6 t CS/LD Low to SCK High l 7 ns 7 t CS/LD High to SCK Positive Edge l 7 ns 10 SCK Frequency 50% Duty Cycle l 50 MHz Note 1: Stresses beyond those listed under Absolute Maximum Ratings Note 5: This IC includes current limiting that is intended to protect the may cause permanent damage to the device. Exposure to any Absolute device during momentary overload conditions. Junction temperature can Maximum Rating condition for extended periods may affect device exceed the rated maximum during current limiting. Continuous operation reliability and lifetime. above the specified maximum operating junction temperature may impair Note 2: All voltages are with respect to GND. device reliability. Note 3: Linearity and monotonicity are defined from code kL to code 2N–1, Note 6: Digital inputs at 0V or VCC. where N is the resolution and k is given by k = 0.016 • (2N/ V ), rounded Note 7: Guaranteed by design and not production tested. L L FS to the nearest whole code. For VFS = 2.5V and N = 12, kL = 26 and linearity Note 8: Internal Reference mode. DAC is stepped 1/4 scale to 3/4 scale is defined from code 26 to code 4,095. For VFS = 4.096V and and 3/4 scale to 1/4 scale. Load is 2kW in parallel with 100pF to GND. N = 12, k = 16 and linearity is defined from code 16 to code 4,095. L Note 9: Temperature coefficient is calculated by dividing the maximum Note 4: Inferred from measurement at code 16 (LTC2630-12), code 4 change in output voltage by the specified temperature range. (LTC2630-10) or code 1 (LTC2630-8). 2630fg 7 For more information www.linear.com/LTC2630

LTC2630 typical perFormance characteristics LTC2630-LM12/-LZ12 (V = 2.5V) FS Integral Nonlinearity (INL) Differential Nonlinearity (DNL) 1.0 1.0 VCC = 3V VCC = 3V 0.5 0.5 NL (LSB) 0 NL (LSB) 0 I D –0.5 –0.5 –1.0 –1.0 0 1024 2048 3072 4095 0 1024 2048 3072 4095 CODE CODE 2630 G01 2630 G02 Full-Scale Output Voltage INL vs Temperature DNL vs Temperature vs Temperature 1.0 1.0 2.52 VCC = 3V VCC = 3V VCC = 3V 0.5 0.5 V) 2.51 INL (POS) E ( G INL (LSB) 0 INL (NEG) DNL (LSB) 0 DDNNLL ((PNOEGS)) UTPUT VOLTA2.50 O –0.5 –0.5 FS 2.49 –1.0 –1.0 2.48 –50 –25 0 25 50 75 100 125 150 –50 –25 0 25 50 75 100 125 150 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) TEMPERATURE (°C) TEMPERATURE (°C) 2630 G03 2630 G04 2630 G05 Settling to ±1LSB Settling to ±1LSB 3/4 SCALE TO 1/4 SCALE STEP VCC = 3V, VFS = 2.5V RL = 2k, CL = 100pF CS/LD VOUT AVERAGE OF 256 EVENTS 2V/DIV 1LSB/DIV 4.4µs 3.6µs VOUT 1LSB/DIV 1/4 SCALE TO 3/4 SCALE STEP VCC = 3V, VFS = 2.5V CS/LD RL = 2k, CL = 100pF 2V/DIV AVERAGE OF 256 EVENTS 2µs/DIV 2µs/DIV 2630 G07 2630 G06 2630fg 8 For more information www.linear.com/LTC2630

LTC2630 typical perFormance characteristics LTC2630-HM12/-HZ12 (V = 4.096V) FS Integral Nonlinearity (INL) Differential Nonlinearity (DNL) 1.0 1.0 VCC = 5V VCC = 5V 0.5 0.5 NL (LSB) 0 NL (LSB) 0 I D –0.5 –0.5 –1.0 –1.0 0 1024 2048 3072 4095 0 1024 2048 3072 4095 CODE CODE 2630 G08 2630 G09 Full-Scale Output Voltage INL vs Temperature DNL vs Temperature vs Temperature 1.0 1.0 4.115 VCC = 5V VCC = 5V VCC = 5V 0.5 0.5 V)4.105 INL (POS) E ( INL (LSB) 0 INL (NEG) DNL (LSB) 0 DDNNLL ((PNOEGS)) UTPUT VOLTAG4.095 O –0.5 –0.5 FS 4.085 –1.0 –1.0 4.075 –50 –25 0 25 50 75 100 125 150 –50 –25 0 25 50 75 100 125 150 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) TEMPERATURE (°C) TEMPERATURE (°C) 2630 G10 2630 G11 2630 G12 Settling to ±1LSB Settling to ±1LSB CS/LD 2V/DIV VOUT 1LSB/DIV 4.8µs 4.0µs VOUT 1LSB/DIV 1/4 SCALE TO 3/4 SCALE STEP 1/4 SCALE TO 3/4 SCALE STEP VARVCLC E= R= 2A 5kG,V E,C VLOF F=S 21=50 460. p0EF9V6EVNTS 2CVS/D/LIDV VARVCLC E= R= 2A 5kG,V E,C VLOF F=S 21=50 460. p0EF9V6EVNTS 2µs/DIV 2µs/DIV 2630 G14 2630 G13 2630fg 9 For more information www.linear.com/LTC2630

LTC2630 typical perFormance characteristics LTC2630-10 Integral Nonlinearity (INL) Differential Nonlinearity (DNL) 1.0 1.0 VCC = 5V VCC = 5V VFS = 4.096V VFS = 4.096V 0.5 0.5 B) B) S S NL (L 0 NL (L 0 I D –0.5 –0.5 –1.0 –1.0 0 256 512 768 1023 0 256 512 768 1023 CODE CODE 2630 G15 2630 G16 LTC2630-8 Integral Nonlinearity (INL) Differential Nonlinearity (DNL) 1.0 0.50 VCC = 3V VCC = 3V VFS = 2.5V VFS = 2.5V 0.5 0.25 NL (LSB) 0 NL (LSB) 0 I D –0.5 –0.25 –1.0 –0.50 0 64 128 192 255 0 64 128 192 255 CODE CODE 2630 G17 2630 G18 LTC2630 Load Regulation Current Limiting Offset Error vs Temperature 10 0.20 3 VCC = 5V (LTC2630-H) VCC = 5V (LTC2630-H) 8 VCC = 5V (LTC2630-L) 0.15 VCC = 5V (LTC2630-L) 6 VCC = 3V (LTC2630-L) VCC = 3V (LTC2630-L) 2 0.10 4 V) m 1 V (mV)ΔOUT –202 V(V)∆OUT –00..00505 SET ERROR ( 0 –4 OFF –1 –0.10 –6 –2 –8 INTERNAL REF. –0.15 INTERNAL REF. CODE = MIDSCALE CODE = MIDSCALE –10 –0.20 –3 –30 –20 –10 0 10 20 30 –30 –20 –10 0 10 20 30 –50 –25 0 25 50 75 100 125 150 IOUT (mA) IOUT (mA) TEMPERATURE (°C) 2630 G19 2630 G20 2630 G21 2630fg 10 For more information www.linear.com/LTC2630

LTC2630 typical perFormance characteristics LTC2630 Large-Signal Response Mid-Scale-Glitch Impulse Power-On Reset Glitch INTERNAL REF LTC2630-L CS/LD VCC 2V/DIV 5V/DIV 0.5V/DIV LTC2630-H12, VCC = 5V: 2.4nV-s TYP VOUT ZERO-SCALE 5mV/DIV VOUT LTC2630-L12, VCC = 3V: 2mV/DIV VFS = VCC = 5V 2.0nV-s TYP 1/4 SCALE TO 3/4 SCALE 2µs/DIV 2µs/DIV 200µs/DIV 2630 G22 2630 G23 2630 G24 Headroom at Rails vs Output Current Noise Voltage vs Frequency 0.1Hz to 10Hz Voltage Noise 5.0 500 5V SOURCING CODE = MIDSCALE VCC = 4V, VFS = 2.5V 4.5 CODE = MIDSCALE 4.0 400 3.5 Hz)√ V) 3.0 3V (LTC2630-L) SOURCING E (nV/ 300 V (OUT 22..50 VOLTAG 200 L(TVCC2C 6=3 50V-H) 10µV/DIV E 1.5 OIS 1.0 5V SINKING N 100 LTC2630-L (VCC = 4V) 0.5 3V (LTC2630-L) SINKING 0 0 0 1 2 3 4 5 6 7 8 9 10 100 1k 10k 100k 1M 1s/DIV IOUT (mA) FREQUENCY (Hz) 2630 G27 2630 G25 2630 G26 Exiting Power-Down to Mid-Scale Supply Current vs Logic Voltage 1.0 SWEEP SCK, SDI, CS/LD BETWEEN 0V AND VCC CS/LD 0.8 2V/DIV 0.6 VCC = 5V A) m (C VOUT IC 0.4 0.5V/DIV VCC = 3V (LTC2630-L) 0.2 LTC2630-H 0 4µs/DIV 0 1 2 3 4 5 2630 G28 LOGIC VOLTAGE (V) 2630 G29 2630fg 11 For more information www.linear.com/LTC2630

LTC2630 pin Functions CS/LD (Pin 1): Serial Interface Chip Select/Load Input. V (Pin 4): Supply Voltage Input. 2.7V ≤ V ≤ 5.5V CC CC When CS/LD is low, SCK is enabled for shifting data on (LTC2630-L) or 4.5V ≤ V ≤ 5.5V (LTC2630-H). Also CC SDI into the register. When CS/LD is taken high, SCK used as the reference input when the part is programmed is disabled and the specified command (see Table 1) is to operate in supply as reference mode. Bypass to GND executed. with a 0.1µF capacitor. SCK (Pin 2): Serial Interface Clock Input. CMOS and TTL GND (Pin 5): Ground. compatible. V (Pin 6): DAC Analog Voltage Output. OUT SDI (Pin 3): Serial Interface Data Input. Data on SDI is clocked into the DAC on the rising edge of SCK. The LTC2630 accepts input word lengths of either 24 or 32 bits. Block Diagram VCC INTERNAL REFERENCE SDI CONTROL RESISTOR DECODE LOGIC DIVIDER 24-BIT SCK SHIFT REGISTER DACREF CS/LD INPUT DAC VOUT DAC REGISTER REGISTER GND 2630 BD 2630fg 12 For more information www.linear.com/LTC2630

LTC2630 timing Diagram t1 t2 t3 t4 t6 SCK 1 2 3 23 24 t10 SDI t5 t7 CS/LD 2630 F01 Figure 1. Serial Interface Timing operation The LTC2630 is a family of single voltage output DACs in Transfer Function 6-lead SC70 packages. Each DAC can operate rail-to-rail The digital-to-analog transfer function is referenced to the input supply, or with its full-scale voltage set by an integrated reference. Twelve combinations of ⎛ k ⎞ V =⎜ ⎟V accuracy (12-, 10-, and 8-bit), power-on reset value (zero OUT(IDEAL) ⎝2N⎠ REF or mid-scale), and full-scale voltage (2.5V or 4.096V) are where k is the decimal equivalent of the binary DAC available. The LTC2630 is controlled using a 3-wire SPI/ input code, N is the resolution, and V is either 2.5V MICROWIRE compatible interface. REF (LTC2630-L) or 4.096V (LTC2630-H) in internal ref- Power-On Reset erence mode, and V in Supply as reference mode. CC The LTC2630-HZ/-LZ clear the output to zero scale when power is first applied, making system initialization con- Table 1. Command Codes sistent and repeatable. Command* For some applications, downstream circuits are active C3 C2 C1 C0 during DAC power-up, and may be sensitive to nonzero 0 0 0 0 Write to Input Register outputs from the DAC during this time. The LTC2630 con- 0 0 0 1 Update (Power up) DAC Register tains circuitry to reduce the power-on glitch: the analog 0 0 1 1 Write to and Update (Power up) DAC Register output typically rises less than 5mV above zero scale dur- 0 1 0 0 Power down ing power on if the power supply is ramped to 5V in 1ms 0 1 1 0 Select Internal Reference (Power-on Reset Default) or more. In general, the glitch amplitude decreases as 0 1 1 1 Select Supply as Reference (V = V ) REF CC the power supply ramp time is increased. See “Power-On *Command codes not shown are reserved and should not be used. Reset Glitch” in the Typical Performance Characteristics section. The LTC2630-HM/-LM provide an alternative reset, set- ting the output to mid-scale when power is first applied. 2630fg 13 For more information www.linear.com/LTC2630

LTC2630 operation INPUT WORD (LTC2630-12) COMMAND 4 DON'T-CARE BITS DATA (12 BITS + 4 DON'T-CARE BITS) C3 C2 C1 C0 X X X X D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 X X X X MSB LSB INPUT WORD (LTC2630-10) COMMAND 4 DON'T-CARE BITS DATA (10 BITS + 6 DON'T-CARE BITS) C3 C2 C1 C0 X X X X D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 X X X X X X MSB LSB INPUT WORD (LTC2630-8) COMMAND 4 DON'T-CARE BITS DATA (8 BITS + 8 DON'T-CARE BITS) C3 C2 C1 C0 X X X X D7 D6 D5 D4 D3 D2 D1 D0 X X X X X X X X MSB LSB 2630 F02 Figure 2. Command and Data Input Format Serial Interface The command (C3-C0) assignments are shown in Table 1. The first three commands in the table consist of write and The CS/LD input is level triggered. When this input is update operations. A Write operation loads a 16-bit data taken low, it acts as a chip-select signal, enabling the SDI word from the 24-bit shift register into the input register. and SCK buffers and the input shift register. Data (SDI In an Update operation, the input register is copied to input) is transferred at the next 24 rising SCK edges. The the DAC register and converted to an analog voltage at 4-bit command, C3-C0, is loaded first; then 4 don’t-care the DAC output. Write to and Update combines the first bits; and finally the 16-bit data word. The data word com- two commands. The Update operation also powers up the prises the 12-, 10- or 8-bit input code, ordered MSB-to- DAC if it had been in power-down mode. The data path LSB, followed by 4, 6 or 8 don’t-care bits (LTC2630-12, and registers are shown in the Block Diagram. -10 and -8 respectively; see Figure 2). Data can only be transferred to the device when the CS/LD signal is low, While the minimum input sequence is 24-bits, it may beginning on the first rising edge of SCK. SCK may be optionally be extended to 32-bits to accommodate micro- high or low at the falling edge of CS/LD. The rising edge processors that have a minimum word width of 16-bits of CS/LD ends the data transfer and causes the device (2 bytes). To use the 32-bit width, 8 don’t-care bits are to execute the command specified in the 24-bit input transferred to the device first, followed by the 24-bit sequence. The complete sequence is shown in Figure 3a. sequence described. Figure 3b shows the 32-bit sequence. The 16-bit data word is ignored for all commands that do not include a Write operation. 2630fg 14 For more information www.linear.com/LTC2630

LTC2630 operation CS/LD SCK 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 SDI C3 C2 C1 C0 X X X X D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 X X X X 2630 F03a COMMAND WORD 4 DON’T-CARE BITS DATA WORD 24-BIT INPUT WORD Figure 3a. 24-Bit Load Sequence (Minimum Input Word) LTC2630-12 SDI Data Word: 12-Bit Input Code + 4 Don’t-Care Bits (Shown); LTC2630-10 SDI Data Word: 10-Bit Input Code + 6 Don’t-Care Bits; LTC2630-8 SDI Data Word: 8-Bit Input Code + 8 Don’t-Care Bits CS/LD SCK 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 SDI X X X X X X X X C3 C2 C1 C0 X X X X D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 X X X X 8 DON’T-CARE BITS COMMAND WORD 4 DON’T-CARE BITS DATA WORD 2630 F03b 32-BIT INPUT WORD Figure 3b. 32-Bit Load Sequence LTC2630-12 SDI Data Word: 12-Bit Input Code + 4 Don’t-Care Bits (Shown); LTC2630-10 SDI Data Word: 10-Bit Input Code + 6 Don’t-Care Bits; LTC2630-8 SDI Data Word: 8-Bit Input Code + 8 Don’t-Care Bits 2630fg 15 For more information www.linear.com/LTC2630

LTC2630 operation Power-Down Mode Voltage Output For power-constrained applications, power-down mode The LTC2630’s integrated rail-to-rail amplifier has guar- can be used to reduce the supply current whenever the anteed load regulation when sourcing or sinking up to DAC output is not needed. When in power-down, the buf- 10mA at 5V, and 5mA at 3V. fer amplifier, bias circuit, and reference circuit are dis- Load regulation is a measure of the amplifier’s ability to abled and draw essentially zero current. The DAC output maintain the rated voltage accuracy over a wide range of is put into a high-impedance state, and the output pin load current. The measured change in output voltage per is passively pulled to ground through a 200kΩ resistor. change in forced load current is expressed in LSB/mA. Input and DAC register contents are not disturbed during power-down. DC output impedance is equivalent to load regulation, and may be derived from it by simply calculating a change in The DAC can be put into power-down mode by using units from LSB/mA to ohms. The amplifier’s DC output command 0100. The supply current is reduced to 1.8µA impedance is 0.1Ω when driving a load well away from maximum when the DAC is powered down. the rails. Normal operation resumes after executing any command When drawing a load current from either rail, the output that includes a DAC update, as shown in Table 1. The DAC voltage headroom with respect to that rail is limited by is powered up and its voltage output is updated. Normal the 50Ω typical channel resistance of the output devices settling is delayed while the bias, reference, and amplifier (e.g., when sinking 1mA, the minimum output voltage circuits are re-enabled. The power-up delay time is 18µs is 50Ω • 1mA, or 50mV). See the graph “Headroom at for settling to 12-bits. Rails vs. Output Current” in the Typical Performance Characteristics section. Reference Modes The amplifier is stable driving capacitive loads of up to For applications where an accurate external reference is 500pF. not available, the LTC2630 has a user-selectable, inte- grated reference. The LTC2630-LM and LTC2630-LZ pro- Rail-to-Rail Output Considerations vide a full-scale output of 2.5V. The LTC2630-HM and LTC2630-HZ provide a full-scale output of 4.096V. In any rail-to-rail voltage output device, the output is lim- ited to voltages within the supply range. The internal reference can be useful in applications where the supply voltage is poorly regulated. Internal Reference Since the analog output of the DAC cannot go below mode can be selected by using command 0110, and is ground, it may limit for the lowest codes as shown in the power-on default. Figure 4b. Similarly, limiting can occur near full scale when using the supply as reference. If V = V and the FS CC The DAC can also operate in supply as reference mode DAC full-scale error (FSE) is positive, the output for the using command 0111. In this mode, V supplies the CC highest codes limits at V , as shown in Figure 4. No CC DAC’s reference voltage and the supply current is reduced. full-scale limiting can occur if V is less than V –FSE. FS CC Offset and linearity are defined and tested over the region of the DAC transfer function where no output limiting can occur. 2630fg 16 For more information www.linear.com/LTC2630

LTC2630 operation Board Layout It is sometimes necessary to interrupt the ground plane to confine digital ground currents to the digital portion of The PC board should have separate areas for the analog the plane. When doing this, make the gap in the plane only and digital sections of the circuit. A single, solid ground as long as it needs to be to serve its purpose and ensure plane should be used, with analog and digital signals care- that no traces cross over the gap. fully routed over separate areas of the plane. This keeps digital signals away from sensitive analog signals and Opto-Isolated 4mA to 20mA Process Controller minimizes the interaction between digital ground currents and the analog section of the ground plane. The resistance Figure 5 shows how to use an LTC2630Hz to make an from the LTC2630 GND pin to the ground plane should opto-isolated, digitally-controlled 4mA to 20mA transmit- be as low as possible. Resistance here will add directly to ter. The transmitter circuitry, including opto-isolation, is the effective DC output impedance of the device (typically powered by the loop voltage which has a wide range of 0.1Ω). Note that the LTC2630 is no more susceptible to 5.4V to 80V. The 5V output of the LT®3010-5 is used to this effect than any other parts of this type; on the con- set the 4mA offset current and VOUT is used to digitally trary, it allows layout-based performance improvements control the 0mA to 16mA signal current. The supply cur- to shine rather than limiting attainable performance with rent for the regulator, DAC, and op amp is well below excessive internal resistance. the 4mA budget at zero scale. RS senses the total loop current, which includes the quiescent supply current and Another technique for minimizing errors is to use a sepa- additional current through Q1. Note that at the maximum rate power ground return trace on another board layer. loop voltage of 80V, Q1 will dissipate 1.6W when I = OUT The trace should run between the point where the power 20mA and must have an appropriate heat sink. supply is connected to the board and the DAC ground pin. Thus the DAC ground pin becomes the common point for ROFFSET and RGAIN are the closest 0.1% values to ideal analog ground, digital ground, and power ground. When for controlling a 4mA to 20mA output as the digital input the LTC2630 is sinking large currents, this current flows varies from zero scale to full scale. Alternatively, ROFFSET out the ground pin and directly to the power ground trace can be a 365k, 1% resistor in series with a 20k trim pot without affecting the analog ground plane voltage. and RGAIN can be a 75.0k, 1% resistor in series with a 5k trim pot. The opto-isolators shown will limit the speed of the serial bus; the 6N139 is an alternative that will allow higher data rates. 2630fg 17 For more information www.linear.com/LTC2630

LTC2630 operation E POSITIVFSE OUTPUTVOLTAGE 2630 F04 E D O = VREFCC INPUT C(c) V . ) s Bit - 2 1 r o n f w o h S ( 4,095 Curve Scale Transfer ear Full C o N = VVREFCC 2,048INPUT CODE (a) eration on a DA Codes Near ZerError for Codes OUTPUTVOLTAGE 0V0 ure 4. Effects of Rail-to-Rail Op(a) Overall Transfer Function (b) Effect of Negative Offset for (c) Effect of Positive Full-Scale g Fi E D O UT C (b) P N I TE V UG 0 PA OUTVOLT GATIVEOFFSET E N 2630fg 18 For more information www.linear.com/LTC2630

LTC2630 typical application 12-Bit, 2.7V to 5.5V Single Supply, Voltage Output DAC 2.7V TO 5.5V 0.1µF VCC SDI µP SCK LTC2630-LZ12 VOUT O0VU TTPOU 2T.5V OR 0V TO VCC CS/LD GND 2630 TA01 2630fg 19 For more information www.linear.com/LTC2630

LTC2630 package Description Please refer to http://www.linear.com/product/LTC2630#packaging for the most recent package drawings. SC6 Package 6-LSeCa6d PPalacsktaicg eSC70 6-Lead Plastic SC70 (Reference LTC DWG # 05-08-1638 Rev B) (Reference LTC DWG # 05-08-1638 Rev B) 0.47 0.65 1.80 – 2.20 MAX REF (NOTE 4) 1.00 REF INDEX AREA (NOTE 6) 1.15 – 1.35 2.8 BSC 1.8 REF 1.80 – 2.40 (NOTE 4) PIN 1 RECOMMENDED SOLDER PAD LAYOUT 0.15 – 0.30 0.65 BSC PER IPC CALCULATOR 6 PLCS (NOTE 3) 0.10 – 0.40 0.80 – 1.00 0.00 – 0.10 REF 1.00 MAX GAUGE PLANE 0.15 BSC 0.26 – 0.46 0.10 – 0.18 SC6 SC70 1205 REV B (NOTE 3) NOTE: 1. DIMENSIONS ARE IN MILLIMETERS 2. DRAWING NOT TO SCALE 3. DIMENSIONS ARE INCLUSIVE OF PLATING 4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR 5. MOLD FLASH SHALL NOT EXCEED 0.254mm 6. DETAILS OF THE PIN 1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE INDEX AREA 7. EIAJ PACKAGE REFERENCE IS EIAJ SC-70 8. JEDEC PACKAGE REFERENCE IS MO-203 VARIATION AB 2630fg 20 For more information www.linear.com/LTC2630

LTC2630 revision history (Revision history begins at Rev F) REV DATE DESCRIPTION PAGE NUMBER F 06/12 Corrected units on parameter V from mV/°C to µV/°C 6 OSTC G 06/17 Removed Note 3 7 2630fg Information furnished by Linear Technology Corporation is believed to be accurate and reliable. 21 However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconneFcotiro nm oof rites icnirfcouritms aast idoens cwribwewd h.leinreeina rw.cilol nmot/ LinTfrCin2g6e 3o0n existing patent rights.

LTC2630 typical application VLOOP 5.4V TO 80V ROFFSET 374k LT3010-5 0.1% IN OUT + SHDN SENSE 1µF 1µF GND FROM SDI LTCV2C6C30-HZ R706G.1.A8%IkN OPTO- SCK VOUT + ISOLATED 1k INPUTS CS/LD 3.01k LTC2054 Q2N13440 – 1000PF 10k RS 5V 10Ω OPTO-ISOLATORS 10k IOUT SDI SCK 2630 TA02 CS/LD SDI 500Ω 4N28 SCK CS/LD Figure 5. An Opto-Isolated 4mA to 20mA Process Controller relateD parts PART NUMBER DESCRIPTION COMMENTS LTC1660/LTC1665 Octal 10-/8-Bit V DACs in 16-Pin Narrow SSOP V = 2.7V to 5.5V, Micropower, Rail-to-Rail Output OUT CC LTC1663 Single 10-Bit V DAC in SOT-23 V = 2.7V to 5.5V, 60µA, Internal reference, SMBus Interface OUT CC LTC1664 Quad 10-Bit V DAC in 16-Pin Narrow SSOP V = 2.7V to 5.5V, Micropower, Rail-to-Rail Output OUT CC LTC1669 Single 10-Bit V DAC in SOT-23 V = 2.7V to 5.5V, 60µA, Internal reference, I2C Interface OUT CC LTC1821 Parallel 16-Bit Voltage Output DAC Precision 16-Bit Settling in 2µs for 10V Step LTC2600/LTC2610/LTC2620 Octal 16-/14-/12-Bit V DACs in 16-Lead SSOP 250µA per DAC, 2.5V to 5.5V Supply Range, Rail-to-Rail Output, OUT SPI Serial Interface LTC2601/LTC2611/LTC2621 Single 16-/14-/12-Bit V DACs in 10-Lead DFN 300µA per DAC, 2.5V to 5.5V Supply Range, Rail-to-Rail Output, OUT SPI Serial Interface LTC2602/LTC2612/LTC2622 Dual 16-/14-/12-Bit V DACs in 8-Lead MSOP 300µA per DAC, 2.5V to 5.5V Supply Range, Rail-to-Rail Output, OUT SPI Serial Interface LTC2604/LTC2614/LTC2624 Quad 16-/14-/12-Bit V DACs in 16-Lead SSOP 250µA per DAC, 2.5V to 5.5V Supply Range, Rail-to-Rail Output, OUT SPI Serial Interface LTC2631 Single 12-/10-/8-Bit I2C V DACs with 180µA per DAC, 2.7V to 5.5V Supply Range, 10ppm/°C Reference, OUT 10ppm/°C Reference in ThinSOT Selectable External Ref. Mode, Rail-to-Rail Output, I2C Interface LTC2640 Single 12-/10-/8-Bit SPI V DACs with 180µA per DAC, 2.7V to 5.5V Supply Range, 10ppm/°C Reference, OUT 10ppm/°C Reference in ThinSOT Selectable External Ref. Mode, Rail-to-Rail Output, SPI Interface 2630fg 22 LT 0617 REV G • PRINTED IN USA www.linear.com/LTC2630 For more information www.linear.com/LTC2630  LINEAR TECHNOLOGY CORPORATION 2007

Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: A nalog Devices Inc.: LTC2630ISC6-HM10#PBF LTC2630CSC6-HZ10#TRMPBF LTC2630ISC6-HZ12#TRPBF LTC2630ISC6- LM8#TRMPBF LTC2630CSC6-LM12#TRMPBF LTC2630ACSC6-HZ12#TRPBF LTC2630AISC6-LZ12#PBF LTC2630AHSC6-LM12#TRMPBF LTC2630ACSC6-HZ12#PBF LTC2630CSC6-HM12#TRPBF LTC2630HSC6- LZ12#PBF LTC2630ISC6-HZ10#TRPBF LTC2630HSC6-HM10#TRMPBF LTC2630HSC6-HM12#TRPBF LTC2630CSC6-LZ12#PBF LTC2630HSC6-HZ12#TRPBF LTC2630CSC6-LM12#PBF LTC2630ISC6-HM12#TRMPBF LTC2630HSC6-LM10#PBF LTC2630ISC6-LM12#PBF LTC2630AHSC6-HZ12#PBF LTC2630ISC6-LZ8#TRMPBF LTC2630CSC6-HM8#PBF LTC2630ISC6-LZ10#TRPBF LTC2630AHSC6-HM12#TRMPBF LTC2630ISC6- HM8#TRMPBF LTC2630HSC6-LZ10#TRMPBF LTC2630CSC6-HZ12#TRMPBF LTC2630AHSC6-LZ12#TRMPBF LTC2630ISC6-HM12#TRPBF LTC2630ISC6-HZ8#TRPBF LTC2630AHSC6-LZ12#TRPBF LTC2630AISC6- HM12#TRPBF LTC2630CSC6-HM10#TRMPBF LTC2630ACSC6-LZ12#TRPBF LTC2630CSC6-LM8#TRPBF LTC2630HSC6-HZ8#TRMPBF LTC2630CSC6-HZ10#TRPBF LTC2630HSC6-HM10#TRPBF LTC2630ISC6- LM8#TRPBF LTC2630ACSC6-LZ12#TRMPBF LTC2630CSC6-LM8#PBF LTC2630HSC6-HM8#PBF LTC2630HSC6- LZ10#TRPBF LTC2630ISC6-LM10#PBF LTC2630ISC6-HM12#PBF LTC2630ISC6-LZ12#PBF LTC2630ISC6- HZ8#PBF LTC2630CSC6-LM12#TRPBF LTC2630HSC6-HZ10#TRMPBF LTC2630ISC6-HM8#TRPBF LTC2630CSC6-LZ10#TRMPBF LTC2630HSC6-LM12#TRMPBF LTC2630AISC6-LZ12#TRMPBF LTC2630CSC6- HM10#TRPBF LTC2630CSC6-HZ8#TRPBF LTC2630AHSC6-HM12#TRPBF LTC2630ISC6-HZ8#TRMPBF LTC2630CSC6-LZ12#TRPBF LTC2630HSC6-LM10#TRMPBF LTC2630HSC6-LZ8#PBF LTC2630CSC6-LZ8#PBF LTC2630HSC6-LM10#TRPBF LTC2630CSC6-HZ12#PBF LTC2630CSC6-LZ10#TRPBF LTC2630ISC6- LM10#TRMPBF LTC2630HSC6-LZ12#TRMPBF LTC2630CSC6-HZ8#PBF LTC2630HSC6-HM8#TRMPBF LTC2630ISC6-LZ10#TRMPBF LTC2630AISC6-LZ12#TRPBF LTC2630CSC6-HM12#PBF LTC2630AISC6-HZ12#PBF LTC2630ACSC6-LZ12#PBF LTC2630AHSC6-HZ12#TRMPBF LTC2630CSC6-LZ10#PBF LTC2630AHSC6- HM12#PBF LTC2630ISC6-LM12#TRMPBF LTC2630CSC6-LM10#TRMPBF LTC2630ISC6-HZ12#PBF LTC2630HSC6-LZ8#TRMPBF LTC2630CSC6-LZ8#TRMPBF LTC2630HSC6-HZ10#TRPBF LTC2630AHSC6- LM12#TRPBF LTC2630ISC6-LZ8#TRPBF LTC2630AISC6-LM12#TRMPBF LTC2630HSC6-HZ12#PBF LTC2630ISC6-LZ8#PBF LTC2630ACSC6-LM12#TRMPBF LTC2630ISC6-HM8#PBF LTC2630HSC6-LM8#PBF LTC2630AISC6-HZ12#TRMPBF LTC2630ISC6-LM10#TRPBF LTC2630CSC6-HZ10#PBF LTC2630HSC6- HZ12#TRMPBF LTC2630HSC6-HM8#TRPBF LTC2630AHSC6-HZ12#TRPBF LTC2630CSC6-HZ8#TRMPBF LTC2630ISC6-HZ10#TRMPBF LTC2630AISC6-HM12#PBF