LTC2378-16 16-Bit, 1Msps, Low Power SAR ADC with 97dB SNR FeaTures DescripTion n 1Msps Throughput Rate The LTC®2378-16 is a low noise, low power, high speed n ±0.5LSB INL (Max) 16-bit successive approximation register (SAR) ADC. Op- n Guaranteed 16-Bit No Missing Codes erating from a 2.5V supply, the LTC2378-16 has a ±V REF n Low Power: 13.5mW at 1Msps, 13.5µW at 1ksps fully differential input range with V ranging from 2.5V REF n 97dB SNR (Typ) at f = 2kHz to 5.1V. The LTC2378-16 consumes only 13.5mW and IN n –122dB THD (Typ) at f = 2kHz achieves ±0.5LSB INL maximum, no missing codes at IN n Digital Gain Compression (DGC) 16 bits with 97dB SNR. n Guaranteed Operation to 125°C The LTC2378-16 has a high speed SPI-compatible serial n 2.5V Supply interface that supports 1.8V, 2.5V, 3.3V and 5V logic n Fully Differential Input Range ±V REF while also featuring a daisy-chain mode. The fast 1Msps n V Input Range from 2.5V to 5.1V REF throughput with no cycle latency makes the LTC2378-16 n No Pipeline Delay, No Cycle Latency ideally suited for a wide variety of high speed applications. n 1.8V to 5V I/O Voltages An internal oscillator sets the conversion time, easing exter- n SPI-Compatible Serial I/O with Daisy-Chain Mode nal timing considerations. The LTC2378-16 automatically n Internal Conversion Clock powers down between conversions, leading to reduced n 16-Lead MSOP and 4mm × 3mm DFN Packages power dissipation that scales with the sampling rate. applicaTions The LTC2378-16 features a unique digital gain compres- n Medical Imaging sion (DGC) function, which eliminates the driver amplifier’s n High Speed Data Acquisition negative supply while preserving the full resolution of the n Portable or Compact Instrumentation ADC. When enabled, the ADC performs a digital scaling n Industrial Process Control function that maps zero-scale code from 0V to 0.1 • VREF n Low Power Battery-Operated Instrumentation and full-scale code from VREF to 0.9 • VREF. For a typical n ATE reference voltage of 5V, the full-scale input range is now 0.5V to 4.5V, which provides adequate headroom for L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and SoftSpan is a trademark of Linear Technology Corporation. All other trademarks are the powering the driving amplifier from a single 5.5V supply. property of their respective owners. Typical applicaTion 32k Point FFT f = 1Msps, f = 2kHz S IN 2.5V 1.8V TO 5V 0 SNR = 97.2dB 10µF 0.1µF –20 THD = –121.7dB SINAD = 97.1dB –40 SFDR = 128dB VREF 20Ω 6800pF VDD OVDD CHAIN S) –60 0V + IN+ RDSLD/SODI E (dBF –80 3300pF LTC2378-16 SCK D VREF – IN– BCUNSVY SAMPLE CLOCK PLITU–100 0V 20Ω 6800pF RREEFF GND REF/DGC VREF AM–120 2.5V TO 5.1V 237816 TA01 –140 47µF –160 (X5R, 0805 SIZE) –180 0 100 200 300 400 500 FREQUENCY (kHz) 237816 TA02 237816fa 1 For more information www.linear.com/LTC2378-16

LTC2378-16 absoluTe MaxiMuM raTings (Notes 1, 2) Supply Voltage (V ) ...............................................2.8V Digital Output Voltage DD Supply Voltage (OV ) ................................................6V (Note 3) ...........................(GND –0.3V) to (OV + 0.3V) DD DD Reference Input (REF) .................................................6V Power Dissipation ..............................................500mW Analog Input Voltage (Note 3) Operating Temperature Range IN+, IN– .........................(GND –0.3V) to (REF + 0.3V) LTC2378C ................................................0°C to 70°C REF/DGC Input (Note 3) ....(GND –0.3V) to (REF + 0.3V) LTC2378I .............................................–40°C to 85°C Digital Input Voltage LTC2378H ..........................................–40°C to 125°C (Note 3) ...........................(GND –0.3V) to (OV + 0.3V) Storage Temperature Range ..................–65°C to 150°C DD pin conFiguraTion TOP VIEW CHAIN 1 16 GND TOP VIEW VDD 2 15 OVDD CHAIN 1 16 GND GND 3 14 SDO VDD 2 15 OVDD IN+ 4 17 13 SCK GND 3 14 SDO IN– 5 GND 12 RDL/SDI IINN+– 45 1132 SRCDKL/SDI GND 6 11 BUSY GND 6 11 BUSY REF 7 10 GND REF 7 10 GND REF/DGC 8 9 CNV REF/DGC 8 9 CNV MS PACKAGE DE PACKAGE 16-LEAD PLASTIC MSOP 16-LEAD (4mm × 3mm) PLASTIC DFN TJMAX = 150°C, θJA = 110°C/W TJMAX = 150°C, θJA = 40°C/W EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB orDer inForMaTion http://www.linear.com/product/LTC2378-16#orderinfo LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LTC2378CMS-16#PBF LTC2378CMS-16#TRPBF 237816 16-Lead Plastic MSOP 0°C to 70°C LTC2378IMS-16#PBF LTC2378IMS-16#TRPBF 237816 16-Lead Plastic MSOP –40°C to 85°C LTC2378HMS-16#PBF LTC2378HMS-16#TRPBF 237816 16-Lead Plastic MSOP –40°C to 125°C LTC2378CDE-16#PBF LTC2378CDE-16#TRPBF 23786 16-Lead (4mm × 3mm) Plastic DFN 0°C to 70°C LTC2378IDE-16#PBF LTC2378IDE-16#TRPBF 23786 16-Lead (4mm × 3mm) Plastic DFN –40°C to 85°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix. 237816fa 2 For more information www.linear.com/LTC2378-16

LTC2378-16 elecTrical characTerisTics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T = 25°C. (Note 4) A SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V + Absolute Input Range (IN+) (Note 5) l –0.05 V + 0.05 V IN REF V – Absolute Input Range (IN–) (Note 5) l –0.05 V + 0.05 V IN REF V + – V – Input Differential Voltage Range V = V + – V – l –V +V V IN IN IN IN IN REF REF V Common-Mode Input Range l V /2– V /2 V /2+ V CM REF REF REF 0.1 0.1 I Analog Input Leakage Current l ±1 µA IN C Analog Input Capacitance Sample Mode 45 pF IN Hold Mode 5 pF CMRR Input Common Mode Rejection Ratio f = 500kHz 86 dB IN converTer characTerisTics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T = 25°C. (Note 4) A SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Resolution l 16 Bits No Missing Codes l 16 Bits Transition Noise 0.15 LSB RMS INL Integral Linearity Error (Note 6) l –0.5 ±0.2 0.5 LSB DNL Differential Linearity Error l –0.5 ±0.1 0.5 LSB BZE Bipolar Zero-Scale Error (Note 7) l –4 0 4 LSB Bipolar Zero-Scale Error Drift 1 mLSB/°C FSE Bipolar Full-Scale Error (Note 7) l –13 ±2 13 LSB Bipolar Full-Scale Error Drift ±0.05 ppm/°C DynaMic accuracy The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T = 25°C and A = –1dBFS. (Notes 4, 8) A IN SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS SINAD Signal-to-(Noise + Distortion) Ratio f = 2kHz, V = 5V l 94.6 97 dB IN REF f = 2kHz, V = 5V, (H-Grade) l 94.5 97 dB IN REF SNR Signal-to-Noise Ratio f = 2kHz, V = 5V l 95.3 97 dB IN REF f = 2kHz, V = 5V, REF/DGC = GND l 94.5 96.4 dB IN REF f = 2kHz, V = 2.5V l 92.1 95 dB IN REF f = 2kHz, V = 5V, (H-Grade) l 95.2 97 dB IN REF f = 2kHz, V = 5V, REF/DGC = GND, (H-Grade) l 94.3 96.4 dB IN REF f = 2kHz, V = 2.5V, (H-Grade) l 91.8 95 dB IN REF THD Total Harmonic Distortion f = 2kHz, V = 5V l –122 –103 dB IN REF f = 2kHz, V = 5V, REF/DGC = GND l –126 –101 dB IN REF f = 2kHz, V = 2.5V l –122 –102 dB IN REF SFDR Spurious Free Dynamic Range f = 2kHz, V = 5V l 104 123 dB IN REF –3dB Input Bandwidth 34 MHz Aperture Delay 500 ps Aperture Jitter 4 ps Transient Response Full-Scale Step 460 ns 237816fa 3 For more information www.linear.com/LTC2378-16

LTC2378-16 reFerence inpuT The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T = 25°C. (Note 4) A SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V Reference Voltage (Note 5) l 2.5 5.1 V REF I Reference Input Current (Note 9) l 0.65 0.75 mA REF V High Level Input Voltage REF/DGC Pin l 0.8V V IHDGC REF V Low Level Input Voltage REF/DGC Pin l 0.2V V ILDGC REF DigiTal inpuTs anD DigiTal ouTpuTs The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T = 25°C. (Note 4) A SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V High Level Input Voltage l 0.8 • OV V IH DD V Low Level Input Voltage l 0.2 • OV V IL DD I Digital Input Current V = 0V to OV l –10 10 µA IN IN DD C Digital Input Capacitance 5 pF IN V High Level Output Voltage I = –500µA l OV –0.2 V OH O DD V Low Level Output Voltage I = 500µA l 0.2 V OL O I Hi-Z Output Leakage Current V = 0V to OV l –10 10 µA OZ OUT DD I Output Source Current V = 0V –10 mA SOURCE OUT I Output Sink Current V = OV 10 mA SINK OUT DD power requireMenTs The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T = 25°C. (Note 4) A SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V Supply Voltage l 2.375 2.5 2.625 V DD OV Supply Voltage l 1.71 5.25 V DD I Supply Current 1Msps Sample Rate l 5.4 6.3 mA VDD I Supply Current 1Msps Sample Rate (C = 20pF) 0.2 mA OVDD L I Power Down Mode Conversion Done (I + I + I ) l 0.9 90 µA PD VDD OVDD REF I Power Down Mode Conversion Done (I + I + I , H-Grade) l 0.9 140 µA PD VDD OVDD REF P Power Dissipation 1Msps Sample Rate 13.5 15.8 mW D Power Down Mode Conversion Done (I + I + I ) 2.25 225 µW VDD OVDD REF Power Down Mode Conversion Done (I + I + I , H-Grade) 2.25 315 µW VDD OVDD REF aDc TiMing characTerisTics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T = 25°C. (Note 4) A SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS f Maximum Sampling Frequency l 1 Msps SMPL t Conversion Time l 460 527 ns CONV t Acquisition Time t = t – t – t (Note 10) l 460 ns ACQ ACQ CYC CONV BUSYLH t Time Between Conversions l 1 µs CYC t CNV High Time l 20 ns CNVH tBUSYLH CNV↑ to BUSY Delay CL = 20pF l 13 ns t Minimum Low Time for CNV (Note 11) l 20 ns CNVL tQUIET SCK Quiet Time from CNV↑ (Note 10) l 20 ns t SCK Period (Notes 11, 12) l 10 ns SCK 237816fa 4 For more information www.linear.com/LTC2378-16

LTC2378-16 aDc TiMing characTerisTics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T = 25°C. (Note 4) A SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS t SCK High Time l 4 ns SCKH t SCK Low Time l 4 ns SCKL tSSDISCK SDI Setup Time From SCK↑ (Note 11) l 4 ns tHSDISCK SDI Hold Time From SCK↑ (Note 11) l 1 ns t SCK Period in Chain Mode t = t + t (Note 11) l 13.5 ns SCKCH SCKCH SSDISCK DSDO tDSDO SDO Data Valid Delay from SCK↑ CL = 20pF (Note 11) l 9.5 ns tHSDO SDO Data Remains Valid Delay from SCK↑ CL = 20pF (Note 10) l 1 ns tDSDOBUSYL SDO Data Valid Delay from BUSY↓ CL = 20pF (Note 10) l 5 ns tEN Bus Enable Time After RDL↓ (Note 11) l 16 ns tDIS Bus Relinquish Time After RDL↑ (Note 11) l 13 ns Note 1: Stresses beyond those listed under Absolute Maximum Ratings Note 7: Bipolar zero-scale error is the offset voltage measured from may cause permanent damage to the device. Exposure to any Absolute –0.5LSB when the output code flickers between 0000 0000 0000 0000 and Maximum Rating condition for extended periods may effect device 1111 1111 1111 1111. Full-scale bipolar error is the worst-case of –FS reliability and lifetime. or +FS untrimmed deviation from ideal first and last code transitions and Note 2: All voltage values are with respect to ground. includes the effect of offset error. Note 3: When these pin voltages are taken below ground or above REF or Note 8: All specifications in dB are referred to a full-scale ±5V input with a OV , they will be clamped by internal diodes. This product can handle 5V reference voltage. DD input currents up to 100mA below ground or above REF or OV without Note 9: f = 1MHz, I varies proportionately with sample rate. DD SMPL REF latch-up. Note 10: Guaranteed by design, not subject to test. Note 4: VDD = 2.5V, OVDD = 2.5V, REF = 5V, VCM = 2.5V, fSMPL = 1MHz, Note 11: Parameter tested and guaranteed at OVDD = 1.71V, OVDD = 2.5V REF/DGC = VREF. and OVDD = 5.25V. Note 5: Recommended operating conditions. Note 12: t of 10ns maximum allows a shift clock frequency up to SCK Note 6: Integral nonlinearity is defined as the deviation of a code from a 100MHz for rising capture. straight line passing through the actual endpoints of the transfer curve. The deviation is measured from the center of the quantization band. 0.8*OVDD tWIDTH 0.2*OVDD tDELAY tDELAY 50% 50% 0.8*OVDD 0.8*OVDD 237816 F01 0.2*OVDD 0.2*OVDD Figure 1. Voltage Levels for Timing Specifications 237816fa 5 For more information www.linear.com/LTC2378-16

LTC2378-16 Typical perForMance characTerisTics T = 25°C, V = 2.5V, OV = 2.5V, V = 2.5V, A DD DD CM REF = 5V, f = 1Msps, unless otherwise noted. SMPL Integral Nonlinearity Differential Nonlinearity vs Output Code vs Output Code DC Histogram 1.0 0.5 140000 σ = 0.15 0.8 0.4 120000 0.6 0.3 NL ERROR (LSB) –0000....0242 NL ERROR (LSB)–0000....2101 COUNTS1068000000000000 I –0.4 D–0.2 40000 –0.6 –0.3 20000 –0.8 –0.4 –1.0 –0.5 0 –32768 –16384 0 16384 32768 –32768 –16384 0 16384 32768 –2 –1 0 1 2 OUTPUT CODE OUTPUT CODE CODE 237816 G01 237816 G02 237816 G03 32k Point FFT f = 1Msps, THD, Harmonics S f = 2kHz SNR, SINAD vs Input Frequency vs Input Frequency IN 0 98.0 –80 SNR = 97.2dB THD –20 THD = –121.7dB 97.5 SNR 2ND SINAD = 97.1dB –90 3RD –40 SFDR = 128dB 97.0 S) dBFS) –60 dBFS)9966..50 D (dBF–100 E ( –80 D ( SINAD TH MPLITUD––110200 NR, SINA9955..05 MONICS, ––112100 A S94.5 R A –140 H 94.0 –130 –160 93.5 –180 93.0 –140 0 100 200 300 400 500 0 25 50 75 100 125 150 175 200 0 25 50 75 100 125 150 175 200 FREQUENCY (kHz) FREQUENCY (kHz) FREQUENCY (kHz) 237816 G04 237816 G05 237816 G06 SNR, SINAD vs Input level, SNR, SINAD vs Reference THD, Harmonics vs Reference f = 2kHz Voltage, f = 2kHz Voltage, f = 2kHz IN IN IN 98.0 98.0 –100 –105 97.5 –110 97.5 97.0 S) dBFS) SNR dBFS)96.5 SNR D (dBF ––112105 R, SINAD ( 97.0 SINAD R, SINAD (9956..50 SINAD ONICS, TH ––113205 THD 3RD N N M S S R –135 96.5 95.0 HA 2ND –140 94.5 –145 96.0 94.0 –150 –40 –30 –20 –10 0 2.5 3.0 3.5 4.0 4.5 5.0 2.5 3.0 3.5 4.0 4.5 5.0 INPUT LEVEL (dB) REFERENCE VOLTAGE (V) REFERENCE VOLTAGE (V) 237816 G07 237816 G08 237816 G09 237816fa 6 For more information www.linear.com/LTC2378-16

LTC2378-16 Typical perForMance characTerisTics T = 25°C, V = 2.5V, OV = 2.5V, V = 2.5V, A DD DD CM REF = 5V, f = 1Msps, unless otherwise noted. SMPL SNR, SINAD vs Temperature, THD, Harmonics vs Temperature, f = 2kHz f = 2kHz INL/DNL vs Temperature IN IN 98.0 –110 0.5 –115 0.3 SNR, SINAD (dBFS) 999767...550 SINAD SNR HARMONICS, THD (dBFS) –––111322050 3RD THD INL/DNL ERROR (LSB)–00..11 MMAAXX DINNLL MMIINN DINNLL –135 2ND –0.3 96.0 –140 –0.5 –55 –35 –15 5 25 45 65 85 105 125 –55 –35 –15 5 25 45 65 85 105 125 –55 –35 –15 5 25 45 65 85 105 125 TEMPERATURE (°C) TEMPERATURE (°C) TEMPERATURE (°C) 237816 G10 237816 G11 237816 G12 Full-Scale Error vs Temperature Offset Error vs Temperature Supply Current vs Temperature 2.0 1.0 6 IVDD 1.5 –FS A) 5 ULL-SCALE ERROR (LSB) ––1010....00505 OFFSET ERROR (LSB) –00..550 WER SUPPLY CURRENT (m 234 F O P 1 IREF –1.5 +FS IOVDD –2.0 –1.0 0 –55 –35 –15 5 25 45 65 85 105 125 –55 –35 –15 5 25 45 65 85 105 125 –55 –35 –15 5 25 45 65 85 105 125 TEMPERATURE (°C) TEMPERATURE (°C) TEMPERATURE (°C) 237816 G13 237816 G14 237816 G15 Reference Current Shutdown Current vs Temperature CMRR vs Input Frequency vs Reference Voltage 45 100 0.7 IVDD + IOVDD + IREF 40 0.6 95 µA) 35 A) R-DOWN CURRENT ( 31220505 CMRR (dB) 889500 RENCE CURRENT (m 000...543 OWE 10 REFE 0.2 P 75 0.1 5 0 70 0 –55 –35 –15 5 25 45 65 85 105 125 0 125 250 375 500 2.5 3.0 3.5 4.0 4.5 5.0 TEMPERATURE (°C) FREQUENCY (kHz) REFERENCE VOLTAGE (V) 237816 G16 237816 G17 237816 G18 237816fa 7 For more information www.linear.com/LTC2378-16

LTC2378-16 pin FuncTions CHAIN (Pin 1): Chain Mode Selector Pin. When low, the BUSY (Pin 11): BUSY Indicator. Goes high at the start of LTC2378-16 operates in normal mode and the RDL/SDI a new conversion and returns low when the conversion input pin functions to enable or disable SDO. When high, has finished. Logic levels are determined by 0V . DD the LTC2378-16 operates in chain mode and the RDL/SDI RDL/SDI (Pin 12): When CHAIN is low, the part is in nor- pin functions as SDI, the daisy-chain serial data input. mal mode and the pin is treated as a bus enabling input. Logic levels are determined by 0V . DD When CHAIN is high, the part is in chain mode and the V (Pin 2): 2.5V Power Supply. The range of V is pin is treated as a serial data input pin where data from DD DD 2.375V to 2.625V. Bypass V to GND with a 10µF ceramic another ADC in the daisy-chain is input. Logic levels are DD capacitor. determined by 0V . DD GND (Pins 3, 6, 10 and 16): Ground. SCK (Pin 13): Serial Data Clock Input. When SDO is enabled, the conversion result or daisy-chain data from another IN+, IN– (Pins 4, 5): Positive and Negative Differential ADC is shifted out on the rising edges of this clock MSB Analog Inputs. first. Logic levels are determined by 0V . DD REF (Pin 7): Reference Input. The range of REF is 2.5V SDO (Pin 14): Serial Data Output. The conversion result or to 5.1V. This pin is referred to the GND pin and should be daisy-chain data is output on this pin on each rising edge decoupled closely to the pin with a 47µF ceramic capacitor of SCK MSB first. The output data is in 2’s complement (X5R, 0805 size). format. Logic levels are determined by 0V . DD REF/DGC (Pin 8): When tied to REF, digital gain compression OV (Pin 15): I/O Interface Digital Power. The range of is disabled and the LTC2378-16 defines full-scale accord- DD OV is 1.71V to 5.25V. This supply is nominally set to ing to the ±V analog input range. When tied to GND, DD REF the same supply as the host interface (1.8V, 2.5V, 3.3V, digital gain compression is enabled and the LTC2378-16 or 5V). Bypass OV to GND with a 0.1µF capacitor. defines full-scale with inputs that swing between 10% and DD 90% of the ±V analog input range. GND (Exposed Pad Pin 17 – DFN Package Only): Ground. REF Exposed pad must be soldered directly to the ground plane. CNV (Pin 9): Convert Input. A rising edge on this input powers up the part and initiates a new conversion. Logic levels are determined by 0V . DD FuncTional block DiagraM VDD = 2.5V REF = 5V OVDD = 1.8V to 5V LTC2378-16 CHAIN IN+ + SDO SPI RDL/SDI 16-BIT SAMPLING ADC PORT SCK IN– – CNV BUSY CONTROL LOGIC REF/DGC GND 237816 BD01 237816fa 8 For more information www.linear.com/LTC2378-16

LTC2378-16 TiMing DiagraM Conversion Timing Using the Serial Interface CHAIN, RDL/SDI = 0 CNV POWER-DOWN AND ACQUIRE BUSY CONVERT SCK D15D14D13D12D11D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 SDO 237816 TD01 237816fa 9 For more information www.linear.com/LTC2378-16

LTC2378-16 applicaTions inForMaTion OVERVIEW TRANSFER FUNCTION The LTC2378-16 is a low noise, low power, high speed 16-bit The LTC2378-16 digitizes the full-scale voltage of 2 × REF successive approximation register (SAR) ADC. Operating into 216 levels, resulting in an LSB size of 152µV with from a single 2.5V supply, the LTC2378-16 supports a REF = 5V. The ideal transfer function is shown in Figure 2. large and flexible ±VREF fully differential input range with The output data is in 2’s complement format. V ranging from 2.5V to 5.1V, making it ideal for high REF performance applications which require a wide dynamic T) 011...111 range. The LTC2378-16 achieves ±0.5LSB INL max, no N E 011...110 BIPOLAR M missing codes at 16 bits and 97dB SNR. E ZERO L P M O 000...001 Fast 1Msps throughput with no cycle latency makes the C S 000...000 LTC2378-16 ideally suited for a wide variety of high speed WO’ T 111...111 applications. An internal oscillator sets the conversion time, DE ( 111...110 O easing external timing considerations. The LTC2378-16 T C U dissipates only 13.5mW at 1Msps, while an auto power- TP 100...001 FSR = +FS – –FS U O 100...000 1LSB = FSR/65536 down feature is provided to further reduce power dissipa- tion during inactive periods. –FSR/2 –1 0V 1 FSR/2 – 1LSB LSB LSB The LTC2378-16 features a unique digital gain compres- INPUT VOLTAGE (V) 237816 F02 sion (DGC) function, which eliminates the driver amplifier’s Figure 2. LTC2378-16 Transfer Function negative supply while preserving the full resolution of the ANALOG INPUT ADC. When enabled, the ADC performs a digital scaling function that maps zero-scale code from 0V to 0.1 • V The analog inputs of the LTC2378-16 are fully differential REF and full-scale code from V to 0.9 • V . For a typical in order to maximize the signal swing that can be digitized. REF REF reference voltage of 5V, the full-scale input range is now The analog inputs can be modeled by the equivalent circuit 0.5V to 4.5V, which provides adequate headroom for shown in Figure 3. The diodes at the input provide ESD powering the driving amplifier from a single 5.5V supply. protection. In the acquisition phase, each input sees ap- proximately 45pF (C ) from the sampling CDAC in series IN with 40Ω (R ) from the on-resistance of the sampling CONVERTER OPERATION ON switch. Any unwanted signal that is common to both The LTC2378-16 operates in two phases. During the ac- inputs will be reduced by the common mode rejection of quisition phase, the charge redistribution capacitor D/A the ADC. The inputs draw a current spike while charging converter (CDAC) is connected to the IN+ and IN– pins the C capacitors during acquisition. During conversion, IN to sample the differential analog input voltage. A rising the analog inputs draw only a small leakage current. edge on the CNV pin initiates a conversion. During the REF conversion phase, the 16-bit CDAC is sequenced through a CIN RON 45pF successive approximation algorithm, effectively comparing 40Ω IN+ the sampled input with binary-weighted fractions of the reference voltage (e.g. V /2, V /4 … V /65536) using REF REF REF BIAS the differential comparator. At the end of conversion, the REF VOLTAGE CDAC output approximates the sampled analog input. The RON 4C5IpNF 40Ω ADC control logic then prepares the 16-bit digital output IN– code for serial transfer. 237816 F03 Figure 3. The Equivalent Circuit for the Differential Analog Input of the LTC2378-16 237816fa 10 For more information www.linear.com/LTC2378-16

LTC2378-16 applicaTions inForMaTion INPUT DRIVE CIRCUITS High quality capacitors and resistors should be used in the RC filters since these components can add distortion. NPO A low impedance source can directly drive the high im- and silver mica type dielectric capacitors have excellent pedance inputs of the LTC2378-16 without gain error. A linearity. Carbon surface mount resistors can generate high impedance source should be buffered to minimize distortion from self heating and from damage that may settling time during acquisition and to optimize the dis- occur during soldering. Metal film surface mount resistors tortion performance of the ADC. Minimizing settling time are much less susceptible to both problems. is important even for DC inputs, because the ADC inputs draw a current spike when entering acquisition. Single-Ended-to-Differential Conversion For best performance, a buffer amplifier should be used For single-ended input signals, a single-ended to differential to drive the analog inputs of the LTC2378-16. The ampli- conversion circuit must be used to produce a differential fier provides low output impedance, which produces fast signal at the inputs of the LTC2378-16. The LT6350 ADC settling of the analog signal during the acquisition phase. driver is recommended for performing single-ended-to- It also provides isolation between the signal source and differential conversions. The LT6350 is flexible and may the current spike the ADC inputs draw. be configured to convert single-ended signals of various amplitudes to the ±5V differential input range of the Input Filtering LTC2378-16. The LT6350 is also available in H-grade to The noise and distortion of the buffer amplifier and signal complement the extended temperature operation of the source must be considered since they add to the ADC noise LTC2378-16 up to 125°C. and distortion. Noisy input signals should be filtered prior Figure 5a shows the LT6350 being used to convert a 0V to the buffer amplifier input with an appropriate filter to to 5V single-ended input signal. In this case, the first minimize noise. The simple 1-pole RC lowpass filter (LPF1) amplifier is configured as a unity gain buffer and the single- shown in Figure 4 is sufficient for many applications. ended input signal directly drives the high-impedance input of the amplifier. As shown in the FFT of Figure 5b, LPF2 the LT6350 drives the LTC2378-16 to near full data sheet 6800pF SINGLE-ENDED- performance. INPUT SIGNAL LPF1 20Ω IN+ 500Ω 3300pF The LT6350 can also be used to buffer and convert large LTC2378-16 true bipolar signals which swing below ground to the ±5V 6600pF IN– 20Ω differential input range of the LTC2378-16 in order to SINGLE-ENDED- 6800pF 237816 F04 maximize the signal swing that can be digitized. Figure 6a BW = 48kHz TO-DIFFERENTIAL DRIVER shows the LT6350 being used to convert a ±10V true bi- BW = 600kHz polar signal for use by the LTC2378-16. In this case, the Figure 4. Input Signal Chain first amplifier in the LT6350 is configured as an inverting Another filter network consisting of LPF2 should be used amplifier stage, which acts to attenuate and level shift the between the buffer and ADC input to both minimize the input signal to the 0V to 5V input range of the LTC2378-16. noise contribution of the buffer and to help minimize distur- In the inverting amplifier configuration, the single-ended bances reflected into the buffer from sampling transients. input signal source no longer directly drives a high imped- Long RC time constants at the analog inputs will slow ance input of the first amplifier. The input impedance is down the settling of the analog inputs. Therefore, LPF2 instead set by resistor RIN. RIN must be chosen carefully requires a wider bandwidth than LPF1. A buffer amplifier based on the source impedance of the signal source. with a low noise density must be selected to minimize Higher values of RIN tend to degrade both the noise and degradation of the SNR. distortion of the LT6350 and LTC2378-16 as a system. 237816fa 11 For more information www.linear.com/LTC2378-16

LTC2378-16 applicaTions inForMaTion LT6350 5V VCM 5V 4 OUT1 R2 = 499Ω 8 + RINT RINT 0V 200pF 0V 1 – LT6350 4 OUT1 5V – 5V 8 + RINT RINT 0V 2 + 5 OUT2 0V 10µF RR34 == 24k02Ω – – 5V +– VCM = VREF/2 1 2 + 5 OUT2 0V 237816 F05a 100VV RIN = 2k R1 = 499Ω +– VCM = VREF/2 Figure 5a. LT6350 Converting a 0V-5V Single-Ended –10V Signal to a ±5V Differential Input Signal 220pF 237816 F06a Figure 6a. LT6350 Converting a ±10V Single-Ended Signal 0 to a ±5V Differential Input Signal SNR = 96.5dB –20 THD = –108.7dB SINAD = 96.2dB –40 SFDR = 109.4dB 0 SNR = 96.3dB S) –60 –20 THD = –100.9dB dBF SINAD = 95.2dB E ( –80 –40 SFDR = 103.3dB D LITU–100 BFS) –60 P d AM–120 DE ( –80 U –140 T–100 LI P –160 M–120 A –180 –140 0 100 200 300 400 500 FREQUENCY (kHz) –160 237816 F05b –180 Figure 5b. 32k Point FFT Plot with f = 2kHz 0 100 200 300 400 500 IN FREQUENCY (kHz) for Circuit Shown in Figure 5a 237816 F06b Figure 6b. 32k Point FFT Plot with f = 2kHz R1, R2, R3 and R4 must be selected in relation to R to IN IN for Circuit Shown in Figure 6a achieve the desired attenuation and to maintain a balanced input impedance in the first amplifier. Table 1 shows the 5V LT6203 resulting SNR and THD for several values of RIN, R1, R2, 3 + 5V R3 and R4 in this configuration. Figure 6b shows the re- 0V 2 – 1 0V sulting FFT when using the LT6350 as shown in Figure 6a. 5V 5 + 5V Table 1. SNR, THD vs RIN for ±10V Single-Ended Input Signal. 0V 6 – 7 0V R R1 R2 R3 R4 SNR THD IN (Ω) (Ω) (Ω) (Ω) (Ω) (dB) (dB) 237816 F07 2k 499 499 2k 402 96.3 –101 Figure 7. LT6203 Buffering a Fully Differential Signal Source 10k 2.49k 2.49k 10k 2k 96.3 –92 100k 24.9k 24.9k 100k 20k 96.3 –98 Digital Gain Compression The LTC2378-16 offers a digital gain compression (DGC) Fully Differential Inputs feature which defines the full-scale input swing to be be- tween 10% and 90% of the ±V analog input range. To To achieve the full distortion performance of the REF enable digital gain compression, bring the REF/DGC pin LTC2378-16, a low distortion fully differential signal source low. This feature allows the LT6350 to be powered off of driven through the LT6203 configured as two unity gain a single +5.5V supply since each input swings between buffers as shown in Figure 7 can be used to get the full 0.5V and 4.5V as shown in Figure 8. Needing only one data sheet THD specification of –122dB. 237816fa 12 For more information www.linear.com/LTC2378-16

LTC2378-16 applicaTions inForMaTion 5V many applications. With its small size, low power and 4.5V high accuracy, the LTC6655-5 is particularly well suited for use with the LTC2378-16. The LTC6655-5 offers 0.025% (max) initial accuracy and 2ppm/°C (max) temperature coefficient for high precision applications. The LTC6655-5 0.5V 0V 237816 F08 is fully specified over the H-grade temperature range and Figure 8. Input Swing of the LTC2378 with Gain complements the extended temperature operation of the Compression Enabled LTC2378-16 up to 125°C. We recommend bypassing the LTC6655-5 with a 47µF ceramic capacitor (X5R, 0805 positive supply to power the LT6350 results in additional size) close to the REF pin. power savings for the entire system. The REF pin of the LTC2378-16 draws charge (Q ) from Figure 9a shows how to configure the LT6350 to accept a CONV the 47µF bypass capacitor during each conversion cycle. ±10V true bipolar input signal and attenuate and level shift The reference replenishes this charge with a DC current, the signal to the reduced input range of the LTC2378-16 I = Q /t . The DC current draw of the REF pin, when digital gain compression is enabled. Figure 9b REF CONV CYC I , depends on the sampling rate and output code. If shows an FFT plot with the LTC2378-16 being driven by REF the LTC2378-16 is used to continuously sample a signal the LT6350 with digital gain compression enabled. at a constant rate, the LTC6655-5 will keep the deviation of the reference voltage over the entire code span to less ADC REFERENCE than 0.5LSBs. The LTC2378-16 requires an external reference to define When idling, the REF pin on the LTC2378-16 draws only its input range. A low noise, low temperature drift refer- a small leakage current (< 1µA). In applications where a ence is critical to achieving the full data sheet performance burst of samples is taken after idling for long periods as of the ADC. Linear Technology offers a portfolio of high shown in Figure 10, I quickly goes from approximately REF performance references designed to meet the needs of 5.5V VIN LTC6655-5 0 VOUT_F SNR = 95.5dB 5V VOUT_S –20 THD = –97.6dB 1k –40 SSIFNDARD = = 9 993.5.8ddBB 10µF 1kVCM LT6350 V+ 3 OUT1 04..55VV 684070µpFF 2.5V DE (dBFS) ––6800 6.04k 8 + RINT RINT 4 20Ω IN+REF VDD PLITU–100 M–120 4.32k 10µF – 3300pF LTC2378-16 A – 20Ω IN– –140 1 2 + V– 5 OUT2 4.5V 6800pF RE2F3/7D81G6 FC09a –160 6 –180 10V RIN = 15k 3.01k 0.5V 0 100 200 300 400 500 0V VCM FREQUENCY (kHz) –10V 237816 F09b Figure 9a. LT6350 Configured to Accept a ±10V Input Signal While Running Off of a Figure 9b. 32k Point FFT Plot Single 5.5V Supply When Digital Gain Compression Is Enabled in the LTC2378-16 with f = 2kHz for Circuit Shown IN in Figure 9a CNV IDLE IDLE PERIOD PERIOD 237816 F10 Figure 10. CNV Waveform Showing Burst Sampling 237816fa 13 For more information www.linear.com/LTC2378-16

LTC2378-16 applicaTions inForMaTion 0µA to a maximum of 0.75mA at 1Msps. This step in DC Signal-to-Noise Ratio (SNR) current draw triggers a transient response in the reference The signal-to-noise ratio (SNR) is the ratio between the that must be considered since any deviation in the refer- RMS amplitude of the fundamental input frequency and ence output voltage will affect the accuracy of the output the RMS amplitude of all other frequency components code. In applications where the transient response of the except the first five harmonics and DC. Figure 11 shows reference is important, the fast settling LTC6655-5 refer- that the LTC2378-16 achieves a typical SNR of 97dB at a ence is also recommended. 1MHz sampling rate with a 2kHz input. DYNAMIC PERFORMANCE Total Harmonic Distortion (THD) Fast Fourier Transform (FFT) techniques are used to test Total Harmonic Distortion (THD) is the ratio of the RMS sum the ADC’s frequency response, distortion and noise at the of all harmonics of the input signal to the fundamental itself. rated throughput. By applying a low distortion sine wave The out-of-band harmonics alias into the frequency band and analyzing the digital output using an FFT algorithm, between DC and half the sampling frequency (f /2). SMPL the ADC’s spectral content can be examined for frequen- THD is expressed as: cies outside the fundamental. The LTC2378-16 provides 2 2 2 2 guaranteed tested limits for both AC distortion and noise V2 +V3 +V4 +…+V N THD=20log measurements. V1 Signal-to-Noise and Distortion Ratio (SINAD) where V1 is the RMS amplitude of the fundamental fre- quency and V2 through V are the amplitudes of the second The signal-to-noise and distortion ratio (SINAD) is the N through Nth harmonics. ratio between the RMS amplitude of the fundamental input frequency and the RMS amplitude of all other frequency components at the A/D output. The output is band-limited POWER CONSIDERATIONS to frequencies from above DC and below half the sampling The LTC2378-16 provides two power supply pins: the frequency. Figure 11 shows that the LTC2378-16 achieves 2.5V power supply (V ), and the digital input/output DD a typical SINAD of 97dB at a 1MHz sampling rate with a interface power supply (OV ). The flexible OV supply DD DD 2kHz input. allows the LTC2378-16 to communicate with any digital logic operating between 1.8V and 5V, including 2.5V and 0 SNR = 97.2dB 3.3V systems. –20 THD = –121.7dB SINAD = 97.1dB –40 SFDR = 128dB Power Supply Sequencing S) –60 BF The LTC2378-16 does not have any specific power supply d DE ( –80 sequencing requirements. Care should be taken to adhere U T–100 LI to the maximum voltage relationships described in the P M–120 A Absolute Maximum Ratings section. The LTC2378-16 –140 has a power-on-reset (POR) circuit that will reset the –160 LTC2378-16 at initial power-up or whenever the power –180 supply voltage drops below 1V. Once the supply voltage 0 100 200 300 400 500 FREQUENCY (kHz) re-enters the nominal supply voltage range, the POR will 237816 F11 reinitialize the ADC. No conversions should be initiated Figure 11. 32k Point FFT with f = 2kHz of the LTC2378-16 IN until 20µs after a POR event to ensure the reinitialization period has ended. Any conversions initiated before this time will produce invalid results. 237816fa 14 For more information www.linear.com/LTC2378-16

LTC2378-16 applicaTions inForMaTion TIMING AND CONTROL DIGITAL INTERFACE The LTC2378-16 has a serial digital interface. The flexible CNV Timing OV supply allows the LTC2378-16 to communicate with DD The LTC2378-16 conversion is controlled by CNV. A ris- any digital logic operating between 1.8V and 5V, including ing edge on CNV will start a conversion and power up 2.5V and 3.3V systems. the LTC2378-16. Once a conversion has been initiated, The serial output data is clocked out on the SDO pin when it cannot be restarted until the conversion is complete. an external clock is applied to the SCK pin if SDO is enabled. For optimum performance, CNV should be driven by a Clocking out the data after the conversion will yield the clean low jitter signal. Converter status is indicated by the best performance. With a shift clock frequency of at least BUSY output which remains high while the conversion is 40MHz, a 1Msps throughput is still achieved. The serial in progress. To ensure that no errors occur in the digitized output data changes state on the rising edge of SCK and results, any additional transitions on CNV should occur can be captured on the falling edge or next rising edge of within 40ns from the start of the conversion or after the SCK. D15 remains valid till the first rising edge of SCK. conversion has been completed. Once the conversion has completed, the LTC2378-16 powers down and begins The serial interface on the LTC2378-16 is simple and acquiring the input signal. straightforward to use. The following sections describe the operation of the LTC2378-16. Several modes are provided Internal Conversion Clock depending on whether a single or multiple ADCs share the The LTC2378-16 has an internal clock that is trimmed to SPI bus or are daisy-chained. achieve a maximum conversion time of 527ns. With a min- imum acquisition time of 460ns, throughput performance 6 of 1Msps is guaranteed without any external adjustments. A) 5 Auto Power-Down m T ( EN 4 IVDD The LTC2378-16 automatically powers down after a R R U conversion has been completed and powers up once a LY C 3 P new conversion is initiated on the rising edge of CNV. P U During power down, data from the last conversion can R S 2 E W be clocked out. To minimize power dissipation during O P 1 IREF power down, disable SDO and turn off SCK. The auto IOVDD power-down feature will reduce the power dissipation of 0 0 1002003004005006007008009001000 the LTC2378-16 as the sampling frequency is reduced. SAMPLING RATE (kHz) 237816 F12 Since power is consumed only during a conversion, the Figure 12. Power Supply Current of the LTC2378-16 LTC2378-16 remains powered-down for a larger fraction of Versus Sampling Rate the conversion cycle (t ) at lower sample rates, thereby CYC reducing the average power dissipation which scales with the sampling rate as shown in Figure 12. 237816fa 15 For more information www.linear.com/LTC2378-16

LTC2378-16 applicaTions inForMaTion Normal Mode, Single Device Figure 13 shows a single LTC2378-16 operated in normal mode with CHAIN and RDL/SDI tied to ground. With RDL/ When CHAIN = 0, the LTC2378-16 operates in normal SDI grounded, SDO is enabled and the MSB(D15) of the mode. In normal mode, RDL/SDI enables or disables the new conversion data is available at the falling edge of serial data output pin SDO. If RDL/SDI is high, SDO is in BUSY. This is the simplest way to operate the LTC2378-16. high impedance. If RDL/SDI is low, SDO is driven. CONVERT CNV DIGITAL HOST CHAIN BUSY IRQ LTC2378-16 RDL/SDI SDO DATA IN SCK CLK 237816 F13a POWER-DOWN CONVERT POWER-DOWN AND ACQUIRE CONVERT AND ACQUIRE CHAIN = 0 RDL/SDI = 0 tCYC tCNVH tCNVL CNV tACQ = tCYC – tCONV – tBUSYLH BUSY tCONV tACQ tBUSYLH tSCK tSCKH tQUIET SCK 1 2 3 14 15 16 tHSDO tSCKL tDSDOBUSYL tDSDO SDO D15 D14 D13 D1 D0 237816 F13 Figure 13. Using a Single LTC2378-16 in Normal Mode 237816fa 16 For more information www.linear.com/LTC2378-16

LTC2378-16 applicaTions inForMaTion Normal Mode, Multiple Devices Since SDO is shared, the RDL/SDI input of each ADC must be used to allow only one LTC2378-16 to drive SDO at a Figure 14 shows multiple LTC2378-16 devices operating time in order to avoid bus conflicts. As shown in Figure 14, in normal mode (CHAIN = 0) sharing CNV, SCK and SDO. the RDL/SDI inputs idle high and are individually brought By sharing CNV, SCK and SDO, the number of required low to read data out of each device between conversions. signals to operate multiple ADCs in parallel is reduced. When RDL/SDI is brought low, the MSB of the selected device is output onto SDO. RDLB RDLA CONVERT CNV CNV CHAIN CHAIN BUSY IRQ LTC2378-16 LTC2378-16 DIGITAL HOST SDO SDO B A RDL/SDI RDL/SDI SCK SCK DATA IN CLK 237816 F14a POWER-DOWN CONVERT POWER-DOWN AND ACQUIRE CONVERT AND ACQUIRE CHAIN = 0 tCNVL CNV tCONV BUSY tBUSYLH RDL/SDIA RDL/SDIB tSCK tSCKH tQUIET SCK 1 2 3 14 15 16 17 18 19 30 31 32 tHSDO tSCKL tDSDO tDIS tEN SDO Hi-Z Hi-Z Hi-Z D15A D14A D13A D1A D0A D15B D14B D13B D1B D0B 237816 F14 Figure 14. Normal Mode With Multiple Devices Sharing CNV, SCK and SDO 237816fa 17 For more information www.linear.com/LTC2378-16

LTC2378-16 applicaTions inForMaTion Chain Mode, Multiple Devices This is useful for applications where hardware constraints may limit the number of lines needed to interface to a large When CHAIN = OV , the LTC2378-16 operates in chain DD number of converters. Figure 15 shows an example with mode. In chain mode, SDO is always enabled and RDL/SDI two daisy-chained devices. The MSB of converter A will serves as the serial data input pin (SDI) where daisy-chain appear at SDO of converter B after 16 SCK cycles. The data output from another ADC can be input. MSB of converter A is clocked in at the SDI/RDL pin of converter B on the rising edge of the first SCK. CONVERT OVDD OVDD CHAIN CNV CHAIN CNV DIGITAL HOST LTC2378-16 LTC2378-16 RDL/SDI SDO RDL/SDI BUSY IRQ A B SDO DATA IN SCK SCK CLK 237816 F16a POWER-DOWN CONVERT POWER-DOWN AND ACQUIRE CONVERT AND ACQUIRE CHAIN = OVDD RDL/SDIA = 0 tCYC tCNVL CNV BUSY tCONV tBUSYLH tSCKCH tSCKH tQUIET SCK 1 2 3 14 15 16 17 18 30 31 32 tSCKL tSSDISCK tHSDO tHSDISCK tDSDO SDOA = RDL/SDIB D15A D14A D13A D1A D0A tDSDOBUSYL SDOB D15B D14B D13B D1B D0B D15A D14A D1A D0A 237816 F15 Figure 15. Chain Mode Timing Diagram 237816fa 18 For more information www.linear.com/LTC2378-16

LTC2378-16 boarD layouT To obtain the best performance from the LTC2378-16 Recommended Layout a printed circuit board is recommended. Layout for the The following is an example of a recommended PCB layout. printed circuit board (PCB) should ensure the digital and A single solid ground plane is used. Bypass capacitors to analog signal lines are separated as much as possible. In the supplies are placed as close as possible to the supply particular, care should be taken not to run any digital clocks pins. Low impedance common returns for these bypass or signals alongside analog signals or underneath the ADC. capacitors are essential to the low noise operation of the ADC. The analog input traces are screened by ground. For more details and information refer to DC1783A, the evaluation kit for the LTC2378-16. Partial Top Silkscreen 237816fa 19 For more information www.linear.com/LTC2378-16

LTC2378-16 boarD layouT Partial Layer 1 Component Side Partial Layer 2 Ground Plane 237816fa 20 For more information www.linear.com/LTC2378-16

LTC2378-16 boarD layouT Partial Layer 3 PWR Plane Partial Layer 4 Bottom Layer 237816fa 21 For more information www.linear.com/LTC2378-16

LTC2378-16 boarD layouT Partial Schematic of Demo Board D +3.3VC40.1µF U4NC7SVU04P5X5CNVST_332FROM CPL3 DB17 DB16 J2DGE 40-100 403836343230282624222018161412108642 237816 BL R133Ω +3.3VC30.1µF 12 CPD48R4+3.3VVGNDCC33Ω674CLR\PR\U3Q\QNL17SZ74C205C56347µF0.1µFR86.3V33Ω0805JP6DC590 DETECTFSTO CPLD1VREFCON-E2+3.3V393C130.8VREF37DB00.1µF35DB1HD1X3-100U633DB2OPTNC7SZ66P5X531DB3CNVV29DB4CC8912BA27DB5CCNVG13SCK25DB6DSCK/OE4F23DB7SDO14ESDOR21DB8GNDBUSY11BUSY19DB9317DB1012RDRDL/SDI15DB1113DB12R7+3.3V11DB131k9DB14U97DB15C15NC7SZ04P5X550.1µF243CLKOUTC1611R13R1730.1µF1k2k U7C14R12R11R1024LC025-I/ST80.1µF4.99k4.99k4.99kVCCSCL6SCKSDA5WP7CNVARRAY3A2EEPROM2A11A0 VSS4 7 FER 6 DNG 1 U20LTC6655AHMS8-518SHDNGND27VOUT_FIN36OUT_SGND45GNDGND +3.3V C7C60.1µF10µF+2.5V6.3V C10C90.1µF10µF6.3V C395R166800pF120ΩNPO4DDDDVV+INOC193300pFR19LTC2378-11206 NPO0Ω–INDDDNNNC405GGG6800pF066311NPOR38OPT 9V TOJ310VDC5901234SDO567891011121314 O 10V C110.1µF R31OPT R3220Ω R45ØΩ R3620Ω R35OPT 9V T C58OPT C600.1µF 8 +3.3V+3.3VC1C20.1µF0.1µF R355CLK33Ω442TO CPLD U8U233NC7SZ04P5XNC7SVU04P5X LINGDC +V U1573LT6350CMS3R32V+SHDN0Ω+IN18+OUT14C42–R915pFOPT–IN1 C6110µF6.3V–OUT25+IN22+R18R341k0Ω6–C45VR3710µFOPT C55C62+V1µF1µF–VC570.1µFC6310µF6.3VR40C43C591k0.1µF1µF C441µF C49R41OPTOPT +3.3V R21kC50.1µFJ12LKINR5R649.9Ω1k1206 COUPAC JP1HD1X3-100 C1712R1410µF0Ω R15C18OPTOPT +2.5V C81µF JP2CM1V2REF/2 3EXTE7HD1X3-100MC461µF COUPLINGAC DC JP5HD1X3-100 123R390Ω C47C48OPT10µF6.3V C J4+AIN EXT_C J8–AIN 237816fa 22 For more information www.linear.com/LTC2378-16

LTC2378-16 package DescripTion Please refer to http://www.linear.com/product/LTC2378-16#packaging for the most recent package drawings. DE Package 16-Lead Plastic DFN (4mm × 3mm) DE Package (Reference LTC DWG # 05-08-1732 Rev Ø) 16-Lead Plastic DFN (4mm × 3mm) (Reference LTC DWG # 05-08-1732 Rev Ø) 0.70 ±0.05 3.60 ±0.05 3.30 ±0.05 2.20 ±0.05 1.70 ±0.05 PACKAGE OUTLINE 0.25 ±0.05 0.45 BSC 3.15 REF RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 4.00 ±0.10 R = 0.115 0.40 ±0.10 TYP (2 SIDES) 9 16 R = 0.05 TYP 3.30 ±0.10 3.00 ±0.10 (2 SIDES) 1.70 ±0.10 PIN 1 NOTCH PIN 1 R = 0.20 OR TOP MARK 0.35 × 45° (SEE NOTE 6) CHAMFER (DE16) DFN 0806 REV Ø 8 1 0.200 REF 0.75 ±0.05 0.23 ±0.05 0.45 BSC 3.15 REF 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WGED-3) IN JEDEC PACKAGE OUTLINE MO-229 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 237816fa 23 For more information www.linear.com/LTC2378-16

LTC2378-16 package DescripTion Please refer to http://www.linear.com/product/LTC2378-16#packaging for the most recent package drawings. MS Package 16-Lead Plastic MSOP MS Package (Reference LTC DWG # 05-08-1669 Rev A) 16-Lead Plastic MSOP (Reference LTC DWG # 05-08-1669 Rev A) 0.889 ±0.127 (.035 ±.005) 5.10 3.20 – 3.45 (.201) (.126 – .136) MIN 4.039 ±0.102 0.305 ±0.038 0.50 (.159 ±.004) (.0120 ±.0015) (.0197) (NOTE 3) 0.280 ±0.076 TYP BSC 16151413121110 9 (.011 ±.003) RECOMMENDED SOLDER PAD LAYOUT REF DETAIL “A” 3.00 ±0.102 0.254 4.90 ±0.152 (.118 ±.004) (.010) 0° – 6° TYP (.193 ±.006) (NOTE 4) GAUGE PLANE 0.53 ±0.152 1234567 8 (.021 ±.006) 1.10 0.86 (.043) (.034) DETAIL “A” MAX REF 0.18 (.007) SEATING PLANE 0.17 – 0.27 0.1016 ±0.0508 (.007 – .011) (.004 ±.002) TYP 0.50 NOTE: (.0197) MSOP (MS16) 0213 REV A 1. DIMENSIONS IN MILLIMETER/(INCH) BSC 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 237816fa 24 For more information www.linear.com/LTC2378-16

LTC2378-16 revision hisTory REV DATE DESCRIPTION PAGE NUMBER A 08/16 Updated graphs G01, G02, and G03 6 237816fa Information furnished by Linear Technology Corporation is believed to be accurate and reliable. 25 However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the intercoFnonerc mtioonr oef iitnsf coirrcmuiatsti aosn d weswcrwib.eldin heearer.inc owmill /nLoTt iCn2fr3in7g8e -o1n6 existing patent rights.

LTC2378-16 Typical applicaTion LT6350 Configured to Accept a ±10V Input Signal While Running Off of a Single 5.5V Supply When Digital Gain Compression Is Enabled in the LTC2378-16 55..55VV VIN LTC6655-5 VOUT_F 5V VOUT_S 1k VCM 47µF 4.5V 10µF 1k LT6350 V+ 3 6800pF 2.5V OUT1 0.5V 6.04k 4 REF VDD 8 + RINT RINT 20Ω IN+ 4.32k 10µF – 3300pF LTC2378-16 – 20Ω IN– 5 REF/DGC 1 2 + V– OUT2 4.5V 6800pF 237816 TA03 6 10V RIN = 15k 3.01k 0.5V 0V VCM –10V relaTeD parTs PART NUMBER DESCRIPTION COMMENTS ADCs LTC2379-18 18-Bit, 1.6Msps Serial, Low Power ADC 2.5V Supply, Differential Input, 101.2dB SNR, ±5V Input Range, DGC, MSOP-16 and 4mm × 3mm DFN-16 Packages LTC2380-16 16-Bit, 2Msps Serial, Low Power ADC 2.5V Supply, Differential Input, 96.2dB SNR, ±5V Input Range, DGC, MSOP-16 and 4mm × 3mm DFN-16 Packages LTC2383-16/LTC2382-16/ 16-Bit, 1Msps/500ksps/250ksps Serial, Low Power 2.5V Supply, Differential Input, 92dB SNR, ±2.5V Input Range, Pin LTC2381-16 ADC Compatible Family in MSOP-16 and 4mm × 3mm DFN-16 Packages LTC2393-16/LTC2392-16/ 16-Bit, 1Msps/500ksps/250ksps Parallel/Serial ADC 5V Supply, Differential Input, 94dB SNR, ±4.096V Input Range, Pin LTC2391-16 Compatible Family in 7mm × 7mm LQFP-48 and QFN-48 Packages LTC2365 12-Bit, 1Msps Serial ADC 2.35V to 3.6V Supply 6- and 8-Lead TSOT-23 Packages LTC2355-14/LTC2356-14 14-Bit, 3.5Msps Serial ADC 3.3V Supply, 1-Channel, Unipolar/Bipolar, 18mW, MSOP-10 Package DACS LTC2757 18-Bit, Single Parallel IOUT SoftSpan™ DAC ±1LSB INL/DNL, Software-Selectable Ranges, 7mm × 7mm LQFP-48 Package LTC2641 16-Bit/14-Bit/12-Bit Single Serial V DACs ±1LSB INL/DNL, MSOP-8 Package, 0V to 5V Output OUT LTC2630 12-Bit/10-Bit/8-Bit Single V DACs SC70 6-Pin Package, Internal Reference, ±1LSB INL (12 Bits) OUT REFERENCES LTC6655 Precision Low Drift Low Noise Buffered Reference 5V/2.5V, 5ppm/°C, 0.25ppm Peak-to-Peak Noise, MSOP-8 Package LTC6652 Precision Low Drift Low Noise Buffered Reference 5V/2.5V, 5ppm/°C, 2.1ppm Peak-to-Peak Noise, MSOP-8 Package AMPLIFIERS LT6350 Low Noise Single-Ended-to-Differential ADC Driver Rail-to-Rail Input and Outputs, 240ns, 0.01% Settling Time LT6200/LT6200-5/ 165MHz/800MHz/1.6GHz Op Amp with Low Noise Voltage: 0.95nV/√Hz (100kHz), Low Distortion: –80dB at LT6200-10 Unity Gain/AV = 5/AV = 10 1MHz, TSOT23-6 Package LT6202/LT6203 Single/Dual 100MHz Rail-to-Rail Input/Output Noise 1.9nV√Hz, 3mA Maximum, 100MHz Gain Bandwidth Low Power Amplifiers LTC1992 Low Power, Fully Differential Input/Output Amplifier/ 1mA Supply Current Driver Family 237816fa 26 Linear Technology Corporation LT 0816 REV A • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 For more information www.linear.com/LTC2378-16 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com/LTC2378-16  LINEAR TECHNOLOGY CORPORATION 2011

Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: A nalog Devices Inc.: LTC2378IMS-16#PBF LTC2378IMS-16#TRPBF LTC2378CDE-16#PBF LTC2378HMS-16#TRPBF LTC2378IDE- 16#PBF LTC2378CMS-16#TRPBF LTC2378HMS-16#PBF LTC2378IDE-16#TRPBF LTC2378CDE-16#TRPBF LTC2378CMS-16#PBF