LTC2053/LTC2053-SYNC Precision, Rail-to-Rail, Zero-Drift, Resistor-Programmable Instrumentation Amplifier FeaTures DescripTion n 116dB CMRR Independent of Gain The LTC®2053 is a high precision instrumentation ampli- n Maximum Offset Voltage: 10µV fier. The CMRR is typically 116dB with a single or dual n Maximum Offset Voltage Drift: 50nV/°C 5V supply and is independent of gain. The input offset n Rail-to-Rail Input voltage is guaranteed below 10µV with a temperature n Rail-to-Rail Output drift of less than 50nV/°C. The LTC2053 is easy to use; n 2-Resistor Programmable Gain the gain is adjustable with two external resistors, like a n Supply Operation: 2.7V to ±5.5V traditional op amp. n Typical Noise: 2.5µV (0.01Hz to 10Hz) P-P The LTC2053 uses charge balanced sampled data tech- n Typical Supply Current: 750µA niques to convert a differential input voltage into a single n LTC2053-SYNC Allows Synchronization to ended signal that is in turn amplified by a zero-drift op- External Clock erational amplifier. n Available in MS8 and 3mm × 3mm × 0.8mm DFN Packages The differential inputs operate from rail-to-rail and the single-ended output swings from rail-to-rail. The LTC2053 can be used in single-supply applications, as low as 2.7V. applicaTions It can also be used with dual ±5.5V supplies. The LTC2053 n Thermocouple Amplifiers requires no external clock, while the LTC2053-SYNC has n Electronic Scales a CLK pin to synchronize to an external clock. n Medical Instrumentation The LTC2053 is available in an MS8 surface mount pack- n Strain Gauge Amplifiers age. For space limited applications, the LTC2053 is avail- n High Resolution Data Acquisition able in a 3mm × 3mm × 0.8mm dual fine pitch leadless package (DFN). L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Typical applicaTion Typical Input Referred Offset vs Input Common Mode Voltage (V = 3V) S Differential Bridge Amplifier 15 3V VS = 3V 0.1µF VREF = 0V R < 10k µV) 10 TA = 25°C 8 E ( 2 G 5 – A T 7 OL 3 +LTC20553 6R2 10k OUT FFSET V 0 G = 1000 G = 100 1, 4 T O –5 R2 U GAIN = 1+ P G = 10 N R1 I–10 0.1µF G = 1 R1 10Ω –15 0 0.5 1.0 1.5 2.0 2.5 3.0 2053 TA01 INPUT COMMON MODE VOLTAGE (V) 2053 TA01b 2053syncfd 1 For more information www.linear.com/LTC2053

LTC2053/LTC2053-SYNC absoluTe MaxiMuM raTings (Note 1) Total Supply Voltage (V+ to V–) .................................11V Storage Temperature Range Input Current ........................................................±10mA MS8 Package .....................................–65°C to 150°C |V – V | ...........................................................5.5V DD Package .......................................–65°C to 125°C –IN REF |V+IN – VREF| ............................................................5.5V Lead Temperature (Soldering, 10 sec) ...................300°C Output Short-Circuit Duration ..........................Indefinite Operating Temperature Range LTC2053C, LTC2053C-SYNC ...................0°C to 70°C LTC2053I, LTC2053I-SYNC ..................–40°C to 85°C LTC2053H ..........................................–40°C to 125°C pin conFiguraTion TOP VIEW EN 1 8 V+ TOP VIEW –IN 2 7 OUT EN/CLK† 1 8V+ 9 –IN 2 7OUT +IN 3 6 RG +IN 3 6RG V– 4 5 REF V– 4 5REF MS8 PACKAGE 8-LEAD PLASTIC MSOP DD PACKAGE 8-LEAD (3mm × 3mm) PLASTIC DFN TJMAX = 150°C, θJA = 200°C/W †PIN 1 IS EN ON LTC2053, CLK ON LTC2053-SYNC TJMAX = 125°C, θJA = 160°C/W , UNDERSIDE METAL INTERNALLY CONNECTED TO V– (PCB CONNECTION OPTIONAL) orDer inForMaTion LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LTC2053CDD#PBF LTC2053CDD#TRPBF LAEQ 8-Lead (3mm × 3mm) Plastic DFN 0°C to 70°C LTC2053IDD#PBF LTC2053IDD#TRPBF LAEQ 8-Lead (3mm × 3mm) Plastic DFN –40°C to 85°C LTC2053HDD#PBF LTC2053HDD#TRPBF LAEQ 8-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C LTC2053CMS8#PBF LTC2053CMS8#TRPBF LTVT 8-Lead Plastic MSOP 0°C to 70°C LTC2053IMS8#PBF LTC2053IMS8#TRPBF LTJY 8-Lead Plastic MSOP –40°C to 85°C LTC2053HMS8#PBF LTC2053HMS8#TRPBF LTAFB 8-Lead Plastic MSOP –40°C to 125°C LTC2053CMS8-SYNC#PBF LTC2053CMS8-SYNC#TRPBF LTBNP 8-Lead Plastic MSOP 0°C to 70°C LTC2053IMS8-SYNC#PBF LTC2053IMS8-SYNC#TRPBF LTBNP 8-Lead Plastic MSOP –40°C to 85°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix. 2053syncfd 2 For more information www.linear.com/LTC2053

LTC2053/LTC2053-SYNC elecTrical characTerisTics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T = 25°C. V+ = 3V, V– = 0V, REF = 200mV. Output voltage swing is referenced A to V–. All other specifications reference the OUT pin to the REF pin. PARAMETER CONDITIONS MIN TYP MAX UNITS Gain Error A = 1 l 0.001 0.01 % V Gain Nonlinearity A = 1, LTC2053 l 3 12 ppm V A = 1, LTC2053-SYNC l 3 15 ppm V Input Offset Voltage (Note 2) V = 200mV –5 ±10 µV CM Average Input Offset Drift (Note 2) T = –40°C to 85°C l ±50 nV/°C A T = 85°C to 125°C l –1 –2.5 µV/°C A Average Input Bias Current (Note 3) V = 1.2V l 4 10 nA CM Average Input Offset Current (Note 3) V = 1.2V l 1 3 nA CM Input Noise Voltage DC to 10Hz 2.5 µV P-P Common Mode Rejection Ratio A = 1, V = 0V to 3V, LTC2053C, LTC2053C-SYNC l 100 113 dB V CM (Notes 4, 5) A = 1, V = 0.1V to 2.9V, LTC2053I, LTC2053I-SYNC l 100 113 dB V CM A = 1, V = 0V to 3V, LTC2053I, LTC2053I-SYNC l 95 113 dB V CM A = 1, V = 0.1V to 2.9V, LTC2053H l 100 dB V CM A = 1, V = 0V to 3V, LTC2053H l 85 dB V CM Power Supply Rejection Ratio (Note 6) V = 2.7V to 6V l 110 116 dB S Output Voltage Swing High R = 2k to V– l 2.85 2.94 V L R = 10k to V– l 2.95 2.98 V L Output Voltage Swing Low l 20 mV Supply Current No Load l 0.75 1 mA Supply Current, Shutdown V ≥ 2.5V, LTC2053 Only 10 µA EN EN/CLK Pin Input Low Voltage, V 0.5 V IL EN/CLK Pin Input High Voltage, V 2.5 V IH EN/CLK Pin Input Current V = V– –0.5 –10 µA EN/CLK Internal Op Amp Gain Bandwidth 200 kHz Slew Rate 0.2 V/µs Internal Sampling Frequency 3 kHz The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T = 25°C. A V+ = 5V, V– = 0V, REF = 200mV. Output voltage swing is referenced to V–. All other specifications reference the OUT pin to the REF pin. PARAMETER CONDITIONS MIN TYP MAX UNITS Gain Error A = 1 l 0.001 0.01 % V Gain Nonlinearity A = 1 l 3 10 ppm V Input Offset Voltage (Note 2) V = 200mV –5 ±10 µV CM Average Input Offset Drift (Note 2) T = –40°C to 85°C l ±50 nV/°C A T = 85°C to 125°C l –1 –2.5 µV/°C A Average Input Bias Current (Note 3) V = 1.2V l 4 10 nA CM Average Input Offset Current (Note 3) V = 1.2V l 1 3 nA CM Common Mode Rejection Ratio A = 1, V = 0V to 5V, LTC2053C l 105 116 dB V CM (Notes 4, 5) A = 1, V = 0V to 5V, LTC2053C-SYNC l 100 116 dB V CM A = 1, V = 0.1V to 4.9V, LTC2053I l 105 116 dB V CM A = 1, V = 0.1V to 4.9V, LTC2053I-SYNC l 100 116 dB V CM A = 1, V = 0V to 5V, LTC2053I, LTC2053I-SYNC l 95 116 dB V CM A = 1, V = 0.1V to 4.9V, LTC2053H l 100 dB V CM A = 1, V = 0V to 5V, LTC2053H l 85 dB V CM Power Supply Rejection Ratio (Note 6) V = 2.7V to 6V l 110 116 dB S 2053syncfd 3 For more information www.linear.com/LTC2053

LTC2053/LTC2053-SYNC elecTrical characTerisTics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T = 25°C. V+ = 5V, V– = 0V, REF = 200mV. Output voltage swing is referenced to A V–. All other specifications reference the OUT pin to the REF pin. PARAMETER CONDITIONS MIN TYP MAX UNITS Output Voltage Swing High R = 2k to V– l 4.85 4.94 V L R = 10k to V– l 4.95 4.98 V L Output Voltage Swing Low l 20 mV Supply Current No Load l 0.85 1.1 mA Supply Current, Shutdown V ≥ 4.5V, LTC2053 Only 10 µA EN EN/CLK Pin Input Low Voltage, V 0.5 V IL EN/CLK Pin Input High Voltage, V 4.5 V IH EN/CLK Pin Input Current V = V– –1 –10 µA EN/CLK Internal Op Amp Gain Bandwidth 200 kHz Slew Rate 0.2 V/µs Internal Sampling Frequency 3 kHz The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T = 25°C. A V+ = 5V, V– = –5V, REF = 0V. PARAMETER CONDITIONS MIN TYP MAX UNITS Gain Error A = 1 l 0.001 0.01 % V Gain Nonlinearity A = 1 l 3 10 ppm V Input Offset Voltage (Note 2) V = 0V 10 ±20 µV CM Average Input Offset Drift (Note 2) T = –40°C to 85°C l ±50 nV/°C A T = 85°C to 125°C l –1 –2.5 µV/°C A Average Input Bias Current (Note 3) V = 1V l 4 10 nA CM Average Input Offset Current (Note 3) V = 1V l 1 3 nA CM Common Mode Rejection Ratio A = 1, V = –5V to 5V, LTC2053C l 105 118 dB V CM (Notes 4, 5) A = 1, V = –5V to 5V, LTC2053C-SYNC l 100 118 dB V CM A = 1, V = –4.9V to 4.9V, LTC2053I l 105 118 dB V CM A = 1, V = –4.9V to 4.9V, LTC2053I-SYNC l 100 118 dB V CM A = 1, V = –5V to 5V, LTC2053I, LTC2053I-SYNC l 95 118 dB V CM A = 1, V = –4.9V to 4.9V, LTC2053H l 100 dB V CM A = 1, V = –5V to 5V, LTC2053H l 90 dB V CM Power Supply Rejection Ratio (Note 6) V = 2.7V to 11V l 110 116 dB S Maximum Output Voltage Swing R = 2k to GND, C- and I-Grades l ±4.5 ±4.8 V L R = 10k to GND, All Grades l ±4.6 ±4.9 V L R = 2k to GND, LTC2053H Only l ±4.4 ±4.8 V L Supply Current No Load l 0.95 1.3 mA Supply Current, Shutdown V ≥ 4.5V, LTC2053 Only 20 µA EN EN Pin Input Low Voltage, V –4.5 V IL CLK Pin Input Low Voltage, V 0.5 V IL EN/CLK Pin Input High Voltage, V 4.5 V IH EN/CLK Pin Input Current V = V– –3 –20 µA EN/CLK Internal Op Amp Gain Bandwidth 200 kHz Slew Rate 0.2 V/µs Internal Sampling Frequency 3 kHz 2053syncfd 4 For more information www.linear.com/LTC2053

LTC2053/LTC2053-SYNC elecTrical characTerisTics Note 1: Stresses beyond those listed under Absolute Maximum Ratings Note 4: The CMRR with a voltage gain, A , larger than 10 is 120dB (typ). V may cause permanent damage to the device. Exposure to any Absolute Note 5: At temperatures above 70°C, the common mode rejection ratio Maximum Rating condition for extended periods may affect device lowers when the common mode input voltage is within 100mV of the reliability and lifetime. supply rails. Note 2: These parameters are guaranteed by design. Thermocouple effects Note 6: The power supply rejection ratio (PSRR) measurement accuracy preclude measurement of these voltage levels in high speed automatic depends on the proximity of the power supply bypass capacitor to the test systems. VOS is measured to a limit determined by test equipment device under test. Because of this, the PSRR is 100% tested to relaxed capability. limits at final test. However, their values are guaranteed by design to meet Note 3: If the total source resistance is less than 10k, no DC errors result the data sheet limits. from the input bias currents or the mismatch of the input bias currents or the mismatch of the resistances connected to –IN and +IN. Typical perForMance characTerisTics Input Offset Voltage vs Input Input Offset Voltage vs Input Input Offset Voltage vs Input Common Mode Voltage Common Mode Voltage Common Mode Voltage 15 15 20 VS = 3V VS = 5V VS = ±5V VREF = 0V VREF = 0V 15 VREF = 0V V) 10 TA = 25°C V) 10 TA = 25°C V) TA = 25°C GE (µ 5 GE (µ 5 G = 1000 GE (µ 10 G = 10 G = 1000 NPUT OFFSET VOLTA –05 G = G1 0=0 100G = 100 NPUT OFFSET VOLTA –05 G = 10G0 = 1 NPUT OFFSET VOLTA ––15050 G = 1 G = 100 I–10 I–10 I –15 G = 1 G = 10 –15 –15 –20 0 0.5 1.0 1.5 2.0 2.5 3.0 0 1 2 3 4 5 –5 –3 –1 1 3 5 INPUT COMMON MODE VOLTAGE (V) INPUT COMMON MODE VOLTAGE (V) INPUT COMMON MODE VOLTAGE (V) 2053 G02 2053 G01 2053 G03 Input Offset Voltage vs Input Input Offset Voltage vs Input Input Offset Voltage vs Input Common Mode Voltage Common Mode Voltage Common Mode Voltage 20 20 20 VS = 3V VS = 5V VS = ±5V 15 VREF = 0V 15 VREF = 0V 15 VREF = 0V G = 10 G = 10 G = 10 INPUT OFFSET VOLTAGE (µV) –1–105050 TA = 25°C TA = 85°C INPUT OFFSET VOLTAGE (µV) –1–105050 TTAA = = 8 255°°CC TA = 70°C INPUT OFFSET VOLTAGE (µV) –1–105050 TA =T 2A5 =° C70°C TA = 85°C –15 TA = 70°C –15 TA = –55°C –15 TA = –55°C TA = –55°C –20 –20 –20 0 0.5 1.0 1.5 2.0 2.5 3.0 0 1 2 3 4 5 –5 –3 –1 1 3 5 INPUT COMMON MODE VOLTAGE (V) INPUT COMMON MODE VOLTAGE (V) INPUT COMMON MODE VOLTAGE (V) 2053 G04 2053 G05 2053 G06 2053syncfd 5 For more information www.linear.com/LTC2053

LTC2053/LTC2053-SYNC Typical perForMance characTerisTics Input Offset Voltage vs Input Input Offset Voltage vs Input Input Offset Voltage vs Input Common Mode Voltage Common Mode Voltage Common Mode Voltage 60 60 100 H-GRADE PARTS H-GRADE PARTS H-GRADE PARTS VS = 3V VS = 5V 80 VS = ±5V GE (µV) 4200 VGR =E F1 0= 0V GE (µV) 4200 VGR =E F1 0= 0V GE (µV) 6400 VGR =E F1 0= 0V UT OFFSET VOLTA–200 TA = 25°C TA = 85°C UT OFFSET VOLTA–200 TA = 25°C TA = 85°C UT OFFSET VOLTA––2240000 TA = 25°C TA = 85°C INP–40 TA = 125°C INP–40 TA = 125°C INP––6800 TA = 125°C –60 –60 –100 0 0.5 1.0 1.5 2.0 2.5 3.0 00 1 2 3 4 5 –5 –3 –1 1 3 5 INPUT COMMON MODE VOLTAGE (V) INPUT COMMON MODE VOLTAGE (V) INPUT COMMON MODE VOLTAGE (V) 2053 G07 2053 G08 2053 G09 Error Due to Input R vs Input Error Due to Input R vs Input Error Due to Input R vs Input S S S Common Mode (C < 100pF) Common Mode (C < 100pF) Common Mode (C < 100pF) IN IN IN 60 30 25 VS = 3V VS = 5V VS = ±5V VREF = 0V VREF = 0V RS = 20k 20 VREF = 0V OFFSET ERROR (µV) 42000 RCGTAI+ N= == <1 2R 015–0° =0C pRFS RS = 5k RS = 0k OFFSET ERROR (µV) 21000 RCGTAI+ N= == <1 2R 015–0° =0C pRFS RRSSR = =S 1 1=50 k5kk OFFSET ERROR (µV) 115050 RCGTAI+ N= == <1 2R 015–0° =0C pRFS RS = 2RR0SSk == 1105kk AL RS = 10k AL AL –5 TION–20 RS RS = 15k TION–10 TION–10 ADDI–40 SMALL CIN + RS = 20k ADDI–20 ADDI–15 – –20 RS –60 –30 –25 0 0.5 1.0 1.5 2.0 2.5 3.0 0 1 2 3 4 5 –5 –3 –1 1 3 5 INPUT COMMON MODE VOLTAGE (V) INPUT COMMON MODE VOLTAGE (V) INPUT COMMON MODE VOLTAGE (V) 2053 G10 2053 G11 2053 G12 Error Due to Input R Mismatch vs Error Due to Input R Mismatch vs Error Due to Input R Mismatch vs S S S Input Common Mode (C < 100pF) Input Common Mode (C < 100pF) Input Common Mode (C < 100pF) IN IN IN 50 40 40 VS = 3V VS = 5V RIN+ = 0k, RIN– = 20k VS = ±5V OFFSET ERROR (µV) 432100000 VCGTARI N= E= F<1 2 0=15 00°0CVpRF+R =+ 0=k 0, kR,– R =R– 5+=k =1 00kk, R– = 15k OFFSET ERROR (µV) 3210000 VCGTARI N= E= F<1 2 0=15 00°0CVpFRIN+R =IN 0+k =, R0IkN,– R =IN 1–0 =k 15k OFFSET ERROR (µV) 3210000 VCGTARI N= E= F<1 2 0=15 00°0CVpF R+ = 0kR, +R =– 0=k 1, 5Rk– = 20k ADDITIONAL ––––12340000 SMALL RRC+–IRNR+ += =5 k1,0 Rk+–,– R=– 0 =k 0Rk+ = 15k, R– = 0k ADDITIONAL –––123000 RIN+R =IN 1+0R =kI N,1 +R5 Ik=N, –2R 0=IkN 0,– kR =I N0–k = 0k ADDITIONAL –––123000 R+ = 1R5k+, =R 2– 0=k ,0 Rk– = 0k –50 –40 –40 0 0.5 1.0 1.5 2.0 2.5 3.0 0 1 2 3 4 5 –5 –3 –1 1 3 5 INPUT COMMON MODE VOLTAGE (V) INPUT COMMON MODE VOLTAGE (V) INPUT COMMON MODE VOLTAGE (V) 2053 G13 2053 G14 2053 G15 2053syncfd 6 For more information www.linear.com/LTC2053

LTC2053/LTC2053-SYNC Typical perForMance characTerisTics Error Due to Input R vs Input Error Due to Input R vs Input Error Due to Input R vs Input S S S Common Mode (C > 1µF) Common Mode (C > 1µF) Common Mode (C > 1µF) IN IN IN 40 70 80 VS = 3V VS = 5V VS = ±5V V) 30 VRR+ E=F R= –0 =V RS RS = 15k V) 50 VRR+ E=F R= –0 =V RS RS = 10k V) 60 VRR+ E=F R= –0 =V RS RS = 10k OR (µ 20 CGI N= >1 01µF OR (µ 30 CGI N= >1 01µF RS = 5k OR (µ 40 CGI N= >1 01µF RS = 5k ET ERR 10 TA = 25°C RS = 10k ET ERR 10 TA = 25°C RS = 1k ET ERR 20 TA = 25°C RS = 1k OFFS 0 RS = 5k OFFS–10 RS = 500Ω OFFS 0 RS = 500Ω AL –10 AL AL –20 N N N TIO–20 RS TIO–30 TIO–40 DI + DI DI AD–30 BIG CIN – AD–50 AD–60 RS –40 –70 –80 0 0.5 1.0 1.5 2.0 2.5 3.0 0 1 2 3 4 5 –5 –3 –1 1 3 5 INPUT COMMON MODE VOLTAGE (V) INPUT COMMON MODE VOLTAGE (V) INPUT COMMON MODE VOLTAGE (V) 2053 G16 2053 G17 2053 G18 Error Due to Input R Mismatch Error Due to Input R Mismatch Error Due to Input R Mismatch S S S vs Input Common Mode (C >1µF) vs Input Common Mode (C >1µF) vs Input Common Mode (C >1µF) IN IN IN 200 200 150 VS = 3V VS = 5V VS = ±5V ADDITIONAL OFFSET ERROR (µV)––11–115055050000000 VTBARI EG=F R 2C=+5I N0°CV RR++ = R=R 1+ +–+0 0 =k=0 , 5Ω 0R0k,–0 ,R Ω=R– ,– 1R = RR0+= 00– + =5 kΩ == 00 001kΩk,k ,R R– –= = 1 0kk ADDITIONAL OFFSET ERROR (µV)––11115055050000000 VTAR E=F 2=5 0°CV R+RR =+R+ =0+= k =01, k0R5,0 0–RΩ0 =–Ω,R R =1R,++ 0R5 – 0== 0–=Ω 00 1 =0Ωkk ,k0, RkR–– == 10kk ADDITIONAL OFFSET ERROR (µV)–1–1055000000 VTAR E=F 2=5 0°CV RRR+R++ += == = 0 10 k50k,00 ,R 0ΩRRR–Ω–, ++ = ,R = = =R1 – 5 10 0–0= k0k=0 ,,Ω0 ΩRR0kk–– == 01kk R– –200 –200 –150 0 0.5 1.0 1.5 2.0 2.5 3.0 00 1 2 3 4 5 –5 –3 –1 1 3 5 INPUT COMMON MODE VOLTAGE (V) INPUT COMMON MODE VOLTAGE (V) INPUT COMMON MODE VOLTAGE (V) 2053 G20 2053 G21 2053 G19 Offset Voltage vs Temperature V vs REF (Pin 5) V vs REF (Pin 5) OS OS 80 30 60 VIN+ = VIN– = REF VIN+ = VIN– = REF 60 G = 10 G = 10 V) 20 TA = 25°C 40 TA = 25°C µ 40 SET VOLTAGE ( 200 VS = 3VVS = ±5V VS = 5V V (µV)OS 100 VS = 5V V (µV)OS 200 VS = 10V FF–20 VS = 3V T O –10 –20 PU–40 N I –20 –40 –60 –80 –30 –60 –50 –25 0 25 50 75 100 125 0 1 2 3 4 0 1 2 3 4 5 6 7 8 9 TEMPERATURE (°C) VREF (V) VREF (V) 2053 G22 2053 G23 2053 G24 2053syncfd 7 For more information www.linear.com/LTC2053

LTC2053/LTC2053-SYNC Typical perForMance characTerisTics Gain Nonlinearity, G = 1 Gain Nonlinearity, G = 10 CMRR vs Frequency 10 10 130 VS = ±2.5V VS = ±2.5V VS = 3V, 5V, ±5V 8 VREF = 0V 8 VREF = 0V VIN = 1VP-P G = 1 G = 10 120 6 RL = 10k 6 RL = 10k R+ = R– = 1k m) 4 TA = 25°C m) 4 TA = 25°C p p 110 p p RITY ( 20 RITY ( 20 R (db)100 R+ = R– = 10k A A R LINE –2 LINE –2 CM R+ = 10k, R– = 0k ON –4 ON –4 90 R+ N N + –6 –6 80 –8 –8 – R+ = 0k, R– = 10k R– –10 –10 70 –2.4 –1.9 –1.4 –0.9 –0.4 0.1 0.6 1.1 1.6 –2.4 –1.4 –0.4 0.6 1.6 2.6 1 10 100 1000 OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) FREQUENCY (Hz) 2053 G25 2053 G26 2053 G27 Input Voltage Noise Density Input Referred Noise in Input Referred Noise in vs Frequency 10Hz Bandwidth 10Hz Bandwidth 300 3 3 NSITY (nV/Hz)√225000 GTA = = 1 205°C VS = ±5V OLTAGE (µV) 21 TVAS == 235V°C OLTAGE (µV) 21 TVAS == 255V°C OISE DE150 VVSS == 35VV NOISE V 0 NOISE V 0 D N ED ED E R R RR100 ER –1 ER –1 EFE REF REF T R 50 UT –2 UT –2 U P P P N N N I I I 0 –3 –3 1 10 100 1000 10000 0 2 4 6 8 10 0 2 4 6 8 10 FREQUENCY (Hz) TIME (s) TIME (s) 2053 G28 2053 G29 2053 G30 Output Voltage Swing Output Voltage Swing vs Output Current vs Output Current 5.0 5 TA = 25°C VS = 5V, SOURCING VS = ±5V SOURCING 4.5 4 TA = 25°C V) 4.0 V) 3 NG ( 3.5 NG ( 2 WI VS = 3V, SOURCING WI S 3.0 S 1 E E G G A 2.5 A 0 T T L L VO 2.0 VO –1 T T PU 1.5 PU –2 T T OU 1.0 VS = 3V, SINKING OU –3 VS = 5V, SINKING 0.5 –4 SINKING 0 –5 0.01 0.1 1 10 0.01 0.1 1 10 OUTPUT CURRENT (mA) OUTPUT CURRENT (mA) 2053 G31 2053 G32 2053syncfd 8 For more information www.linear.com/LTC2053

LTC2053/LTC2053-SYNC Typical perForMance characTerisTics Low Gain Settling Time Supply Current vs Supply Voltage vs Settling Accuracy 1.00 8 VS = 5V 0.95 7 dVOUT = 1V G < 100 0.90 TA = 125°C 6 TA = 25°C PLY CURRENT00..8850 TA = 0°CTA = 85°C LING TIME (ms) 54 SUP0.75 TA = –55°C SETT 3 0.70 2 0.65 1 0.60 0 2.5 4.5 6.5 8.5 10.5 0.0001 0.001 0.01 0.1 SUPPLY VOLTAGE (V) SETTLING ACCURACY (%) 2053 G33 2053 G34 Internal Clock Frequency Settling Time vs Gain vs Supply Voltage 35 3.40 VS = 5V 30 d0V.1O%U TA =C C1UVRACY 3.35 ME (ms) 2250 TA = 25°C ENCY (kHz)3.30 TA = 125°C TLING TI 15 K FREQU3.25 TA = 85°C T C3.20 SE 10 LO C 3.15 5 TA = 25°C TA = –55°C 0 3.10 1 10 100 1000 10000 2.5 4.5 6.5 8.5 10.5 GAIN (V/V) SUPPLY VOLTAGE (V) 2053 G35 2053 G36 pin FuncTions EN (Pin 1, LTC2053 Only): Active Low Enable Pin. REF (Pin 5): Voltage Reference (V ) for Amplifier Output. REF CLK (Pin 1, LTC2053-SYNC Only): Clock input for Syn- RG (Pin 6): Inverting Input of Internal Op Amp. See chronizing to External System Clock. Figure 1. –IN (Pin 2): Inverting Input. OUT (Pin 7): Amplifier Output. See Figure 1. +IN (Pin 3): Noninverting Input. V+ (Pin 8): Positive Supply. V– (Pin 4): Negative Supply. 2053syncfd 9 For more information www.linear.com/LTC2053

LTC2053/LTC2053-SYNC block DiagraM 8 V+ ZERO-DRIFT +IN OP AMP 3 + OUT –IN CS CH 7 2 – REF RG V– EN/CLK* 5 6 4 1 2053 BD *NOTE: PIN 1 IS EN ON THE LTC2053 AND CLK ON THE LTC2053-SYNC applicaTions inForMaTion Theory of Operation ±5 Volt Operation The LTC2053 uses an internal capacitor (C ) to sample When using the LTC2053 with supplies over 5.5V, care S a differential input signal riding on a DC common mode must be taken to limit the maximum difference between voltage (see the Block Diagram). This capacitor’s charge is any of the input pins (+IN or –IN) and the REF pin to 5.5V; transferred to a second internal hold capacitor (C ) trans- if not, the device will be damaged. For example, if rail-to-rail H lating the common mode of the input differential signal to input operation is desired when the supplies are at ±5V, that of the REF pin. The resulting signal is amplified by a the REF pin should be 0V, ±0.5V. As a second example, zero-drift op amp in the noninverting configuration. The if V+ is 10V and V– and REF are at 0V, the inputs should RG pin is the negative input of this op amp and allows not exceed 5.5V. external programmability of the DC gain. Simple filtering can be realized by using an external capacitor across the Settling Time feedback resistor. The sampling rate is 3kHz and the input sampling period during which C is charged to the input differential voltage S Input Voltage Range V is approximately 150µs. First assume that on each IN The input common mode voltage range of the LTC2053 input sampling period, C is charged fully to V . Since S IN is rail-to-rail. However, the following equation limits the C = C (= 1000pF), a change in the input will settle to S H size of the differential input voltage: N bits of accuracy at the op amp noninverting input after N clock cycles or 333µs(N). The settling time at the OUT V– ≤ (V+IN – V–IN) + VREF ≤ V+ – 1.3 pin is also affected by the settling of the internal op amp. Where V+IN and V–IN are the voltages of the +IN and –IN Since the gain bandwidth of the internal op amp is typically pins, respectively, VREF is the voltage at the REF pin and 200kHz, the settling time is dominated by the switched V+ is the positive supply voltage. capacitor front end for gains below 100 (see the Typical Performance Characteristics section). For example, with a 3V single supply and a 0V to 100mV differential input voltage, V must be between 0V and REF 1.6V. 2053syncfd 10 For more information www.linear.com/LTC2053

LTC2053/LTC2053-SYNC applicaTions inForMaTion SINGLE SUPPLY, UNITY GAIN SINGLE SUPPLY, UNITY GAIN DUAL SUPPLY, NONUNITY GAIN DUAL SUPPLY, NONUNITY GAIN 5V 5V 5V 5V 8 8 8 8 3 3 3 3 V+IN + + V+IN + + V+IN + + V+IN + + 7 7 7 7 VIN VOUT VIN VOUT VIN VOUT VIN VOUT V–IN – 2 – 5 6 V–IN – 2 – 5 6 V–IN – 2 – 5 6 R2 V–IN – 2 – 5 6 R2 4 4 4 4 R1 R1 –5V –5V VREF VREF VREF 0V < V+IN < 5V 0V < V–IN < 5V AND V–IN – VREF < 5.5V –5V < V–IN < 5V AND V–IN – VREF < 5.5V –5V < V–IN < 5V AND V–IN – VREF < 5.5V 0V < V–IN < 5V 0V < V+IN < 5V AND V+IN – VREF < 5.5V –5V < V+IN < 5V AND V+IN – VREF < 5.5V –5V < V+IN < 5V AND V+IN – VREF < 5.5V 0V < VIN < 3.7V 0V < VIN + VREF < 3.7V –5V < VIN + VREF < 3.7V –5V < VIN + VREF < 3.7V VOUT = VIN ( R2) ( R2) VOUT = VIN + VREF VOUT = 1 + VIN + VREF VOUT = 1 + (VIN + VREF) R1 R1 2053 F01 Figure 1 Input Current Power Supply Bypassing Whenever the differential input V changes, C must be The LTC2053 uses a sampled data technique and, therefore, IN H charged up to the new input voltage via C . This results contains some clocked digital circuitry. It is, therefore, S in an input charging current during each input sampling sensitive to supply bypassing. For single or dual supply period. Eventually, C and C will reach V and, ideally, operation, a 0.1µF ceramic capacitor must be connected H S IN the input current would go to zero for DC inputs. between Pin 8 (V+) and Pin 4 (V–) with leads as short as possible. In reality, there are additional parasitic capacitors which disturb the charge on C every cycle even if V is a DC S IN Synchronizing to an External Clock voltage. For example, the parasitic bottom plate capacitor (LTC2053-SYNC Only) on C must be charged from the voltage on the REF pin S The LTC2053 has an internally generated sample clock that to the voltage on the –IN pin every cycle. The resulting is typically 3kHz. There is no need to provide the LTC2053 input charging current decays exponentially during each with a clock. However, in some applications, it may be input sampling period with a time constant equal to R C . S S desirable for the user to control the sampling frequency If the voltage disturbance due to these currents settles more precisely to avoid undesirable aliasing. This can be before the end of the sampling period, there will be no done with the LTC2053-SYNC. This device uses Pin 1 as a errors due to source resistance or the source resistance clock input whereas the LTC2053 uses Pin 1 as an enable mismatch between –IN and +IN. With R less than 10k, S pin. If CLK (Pin 1) is left floating on the LTC2053-SYNC, no DC errors occur due to this input current. the device will run on its internal oscillator, similar to the In the Typical Performance Characteristics section of this LTC2053. However, if not externally synchronizing to a data sheet, there are curves showing the additional error system clock, it is recommended that the LTC2053 be from non-zero source resistance in the inputs. If there used instead of the LTC2053-SYNC because the LTC2053- are no large capacitors across the inputs, the amplifier is SYNC is sensitive to parasitic capacitance on the CLK pin less sensitive to source resistance and source resistance when left floating. Clocking the LTC2053-SYNC is accom- mismatch. When large capacitors are placed across the plished by driving the CLK pin at 8 times the desired inputs, the input charging currents previously described sample clock frequency. This completely disables the internal clock. For example, to achieve the nominal result in larger DC errors, especially with source resistor LTC2053 sample clock rate of 3kHz, a 24kHz exter- mismatches. nal clock should be applied to the CLK pin of the 2053syncfd 11 For more information www.linear.com/LTC2053

LTC2053/LTC2053-SYNC applicaTions inForMaTion LTC2053-SYNC. If a square wave is used to drive the CLK The LTC2053-SYNC is tested with a sample clock of 3kHz pin, a 5µs RC time constant should be placed in front of (f = 24kHz) to the same specifications as the LTC2053. CLK the CLK pin to maintain low offset voltage performance In addition, the LTC2053-SYNC is tested at one-half and (see Figure 2). This avoids internal and external coupling 2x this frequency to verify proper operation. The curves of the high frequency components of the external clock at in the Typical Performance Characteristics section of this the instant the LTC2053-SYNC holds the sampled input. data sheet apply to the LTC2053-SYNC when driving it with a 24kHz clock at Pin 1 (f = 24kHz, 3kHz sample CLK 1k clock rate). Below are three curves that show the behavior 5V EXTERNAL CLOCK of the LTC2053-SYNC as the clock frequency is varied. 8 4.7nF V+IN + 3 + 1 0V 5V The offset is essentially unaffected over a 2:1 increase or VD CLK 7 VOUT decrease of the typical LTC2053 sample clock speed. The V–IN – 2 – 5 6 R2 bias current is directly proportional to the clock speed. LTC2053-SYNC 4 R1 The noise is roughly proportional to the square root of the clock frequency. For optimum noise and bias current 2053 F02 performance, drive the LTC2053-SYNC with a nominal Figure 2. Driving the CLK Input of the LTC2053-SYNC 24kHz external clock (3kHz sample clock). 20 14 12 INPUT OFFSET (µV)–11–1505050 TYP VLVVTSSS C= ==2 ± 05355VVV3 INPUT BIAS CURRENT (nA) 1120864 VVVSRC ME=F =5= V 10V TYP LTC2053 REFERRED NOISE VOLTAGE (µV)PP10864 TNVASO TSI==SY A 25EPM5V I°LPNCTL 1CE02 FH0Rz5E 3BQAUNEDNWCYIDTH –15 SAMPLE FREQUENCY 2 SAMPLE FREQUENCY PUT 2 N I –20 0 0 0 2000 4000 6000 8000 10000 0 2000 4000 6000 8000 10000 0 2000 4000 6000 8000 10000 SAMPLE FREQUENCY (Hz) (= FCLK/8) SAMPLE FREQUENCY (Hz) (= FCLK/8) SAMPLE FREQUENCY (FCLK/8) 2053 F03 2053 F04 2053 F05 Figure 3. LTC2053-SYNC Input Figure 4. LTC2053-SYNC Average Input Figure 5. LTC2053-SYNC Input Referred Offset vs Sample Frequency Bias Current vs Sample Frequency Noise vs Sample Frequency 2053syncfd 12 For more information www.linear.com/LTC2053

LTC2053/LTC2053-SYNC Typical applicaTions Precision ÷2 Precision Current Source (Low Noise 2.5V Reference) 5V 8V 0.1µF 8 2 – 8 1 LT1027–5 4 3 + 8 7 VOUTiR 3 +LETNC120R45E3F5RG6 0.1µF 1µF 2 2 –LTC204535 6 7 (1102n.V5V/√Hz) 1 2.7k 1k LOAD i = —VC , i ≤ 5mA R 0.1µF 10k VC 0 < VOUT < (5V – VC) 2053 TA03 0.1µF 2053 TA02 Precision Doubler Precision Inversion (General Purpose) (General Purpose) 5V 5V 0.1µF 0.1µF VIN 3 + 8 3 + 8 7 7 LTC2053 VOUT LTC2053 VOUT 2 – 1 5 6 VIN 2 – 4 5 6 4 1 VOUT = 2VIN 0.1µF 0.1µF VOUT = –VIN 0.1µF –5V 2053 TA04 –5V 2053 TA05 2053syncfd 13 For more information www.linear.com/LTC2053

LTC2053/LTC2053-SYNC Typical applicaTions Differential Thermocouple Amplifier 5V 0.1µF 10M 10M 0°C → 500°C YELLOW + 1M 1M10k 3 8 + TYPE K THERMOCOUPLE ORANGE – 10k 2 –LTC2053RG 7 10mV/°C (40.6µV/°C) 0.001µF 0.001µF 1 EN REF 6 249k 5 0.1µF 1% 4 100Ω THERMAL 5V0.1µF 1k COUPLING 1% 5V 2 4 6 – SCALE FACTOR 1 TRIM LTC2050 LT1025 RV–O 3 3 + 2 4 5 200k 2053 TA06 High Side Power Supply Current Sense 0.0015Ω ILOAD VREG 0.1µF LOAD 2 – 8 OUT 7 100mV/A LTC2053 3 + 6 10k OCUF RLROEANDT 5 0.1µF 1, 4 150Ω 2053 TA07 2053syncfd 14 For more information www.linear.com/LTC2053

LTC2053/LTC2053-SYNC package DescripTion Please refer to http://www.linear.com/product/LTC2053#packaging for the most recent package drawings. DD Package 8-Lead Plastic DFN (3mm × 3mm) (Reference LTC DWG # 05-08-1698 Rev C) 0.70 ±0.05 3.5 ±0.05 1.65 ±0.05 2.10 ±0.05 (2 SIDES) PACKAGE OUTLINE 0.25 ± 0.05 0.50 BSC 2.38 ±0.05 RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED R = 0.125 0.40 ± 0.10 TYP 5 8 3.00 ±0.10 1.65 ± 0.10 (4 SIDES) (2 SIDES) PIN 1 TOP MARK (NOTE 6) (DD8) DFN 0509 REV C 4 1 0.200 REF 0.75 ±0.05 0.25 ± 0.05 0.50 BSC 2.38 ±0.10 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON TOP AND BOTTOM OF PACKAGE 2053syncfd 15 For more information www.linear.com/LTC2053

LTC2053/LTC2053-SYNC package DescripTion Please refer to http://www.linear.com/product/LTC2053#packaging for the most recent package drawings. MS8 Package 8-MLeSa8d P Palcaksatigc eMSOP (Refere8n-cLee LaTdC PDlWaGst i#c 0 M5-S08O-P1660 Rev G) (Reference LTC DWG # 05-08-1660 Rev G) 0.889 ±0.127 (.035 ±.005) 5.10 3.20 – 3.45 (.201) (.126 – .136) MIN 3.00 ±0.102 0.42 ± 0.038 0.65 (.118 ±.004) 0.52 (.0165 ±.0015) (.0256) (NOTE 3) 8 7 6 5 (.0205) TYP BSC REF RECOMMENDED SOLDER PAD LAYOUT 3.00 ±0.102 4.90 ±0.152 DETAIL “A” (.118 ±.004) 0.254 (.193 ±.006) (NOTE 4) (.010) 0° – 6° TYP GAUGE PLANE 1 2 3 4 0.53 ±0.152 (.021 ±.006) 1.10 0.86 (.043) (.034) DETAIL “A” MAX REF 0.18 (.007) SEATING PLANE 0.22 – 0.38 0.1016 ±0.0508 (.009 – .015) (.004 ±.002) TYP 0.65 MSOP (MS8) 0213 REV G (.0256) NOTE: BSC 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 2053syncfd 16 For more information www.linear.com/LTC2053

LTC2053/LTC2053-SYNC revision hisTory (Revision history begins at Rev C) REV DATE DESCRIPTION PAGE NUMBER C 7/10 Corrected text in the Absolute Maximum Ratings section 2 Updated Pin 6 and Pin 7 text in the Pin Functions section 9 Replaced Figure 1 11 D 12/15 Corrected title for Figure 2 12 2053syncfd Information furnished by Linear Technology Corporation is believed to be accurate and reliable. 17 However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconneFcotior nm oof irtse ciinrcfouirtms aast dioensc wribwedw h.leinreeina rw.cilol nmot/ LinTfCrin2g0e5 o3n existing patent rights.

LTC2053/LTC2053-SYNC Typical applicaTion Linearized Platinum RTD Amplifier 5V 0.1µF *CONFORMING TO IEC751 OR DIN43760 2 – 8 R(eT.g =., R1O0 0(1Ω + A 3T. 900°C8 ,• 1 1705–.39TΩ – A 5T. 727050 °•C 1, 02–477T.21)Ω, R AOT =4 0100°0CΩ) 7 1.21k LTC2053 3 + 5 6 0.1µF 4 1 5V 2.7k 16.9k 10k i ≈ 1mA 5V 2 – 8 0.1µF 249k LT1634-1.25 49.9Ω 10mV/°C 7 LTC2053 0°C – 400°C 3 + 5 6 1M 0.1µF 16.2k 11k (±0.1°C) PT100* 4 3-WIRE RTD 1 CW 10k LINEARITY ZERO 100Ω 39.2k CW 0.1µF GAIN 24.9k 953Ω CW 5k 2053 TA08 relaTeD parTs PART NUMBER DESCRIPTION COMMENTS LT®1167 Single Resistor Gain-Programmable, Precision Single-Gain Set Resistor: G = 1 to 10,000, Low Noise: 7.5nV√Hz Instrumentation Amplifier LTC2050/LTC2051 Zero-Drift Single/Dual Operation Amplifier SOT-23 and MS8 Packages LTC2054/LTC2055 Zero-Drift µPower Operational Amplifier SOT-23 and MS8 Packages, 150µA/Op Amp LTC6800 Single-Supply, Zero-Drift, Rail-to-Rail Input and Output MS8 Package, 100µV Max V , 250nV/°C Max Drift OS Instrumentation Amplifier 2053syncfd 18 Linear Technology Corporation LT 1215 REV D • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 For more information www.linear.com/LTC2053 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com/LTC2053  LINEAR TECHNOLOGY CORPORATION 2010