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  • 型号: LTC1655LIS8#PBF
  • 制造商: LINEAR TECHNOLOGY
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LTC1655LIS8#PBF产品简介:

ICGOO电子元器件商城为您提供LTC1655LIS8#PBF由LINEAR TECHNOLOGY设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 LTC1655LIS8#PBF价格参考。LINEAR TECHNOLOGYLTC1655LIS8#PBF封装/规格:数据采集 - 数模转换器, 16 位 数模转换器 1 8-SOIC。您可以下载LTC1655LIS8#PBF参考资料、Datasheet数据手册功能说明书,资料中有LTC1655LIS8#PBF 详细功能的应用电路图电压和使用方法及教程。

产品参数 图文手册 常见问题
参数 数值
产品目录

集成电路 (IC)

描述

IC DAC 16BIT R-R MICROPWR 8SOIC

产品分类

数据采集 - 数模转换器

品牌

Linear Technology

数据手册

http://www.linear.com/docs/2271

产品图片

产品型号

LTC1655LIS8#PBF

rohs

无铅 / 符合限制有害物质指令(RoHS)规范要求

产品系列

-

位数

16

供应商器件封装

8-SOIC

其它名称

LTC1655LIS8PBF

包装

管件

安装类型

表面贴装

封装/外壳

8-SOIC(0.154",3.90mm 宽)

工作温度

-40°C ~ 85°C

建立时间

20µs

数据接口

串行

标准包装

100

电压源

单电源

转换器数

1

输出数和类型

1 电压,单极1 电压,双极

采样率(每秒)

750k

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PDF Datasheet 数据手册内容提取

LTC1655/LTC1655L 16-Bit Rail-to-Rail Micropower DACs in SO-8 Package FEATURES DESCRIPTIOU n 16-Bit Monotonicity Over Temperature The LTC®1655/LTC1655L are rail-to-rail voltage output, n Deglitched Rail-to-Rail Voltage Output 16-bit digital-to-analog converters in an SO-8 package. n SO-8 Package They include an output buffer and a reference. The 3-wire n I : 600m A serial interface is compatible with SPI/QSPI and CC(TYP) n Internal Reference:2.048V (LTC1655) MICROWIRETM protocols. The CLK input has a Schmitt 1.25V (LTC1655L) trigger that allows direct optocoupler interface. n Maximum DNL Error: – 1LSB The LTC1655 has an onboard 2.048V reference that can be n Settling Time: 20m S to – 1LSB overdriven to a higher voltage. The output swings from 0V n 750kHz Max Update Rate to 4.096V when using the internal reference. The typical n Power-On Reset to Zero Volts power dissipation is 3.0mW on a single 5V supply. n 3-Wire Cascadable Serial Interface n Low Cost The LTC1655L has an onboard 1.25V reference that can be n Pin Compatible Upgrade for LTC1451 12-Bit DAC overdriven to a higher voltage. The output swings from 0V Family to 2.5V when using the internal reference. The typical power dissipation is 1.8mW on a single 3V supply. APPLICATIOUS The LTC1655/LTC1655L are pin compatible with Linear Technology’s 12-bit V DAC family, allowing an easy OUT n Digital Calibration upgrade path. They are the only buffered 16-bit DACs in n Industrial Process Control an SO-8 package and they include an onboard reference n Automatic Test Equipment for standalone performance. n Cellular Telephones , LTC and LT are registered trademarks of Linear Technology Corporation. MICROWIRE is a trademark of National Semiconductor Corporation. FUUCTIOUAL BLOCK DIAGRAW Functional Block Diagram: 16-Bit Rail-to-Rail DAC Differential Nonlinearity vs Input Code LTC1655: 4.5V TO 5.5V LTC1655: 2.048V LTC1655L: 2.7V TO 5.5V LTC1655L: 1.25V 1.0 8 6 0.8 VCC REF 0.6 2 DIN REF B) 0.4 1 CLK 16-BIT 16 LS 0.2 m P 3 CS/LD SARHNEIGFDT 1D6-ABCIT + VOUT 7 ERROR (–0.20 DAC – NL LATCH D–0.4 4 DOUT –0.6 –0.8 POWER-ON TO RESET –1.0 OTHER GND 0 16384 32768 49152 65535 DACS CODE 5 1655/55L TA01 1655/55L TA02 1

LTC1655/LTC1655L ABSOLUTE WMAXIWMUWM RATINUGS PACKAGE/ORDER IUFORWATIOU (Note 1) V to GND.............................................. –0.5V to 7.5V ORDER PART CC TTL Input Voltage.................................... –0.5V to 7.5V NUMBER VOUT, REF....................................... –0.5V to VCC + 0.5V TOP VIEW LTC1655CN8 Maximum Junction Temperature......................... 125(cid:176) C CLK 1 8 VCC LTC1655IN8 Operating Temperature Range DIN 2 7 VOUT LTC1655CS8 LTC1655C/LTC1655LC........................... 0(cid:176) C to 70(cid:176) C CS/LD 3 6 REF LTC1655IS8 LTC1655I/LTC1655LI........................ –40(cid:176) C to 85(cid:176) C LTC1655LCN8 DOUT 4 5 GND Storage Temperature Range................ –65(cid:176) C to 150(cid:176) C LTC1655LIN8 N8 PACKAGE S8 PACKAGE Lead Temperature (Soldering, 10 sec)................. 300(cid:176) C 8-LEAD PDIP 8-LEAD PLASTIC SO LTC1655LCS8 LTC1655LIS8 TJMAX = 125(cid:176)C, q JA = 100(cid:176)C/W (N8) TJMAX = 125(cid:176)C, q JA = 150(cid:176)C/W (S8) S8 PART MARKING 1655 1655I 1655L 1655LI Consult factory for Military grade parts. ELECTRICAL CHARACTERISTICS The l denotes specifications which apply over the full operating temperature range, otherwise specifications are at T = 25(cid:176) C. A V = 4.5V to 5.5V (LTC1655), V = 2.7V to 5.5V (LTC1655L); V unloaded, REF unloaded, unless otherwise noted. CC CC OUT SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS DAC Resolution l 16 Bits Monotonicity l 16 Bits DNL Differential Nonlinearity Guaranteed Monotonic (Note 2) LTC1655, REF = 2.2V, V = 5V (Note 8) (External) l – 0.3 – 1.0 LSB CC LTC1655L, REF = 2.2V, V = 5V (Note 8) (External) l – 0.5 – 1.0 LSB CC INL Integral Nonlinearity LTC1655, REF = 2.2V, V = 5V (Note 8) (External) l – 8 – 20 LSB CC LTC1655L, REF = 2.2V, V = 5V (Note 8) (External) l – 8 – 20 LSB CC ZSE Zero Scale Error LTC1655 l 0 3.0 mV LTC1655L l 0 3.5 mV V Offset Error Measured at Code 200 OS LTC1655, REF = 2.2V, V = 5V (Note 8) (External) l – 0.5 – 3.0 mV CC LTC1655L, REF = 1.3V, V = 2.7V (Note 8) (External) l – 0.5 – 3.5 mV CC V TC Offset Error Tempco – 5 m V/(cid:176) C OS Gain Error REF = 2.2V (External), V = 5V (Note 8) l – 5 – 16 LSB CC Gain Error Drift 0.5 ppm/(cid:176) C Power Supply V Positive Supply Voltage For Specified Performance CC LTC1655 l 4.5 5.5 V LTC1655L l 2.7 5.5 V I Supply Current (Note 3) l 600 1200 m A CC 2

LTC1655/LTC1655L ELECTRICAL CHARACTERISTICS The l denotes specifications which apply over the full operating temperature range, otherwise specifications are at T = 25(cid:176) C. A V = 4.5V to 5.5V (LTC1655), V = 2.7V to 5.5V (LTC1655L); V unloaded, REF unloaded, unless otherwise noted. CC CC OUT SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Op Amp DC Performance Short-Circuit Current Low V Shorted to GND OUT LTC1655 l 70 120 mA LTC1655L l 70 140 mA Short-Circuit Current High V Shorted to V OUT CC LTC1655 l 80 140 mA LTC1655L l 70 150 mA Output Impedance to GND Input Code = 0 LTC1655 l 40 120 W LTC1655L l 70 160 W Output Line Regulation Input Code = 65535, with Internal Reference – 3 mV/V AC Performance Voltage Output Slew Rate (Note 4) l – 0.3 – 0.7 V/m s Voltage Output Settling Time (Note 4) to 0.0015% (16-Bit Settling Time), V = 5V 20 m s CC (Note 4) to 0.012% (13-Bit Settling Time), V = 5V 10 m s CC Digital Feedthrough (Note 5) 0.3 nV-s Midscale Glitch Impulse DAC Switched Between 8000 and 7FFF 12 nV-s H H Output Voltage Noise LTC1655, At 1kHz 280 nV(cid:214) Hz Spectral Density LTC1655L, At 1kHz 220 nV(cid:214) Hz Reference Output Reference Output Voltage LTC1655 l 2.036 2.048 2.060 V LTC1655L l 1.240 1.250 1.260 V Reference Input Range (Notes 6, 7) LTC1655 2.2 V /2 V CC LTC1655L 1.3 V /2 V CC Reference Output Tempco LTC1655 5 ppm/(cid:176) C LTC1655L 10 ppm/(cid:176) C Reference Input Resistance LTC1655, REF Overdriven to 2.2V l 8.5 13 kW LTC1655L, REF Overdriven to 1.3V l 7.0 13 kW Reference Short-Circuit Current l 40 100 mA Reference Output Line Regulation – 1.5 mV/V Reference Load Regulation I = 100m A l 5 mV/A OUT Reference Output Voltage Noise LTC1655, At 1kHz 150 nV(cid:214) Hz Spectral Density LTC1655L, At 1kHz 115 nV(cid:214) Hz Digital I/O V Digital Input High Voltage LTC1655 l 2.4 V IH LTC1655L l 2.0 V V Digital Input Low Voltage LTC1655 l 0.8 V IL LTC1655L l 0.6 V V Digital Output High Voltage LTC1655, I = –1mA l V – 1.0 V OH OUT CC LTC1655L, I = –1mA l V – 0.7 V OUT CC V Digital Output Low Voltage LTC1655, I = 1mA l 0.4 V OL OUT LTC1655L, I = 1mA l 0.4 V OUT 3

LTC1655/LTC1655L ELECTRICAL CHARACTERISTICS The l denotes specifications which apply over the full operating temperature range, otherwise specifications are at T = 25(cid:176) C. A V = 4.5V to 5.5V (LTC1655), V = 2.7V to 5.5V (LTC1655L); V unloaded, REF unloaded, unless otherwise noted. CC CC OUT SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS I Digital Input Leakage V = GND to V l – 10 m A LEAK IN CC C Digital Input Capacitance (Note 7) 10 pF IN Switching t D Valid to CLK Setup LTC1655 l 40 ns 1 IN LTC1655L l 60 ns t D Valid to CLK Hold LTC1655 l 0 ns 2 IN LTC1655L l 0 ns t CLK High Time LTC1655 l 40 ns 3 LTC1655L l 60 ns t CLK Low Time LTC1655 l 40 ns 4 LTC1655L l 60 ns t CS/LD Pulse Width LTC1655 l 50 ns 5 LTC1655L l 80 ns t LSB CLK to CS/LD LTC1655 l 40 ns 6 LTC1655L l 60 ns t CS/LD Low to CLK LTC1655 l 20 ns 7 LTC1655L l 30 ns t D Output Delay LTC1655, C = 15pF l 20 120 ns 8 OUT LOAD LTC1655L, C = 15pF l 20 300 ns LOAD t CLK Low to CS/LD Low LTC1655 l 20 ns 9 LTC1655L l 30 ns Note 1: Absolute Maximum Ratings are those values beyond which the life Note 5: Part is clocked with pin toggling between 1s and 0s, CS/LD is low. of a device may be impaired. Note 6: Reference can be overdriven (see Applications Information). Note 2: Nonlinearity is defined from code 128 to code 65535 (full scale). Note 7: Guaranteed by design. Not subject to test. See Applications Information. Note 8: Guaranteed by correlation for other reference and supply Note 3: DAC switched between all 1s and all 0s. VFS = 4.096V. conditions. Note 4: Digital inputs at 0V or V . CC 4

LTC1655/LTC1655L TYPICAL PERFORWMAUNCE CHARACTERISTICS V = 5V (LTC1655), V = 3V (LTC1655L) unless otherwise noted. CC CC TC1655 Differential Nonlinearity LTC1655L Differential Nonlinearity 1.0 1.0 B) 0.8 B) 0.8 LS 0.6 LS 0.6 Y ( Y ( T 0.4 T 0.4 RI RI A A E 0.2 E 0.2 N N NLI 0 NLI 0 O O N N AL –0.2 AL –0.2 NTI–0.4 NTI–0.4 DIFFERE––00..68 DIFFERE––00..68 –1.0 –1.0 0 16,384 32,768 49,152 65,535 0 16,384 32,768 49,152 65,535 DIGITAL INPUT CODE DIGITAL INPUT CODE 1655/55L G01 1655/55L G01a LTC1655 Integral Nonlinearity LTC1655L Integral Nonlinearity 10 10 8 8 SB) 6 SB) 6 Y (L 4 Y (L 4 ARIT 2 ARIT 2 NLINE 0 NLINE 0 NO –2 NO –2 RAL –4 RAL –4 G G NTE –6 NTE –6 I I –8 –8 –10 –10 0 16,384 32,768 49,152 65,535 128 16,480 32,832 49,184 65,535 DIGITAL INPUT CODE DIGITAL INPUT CODE 1655/55L G02 1655/55L G02a LTC1655 Minimum Supply LTC1655L Minimum Supply Headroom for Full Output Swing Headroom for Full Output Swing vs Load Current vs Load Current 1.2 2.0 ∆VOUT < 1LSB 1.8 ∆VOUT < 1LSB VOUT = 4.096V VOUT = 2.5V 1.0 CODE: ALL 1’s 1.6 CODE: ALL 1’s 125°C 1.4 0.8 V) V) (UT 125°C (UT 1.2 25°C VO 0.6 VO 1.0 V – CC 0.4 25°C –55°C V – CC 0.8 –55°C 0.6 0.4 0.2 0.2 0 0 0 5 10 15 0 5 10 15 LOAD CURRENT (mA) LOAD CURRENT (mA) 1655/55L G03 1655/55L G03a 5

LTC1655/LTC1655L TYPICAL PERFORWMAUNCE CHARACTERISTICS V = 5V (LTC1655), V = 3V (LTC1655L) unless otherwise noted. CC CC LTC1655 Minimum Output Voltage LTC1655L Minimum Output vs Output Sink Current Voltage vs Output Sink Current 1.0 0.8 CODE: ALL 0s CODE: ALL 0s V) V) E ( 0.8 E ( G G 0.6 TA TA 125°C 25°C –55°C L L O O N V 0.6 N V W 125°C W O O 0.4 D D LL- 0.4 LL- U U UT P 25°C –55°C UT P 0.2 TP 0.2 TP U U O O 0 0 0 5 10 15 0 5 10 15 OUTPUT SINK CURRENT (mA) OUTPUT SINK CURRENT (mA) 1655/55L G04 1655/55L G04a LTC1655 Full-Scale Voltage vs LTC1655L Full-Scale Voltage vs Temperature Temperature 4.10 2.510 V) V)2.505 GE (4.09 GE ( A A T T L L O O E V E V2.500 L L A A C C L-S4.08 L-S L L U U2.495 F F 4.07 2.490 –55 –25 5 35 65 95 125 –55 –25 5 35 65 95 125 TEMPERATURE (°C) TEMPERATURE (°C) 1655/55L G05 1655/55L G05a LTC1655 Offset vs Temperature LTC1655L Offset vs Temperature 1.0 0.6 0.8 0.5 0.6 0.4 0.4 mV) 0.2 mV) OFFSET (–0.02 OFFSET ( 0.3 –0.4 0.2 –0.6 0.1 –0.8 –1.0 0 –55 –10 35 80 125 –55 –10 35 80 125 TEMPERATURE (°C) TEMPERATURE (°C) 1655/55L G06 1655/55L G06a 6

LTC1655/LTC1655L TYPICAL PERFORWMAUNCE CHARACTERISTICS V = 5V (LTC1655), V = 3V (LTC1655L) unless otherwise noted. CC CC LTC1655 Supply Current vs LTC1655L Supply Current vs Logic Input Voltage Logic Input Voltage 3.0 1.0 2.6 A) A) T (m 2.2 T (m 0.8 N N E E R R R 1.8 R U U C C Y Y L L P 1.4 P 0.6 P P U U S S 1.0 0.6 0.4 0 1 2 3 4 5 0 1 2 3 LOGIC INPUT VOLTAGE (V) LOGIC INPUT VOLTAGE (V) 1655/55L G07 1655/55L G07a LTC1655 Supply Current vs LTC1655L Supply Current vs Temperature Temperature 700 580 680 560 µNT (A) 660 VCC = 5.5V µNT (A) 540 RE RE VCC = 3.3V R 640 R 520 U U SUPPLY C 620 VCC = 5V SUPPLY C 500 VCC = 3V 600 VCC = 4.5V 480 VCC = 2.7V 580 460 –55–35 –15 5 25 45 65 85 105 125 –55–35 –15 5 25 45 65 85 105 125 TEMPERATURE (°C) TEMPERATURE (°C) 1655/55L G08 1655/55L G08a LTC1655 Large-Signal Transient LTC1655L Large-Signal Transient Response Response 5 3 VOUT UNLOADED VOUT UNLOADED TA = 25°C TA = 25°C 4 V) V) E ( E ( 2 AG 3 AG T T L L O O V V UT 2 UT P P T T 1 U U O O 1 0 0 TIME (5µs/DIV) TIME (5µs/DIV) 1655/55L G09 1655/55L G10 7

LTC1655/LTC1655L PIUN FUUNCTIOUNS CLK (Pin 1): The TTL Level Input for the Serial Interface GND (Pin 5): Ground. Clock. REF (Pin 6): Reference. Output of the internal reference is D (Pin 2): The TTL Level Input for the Serial Interface 2.048V (LTC1655), 1.25V (LTC1655L). There is a gain of IN Data. Data on the D pin is latched into the shift register two from this pin to the output. The reference can be IN on the rising edge of the serial clock and is loaded MSB overdriven from 2.2V to V /2 (LTC1655) and 1.3V to CC first. The LTC1655/LTC1655L requires a 16-bit word. V /2 (LTC1655L). When tied to V /2, the output will CC CC swing from GND to V . The output can only swing to CS/LD (Pin 3): The TTL Level Input for the Serial Inter- CC within its offset specification of V (see Applications face Enable and Load Control. When CS/LD is low, the CC Information). CLK signal is enabled, so the data can be clocked in. When CS/LD is pulled high, data is loaded from the shift V (Pin 7): Deglitched Rail-to-Rail Voltage Output. V OUT OUT register into the DAC register, updating the DAC output. clears to 0V on power-up. D (Pin 4): Output of the Shift Register. Becomes valid V (Pin 8): Positive Supply Input. 4.5V £ V £ 5.5V OUT CC CC on the rising edge of the serial clock and swings from GND (LTC1655), 2.7V £ V £ 5.5V (LTC1655L). Requires a CC to V . 0.1m F bypass capacitor to ground. CC TIW IU G DIAGRAW t9 t1 t7 t2 t4 t3 t6 CLK 1 2 3 15 16 D15 D0 DIN MSB D14 D13 D1 LSB t5 CS/LD t8 DOUT PREVIODU1S5 WORD PREVIODU1S4 WORD PREVIODU1S3 WORD PREVIODU0S WORD CURREDN1T5 WORD 1655/55L TD 8

LTC1655/LTC1655L DEFIU ITIOU S Differential Nonlinearity (DNL): The difference between lowest code that guarantees the output will be greater than the measured change and the ideal 1LSB change for any zero. The INL error at a given input code is calculated as two adjacent codes. The DNL error between any two codes follows: is calculated as follows: INL = [V – V – (V – V )(code/65535)]/LSB OUT OS FS OS DNL = (D V – LSB)/LSB OUT Where V is the output voltage of the DAC measured at OUT Where D V is the measured voltage difference between the given input code. OUT two adjacent codes. Least Significant Bit (LSB): The ideal voltage difference Digital Feedthrough: The glitch that appears at the analog between two successive codes. output caused by AC coupling from the digital inputs when LSB = 2V /65536 they change state. The area of the glitch is specified in REF (nV)(sec). Resolution (n): Defines the number of DAC output states (2n) that divide the full-scale range. Resolution does not Full-Scale Error (FSE): The deviation of the actual full- imply linearity. scale voltage from ideal. FSE includes the effects of offset and gain errors (see Applications Information). Voltage Offset Error (V ): Nominally, the voltage at the OS output when the DAC is loaded with all zeros. A single Gain Error (GE): The difference between the full-scale supply DAC can have a true negative offset, but the output output of a DAC from its ideal full-scale value after offset cannot go below zero (see Applications Information). error has been adjusted. For this reason, single supply DAC offset is measured at Integral Nonlinearity (INL): The deviation from a straight the lowest code that guarantees the output will be greater line passing through the endpoints of the DAC transfer than zero. curve (Endpoint INL). Because the output cannot go below zero, the linearity is measured between full scale and the OPERATIOU Serial Interface of the chips, then the CS/LD signal is pulled high to update all of them simultaneously. The shift register and DAC The data on the D input is loaded into the shift register IN register are cleared to all 0s on power-up. on the rising edge of the clock. The MSB is loaded first. The DAC register loads the data from the shift register when Voltage Output CS/LD is pulled high. The clock is disabled internally when The LTC1655/LTC1655L rail-to-rail buffered output can CS/LD is high. Note: CLK must be low before CS/LD is source or sink 5mA over the entire operating temperature pulled low to avoid an extra internal clock pulse. The input range while pulling to within 600mV of the positive supply word must be 16 bits wide. voltage or ground. The output stage is equipped with a The buffered output of the 16-bit shift register is available deglitcher that gives a midscale glitch of 12nV-s. At power- on the D pin which swings from GND to V . up, the output clears to 0V. OUT CC Multiple LTC1655s/LTC1655Ls may be daisy-chained to- The output swings to within a few millivolts of either sup- gether by connecting the D pin to the D pin of the next ply rail when unloaded and has an equivalent output resis- OUT IN chip while the clock and CS/LD signals remain common to tance of 40W (70W for the LTC1655L) when driving a load all chips in the daisy chain. The serial data is clocked to all to the rails. The output can drive 1000pF without going into oscillation. 9

LTC1655/LTC1655L APPLICATIOUNS INUFORWMATIOUN Rail-to-Rail Output Considerations error (FSE) is positive, the output for the highest codes limits at V as shown in Figure 1c. No full-scale limiting In any rail-to-rail DAC, the output swing is limited to CC can occur if V is less than (V – FSE)/2. voltages within the supply range. REF CC Offset and linearity are defined and tested over the region If the DAC offset is negative, the output for the lowest of the DAC transfer function where no output limiting can codes limits at 0V as shown in Figure 1b. occur. Similarly, limiting can occur near full-scale when the REF pin is tied to V /2. If V = V /2 and the DAC full-scale CC REF CC POSITIVE FSE VCC VREF = VCC/2 OUTPUT VOLTAGE INPUT CODE (1c) VCC OUTPUT VREF = VCC/2 VOLTAGE 0 32768 65535 INPUT CODE (1a) OUTPUT VOLTAGE 0V NEGATIVE INPUT CODE OFFSET (1b) 1655/55L F01 Figure 1. Effects of Rail-to-Rail Operation On a DAC Transfer Curve. (a) Overall Transfer Function (b) Effect of Negative Offset for Codes Near Zero Scale (c) Effect of Positive Full-Scale Error for Input Codes Near Full Scale When V = V /2 REF CC 10

LTC1655/LTC1655L TYPICAL APPLICATIONUS This circuit shows how to use an LTC1655 to make an is used for the digitally controlled 0mA to 16mA current. optoisolated digitally controlled 4mA to 20mA process R is a sense resistor and the op amp modulates the S controller. The controller circuitry, including the transistor Q1 to provide the 4mA to 20mA current through optoisolation, is powered by the loop voltage that can have this resistor. The potentiometers allow for offset and full- a wide range of 6V to 30V. The 2.048V reference output of scale adjustment. The control circuitry dissipates well the LTC1655 is used for the 4mA offset current and V under the 4mA budget at zero scale. OUT An Isolated 4mA to 20mA Process Controller VLOOP 6V TO 30V 150k LT®1121-5 1% 20k IN OUT 8 6 1m F 1 VCC VREF CLK 75k OPTOISOLFARTOEMD 2 DIN LTC1655 VOUT 7 1% 5k 3 + 7 INPUTS 3 CS/LD LT®1077 6 1k Q1 2N3440 GND 3k 2 – 5 4 RS 5V 10W OPTOISOLATORS 10k IOUT CLK DIN 1655/55L TA03 CS/LD CLK 500W 4N28 DIN CS/LD 11

LTC1655/LTC1655L TYPICAL APPLICATIONUS This circuit shows how to make a bipolar output 16-bit the onboard reference is always sourcing current and DAC with a wide output swing using an LTC1655 and an never has to sink any current even when V is at full OUT LT1077. R1 and R2 resistively divide down the LTC1655 scale. The LT1077 output will have a wide bipolar output output and an offset is summed in using the LTC1655 swing of –4.096V to 4.096V as shown in the figure below. onboard 2.048V reference and R3 and R4. R5 ensures that With this output swing 1LSB = 125m V. A Wide Swing, Bipolar Output 16-Bit DAC 5V 0.1m F 8 1 VCC CLK m P 2 DIN LTC1655 VOUT 7 3 R1 CS/LD 100k 5V GND VREF 1% 5 6 3 + 7 TRANSFER CURVE R2020k LT1077 6 VOUT:(2)(D6I5N5)(346.096) – 4.096V 2 4.096 1% – 4 R3 R4 100k –5V 200k 1% 1% 0 32768 65535 VOUT DIN 1655/55L TA05 R5 100k 1% –4.096 12

LTC1655/LTC1655L TYPICAL APPLICATIONUS This circuit shows a digitally programmable current source chosen to be 412W , the output current will range from from an external voltage source using an external op amp, 0mA at zero scale to 10mA at full scale. The minimum an LT1218 and an NPN transistor (2N3440). Any digital voltage for V is determined by the load resistor R and S L word from 0 to 65535 is loaded into the LTC1655 and its Q1’s V voltage. With a load resistor of 50W , the CESAT output correspondingly swings from 0V to 4.096V. This voltage source can be 5V. voltage will be forced across the resistor R . If R is A A Digitally Programmable Current Source 5V 5V < VS < 100V 8 0.1µF FOR RL £ 50Ω 1 VCC µP 23 CDLINK LTC1655 VOUT 7 3 +LT12718 6 QR1L IOUT »= (( 0D6 m5 I N5 A )3 ( T6 4 O) . 0( R1 9 0 6A m) ) A CS/LD 2 2N3440 GND – 4 5 RA 412Ω 1% 1655/55L TA04 13

LTC1655/LTC1655L PACKAGE DESCRIPTIOUN Dimensions in inches (millimeters) unless otherwise noted. N8 Package 8-Lead PDIP (Narrow 0.300) (LTC DWG # 05-08-1510) 0.400* (10.160) MAX 8 7 6 5 0.255 – 0.015* (6.477 – 0.381) 1 2 3 4 0.300 – 0.325 0.045 – 0.065 0.130 – 0.005 (7.620 – 8.255) (1.143 – 1.651) (3.302 – 0.127) 0.065 (1.651) 0.009 – 0.015 TYP (0.229 – 0.381) 0.125 (3.175) 0.020 +0.035 MIN (0.508) (0.325–0.015) 0.100 0.018 – 0.003 MIN 8.255+0.889 (2.54) (0.457 – 0.076) –0.381 BSC N8 1098 *THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm) 14

LTC1655/LTC1655L PACKAGE DESCRIPTIOUN Dimensions in inches (millimeters) unless otherwise noted. S8 Package 8-Lead Plastic Small Outline (Narrow 0.150) (LTC DWG # 05-08-1610) 0.189 – 0.197* (4.801 – 5.004) 8 7 6 5 0.228 – 0.244 0.150 – 0.157** (5.791 – 6.197) (3.810 – 3.988) 1 2 3 4 0.010 – 0.020 · 45(cid:176) 0.053 – 0.069 (0.254 – 0.508) (1.346 – 1.752) 0.004 – 0.010 0.008 – 0.010 (0.203 – 0.254) 0°– 8° TYP (0.101 – 0.254) 0.016 – 0.050 0.014 – 0.019 0.050 (0.406 – 1.270) (0.355 – 0.483) (1.270) TYP BSC *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE SO8 1298 Information furnished by Linear Technology Corporation is believed to be accurate and reliable. 15 However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.

LTC1655/LTC1655L TYPICAL APPLICATIONU This circuit shows how to measure negative offset. Since measure this negative offset, a negative supply is needed. LTC1655/LTC1655L operate on a single supply, if its Connect resistor R1 as shown in the figure below. The offset is negative, the output for code 0 limits to 0V. To output voltage is the offset when code 0 is loaded in. Negative Offset Measurement 5V 0.1m F 8 1 VCC CLK m P 2 DIN LLTTCC11665555L/ VOUT 7 3 R1 CS/LD GND 100k 5 –5V 1655/55L TA06 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTC1257 Single 12-Bit V DAC, Full Scale: 2.048V, V : 4.75V to 15.75V, 5V to 15V Single Supply, Complete V DAC SO-8 Package OUT CC OUT in Reference Can Be Overdriven Up to 12V, i.e., FS = 12V MAX LTC1446/ Dual 12-Bit V DACs in SO-8 Package LTC1446: V = 4.5V to 5.5V, V = 0V to 4.095V OUT CC OUT LTC1446L LTC1446L: V = 2.7V to 5.5V, V = 0V to 2.5V CC OUT LTC1448 Dual 12-Bit V DAC, V : 2.7V to 5.5V Output Swings from GND to REF. REF Input Can Be Tied to V OUT CC CC LTC1450/ Single 12-Bit V DACs with Parallel Interface LTC1450: V = 4.5V to 5.5V, V = 0V to 4.095V OUT CC OUT LTC1450L LTC1450L: V = 2.7V to 5.5V, V = 0V to 2.5V CC OUT LTC1451 Single Rail-to-Rail 12-Bit DAC, Full Scale: 4.095V, V : 4.5V to 5.5V, 5V, Low Power Complete V DAC in SO-8 Package CC OUT Internal 2.048V Reference Brought Out to Pin LTC1452 Single Rail-to-Rail 12-Bit V Multiplying DAC, V : 2.7V to 5.5V Low Power, Multiplying V DAC with Rail-to-Rail OUT CC OUT Buffer Amplifier in SO-8 Package LTC1453 Single Rail-to-Rail 12-Bit V DAC, Full Scale: 2.5V, V : 2.7V to 5.5V 3V, Low Power, Complete V DAC in SO-8 Package OUT CC OUT LTC1454/ Dual 12-Bit V DACs in SO-16 Package with Added Functionality LTC1454: V = 4.5V to 5.5V, V = 0V to 4.095V OUT CC OUT LTC1454L LTC1454L: V = 2.7V to 5.5V, V = 0V to 2.5V CC OUT LTC1456 Single Rail-to-Rail Output 12-Bit DAC with Clear Pin, Low Power, Complete V DAC in SO-8 OUT Full Scale: 4.095V, V : 4.5V to 5.5V Package with Clear Pin CC LTC1458/ Quad 12 Bit Rail-to-Rail Output DACs with Added Functionality LTC1458: V = 4.5V to 5.5V, V = 0V to 4.095V CC OUT LTC1458L LTC1458L: V = 2.7V to 5.5V, V = 0V to 2.5V CC OUT LTC1650 Single 16-Bit V Industrial DAC in 16-Pin SO, V = – 5V Low Power, Deglitched, 4-Quadrant Mulitplying V DAC, OUT CC OUT Output Swing – 4.5V LTC1654 Dual 14-Bit DAC 1LSB DNL, 2 DACs in SO-8 Footprint LTC1657/ Single 16-Bit V DAC with Parallel Interface LTC1657: V = 5V, Low Power, Deglitched, V = 0V to 4.096V OUT CC OUT LTC1657L LTC1657L: V = 3V, Low Power, Deglitched, V = 0V to 2.5V CC OUT LTC1658 Single Rail-to-Rail 14-Bit V DAC in 8-Pin MSOP, Low Power, Multiplying V DAC in MS8 Package. Output OUT OUT V = 2.7V to 5.5V Swings from GND to REF. REF Input Can Be Tied to V CC CC LTC1659 Single Rail-to-Rail 12-Bit V DAC in 8-Pin MSOP, Low Power, Multiplying V DAC in MS8 Package. Output OUT OUT V = 2.7V to 5.5V Swings from GND to REF. REF Input Can Be Tied to V CC CC 16 Linear Technology Corporation 16555lf LT/TP 0800 4K • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408)4 32-1900 l FAX: (408) 434-0507 l w ww.linear-tech.com ª LINEAR TECHNOLOGY CORPORATION 1998

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