LTC1595/LTC1596/LTC1596-1 Serial 16-Bit Multiplying DACs FEATURES DESCRIPTION n SO-8 Package (LTC1595) The LTC®1595/LTC1596/LTC1596-1 are serial input, 16-bit n DNL and INL: 1LSB Max multiplying current output DACs. The LTC1595 is pin and n Low Glitch Impulse: 1nV-s Typ hardware compatible with the 12-bit DAC8043 and comes n Fast Settling to 1LSB: 2µs (with LT1468) in 8-pin PDIP and SO packages. The LTC1596 is pin and n Pin Compatible with Industry Standard hardware compatible with the 12-bit DAC8143/AD7543 12-Bit DACs: DAC8043 and DAC8143/AD7543 and comes in the 16-pin SO wide package. n 4-Quadrant Multiplication Both are specified over the industrial temperature range. n Low Supply Current: 10µA Max Sensitivity of INL to op amp V is reduced by five times OS n Power-On Reset compared to the industry standard 12-bit DACs, so most n LTC1595/LTC1596: Resets to Zero-Scale systems can be easily upgraded to true 16-bit resolution n LTC1596-1: Resets to Mid-Scale and linearity without requiring more precise op amps. n 3-Wire SPI and MICROWIRE Compatible Serial Interface These DACs include an internal deglitching circuit that n Daisy-Chain Serial Output (LTC1596) reduces the glitch impulse by more than ten times to less n Asynchronous Clear Input than 1nV-s typ. n LTC1596: Clears to Zero-Scale The DACs have a clear input and a power-on reset. The n LTC1596-1: Clears to Mid-Scale LTC1595 and LTC1596 reset to zero-scale. The LTC1596-1 is a version of the LTC1596 that resets to mid-scale. APPLICATIONS L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. n Process Control and Industrial Automation n Software Controlled Gain Adjustment n Digitally Controlled Filter and Power Supplies n Automatic Test Equipment TYPICAL APPLICATION SO-8 Multiplying 16-Bit DAC Has Easy 3-Wire Serial Interface Integral Nonlinearity 1.0 VIN 5V 0.8 8 1 2 33pF LSB) 0.6 CLOCK 7 CLVKDD VREF RFB ARITY ( 00..42 LDOAATDA 65 SLDRI LTC1595 OUT1 3 –LT®1468 VOUT NONLINE–0.20 GND + AL 4 GR–0.4 E T–0.6 N I 1595/96 TA01 –0.8 –1.0 0 16384 32768 49152 65535 DIGITAL INPUT CODE 1595/96 TA02 159561fc 1 For more information www.linear.com/LTC1595

LTC1595/LTC1596/LTC1596-1 ABSOLUTE MAXIMUM RATINGS (Note 1) V to AGND ............................................... –0.5V to 7V V , V to AGND .................–0.5V to (V + 0.5V) DD OUT1 OUT2 DD V to DGND............................................... –0.5V to 7V Maximum Junction Temperature ..........................150°C DD AGND to DGND ........................................... V + 0.5V Operating Temperature Range DD DGND to AGND ............................................V + 0.5V LTC1595C/LTC1596C/LTC1596-1C .......... 0°C to 70°C DD V to AGND, DGND ..............................................±25V LTC1595I/LTC1596I/LTC1596-1I ......... –40°C to 85°C REF R to AGND, DGND ................................................±25V Storage Temperature Range ................. –65°C to 150°C FB Digital Inputs to DGND ...............–0.5V to (V + 0.5V) Lead Temperature (Soldering, 10 sec) .................. 300°C DD PIN CONFIGURATION TOP VIEW OUT1 1 16 RFB TOP VIEW OUT2 2 15 VREF VREF 1 8 VDD AGND 3 14 VDD RFB 2 7 CLK STB1 4 13 CLR OUT1 3 6 SRI LD1 5 12 DGND GND 4 5 LD SRO 6 11 STB4 SRI 7 10 STB3 N8 PACKAGE S8 PACKAGE 8-LEAD PDIP 8-LEAD PLASTIC SO STB2 8 9 LD2 TJMAX = 150°C, θJA = 130°C/W (N) TJMAX = 150°C, θJA = 190°C/W (S) SW PACKAGE 16-LEAD PLASTIC SO WIDE TJMAX = 150°C, θJA = 100°C/W (N) TJMAX = 150°C, θJA = 130°C/W (SW) 159561fc 2 For more information www.linear.com/LTC1595

LTC1595/LTC1596/LTC1596-1 ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LTC1595ACN8#PBF LTC1595ACN8#TRPBF LTC1595ACN8 8-Lead PDIP 0°C to 70°C LTC1595ACS8#PBF LTC1595ACS8#TRPBF 1595A 8-Lead Plastic SO 0°C to 70°C LTC1595BCN8#PBF LTC1595BCN8#TRPBF LTC1595BCN8 8-Lead PDIP 0°C to 70°C LTC1595BCS8#PBF LTC1595BCS8#TRPBF 1595B 8-Lead Plastic SO 0°C to 70°C LTC1595CCN8#PBF LTC1595CCN8#TRPBF LTC1595CCN8 8-Lead PDIP 0°C to 70°C LTC1595CCS8#PBF LTC1595CCS8#TRPBF 1595C 8-Lead Plastic SO 0°C to 70°C LTC1595AIN8#PBF LTC1595AIN8#TRPBF LTC1595AIN8 8-Lead PDIP –40°C to 85°C LTC1595AIS8#PBF LTC1595AIS8#TRPBF 1595AI 8-Lead Plastic SO –40°C to 85°C LTC1595BIN8#PBF LTC1595BIN8#TRPBF LTC1595BIN8 8-Lead PDIP –40°C to 85°C LTC1595BIS8#PBF LTC1595BIS8#TRPBF 1595BI 8-Lead Plastic SO –40°C to 85°C LTC1595CIN8#PBF LTC1595CIN8#TRPBF LTC1595CIN8 8-Lead PDIP –40°C to 85°C LTC1595CIS8#PBF LTC1595CIS8#TRPBF 1595CI 8-Lead Plastic SO –40°C to 85°C LTC1596ACSW#PBF LTC1596ACSW#TRPBF LTC1596ACSW 16-Lead Plastic SO Wide 0°C to 70°C LTC1596BCSW#PBF LTC1596BCSW#TRPBF LTC1596BCSW 16-Lead Plastic SO Wide 0°C to 70°C LTC1596CCSW#PBF LTC1596CCSW#TRPBF LTC1596CCSW 16-Lead Plastic SO Wide 0°C to 70°C LTC1596AISW#PBF LTC1596AISW#TRPBF LTC1596AISW 16-Lead Plastic SO Wide –40°C to 85°C LTC1596BISW#PBF LTC1596BISW#TRPBF LTC1596BISW 16-Lead Plastic SO Wide –40°C to 85°C LTC1596CISW#PBF LTC1596CISW#TRPBF LTC1596CISW 16-Lead Plastic SO Wide –40°C to 85°C LTC1596-1ACSW#PBF LTC1596-1ACSW#TRPBF LTC1596-1ACSW 16-Lead Plastic SO Wide 0°C to 70°C LTC1596-1BCSW#PBF LTC1596-1BCSW#TRPBF LTC1596-1BCSW 16-Lead Plastic SO Wide 0°C to 70°C LTC1596-1CCSW#PBF LTC1596-1CCSW#TRPBF LTC1596-1CCSW 16-Lead Plastic SO Wide 0°C to 70°C LTC1596-1AISW#PBF LTC1596-1AISW#TRPBF LTC1596-1AISW 16-Lead Plastic SO Wide –40°C to 85°C LTC1596-1BISW#PBF LTC1596-1BISW#TRPBF LTC1596-1BISW 16-Lead Plastic SO Wide –40°C to 85°C LTC1596-1CISW#PBF LTC1596-1CISW#TRPBF LTC1596-1CISW 16-Lead Plastic SO Wide –40°C to 85°C Consult LTC Marketing for parts specified with wider operating temperature ranges. Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ 159561fc 3 For more information www.linear.com/LTC1595

LTC1595/LTC1596/LTC1596-1 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T = 25°C. V = 5V ±10%, V = 10V, V = V = AGND = 0V, T = T to A DD REF OUT1 OUT2 A MIN T , unless otherwise noted. MAX LTC1595A/96A/96-1A LTC1595B/96B/96-1B LTC1595C/96C/96-1C SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS Accuracy Resolution l 16 16 16 Bits Monotonicity l 16 16 15 Bits INL Integral Nonlinearity (Note 2) T = 25°C ±0.25 ±1 ±2 ±4 LSB A T to T l ±0.35 ±1 ±2 ±4 LSB MIN MAX DNL Differential T = 25°C ±0.2 ±1 ±1 ±2 LSB A Nonlinearity T to T l ±0.2 ±1 ±1 ±2 LSB MIN MAX GE Gain Error (Note 3) T = 25°C 2 ±16 ±16 ±32 LSB A T to T l 3 ±16 ±32 ±32 LSB MIN MAX V = 5V ±10%, V = 10V, V = V = AGND = 0V, T = T to T , unless otherwise noted. DD REF OUT1 OUT2 A MIN MAX SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Gain Temperature Coefficient (Note 4) ∆Gain/∆Temperature l 1 2 ppm/°C I OUT1 Leakage Current (Note 5) T = 25°C ±3 nA LEAKAGE A T to T l ±15 nA MIN MAX Zero-Scale Error T = 25°C ±0.2 LSB A T to T l ±1 LSB MIN MAX PSRR Power Supply Rejection V = 5V ±10% l ±1 ±2 LSB/V DD Reference Input R V Input Resistance (Note 6) l 5 7 10 kΩ REF REF AC Performance Output Current Settling Time (Notes 7, 8) 1 µs Mid-Scale Glitch Impulse Using LT1122 Op Amp, C = 33pF 1 nV-s FEEDBACK Digital-to-Analog Glitch Impulse Full-Scale Transition, V = 0V, 2 nV-s REF Using LT1122 Op Amp, C = 33pF FEEDBACK Multiplying Feedthrough Error V = ±10V, 10kHz Sine Wave 1 mV REF P-P THD Total Harmonic Distortion (Note 9) 108 dB Equivalent DAC Thermal Noise Voltage Density (Note 10) f = 1kHz 11 nV/√Hz Analog Outputs (Note 4) C Output Capacitance (Note 4) DAC Register Loaded to All 1s, C l 115 130 pF OUT OUT1 DAC Register Loaded to All 0s, C l 70 80 pF OUT1 Digital Inputs V Digital Input High Voltage l 2.4 V IH V Digital Input Low Voltage l 0.8 V IL I Digital Input Current l 0.001 ±1 µA IN C Digital Input Capacitance (Note 4) V = 0V l 8 pF IN IN Digital Outputs: SRO (LTC1596/LTC1596-1) V Digital Output High Voltage I = 200µA l 4 V OH OH V Digital Output Low Voltage I = 1.6mA l 0.4 V OL OL 159561fc 4 For more information www.linear.com/LTC1595

LTC1595/LTC1596/LTC1596-1 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T = 25°C. V = 5V ±10%, V = 10V, V = GND = 0V, T = T to T , A DD REF OUT1 A MIN MAX unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Timing Characteristics (LTC1595) t Serial Input to CLK Setup Time l 30 5 ns DS t Serial Input to CLK Hold Time l 30 5 ns DH t Serial Input Data Pulse Width l 60 ns SRI t Clock Pulse Width High l 60 ns CH t Clock Pulse Width Low l 60 ns CL t Load Pulse Width l 60 ns LD t LSB Clocked into Input Register to DAC Register Load Time l 0 ns ASB V = 5V ±10%, V = 10V, V = V = AGND = 0V, T = T to T , unless otherwise noted. DD REF OUT1 OUT2 A MIN MAX SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Timing Characteristics (LTC1596/LTC1596-1) t Serial Input to Strobe Setup Time STB1 Used as the Strobe l 30 5 ns DS1 t STB2 Used as the Strobe l 20 –5 ns DS2 t STB3 Used as the Strobe l 25 0 ns DS3 t STB4 Used as the Strobe l 20 –5 ns DS4 t Serial Input to Strobe Hold Time STB1 Used as the Strobe l 30 5 ns DH1 t STB2 Used as the Strobe l 40 15 ns DH2 t STB3 Used as the Strobe l 35 10 ns DH3 t STB4 Used as the Strobe l 40 15 ns DH4 t Serial Input Data Pulse Width l 60 ns SRI t to t Strobe Pulse Width (Note 11) l 60 ns STB1 STB4 t to t Strobe Pulse Width (Note 12) l 60 ns STB1 STB4 t , t LD Pulse Width l 60 ns LD1 LD2 t LSB Strobed Into Input Register to Load DAC l 0 ns ASB Register Time t Clear Pulse Width l 100 ns CLR t STB1 to SRO Propagation Delay C = 50pF l 30 150 ns PD1 L t STB2, STB3, STB4 to SRO Propagation Delay C = 50pF l 30 200 ns PD L Power Supply V Supply Voltage l 4.5 5 5.5 V DD I Supply Current Digital Inputs = 0V or V l 1.5 10 µA DD DD Note 1: Stresses beyond those listed under Absolute Maximum Ratings Note 8: To 0.0015% for a full-scale change, measured from the falling may cause permanent damage to the device. Exposure to any Absolute edge of LD1, LD2 or LD. Maximum Rating condition for extended periods may affect device Note 9: V = 6V at 1kHz. DAC register loaded with all 1s; REF RMS reliability and lifetime. op amp = LT1007. Note 2: ±1LSB = ±0.0015% of full-scale = ±15.3ppm of full-scale. Note 10: Calculation from e = √4kTRB where: k = Boltzmann constant n Note 3: Using internal feedback resistor. (J/°K); R = resistance (Ω); T = temperature (°K); B = bandwidth (Hz). Note 4: Guaranteed by design, not subject to test. Note 11: Minimum high time for STB1, STB2, STB4. Minimum low time Note 5: I with DAC register loaded with all 0s. for STB3. OUT1 Note 6: Typical temperature coefficient is 100ppm/°C. Note 12: Minimum low time for STB1, STB2, STB4. Minimum high time for STB3. Note 7: OUT1 load = 100Ω in parallel with 13pF. 159561fc 5 For more information www.linear.com/LTC1595

LTC1595/LTC1596/LTC1596-1 TYPICAL PERFORMANCE CHARACTERISTICS Mid-Scale Glitch Impulse Integral Nonlinearity (INL) Differential Nonlinearity (INL) 1.0 1.0 1nV-s TYP USING LT1122 OP AMP 0.8 B) 0.8 UTPUT VOLTAGE (mV) +100 VCFREEEFD =B AL1CD0KV F =A L3L3IpNFG EDGE RAL NONLINEARITY (LSB)––00000.....420462 NTIAL NONLINEARITY (LS––00000.....242046 O –10 INTEG––00..86 DIFFERE––00..68 –1.0 –1.0 0 1 2 3 4 0 16384 32768 49152 65535 0 16384 32768 49152 65535 TIME (s) DIGITAL INPUT CODE DIGITAL INPUT CODE 1595/96 G01 1595/96 G02 1595/96 G03 Integral Nonlinearity Differential Nonlinearity Full-Scale Settling Waveform vs Reference Voltage vs Reference Voltage 1.0 1.0 B) O5UVTD/PDAUICVT TY (LSB) RITY (LS NEARI LINEA SETGTALTINEDG NONLI 0.5 L NON 0.5 WAVEFORM AL TIA 500µV/DIV 1µs/DIV 1595/96 G04 INTEGR DIFFEREN USING LT1122 OP AMP CFEEDBACK = 33pF 0–10 –8 –6 –4 –2 0 2 4 6 8 10 0–10 –8 –6 –4 –2 0 2 4 6 8 10 REFERENCE VOLTAGE (V) REFERENCE VOLTAGE (V) 1595/96 G05 1595/96 G06 Multiplying Mode Frequency Integral Nonlinearity Differential Nonlinearity Response vs Digital Code vs Supply Voltage vs Supply Voltage 0 2 1.0 D15 ALL D14 BITS D13 ON B) ATTENUATION (dB)––––42860000 DDDDDDDDDDD11198765432210 RAL NONLINEARITY (LSB) 1 VREF = 10V NTIAL NONLINEARITY (LS 0.5 D1 G E D0 TE ER –100 ALL USING LT1122 OP AMP IN VREF = 2.5V DIFF BITS OFF CFEEDBACK = 33pF –120 0 0 100 1k 10k 100k 1M 10M 2 3 4 5 6 7 8 9 10 2 3 4 5 6 7 8 9 10 FREQUENCY (Hz) SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V) 1595/96 G07 1595/96 G08 1595/96 G09 159561fc 6 For more information www.linear.com/LTC1595

LTC1595/LTC1596/LTC1596-1 TYPICAL PERFORMANCE CHARACTERISTICS Supply Current Logic Threshold vs Logic Input Voltage vs Supply Voltage 1.0 3.0 VDD = 5V 0.9 2.5 0.8 NT (mA) 00..67 OLD (V) 2.0 RRE 0.5 ESH 1.5 U R C H LY 0.4 C T UPP 0.3 OGI 1.0 S L 0.2 0.5 0.1 0 0 0 1 2 3 4 5 0 1 2 3 4 5 6 7 8 9 10 INPUT VOLTAGE (V) SUPPLY VOLTAGE (V) 1595/96 G10 1595/96 G11 PIN FUNCTIONS LTC1595 STB1, STB2, STB3, STB4 (Pins 4, 8, 10, 11): Serial Interface Clock Inputs. STB1, STB2 and STB4 are rising V (Pin 1): Reference Input. REF edge triggered inputs. STB3 is a falling edge triggered RFB (Pin 2): Feedback Resistor. Normally tied to the output input (see Truth Tables). of the current to voltage converter op amp. LD1, LD2 (Pins 5, 9): Serial Interface Load Control Inputs. OUT1 (Pin 3): Current Output Pin. Tie to inverting input When LD1 and LD2 are pulled low, data is loaded from of current to voltage converter op amp. the shift register into the DAC register, updating the DAC output (see Truth Tables). GND (Pin 4): Ground Pin. SRO (Pin 6): The Output of the Shift Register. Becomes LD (Pin 5): The Serial Interface Load Control Input. When valid on the active edge of the serial clock. LD is pulled low, data is loaded from the shift register into the DAC register, updating the DAC output. SRI (Pin 7): The Serial Data Input. Data on the SRI pin is latched into the shift register on the active edge of the SRI (Pin 6): The Serial Data Input. Data on the SRI pin serial clock. Data is loaded MSB first. is latched into the shift register on the rising edge of the serial clock. Data is loaded MSB first. DGND (Pin 12): Digital Ground Pin. CLK (Pin 7): The Serial Interface Clock Input. CLR (Pin 13): The Clear Pin for the DAC. Clears DAC to zero-scale when pulled low on LTC1596. Clears DAC to V (Pin 8): The Positive Supply Input. 4.5V ≤ V ≤ 5.5V. DD DD mid-scale when pulled low on LTC1596-1. This pin should Requires a bypass capacitor to ground. be tied to V for normal operation. DD LTC1596/LTC1596-1 V (Pin 14): The Positive Supply Input. 4.5V ≤ V ≤ DD DD OUT1 (Pin 1): True Current Output Pin. Tie to inverting 5.5V. Requires a bypass capacitor to ground. input of current to voltage converter op amp. V (Pin 15): Reference Input. REF OUT2 (Pin 2): Complement Current Output Pin. Tie to R (Pin 16): Feedback Resistor. Normally tied to the analog ground. FB output of the current to voltage converter op amp. AGND (Pin 3): Analog Ground Pin. 159561fc 7 For more information www.linear.com/LTC1595

LTC1595/LTC1596/LTC1596-1 TRUTH TABLES Table 1. LTC1596/LTC1596-1 Input Register Table 2. LTC1596/LTC1596-1 DAC Register CONTROL INPUTS CONTROL INPUTS STB1 STB2 STB3 STB4 INPUT REGISTER AND SRO OPERATION CLR LD1 LD2 DAC Register Operation 0 1 0 Serial Data Bit on SRI Loaded Into Input 0 X X Reset DAC Register and Input Register to Register, MSB First All 0s (LTC1596) or to Mid-Scale (LTC1596-1) 0 1 0 Data Bit or SRI Appears on SRO Pin After (Asynchronous Operation) 0 0 0 16 Clocked Bits 1 1 X No DAC Register Operation 0 0 1 1 X 1 1 X X X No Input Register Operation X 1 X X No SRO Operation 1 0 0 Load DAC Register with the Contents of Input X X 0 X Register X X X 1 BLOCK DIAGRAM (LTC1595) 56k 56k VREF 1 2 RFB 56k 56k 56k 56k 56k 56k 56k 112k 112k 112k 112k 7k 3 OUT1 VDD 8 4 GND DECODER D15 D14 D13 D12 D11 • • • D0 (MSB) (LSB) LD 5 LOAD DAC REGISTER CLK 7 CLK INPUT 16-BIT SHIFT REGISTER IN 6 SRI 1595 BD TIMING DIAGRAM (LTC1595) tDS tDH tCL tCH CLK INPUT tSRI PREVIOUS D15 D0 D14 D1 SRI WORD MSB LSB tASB LD tLD 1595 TD 159561fc 8 For more information www.linear.com/LTC1595

LTC1595/LTC1596/LTC1596-1 BLOCK DIAGRAM (LTC1596/LTC1596-1) 56k 56k VREF 15 16 RFB 56k 56k 56k 56k 56k 56k 56k 112k 112k 112k 112k 7k 1 OUT1 VDD 14 2 OUT2 3 AGND DECODER CLR 13 CLR D15 D14 D13 D12 D11 • • • D0 LD1 5 (MSB) (LSB) LOAD DAC REGISTER LD2 9 CLR STB1 4 CLK INPUT 16-BIT SHIFT REGISTER IN 7 SRI STB2 8 OUT 1596 BD STB3 10 STB4 11 6 SRO DGND 12 TIMING DIAGRAM (LTC1596/LTC1596-1) tDS1tDH1 tDS2tDH2 ttDDSS34ttDDHH34 ttSSTTBB12 STROBE INPUT tSTB3 STB1, STB2, STB4 tSTB4 tSTB1 (INVERT FOR STB3) tSTB2 tSTB3 tSTB4 D15 D0 SRI D14 D13 D1 MSB LSB tSRI tASB tLD1 LD1, LD2 tLD2 tPD tPD1 SRO D15 (MSB) D14 D13 D0 (LSB) D15 (MSB) PREVIOUS WORD PREVIOUS WORD PREVIOUS WORD PREVIOUS WORD CURRENT WORD 1596 TD 159561fc 9 For more information www.linear.com/LTC1595

LTC1595/LTC1596/LTC1596-1 APPLICATIONS INFORMATION Description The 16-pin LTC1596 can operate in identical fashion to the LTC1595 but offers additional pins for flexibility. Four The LTC1595/LTC1596 are 16-bit multiplying DACs which clock pins are available STB1, STB2, STB3 and STB4. STB1, have serial inputs and current outputs. They use preci- STB2 and STB4 operate like the CLK pin of the LTC1595, sion R/2R technology to provide exceptional linearity and capturing data on their rising edges. STB3 captures data stability. The devices operate from a single 5V supply and on its falling edge (see Truth Table 1). provide ±10V reference input and voltage output ranges when used with an external op amp. These devices have The LTC1596 has two load pins, LD1 and LD2. To load data, a proprietary deglitcher that reduces glitch impulse to both pins must be taken low. If one of the pins is grounded, 1nV-s over a 0V to 10V output range. the other pin will operate identically to LTC1595’s LD pin. An asynchronous clear input (CLR) resets the LTC1596 to Serial I/O zero-scale (and the LTC1596-1 to mid-scale) when pulled low (see Truth Table 2). The LTC1595/LTC1596 have SPI/MICROWIRE compatible serial ports that accept 16-bit serial words. Data is accepted The LTC1596 also has a data output pin SRO that can be MSB first and loaded with a load pin. connected to the SRI input of another DAC to daisy chain multiple DACs on one 3-wire interface (see LTC1596 The 8-pin LTC1595 has a 3-wire interface. Data is shifted Timing Diagram). into the SRI data input on the rising edge of the CLK pin. At the end of the data transfer, data is loaded into the DAC Unipolar (2-Quadrant Multiplying) Mode register by pulling the LD pin low (see LTC1595 Timing (V = 0V to –V ) Diagram). OUT REF The LTC1595/LTC1596 can be used with a single op amp to provide 2-quadrant multiplying operation as shown in Figure 1. With a fixed –10V reference, the circuits shown give a precision unipolar 0V to 10V output swing. VREF –10V TO 10V 5V 0.1µF 13 14 15 16 10 STB3 CLR VDD VREF RFB 33pF 4 STB1 µP 7 SRI OUT1 1 – 5 6 LSDR1O LTC1596 LT1001 0VVO UTTO –VREF 98 LD2 OUT2 2 + STB2 11 STB4 DGND AGND 12 3 TO NEXT DAC 1595/96 F01a FOR DAISY-CHAINING (a) 5V V–1R0EVF TO 10V Table 1. Unipolar Binary Code Table 0.1µF 8 1 2 DIGITAL INPUT BINARY NUMBER 33pF 7 VDD VREF RFB IN DAC REGISTER ANALOG OUTPUT VOUT CLK P 6 SRI LTC1595 OUT1 3 – MSB LSB 5 LD LT1001 VOUT 1111 1111 1111 1111 –VREF (65,535/65,536) GND + 0V TO –VREF 1000 0000 0000 0000 –VREF (32,768/65,536) = –VREF/2 4 1595/96 F01b 0000 0000 0000 0001 –VREF (1/65,536) 0000 0000 0000 0000 0V (b) Figure 1. Unipolar Operation (2-Quadrant Multiplication) V = 0V to –V OUT REF 159561fc 10 For more information www.linear.com/LTC1595

LTC1595/LTC1596/LTC1596-1 APPLICATIONS INFORMATION Bipolar (4-Quadrant Multiplying) Mode INL degradation and 0.15LSB DNL degradation with a 10V (V = –V to V ) full-scale range. The main effects of op amp offset will OUT REF REF be a degradation of zero-scale error equal to the op amp The LTC1595/LTC1596 can be used with a dual op amp offset, and a degradation of full-scale error equal to twice and three external resistors to provide 4-quadrant multi- the op amp offset. For example, the same 500µV op amp plying operation as shown in Figure 2 (last page). With a offset will cause a 3.3LSB zero-scale error and a 6.5LSB fixed 10V reference, the circuits shown give a precision full-scale error with a 10V full-scale range. bipolar –10V to 10V output swing. Using the LTC1596-1 will cause the power-on reset and clear pin to reset the Op amp input bias current (I ) contributes only a zero- BIAS DAC to mid-scale (bipolar zero). scale error equal to I (R ) = I (R ) = I (7k). BIAS FB BIAS REF BIAS Table 2 shows a selection of LTC op amps which are Op Amp Selection suitable for use with the LTC1595/LTC1596. For a thor- ough discussion of 16-bit DAC settling time and op amp Because of the extremely high accuracy of the 16-bit selection, refer to Application Note 74, “Component and LTC1595/LTC1596, thought should be given to op amp Measurement Advances Ensure 16-Bit DAC Settling Time. ” selection in order to achieve the exceptional performance of which the part is capable. Fortunately, the sensitivity of Grounding INL and DNL to op amp offset has been greatly reduced compared to previous generations of multiplying DACs. As with any high resolution converter, clean grounding is important. A low impedance analog ground plane and Op amp offset will contribute mostly to output offset and star grounding should be used. I (LTC1596) and GND gain and will have minimal effect on INL and DNL. For OUT2 (LTC1595) must be tied to the star ground with as low a example, a 500µV op amp offset will cause about 0.55LSB resistance as possible. Table 2. 16-Bit Settling Time for Various Amplifiers Driven by the LT1595 DAC. LT1468 (Shaded) Offers Fastest Settling Time While Maintaining Accuracy Over Temperature AMPLIFIER CONSERVATIVE SETTLING TIME AND COMPENSATION VALUE COMMENTS LT1001 120µs 100pF Good Low Speed Choice LT1007 19µs 100pF I Gives ≈1LSB Error at 25°C B LT1013 75µs 150pF ≈1LSB Error Due to V Over Temperature OS LT1077 200µs 100pF LT1097 120µs 75pF Good Low Speed Choice LT1112 120µs 100pF Good Low Speed Choice Dual LT1178 450µs 100pF Low Power Dual LT1468 2.5µs 30pF Fastest Settling with 16-Bit Performance 159561fc 11 For more information www.linear.com/LTC1595

LTC1595/LTC1596/LTC1596-1 PACKAGE DESCRIPTION Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. N8 Package 8-Lead PDNI PP a(Nckaarrgoew .300 Inch) (8R-eLfeeraednc Pe DLTICP D(NWaGr r#o 0w5 -.0380-105 I1n0c Rhe)v I) (Reference LTC DWG # 05-08-1510 Rev I) .400* (10.160) MAX 8 7 6 5 .255 ± .015* (6.477 ± 0.381) 1 2 3 4 .300 – .325 .045 – .065 .130 ± .005 (7.620 – 8.255) (1.143 – 1.651) (3.302 ± 0.127) .065 (1.651) .008 – .015 TYP (0.203 – 0.381) .120 (3.048) .020 +.035 MIN (0.508) .325 –.015 .100 .018 ± .003 MIN ( +0.889) 8.255 (2.54) (0.457 ± 0.076) N8 REV I 0711 –0.381 BSC NOTE: INCHES 1. DIMENSIONS ARE MILLIMETERS *THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm) 159561fc 12 For more information www.linear.com/LTC1595

LTC1595/LTC1596/LTC1596-1 PACKAGE DESCRIPTION Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. S8 Package 8-Lead Plastic Small Outline (Narrow .150 Inch) (Reference LTC DWG # 05-08-1610 Rev G) .189 – .197 .045 ±.005 (4.801 – 5.004) .050 BSC NOTE 3 8 7 6 5 .245 MIN .160 ±.005 .150 – .157 .228 – .244 (3.810 – 3.988) (5.791 – 6.197) NOTE 3 .030 ±.005 TYP 1 2 3 4 RECOMMENDED SOLDER PAD LAYOUT .010 – .020 × 45° .053 – .069 (0.254 – 0.508) (1.346 – 1.752) .004 – .010 .008 – .010 (0.203 – 0.254) 0°– 8° TYP (0.101 – 0.254) .016 – .050 .014 – .019 .050 (0.406 – 1.270) (0.355 – 0.483) (1.270) NOTE: INCHES TYP BSC 1. DIMENSIONS IN (MILLIMETERS) 2. DRAWING NOT TO SCALE 3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm) SO8 REV G 0212 4. PIN 1 CAN BE BEVEL EDGE OR A DIMPLE 159561fc 13 For more information www.linear.com/LTC1595

LTC1595/LTC1596/LTC1596-1 PACKAGE DESCRIPTION Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. SW Package 16-Lead Plastic Small Outline (Wide .300 Inch) (Reference LTC DWG # 05-08-1620) .030 .005 .050 BSC .045 .005 .398 – .413 TYP (10.109 – 10.490) NOTE 4 N 16 15 14 13 12 11 10 9 N .420 .325 .005 MIN NOTE 3 .394 – .419 (10.007 – 10.643) N/2 1 2 3 N/2 RECOMMENDED SOLDER PAD LAYOUT 1 2 3 4 5 6 7 8 .291 – .299 (7.391 – 7.595) NOTE 4 .093 – .104 .037 – .045 .010 – .029 ¥ 45∞ (2.362 – 2.642) (0.940 – 1.143) (0.254 – 0.737) .005 (0.127) RAD MIN 0 – 8 TYP .050 .009 – .013 (1.270) .004 – .012 (0.229 – 0.330) NOTE 3 BSC (0.102 – 0.305) .014 – .019 .016 – .050 (0.356 – 0.482) (0.406 – 1.270) TYP NOTE: INCHES 1. DIMENSIONS IN (MILLIMETERS) S16 (WIDE) 0502 2. DRAWING NOT TO SCALE 3. PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANUFACTURING OPTIONS. THE PART MAY BE SUPPLIED WITH OR WITHOUT ANY OF THE OPTIONS 4. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm) 159561fc 14 For more information www.linear.com/LTC1595

LTC1595/LTC1596/LTC1596-1 REVISION HISTORY (Revision history begins at Rev B) REV DATE DESCRIPTION PAGE NUMBER B 02/12 Removed 16-Lead PDIP 1, 2 C 8/15 Fixed errors in Table 3 16 159561fc Information furnished by Linear Technology Corporation is believed to be accurate and reliable. 15 However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconneFcotior nm oof irtse ciinrcfouirtms aast dioensc wribwedw h.leinreeina rw.cilol nmot/ LinTfCrin1g5e9 o5n existing patent rights.

LTC1595/LTC1596/LTC1596-1 TYPICAL APPLICATION R2 R3 VREF 20k 20k –10V TO 10V 5V 0.1µF 13 14 15 16 10 STB3 CLR VDD VREF RFB 33pF 4 STB1 µP 7 SRI OUT1 1 – R1 5 10k 6 LD1 LTC1596-1 1/2 LT1112 – 98 SLSDRTB2O2 OUT2 2 + (20k 2) +1/2 LT1112 –VOVURTEF TO VREF 11 STB4 DGND AGND 12 3 RESISTORS: CADDOCK T914-20K-010-02 TO NEXT DAC FOR DAISY-CHAINING 1595/96 F02a (OR EQUIVALENT) 20k, 0.01%, TC TRACK = 2ppm/°C (a) R2 R3 VREF 20k 20k Table 3. Bipolar Offset Binary Code Table –10V TO 10V 5V DIGITAL INPUT BINARY NUMBER IN DAC REGISTER ANALOG OUTPUT V OUT 0.1F 8 1 2 MSB LSB 33pF 7 CLVKDD VREF RFB 1111 1111 1111 1111 VREF (32,767/32,768) µP 6 SRI LTC1595 OUT1 3 – R1 1000 0000 0000 0001 VREF (1/32,768) 5 10k LD 1/2 LT1112 – 1000 0000 0000 0000 0V GND4 + (20k 2) 1/2 LT1112 V–VORUETF TO VREF 0111 1111 1111 1111 –VREF (1/32,768) + 0000 0000 0000 0000 –V REF 1595/96 F02b (b) Figure 2. Bipolar Operation (4-Quadrant Multiplication) V = –V to V OUT REF REF RELATED PARTS PART NUMBER DESCRIPTION COMMENTS DACs LTC1590 Dual Serial I/O Multiplying I 12-Bit DAC 16-Pin SO and PDIP, SPI Interface OUT LTC1597 Parallel 16-Bit Current Output DAC Low Glitch, ±1LSB Maximum INL, DNL LTC1650 Serial 16-Bit Voltage Output DAC Low Noise and Glitch Rail-to-Rail V OUT LTC1658 Serial 14-Bit Voltage Output DAC Low Power, 8-Lead MSOP Rail-to-Rail V OUT LTC7543/LTC8143/LTC8043 Serial I/O Multiplying I 12-Bit DACs Clear Pin and Serial Data Output (LTC8143) OUT ADCs LTC1418 14-Bit, 200ksps 5V Sampling ADC 16mW Dissipation, Serial and Parallel Outputs LTC1604 16-Bit, 333ksps Sampling ADC ±2.5V Input, SINAD = 90dB, THD = 100dB LTC1605 Single 5V, 16-Bit 100ksps ADC Low Power, ±10V Inputs LTC2400 24-Bit, ∆∑ ADC in SO-8 1ppm (4ppm) Offset (Full-Scale), Internal 50Hz/60Hz Notches Op Amps LT1001 Precision Operational Amplifier Low Offset, Low Drift LT1112 Dual Low Power, Precision Picoamp Input Op Amp Low Offset, Low Drift LT1468 90MHz, 22V/µs, 16-Bit Accurate Op Amp Precise, 1µs Settling to 0.0015% References LT1236 Precision Reference Ultralow Drift, 5ppm/°C, High Accuracy 0.05% LT1634 Micropower Reference Ultralow Drift, 10ppm/°C, High Accuracy 0.05% 159561fc 16 Linear Technology Corporation LT 0815 REV C • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 For more information www.linear.com/LTC1595 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com/LTC1595  LINEAR TECHNOLOGY CORPORATION 1997

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