LTC1546 Software-Selectable Multiprotocol Transceiver with Termination FEATURES DESCRIPTIOU n Software-Selectable Transceiver Supports: The LTC®1546 is a 3-driver/3-receiver multiprotocol trans- RS232, RS449, EIA530, EIA530-A, V.35, V.36, X.21 ceiver with on-chip cable termination. When combined with n TUV Telecom Services Inc. Certified NET1, the LTC1544, this chip set forms a complete software- NET2 and TBR2 Compliant selectable DTE or DCE interface port that supports the n On-Chip Cable Termination RS232, RS449, EIA530, EIA530-A, V.35, V.36 and X.21 n Pin Compatible with LTC1543 protocols. All necessary cable termination is provided inside n Complete DTE or DCE Port with LTC1544 the LTC1546. In most applications, the LTC1546 replaces n Operates from Single 5V Supply both an LTC1543 and an LTC1344A without any changes to n Small Footprint The LTC1546 runs from a single 5V supply using an internal APPLICATIOU S charge pump that requires only five space-saving surface mounted capacitors. The LTC1546 is available in a 28-lead n Data Networking SSOP surface mount package. n CSU and DSU , LTC and LT are registered trademarks of Linear Technology Corporation. n Data Routers TYPICAL APPLICATIOUN Complete DTE or DCE Multiprotocol Serial Interface with DB-25 Connector LL CTS DSR DCD DTR RTS RXD RXC TXC SCTE TXD LTC1544 LTC1546 D4 D3 D2 D1 D3 D2 D1 R4 R3 R2 R1 R3 R2 R1 T T T T T 18 13 5 22 6 10 8 23 20 19 4 1 7 16 3 9 17 12 15 11 24 14 2 LL A (141) CTS B CTS A (106) DSR B DSR A (107) DCD B DCD A (109) DTR B DTR A (108) RTS B RTS A (105) SHIELD (101) SG (102) RXD B RXD A (104) RXC B RXC A (115) TXC B TXC A (114) SCTE B SCTE A (113) TXD B TXD A (103) DB-25 CONNECTOR 1546 TA01 1

LTC1546 ABSOLUTE W AXIW UW RATIU GS PACKAGE/ORDER IU FORW ATIOU (Note 1) Supply Voltage ....................................................... 6.5V ORDER PART TOP VIEW Input Voltage NUMBER Transmitters........................... –0.3V to (V + 0.3V) C1– 1 28 C2+ CC Receivers............................................... –18V to 18V C1+ 2 27 C2– CHARGE PUMP Logic Pins .............................. –0.3V to (V + 0.3V) VDD 3 26 VEE LTC1546CG CC Output Voltage VCC 4 25 GND LTC1546IG D1 5 24 D1 A Transmitters................. (VEE – 0.3V) to (VDD + 0.3V) D1 T D2 6 23 D1 B Receivers................................ –0.3V to (V + 0.3V) CC D3 7 D2 T 22 D2 A V ........................................................ –10V to 0.3V EE R1 8 21 D2 B V ....................................................... –0.3V to 10V D3 DD R2 9 20 D3/R1 A Short-Circuit Duration T R3 10 19 D3/R1 B Transmitter Output..................................... Indefinite R1 M0 11 18 R2 A Receiver Output.......................................... Indefinite R2 T M1 12 17 R2 B V .................................................................. 30 sec EE M2 13 16 R3 A Operating Temperature Range R3 T DCE/DTE 14 15 R3 B LTC1546C ...............................................0(cid:176) C to 70(cid:176) C LTC1546I........................................... –40(cid:176) C to 85(cid:176) C G PACKAGE 28-LEAD PLASTIC SSOP Storage Temperature Range................ –65(cid:176) C to 150(cid:176) C TJMAX = 150(cid:176)C, q JA = 90(cid:176)C/W* Lead Temperature (Soldering, 10 sec)................. 300(cid:176) C *q JA SOLDERED TO A CIRCUIT BOARD IS TYPICALLY 60(cid:176)C/W Consult factory for parts specified with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS The l denotes specifications which apply over the full operating temperature range, otherwise specifications are at T = 25(cid:176) C. V = 5V (Notes 2, 3) A CC SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Supplies I V Supply Current (DCE Mode, RS530, RS530-A, X.21 Modes, No Load 14 mA CC CC All Digital Pins = GND or V ) RS530, RS530-A, X.21 Modes, Full Load l 100 130 mA CC V.35 Mode l 126 170 mA V.28 Mode, No Load 20 mA V.28 Mode, Full Load l 35 75 mA No-Cable Mode l 60 500 m A P Internal Power Dissipation (DCE Mode) RS530, RS530-A, X.21 Modes, Full Load 410 mW D V.35 Mode, Full Load 625 mW V.28 Mode, Full Load 150 mW V+ Positive Charge Pump Output Voltage V.11 or V.28 Mode, No Load l 8.0 9.3 V V.35 Mode l 7.0 8.0 V V.28 Mode, with Load l 8.0 8.7 V V.28 Mode, with Load, I = 10mA 6.5 V DD V– Negative Charge Pump Output Voltage V.28 Mode, No Load –9.6 V V.28 Mode, Full Load l –7.5 –8.5 V V.35 Mode l –5.5 –6.5 V RS530, RS530-A, X.21 Modes, Full Load l –4.5 –6.0 V 2

LTC1546 ELECTRICAL CHARACTERISTICS The l denotes specifications which apply over the full operating temperature range, otherwise specifications are at T = 25(cid:176) C. V = 5V (Notes 2, 3) A CC SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS f Charge Pump Oscillator Frequency 500 kHz OSC t Charge Pump Rise Time No-Cable Mode/Power-Off to Normal Operation 2 ms r Logic Inputs and Outputs V Logic Input High Voltage l 2 V IH V Logic Input Low Voltage l 0.8 V IL I Logic Input Current D1, D2, D3 l – 10 m A IN M0, M1, M2, DCE = GND l –120 –75 –30 m A M0, M1, M2, DCE = V l – 10 m A CC V Output High Voltage I = –3mA l 3 4.5 V OH O V Output Low Voltage I = 3mA l 0.3 0.45 V OL O I Output Short-Circuit Current 0V £ V £ V l –50 50 mA OSR O CC I Three-State Output Current M0 = M1 = M2 = V , 0V £ V £ V – 1 m A OZR CC O CC V.11 Driver V Open Circuit Differential Output Voltage R = 1.95k (Figure 1) l – 5 V ODO L V Loaded Differential Output Voltage R = 50W (Figure 1) 0.5V 0.67V V ODL L ODO ODO R = 50W (Figure 1) l – 2 V L D V Change in Magnitude of Differential R = 50W (Figure 1) l 0.2 V OD L Output Voltage V Common Mode Output Voltage R = 50W (Figure 1) l 3 V OC L D V Change in Magnitude of Common Mode R = 50W (Figure 1) l 0.2 V OC L Output Voltage I Short-Circuit Current V = GND – 150 mA SS OUT I Output Leakage Current ‰ V ‰ and ‰ V ‰ £ 0.25V, Power Off or l – 1 – 100 m A OZ A B No-Cable Mode or Driver Disabled t , t Rise or Fall Time (Figures 2, 13) l 2 15 25 ns r f t Input to Output Rising (Figures 2, 13) l 15 40 65 ns PLH t Input to Output Falling (Figures 2, 13) l 15 40 65 ns PHL D t Input to Output Difference, ‰ t – t ‰ (Figures 2, 13) l 0 3 12 ns PLH PHL t Output to Output Skew (Figures 2, 13) 3 ns SKEW V.11 Receiver V Input Threshold Voltage –7V £ V £ 7V l –0.2 0.2 V TH CM D V Input Hysteresis –7V £ V £ 7V l 15 40 mV TH CM R Input Impedance –7V £ V £ 7V (Figure 3) l 100 103 W IN CM t , t Rise or Fall Time C = 50pF (Figures 4, 14) 15 ns r f L t Input to Output Rising C = 50pF (Figures 4, 14) l 50 90 ns PLH L t Input to Output Falling C = 50pF (Figures 4, 14) l 50 90 ns PHL L D t Input to Output Difference, ‰ t – t ‰ C = 50pF (Figures 4, 14) l 0 4 25 ns PLH PHL L V.35 Driver V Differential Output Voltage Open Circuit, R = 1.95k (Figure 5) l – 1.2 V OD L With Load, –4V £ V £ 4V (Figure 6) – 0.44 – 0.55 – 0.66 V CM V , V Single-Ended Output Voltage Open Circuit, R = 1.95k (Figure 5) l – 1.2 V OA OB L V Transmitter Output Offset R = 50W (Figure 5) l – 0.6 V OC L 3

LTC1546 ELECTRICAL CHARACTERISTICS The l denotes specifications which apply over the full operating temperature range, otherwise specifications are at T = 25(cid:176) C. V = 5V (Notes 2, 3) A CC SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS I Transmitter Output High Current V ,V = 0V l –13 –11 –9.0 mA OH A B I Transmitter Output Low Current V ,V = 0V l 9.0 11 13 mA OL A B I Transmitter Output Leakage Current ‰ V ‰ and ‰ V ‰ £ 0.25V l – 1 – 100 m A OZ A B R Transmitter Differential Mode Impedance l 50 100 150 W OD R Transmitter Common Mode Impedance –2V £ V £ 2V (Figure 7) 135 150 165 W OC CM t , t Rise or Fall Time (Figures 8, 13) 5 ns r f t Input to Output (Figures 8, 13) l 15 35 65 ns PLH t Input to Output (Figures 8, 13) l 15 35 65 ns PHL D t Input to Output Difference, ‰ t – t ‰ (Figures 8, 13) l 0 16 ns PLH PHL t Output to Output Skew (Figures 8, 13) 4 ns SKEW V.35 Receiver V Differential Receiver Input Threshold Voltage –2V £ V £ 2V (Figure 9) l –0.2 0.2 V TH CM D V Receiver Input Hysteresis –2V £ V £ 2V (Figure 9) l 15 40 mV TH CM R Receiver Differential Mode Impedance –2V £ V £ 2V l 90 103 110 W ID CM R Receiver Common Mode Impedance –2V £ V £ 2V (Figure 10) 135 150 165 W IC CM t , t Rise or Fall Time C = 50pF (Figures 4, 14) 15 ns r f L t Input to Output C = 50pF (Figures 4, 14) l 50 90 ns PLH L t Input to Output C = 50pF (Figures 4, 14) l 50 90 ns PHL L D t Input to Output Difference, ‰ t – t ‰ C = 50pF (Figures 4, 14) l 0 4 25 ns PLH PHL L V.28 Driver V Output Voltage Open Circuit l – 10 V O R = 3k (Figure 11) l – 5 – 8.5 V L I Short-Circuit Current V = GND l – 150 mA SS OUT R Power-Off Resistance –2V < V < 2V, Power Off l 300 W OZ O or No-Cable Mode SR Slew Rate R = 7k, C = 0 (Figures 11, 15) l 4 30 V/m s L L t Input to Output R = 3k, C = 2500pF (Figures 11, 15) l 1.5 2.5 m s PLH L L t Input to Output R = 3k, C = 2500pF (Figures 11, 15) l 1.5 2.5 m s PHL L L V.28 Receiver V Input Low Threshold Voltage (Figure 12) l 1.2 0.8 V THL V Input High Threshold Voltage (Figure 12) l 2 1.2 V TLH D V Receiver Input Hysteresis (Figure 12) l 0 0.05 0.3 V TH R Receiver Input Impedance –15V £ V £ 15V l 3 5 7 kW IN A t , t Rise or Fall Time C = 50pF (Figures 12, 16) 15 ns r f L t Input to Output C = 50pF (Figures 12, 16) l 60 300 ns PLH L t Input to Output C = 50pF (Figures 12, 16) l 160 300 ns PHL L Note 1: Absolute Maximum Ratings are those values beyond which the life Note 3: All typicals are given for V = 5V, C1 = C2 = C = C = 1m F, CC VCC VDD of the device may be impaired. C = 3.3m F and T = 25(cid:176) C. VEE A Note 2: All currents into device pins are positive; all currents out of device are negative. All voltages are referenced to device ground unless otherwise specified. 4

LTC1546 TYPICAL PERFORW AU CE CHARACTERISTICS V.11 Mode V.35 Mode V.28 Mode Supply Current vs Data Rate Supply Current vs Data Rate Supply Current vs Data Rate 180 150 35 170 160 34 A) A)145 A) NT (m150 NT (m NT (m 33 RE140 RE RE R R140 R CU130 CU CU Y Y Y 32 PL120 PL PL P P P U U U S110 S135 S 31 100 90 130 30 10 100 1000 10000 10 100 1000 10000 10 20 50 100 DATA RATE (kBd) DATA RATE (kBd) DATA RATE (kBd) 1546 • G01 1546 • G02 1546 • G03 V.11 Mode V.35 Mode V.28 Mode I vs Temperature I vs Temperature I vs Temperature CC CC CC 115 140 40 110 38 105 135 36 A) A) A) I (mCC100 I (mCC I (mCC 34 95 130 32 90 85 125 30 –40 –20 0 20 40 60 80 100 –40 –20 0 20 40 60 80 100 –40 –20 0 20 40 60 80 100 TEMPERATURE (°C) TEMPERATURE (°C) TEMPERATURE (°C) 1546 • G04 1546 • G05 1546 • G06 PIU FUU CTIOU S C1–␣(Pin 1): Capacitor C1 Negative Terminal. Connect a R1 (Pin 8): CMOS Level Receiver 1 Output. 1m F capacitor between C1+ and C1–. R2 (Pin 9): CMOS Level Receiver 2 Output. C1+ (Pin 2): Capacitor C1 Positive Terminal. Connect a R3 (Pin 10): CMOS Level Receiver 3 Output. 1m F capacitor between C1+ and C1–. M0 (Pin 11): TTL Level Mode Select Input 0 with Pull-Up V (Pin 3): Generated Positive Supply Voltage for DD to V . See Table 1. V.28. Connect a 1m F capacitor to ground. CC M1 (Pin 12): TTL Level Mode Select Input 1 with Pull-Up V (Pin 4): Positive Supply Voltage Input. 4.75V £ V CC CC to V . See Table 1. £ 5.25V. Bypass with a 1m F capacitor to ground. CC M2 (Pin 13): TTL Level Mode Select Input 2 with Pull-Up D1 (Pin 5): TTL Level Driver 1 Input. to V . See Table 1. CC D2 (Pin 6): TTL Level Driver 2 Input. DCE/DTE (Pin 14): TTL Level Mode Select Input with Pull- D3 (Pin 7): TTL Level Driver 3 Input. Up to V . See Table 1. CC 5

LTC1546 PIU FUU CTIOU S R3 B (Pin 15): Receiver 3 Noninverting Input. D1 B (Pin 23): Driver 1 Noninverting Output. R3 A (Pin 16): Receiver 3 Inverting Input. D1 A (Pin 24): Driver 1 Inverting Output. R2 B (Pin 17): Receiver 2 Noninverting Input. GND (Pin 25): Ground. R2 A (Pin 18): Receiver 2 Inverting Input. V (Pin 26): Negative Supply Voltage. Connect a 3.3m F EE capacitor to GND. D3/R1 B (Pin 19): Receiver 1 Noninverting Input and Driver 3 Noninverting Output. C2– (Pin 27): Capacitor C2 Negative Terminal. Connect a 1m F capacitor between C2+ and C2–. D3/R1 A (Pin 20): Receiver 1 Inverting Input and Driver 3 Inverting Output. C2+ (Pin 28): Capacitor C2 Positive Terminal. Connect a 1m F capacitor between C2+ and C2–. D2 B (Pin 21): Driver 2 Noninverting Output. D2 A (Pin 22): Driver 2 Inverting Output. BLOCK DIAGRAW CHARGE PUMP C1– 1 C1– C2+ 28 C2+ C1+ 2 C1+ C2– 27 C2– VDD 3 VDD VEE 26 VEE VCC 4 VCC GND 25 GND 24 D1A 50Ω S1 D1 5 D1 S2 125Ω 50Ω 23 D1B 22 D2A 50Ω S1 D2 6 D2 S2 125Ω 50Ω 21D2B D3 7 D3 20 D3/R1 A 10k 20k 6k 51.5Ω S3 S1 DCE/DTE 14 S2 125Ω 10k 20k 51.5Ω 19 D3/R1 B R1 8 R1 18 R2A 20k 6k 10k 51.5Ω S3 R2 9 R2 S2 125Ω 10k 51.5Ω 17 R2B 20k 16 R3A 20k 6k 10k 51.5Ω S3 R3 10 R3 S2 125Ω 10k 51.5Ω 15 R3B 20k 1546 BD 6

LTC1546 TEST CIRCUITS D B RL D B RL C10L0pF A VOD A 100W CL RL VOC 100pF 1546 F02 1546 F01 Figure 1. V.11 Driver DC Test Circuit Figure 2. V.11 Driver AC Test Circuit IB B R IA B R VCM = – 7V +– A RIN = 2(VIBB –– IVAA)1546 F03 A 1C54L6 F04 Figure 3. Input Impedance Test Circuit Figure 4. V.11, V.35 Receiver AC Test Circuit VOB VOB 125Ω 50Ω RL 125Ω 50Ω 50Ω 125Ω 125Ω 50Ω VOD 50Ω RL VOC 50Ω 50Ω VCM 50Ω +– VCM = – 2V 1546 F05 1546 F06 1546 F07 VOA VOA Figure 5. V.35 Driver Open-Circuit Test Figure 6. V.35 Driver Test Circuit Figure 7. V.35 Driver Common Mode Impedance Test Circuit 51.5Ω 50Ω 50Ω 125Ω 125Ω 125Ω R 50Ω 50Ω VTH +– VCM = – 2V +– 51.5Ω + 1546 F08 VCM – 1546 F09 1546 F10 Figure 8. V.35 Driver AC Test Circuit Figure 9. V.35 Receiver DC Test Circuit Figure 10. Receiver Common Mode Impedance Test Circuit D A A R CL RL VA CL 1546 F11 1546 F12 Figure 11. V.28 Driver Test Circuit Figure 12. V.28 Receiver Test Circuit 7

LTC1546 WODE SELECTIOU Table 1 LTC1546 MODE NAME M2 M1 M0 DCE/DTE D1 D2 D3 R1 R2 R3 Not Used (Default V.11) 0 0 0 0 V.11 V.11 Z V.11 V.11 V.11 RS530A 0 0 1 0 V.11 V.11 Z V.11 V.11 V.11 RS530 0 1 0 0 V.11 V.11 Z V.11 V.11 V.11 X.21 0 1 1 0 V.11 V.11 Z V.11 V.11 V.11 V.35 1 0 0 0 V.35 V.35 Z V.35 V.35 V.35 RS449/V.36 1 0 1 0 V.11 V.11 Z V.11 V.11 V.11 V.28/RS232 1 1 0 0 V.28 V.28 Z V.28 V.28 V.28 No Cable 1 1 1 0 Z Z Z Z Z Z Not Used (Default V.11) 0 0 0 1 V.11 V.11 V.11 Z V.11 V.11 RS530A 0 0 1 1 V.11 V.11 V.11 Z V.11 V.11 RS530 0 1 0 1 V.11 V.11 V.11 Z V.11 V.11 X.21 0 1 1 1 V.11 V.11 V.11 Z V.11 V.11 V.35 1 0 0 1 V.35 V.35 V.35 Z V.35 V.35 RS449/V.36 1 0 1 1 V.11 V.11 V.11 Z V.11 V.11 V.28/RS232 1 1 0 1 V.28 V.28 V.28 Z V.28 V.28 No Cable 1 1 1 1 Z Z Z Z Z Z SWITCHIU G TIW E WAVEFORW S 5V D 1.5V f = 1MHz : tr £ 10ns : tf £ 10ns 1.5V 0V tPLH tPHL VO 90% 90% B – A 50% 50% –VO tr 10% 1/2 VO tf 10% A VO B tSKEW tSKEW 1546 F13 Figure 13. V.11, V.35 Driver Propagation Delays B – VAOD2 0V f = 1MHz : tr £ 10ns : tf £ 10ns INPUT 0V –VOD2 tPLH tPHL VOH R 1.5V OUTPUT 1.5V VOL 1546 F14 Figure 14. V.11, V.35 Receiver Propagation Delays 8

LTC1546 SWITCHIU G TIW E WAVEFORW S 3V D 1.5V 1.5V 0V tPHL tPLH VO 3V 3V A 0V SR = 6V 0V SR = 6V 1546 F15 –3V tf –3V tr –VO tf tr Figure 15. V.28 Driver Propagation Delays VIH A 1.3V 1.7V VIL tPHL tPLH VOH 2.4V R 0.8V 1546 F16 VOL Figure 16. V.28 Receiver Propagation Delays APPLICATIOU S IU FORW ATIOU Overview electrical mode. The DCE/DTE pin will configure the port for DCE mode when high, and DTE when low. The LTC1546 and LTC1544 form a complete software- selectable DTE or DCE interface port that supports the The interface protocol may be selected simply by plugging RS232, RS449, EIA530, EIA530-A, V.35, V.36 and X.21 the appropriate interface cable into the connector. The protocols. Cable termination is provided on-chip, elimi- mode pins are routed to the connector and are left uncon- nating the need for discrete termination designs. nected (1) or wired to ground (0) in the cable as shown in Figure 18. The internal pull-up current sources will ensure A complete DCE-to-DTE interface operating in EIA530 a binary 1 when a pin is left unconnected. mode is shown in Figure 17. The LTC1546 half of each port is used to generate and appropriately terminate the clock The mode selection may also be accomplished by using and data signals. The LTC1544 is used to generate the jumpers to connect the mode pins to ground or V . CC control signals along with LL (Local Loopback). When the cable is removed, leaving all mode pins uncon- nected, the LTC1546/LTC1544 will enter no-cable mode. Mode Selection In this mode the LTC1546/LTC1544 supply current drops The interface protocol is selected using the mode select to less than 500m A and the LTC1546/LTC1544 driver pins M0, M1 and M2 (see Table 1). outputs are forced into a high impedance state. At the For example, if the port is configured as a V.35 interface, same time, the R2 and R3 receivers of the LTC1546 are the mode selection pins should be M2 = 1, M1 = 0, M0 = 0. differentially terminated with 103W and the other receiv- For the control signals, the drivers and receivers will ers on the LTC1546 and LTC1544 are terminated with operate in V.28 (RS232) electrical mode. For the clock and 30kW to ground. data signals, the drivers and receivers will operate in V.35 9

LTC1546 APPLICATIOU S IU FORW ATIOU DTE DCE SERIAL LTC1546 LTC1546 SERIAL CONTROLLER CONTROLLER TXD D1 TXD 103W R3 TXD SCTE D2 SCTE 103W R2 SCTE D3 R1 TXC R1 103W TXC D3 TXC RXC R2 103W RXC D2 RXC RXD R3 103W RXD D1 RXD LTC1544 LTC1544 RTS D1 RTS R3 RTS DTR D2 DTR R2 DTR D3 R1 DCD R1 DCD D3 DCD DSR R2 DSR D2 DSR CTS R3 CTS D1 CTS LL LL D4 R4 LL R4 D4 1546 F17 Figure 17. Complete Multiprotocol Interface in EIA530 Mode Cable Termination may contain termination in the cable head or route signals to various terminations on the board. Traditional implementations used expensive relays to switch resistors or required the user to change termina- The LTC1546/LTC1544 chipset solves the cable termina- tion modules every time a new interface standard was tion switching problem by automatically providing the selected. Switching the terminations with FETs is difficult appropriate termination and switching on-chip for the because the FETs must remain off when the signal voltage V.10 (RS423), V.11 (RS422), V.28 (RS232) and V.35 is beyond the supply voltage. Alternatively, custom cables electrical protocols. 10

LTC1546 APPLICATIOU S IU FORW ATIOU (DATA) CONNECTOR 11 M0 12 LTC1546 M1 13 M2 NC 14 DCE/DTE NC CABLE 14 DCE/DTE 13 M2 12 LTC1544 M1 11 M0 (DATA) 1546 F18 Figure 18: Single Port DCE V.35 Mode Selection in the Cable V.10 (RS423) Interface BALANCED INTERCONNECTING GENERATOR CABLE LOAD All V.10 drivers and receivers necessary for the RS449, CABLE EIA530, EIA530-A, V.36 and X.21 protocols are imple- TERMINATION RECEIVER mented on the LTC1544. A A' A typical V.10 unbalanced interface is shown in Figure 19. A V.10 single-ended generator with output A and ground C is connected to a differential receiver with input A' con- C C' 1546 F19 nected to A, and ground C' connected via the signal return to ground C. Usually, no cable termination is required for Figure 19. Typical V.10 Interface V.10 interfaces, but the receiver inputs must be compliant with the impedance curve shown in Figure 20. IZ The V.10 receiver configuration in the LTC1544 is shown 3.25mA in Figure 21. In V.10 mode, switch S3 inside the LTC1544 is turned off. The noninverting input is disconnected inside the LTC1544 receiver and connected to ground. The cable termination is then the 30k input impedance to –10V –3V ground of the LTC1544 V.10 receiver. VZ 3V 10V V.11 (RS422) Interface A typical V.11 balanced interface is shown in Figure 22. A V.11 differential generator with outputs A and B and ground C is connected to a differential receiver with input 1546 F20 –3.25mA A' connected to A, input B' connected to B, and ground C' connected via the signal return to ground C. The V.11 Figure 20. V.10 Receiver Input Impedance 11

LTC1546 APPLICATIOU S IU FORW ATIOU A' A LTC1544 A' LTC1546 R5 R5 R6k8 20k R511.5W R6k8 20k R6 R6 RECEIVER RECEIVER 10k 10k S3 S1 R3 S3 S2 124W R4 R7 R2 R4 R7 B' B 20k 10k B' 51.5W 20k 10k C' GND 1546 F21 C' GND 1546 F23 Figure 21. V.10 Receiver Configuration Figure 23. V.11 Receiver Configuration connected to A and ground C' connected via the signal BALANCED return to ground C. INTERCONNECTING GENERATOR CABLE LOAD In V.28 mode, S3 is closed inside the LTC1546/LTC1544 CABLE TERMINATION RECEIVER which connects a 6k (R8) impedance to ground in parallel A A' with 20k (R5) plus 10k (R6) for a combined impedance of 5k as shown in Figure 25. Proper termination is only pro- 100W MIN vided when the B input of the receivers is floating, since S1 B B' of the LTC1546’s R2 and R3 receivers remains on in V.28 C C' 1546 F22 mode1. The noninverting input is disconnected inside the LTC1546/LTC1544 receiver and connected to a TTL level Figure 22. Typical V.11 Interface reference voltage to give a 1.4V receiver trip point. interface has a differential termination at the receiver end BALANCED INTERCONNECTING that has a minimum value of 100W . The termination GENERATOR CABLE LOAD resistor is optional in the V.11 specification, but for the CABLE TERMINATION RECEIVER high speed clock and data lines, the termination is essen- tial to prevent reflections from corrupting the data. The A A' receiver inputs must also be compliant with the imped- ance curve shown in Figure 20. C C' 1546 F24 In V.11 mode, all switches are off except S1 of the Figure 24. Typical V.28 Interface LTC1546’s receivers which connects a 103W differential termination impedance to the cable as shown in Figure A' LTC1546 231. The LTC1544 only handles control signals, so no R5 termination other than its V.11 receivers’ 30k input imped- R511.5W R6k8 20k ance is necessary. R6 RECEIVER 10k S1 S3 R3 V.28 (RS232) Interface S2 124W A typical V.28 unbalanced interface is shown in Figure 24. R2 R4 R7 A V.28 single-ended generator with output A and ground B' 51.5W 20k 10k C is connected to a single-ended receiver with input A' C' GND 1546 F25 1Actually, there is no switch S1 in receivers R2 and R3. However, for simplicity, all termination networks on the LTC1546 can be treated identically if it is assumed that an S1 switch exists and is always closed on the R2 and R3 receivers. Figure 25. V.28 Receiver Configuration 12

LTC1546 APPLICATIOU S IU FORW ATIOU V.35 Interface No-Cable Mode A typical V.35 balanced interface is shown in Figure 26. A The no-cable mode (M0 = M1 = M2 = 1) is intended for V.35 differential generator with outputs A and B and the case when the cable is disconnected from the con- ground C is connected to a differential receiver with input nector. The charge pump, bias circuitry, drivers and A' connected to A, input B' connected to B, and ground C' receivers are turned off, the driver outputs are forced into connected via the signal return to ground C. The V.35 a high impedance state, and the supply current drops to interface requires a T or delta network termination at the less than 200m A. Note that the LTC1546’s R2 and R3 receiver end and the generator end. The receiver differen- receivers continue to be terminated by a 103W differen- tial impedance measured at the connector must be tial impedance. 100W ␣– 10W , and the impedance between shorted termi- nals (A' and B') and ground (C') must be 150W – 15W . Charge Pump The LTC1546 uses an internal capacitive charge pump to In V.35 mode, both switches S1 and S2 inside the LTC1546 generate V and V as shown in Figure 28. A voltage are on, connecting a T network impedance as shown in DD EE doubler generates about 8V on V and a voltage inverter Figure 27. The 30k input impedance of the receiver is DD generates about –7.5V on V . Four 1m F surface mounted placed in parallel with the T network termination, but does EE tantalum or ceramic capacitors are required for C1, C2, C3 not affect the overall input impedance significantly. and C4. The V capacitor C5 should be a minimum of The generator differential impedance must be 50W to 3.3m F. All capacEiEtors are 16V and should be placed as close 150W and the impedance between shorted terminals (A as possible to the LTC1546 to reduce EMI. and B) and ground (C) must be 150W – 15W . BALANCED GENERATOR INTERCCOANBNLEECTING LOAD 3 VDD C2+ 28 C3 C2 CABLE 1µF 2 C1+ C2– 27 1m F TERMINATION RECEIVER C1 LTC1546 A A' 1µF 1 C1– VEE 26 C5 50W 50W 4 25 + 3.3m F 125W 125W 5V VCC GND C4 50W 50W 1µF B B' 1546 F28 C C' Figure 28. Charge Pump 1546 F26 Figure 26. Typical V.35 Interface Receiver Fail-Safe A' LTC1546 All LTC1546/LTC1544 receivers feature fail-safe opera- R5 tion in all modes. If the receiver inputs are left floating or R1 R8 51.5W 6k 20k are shorted together by a termination resistor, the receiver R6 RECEIVER 10k output will always be forced to a logic high. S1 R3 S3 S2 124W DTE vs DCE Operation R2 R4 R7 B' 51.5W 20k 10k The DCE/DTE pin acts as an enable for Driver 3/Receiver 1 in the LTC1546, and Driver 3/Receiver 1 and Driver 4/ GND 1546 F27 Receiver 4 in the LTC1544. The INVERT pin in the LTC1544 C' allows the Driver 4/Receiver 4 enable to be high or low true Figure 27. V.35 Receiver Configuration polarity. 13

LTC1546 APPLICATIOU S IU FORW ATIOU The LTC1546/LTC1544 can be configured for either DTE Cable-Selectable Multiprotocol Interface or DCE operation in one of two ways: a dedicated DTE or A cable-selectable multiprotocol DTE/DCE interface is DCE port with a connector of appropriate gender or a port shown in Figure 33. The select lines M0, M1 and DCE/DTE with one connector that can be configured for DTE or DCE are brought out to the connector. The mode is selected by operation by rerouting the signals to the LTC1546/LTC1544 the cable by wiring M0 (connector Pin 18) and M1 (con- using a dedicated DTE cable or dedicated DCE cable. nector Pin 21) and DCE/DTE (connector Pin 25) to ground A dedicated DTE port using a DB-25 male connector is (connector Pin 7) or letting them float. If M0, M1 or DCE/ shown in Figure 29. The interface mode is selected by logic DTE is floating, internal pull-up current sources will pull outputs from the controller or from jumpers to either V the signals to V . The select bit M2 is hard wired to V . CC CC CC or GND on the mode select pins. A dedicated DCE port When the cable is pulled out, the interface will go into the using a DB-25 female connector is shown in Figure 30. no-cable mode. A port with one DB-25 connector, that can be configured Compliance Testing for either DTE or DCE operation is shown in Figure 31. The configuration requires separate cables for proper signal The LTC1546/LTC1544 chipset has been tested by TUV routing in DTE or DCE operation. For example, in DTE Telecom Services Inc. and passed the NET1, NET2 and mode, the TXD signal is routed to Pins 2 and 14 via the TBR2 requirements. Copies of the test reports are avail- LTC1546’s Driver 1. In DCE mode, Driver 1 now routes the able from LTC or TUV Telecom Services. RXD signal to Pins 2 and 14. The titles of the reports are: Multiprotocol Interface with RL, LL, TM NET1 and NET2: Test Report No. NET2/091301/99. and a DB-25 Connector TBR2: Test Report No. CRT2/091301/99. If the RL, LL and TM signals are implemented, there are not The address of TUV Telecom Services Inc. is: enough drivers and receivers available in the LTC1546/ TUV Telecom Services Inc. LTC1544. In Figure 32, the required control signals are Type Approval Division handled by the LTC1545. The LTC1545 has an additional 1775 Old Highway 8, Ste 107 single-ended driver/receiver pair that can handle two more St. Paul, MN 55112 USA optional control signals such as TM and RL. TEL: +1 (612) 639-0775 FAX: +1 (612) 639-0873 14

LTC1546 TYPICAL APPLICATIOU S VCC 5V 3 28 C2 C1µ3F 1 27 1µF C1 CHARGE 26 1µF 2 PUMP C4 4 3.3µF 25 + C5 1µF LTC1546 24 2 5 TXD A (103) TXD D1 T 23 14 TXD B 22 24 6 SCTE A (113) SCTE D2 T 21 11 SCTE B 7 D3 T 20 15 TXC A (114) 8 TXC R1 19 12 TXC B 18 17 RXC A (115) 9 RXC R2 T 17 9 RXC B 16 3 RXD A (104) 10 RXD R3 T 15 16 11 RXD B M0 12 7 M1 SG 13 M2 14 1 DCE/DTE SHIELD DB-25 MALE C10 C9 VCC CONNECTOR 1µF 1µF 1 28 2 VCC VEE 27 C11 VDD GND 1µF 26 4 3 RTS A (105) RTS D1 25 19 RTS B 24 20 4 DTR A (108) DTR D2 23 23 DTR B 5 D3 LTC1544 22 8 6 DCD A (109) DCD R1 21 10 DCD B 20 6 7 DSR A (107) DSR R2 19 22 DSR B 18 5 8 CTS A (106) CTS R3 17 13 CTS B 10 16 18 LL R4 LL A (141) 9 D4 11 15 M0 M0 INVERT NC 12 M1 M1 13 M2 M2 14 DCE/DTE 1546 F29 Figure 29. Controller-Selectable Multiprotocol DTE Port with DB-25 Connector 15

LTC1546 TYPICAL APPLICATIOU S VCC 5V 3 28 C2 C1µ3F 1 27 1µF C1 CHARGE 26 1µF 2 PUMP C4 4 3.3µF 25 + C5 1µF LTC1546 24 3 RXD A (104) 5 RXD D1 T 23 16 RXD B 22 17 6 RXC A (115) RXC D2 T 21 9 RXC B 7 D3 T 20 15 TXC A (114) 8 TXC R1 19 12 TXC B 18 24 SCTE A (113) 9 SCTE R2 T 17 11 SCTE B 16 2 TXD A (103) 10 TXD R3 T 15 14 11 TXD B M0 12 7 M1 SGND (102) 13 M2 14 1 NC DCE/DTE SHIELD (101) DB-25 FEMALE C10 C9 VCC CONNECTOR 1µF 1µF 1 28 2 VCC VEE 27 C11 VDD GND 1µF 26 5 CTS A (106) 3 CTS D1 25 13 CTS B 24 6 4 DSR A (107) DSR D2 23 22 DSR B 5 D3 LTC1544 22 8 6 DCD A (109) DCD R1 21 10 DCD B 20 20 7 DTR A (108) DTR R2 19 23 DTR B 18 4 8 RTS A (105) RTS R3 17 19 RTS B 10 16 18 LL R4 LL A (141) 9 D4 11 15 M0 M0 INVERT NC 12 M1 M1 13 M2 M2 14 NC DCE/DTE 1546 F30 Figure 30. Controller-Selectable DCE Port with DB-25 Connector 16

LTC1546 TYPICAL APPLICATIOU S VCC 5V 3 28 C2 C1µ3F 1 27 1µF C1 CHARGE 26 1µF 2 PUMP C4 4 3.3µF 25 + C5 1µF LTC1546 DTE DCE 24 2 5 TXD A RXD A DTE_TXD/DCE_RXD D1 T 23 14 TXD B RXD B 22 24 6 SCTE A RXC A DTE_SCTE/DCE_RXC D2 T 21 11 SCTE B RXC B 7 D3 T 20 15 TXC A TXC A 8 DTE_TXC/DCE_TXC R1 19 12 TXC B TXC B 18 17 RXC A SCTE A 9 DTE_RXC/DCE_SCTE R2 T 17 9 RXC B SCTE B 16 3 RXD A TXD A 10 DTE_RXD/DCE_TXD R3 T 15 16 11 RXD B TXD B M0 12 7 M1 SG 13 M2 14 1 DCE/DTE SHIELD DB-25 C10 C9 VCC CONNECTOR 1µF 1µF 1 28 2 VCC VEE 27 C11 VDD GND 1µF 26 4 3 RTS A CTS A DTE_RTS/DCE_CTS D1 25 19 RTS B CTS B 24 20 4 DTR A DSR A DTE_DTR/DCE_DSR D2 23 23 DTR B DSR B 5 D3 LTC1544 22 8 6 DCD A DCD A DTE_DCD/DCE_DCD R1 21 10 DCD B DCD B 20 6 7 DSR A DTR A DTE_DSR/DCE_DTR R2 19 22 DSR B DTR B 18 5 8 CTS A RTS A DTE_CTS/DCE_RTS R3 17 13 CTS B RTS B 10 16 18 DTE_LL/DCE_LL R4 LL A LL A 9 D4 11 15 M0 M0 INVERT NC 12 M1 M1 13 M2 M2 14 DCE/DTE DCE/DTE 1546 F31 Figure 31. Controller-Selectable Multiprotocol DTE/DCE Port with DB-25 Connector 17

LTC1546 TYPICAL APPLICATIOU S VCC 5V 3 28 C2 C1µ3F 1 27 1µF C1 CHARGE 26 1µF 2 PUMP C4 4 25 +3.3µF C5 1µF LTC1546 24 2 DTE DCE TXD A RXD A 5 DTE_TXD/DCE_RXD D1 T 23 14 TXD B RXD B 22 24 6 SCTE A RXC A DTE_SCTE/DCE_RXC D2 T 21 11 SCTE B RXC B 7 D3 T 20 15 8 TXC A TXC A DTE_TXC/DCE_TXC R1 19 12 TXC B TXC B 18 17 RXC A SCTE A 9 DTE_RXC/DCE_SCTE R2 T 17 9 RXC B SCTE B 16 3 10 RXD A TXD A DTE_RXD/DCE_TXD R3 T 15 16 11 RXD B TXD B M0 7 12 M1 SG 13 M2 1 14 SHIELD DCE/DTE VCC DB-25 C10 5V C9 CONNECTOR 1µF 1µF 12,,1290 VCC VEE 3356 C11 VDD GND 1µF 34 4 RTS A CTS A 3 DTE_RTS/DCE_CTS D1 33 19 RTS B CTS B 32 20 4 DTR A DSR A DTE_DTR/DCE_DSR D2 31 23 DTR B DSR B 5 D3 LTC1545 30 8 6 DCD A DCD A DTE_DCD/DCE_DCD R1 29 10 DCD B DCD B 28 6 7 DSR A DTR A DTE_DSR/DCE_DTR R2 27 22 DSR B DTR B 26 5 8 CTS A RTS A DTE_CTS/DCE_RTS R3 25 13 CTS B RTS B 9 24 18 DTE_LL/DCE_RI D4 LL RI 10 23 * DTE_RI/DCE_LL R4 RI LL 17 22 25 DTE_TM/DCE_RL R5 TM RL 18 21 21 DTE_RL/DCE_TM D5 RL TM 11 15 M0 M0 D4ENB 12 *OPTIONAL M1 M1 13 16 M2 M2 R4EN NC 14 DCE/DTE DCE/DTE 1546 F32 Figure 32. Controller-Selectable Multiprotocol DTE/DCE Port with RL, LL, TM and DB-25 Connector 18

LTC1546 TYPICAL APPLICATIOU S VCC 5V 3 28 C2 C1µ3F 1 27 1µF C1 CHARGE 26 1µF 2 PUMP C4 4 25 + 3.3µF C5 1µF LTC1546 DTE DCE 24 2 5 TXD A RXD A DTE_TXD/DCE_RXD D1 T 23 14 TXD B RXD B 22 24 SCTE A RXC A 6 DTE_SCTE/DCE_RXC D2 T 21 11 SCTE B RXC B 7 D3 T 20 15 TXC A TXC A 8 DTE_TXC/DCE_TXC R1 19 12 TXC B TXC B 18 17 RXC A SCTE A 9 DTE_RXC/DCE_SCTE R2 T 17 9 RXC B SCTE B 16 3 10 RXD A TXD A DTE_RXD/DCE_TXD R3 T 15 16 11 RXD B TXD B M0 7 12 M1 SG 13 NC M2 1 14 SHIELD DCE/DTE DB-25 CONNECTOR C10 C9 VCC 25 1µF 1µF 12 VCC VEE 2278 C11 21 DMC1E/DTE VDD GND 1µF 18 M0 26 4 3 RTS A CTS A DTE_RTS/DCE_CTS D1 25 19 RTS B CTS B 24 20 4 DTR A DSR A DTE_DTR/DCE_DSR D2 23 23 DTR B DSR B 5 D3 LTC1544 22 8 6 DCD A DCD A DTE_DCD/DCE_DCD R1 21 10 DCD B DCD B 20 6 7 DSR A DTR A DTE_DSR/DCE_DTR R2 19 22 DSR B DTR B 18 5 8 CTS A RTS A DTE_CTS/DCE_RTS R3 17 13 CTS B RTS B 10 16 CABLE WIRING FOR MODE SELECTION R4 MODE PIN 18 PIN 21 9 V.35 PIN 7 PIN 7 D4 RS449, V.36 NC PIN 7 11 RS232 PIN 7 NC M0 12 M1 CABLE WIRING FOR 13 DTE/DCE SELECTION NC M2 14 DCE/DTEINVERT 15 NC MODE PIN 25 DTE PIN 7 1546 F33 DCE NC Figure 33. Cable-Selectable Multiprotocol DTE/DCE Port with DB-25 Connector Information furnished by Linear Technology Corporation is believed to be accurate and reliable. 19 However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.

LTC1546 PACKAGE DESCRIPTIOU Dimensions in inches (millimeters) unless otherwise noted. G Package 28-Lead Plastic SSOP (0.209) (LTC DWG # 05-08-1640) 10.07 – 10.33* (0.397 – 0.407) 28 272625 24 2322 212019 1817 16 15 7.65 – 7.90 (0.301 – 0.311) 1 2 3 4 5 6 7 8 9 10 1112 13 14 5.20 – 5.38** 1.73 – 1.99 (0.205 – 0.212) (0.068 – 0.078) 0° – 8° 0.65 0.13 – 0.22 0.55 – 0.95 (0.0256) (0.005 – 0.009) (0.022 – 0.037) BSC 0.05 – 0.21 0.25 – 0.38 (0.002 – 0.008) NOTE: DIMENSIONS ARE IN MILLIMETERS (0.010 – 0.015) *DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.152mm (0.006") PER SIDE **DIMENSIONS DO NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.254mm (0.010") PER SIDE G28 SSOP 1098 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTC1321 Dual RS232/RS485 Transceiver Two RS232 Driver/Receiver Pairs or Two RS485 Driver/Receiver Pairs LTC1334 Single 5V RS232/RS485 Multiprotocol Transceiver Two RS232 Driver/Receiver or Four RS232 Driver/Receiver Pairs LTC1343 Software-Selectable Multiprotocol Transceiver 4-Driver/4-Receiver for Data and Clock Signals LTC1344A Software-Selectable Cable Terminator Perfect for Terminating the LTC1543 (Not Needed with LTC1546) LTC1345 Single Supply V.35 Transceiver 3-Driver/3-Receiver for Data and Clock Signals LTC1346A Dual Supply V.35 Transceiver 3-Driver/3-Receiver for Data and Clock Signals LTC1543 Software-Selectable Multiprotocol Transceiver Terminated with LTC1344A for Data and Clock Signals, Companion to LTC1544 or LTC1545 for Control Signals LTC1544 Software-Selectable Multiprotocol Transceiver Companion to LTC1546 or LTC1543 for Control Signals Including LL LTC1545 Software-Selectable Multiprotocol Transceiver 5-Driver/5-Receiver Companion to LTC1546 or LTC1543 for Control Signals Including LL, TM and RL 20 Linear Technology Corporation sn1546 1546fs LT/LCG 1200 4K • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408)4 32-1900 l FAX: (408) 434-0507 l w ww.linear-tech.com ª LINEAR TECHNOLOGY CORPORATION 1999

Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: A nalog Devices Inc.: LTC1546CG#PBF LTC1546IG#TRPBF LTC1546CG LTC1546CG#TR LTC1546IG#TR LTC1546CG#TRPBF LTC1546IG LTC1546IG#PBF