LTC1544 Software-Selectable Multiprotocol Transceiver FEATURES DESCRIPTIOU n Software-Selectable Transceiver Supports: The LTC®1544 is a 4-driver/4-receiver multiprotocol trans- RS232, RS449, EIA530, EIA530-A, V.35, V.36, X.21 ceiver. The LTC1544 and LTC1543 form the core of a n TUV/Detecon Inc. Certified NET1 and NET2 complete software-selectable DTE or DCE interface port that Compliant (Test Report No. NET2/102201/97) supports the RS232, RS449, EIA530, EIA530-A, V.35, V.36 n TBR2 Compliant (Test Report No. CTR2/022701/98) or X.21 protocols. Cable termination for the LTC1543 may be n Software-Selectable Cable Termination Using implemented using the LTC1344A software-selectable cable the LTC1344A termination chip or by using existing discrete designs. The n Complete DTE or DCE Port with LTC1543, LTC1344A or LTC1546 with Integrated Termination chip. n Operates from Single 5V Supply with LTC1543 The LTC1544 runs from a 5V supply and the charge pump on APPLICATIOU S the LTC1543 or LTC1546. The part is available in a 28-lead SSOP surface mount package. n Data Networking n CSU and DSU n Data Routers , LTC and LT are registered trademarks of Linear Technology Corporation. TYPICAL APPLICATIOU DTE or DCE Multiprotocol Serial Interface with DB-25 Connector LL CTS DSR DCD DTR RTS RXD RXC TXC SCTE TXD LTC1544 LTC1543 D4 D3 D2 D1 D3 D2 D1 R4 R3 R2 R1 R3 R2 R1 LTC1344A 18 13 5 22 6 10 8 23 20 19 4 1 7 16 3 9 17 12 15 11 24 14 2 LL A (141) CTS B CTS A (106) DSR B DSR A (107) DCD B DCD A (109) DTR B DTR A (108) RTS B RTS A (105) SHIELD (101) SG (102) RXD B RXD A (104) RXC B RXC A (115) TXC B TXC A (114) SCTE B SCTE A (113) TXD B TXD A (103) DB-25 CONNECTOR 1544 TA01 1

LTC1544 ABSOLUTE W AXIW UW RATIU GS PACKAGE/ORDER IU FORW ATIOU (Note 1) Supply Voltage, VCC................................................ 6.5V TOP VIEW ORDER PART Input Voltage VCC 1 28 VEE NUMBER Transmitters........................... –0.3V to (VCC + 0.3V) VDD 2 27 GND Receivers............................................... –18V to 18V D1 3 26 D1 A LTC1544CG D1 Logic Pins .............................. –0.3V to (VCC + 0.3V) D2 4 25 D1 B LTC1544IG D2 Output Voltage D3 5 24 D2 A Transmitters..................(V – 0.3V) to (V + 0.3V) R1 6 D3 23 D2 B EE DD R2 7 22 D3/R1 A Receivers................................ –0.3V to (V + 0.3V) CC R1 R3 8 21 D3/R1 B V ........................................................ –10V to 0.3V EE D4 9 R2 20 R2 A V ....................................................... –0.3V to 10V DD R4 10 19 R2 B Short-Circuit Duration R3 M0 11 18 R3 A Transmitter Output..................................... Indefinite D4 M1 12 17 R3 B Receiver Output.......................................... Indefinite M2 13 R4 16 D4/R4 A V .................................................................. 30 sec EE DCE/DTE 14 15 INVERT Operating Temperature Range G PACKAGE LTC1544CG.............................................0(cid:176) C to 70(cid:176) C 28-LEAD PLASTIC SSOP LTC1544IG........................................ –40(cid:176) C to 85(cid:176) C TJMAX = 150(cid:176)C, q JA = 65(cid:176)C/W Storage Temperature Range................ –65(cid:176) C to 150(cid:176) C Consult factory for Military grade parts. Lead Temperature (Soldering, 10 sec)................. 300(cid:176) C ELECTRICAL CHARACTERISTICS The l denotes specifications which apply over the full operating tempera- ture range, otherwise specifications are at T = 25(cid:176) C. V = 5V, V = 8V, V = –7V for V.28, –5.5V for V.10, V.11 (Notes 2, 3) A CC DD EE SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Supplies I V Supply Current (DCE Mode, RS530, RS530-A, X.21 Modes, No Load 2.7 mA CC CC All Digital Pins = GND or V ) RS530, RS530-A, X.21 Modes, Full Load l 95 120 mA CC V.28 Mode, No Load l 1 2 mA V.28 Mode, Full Load l 1 2 mA No-Cable Mode l 10 200 m A I V Supply Current (DCE Mode, RS530, RS530-A, X.21 Modes, No Load 2.1 mA EE EE All Digital Pins = GND or V ) RS530, X.21 Modes, Full Load 14 mA CC V = –5.6V (RS530, RS530-A Modes) RS530-A, Full Load 25 mA EE V = –8.46V (V.28 Mode) V.28 Mode, No Load 1 mA EE V.28 Mode, Full Load 12 mA No-Cable Mode 10 m A I V Supply Current (DCE Mode, RS530, RS530-A, X.21 Modes, NoLoad 0.2 mA DD DD All Digital Pins = GND or V ) RS530, RS530-A, X.21 Modes, Full Load 0.2 mA CC V = 8.73V V.28 Mode, No Load 1 mA DD V.28 Mode, Full Load 12 mA No-Cable Mode 10 m A P Internal Power Dissipation (DCE Mode, RS530, RS530-A, X.21 Modes, Full Load 300 mW D (All Digital Pins = GND or V ) V.28 Mode, Full Load 54 mW CC 2

LTC1544 ELECTRICAL CHARACTERISTICS The l denotes specifications which apply over the full operating tempera- ture range, otherwise specifications are at T = 25(cid:176) C. V = 5V, V = 8V, V = –7V for V.28, –5.5V for V.10, V.11 (Notes 2, 3) A CC DD EE SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Logic Inputs and Outputs V Logic Input High Voltage l 2 V IH V Logic Input Low Voltage l 0.8 V IL I Logic Input Current D1, D2, D3, D4 l – 10 m A IN M0, M1, M2, DCE, INVERT = GND (LTC1544C) l –100 –50 –30 m A M0, M1, M2, DCE, INVERT = GND (LTC1544I) l –120 –50 –30 m A M0, M1, M2, DCE, INVERT = V l – 10 m A CC V Output High Voltage I = –4mA l 3 4.5 V OH O V Output Low Voltage I = 4mA l 0.3 0.8 V OL O I Output Short-Circuit Current 0V £ V £ V l –50 40 50 mA OSR O CC I Three-State Output Current M0 = M1 = M2 = V , 0V £ V £ V – 1 m A OZR CC O CC V.11 Driver V Open Circuit Differential Output Voltage R = 1.95k (Figure 1) l – 5 V ODO L V Loaded Differential Output Voltage R = 50W (Figure 1) 0.5V 0.67V V ODL L ODO ODO R = 50W (Figure 1) l – 2 V L D V Change in Magnitude of Differential R = 50W (Figure 1) l 0.2 V OD L Output Voltage V Common Mode Output Voltage R = 50W (Figure 1) l 3 V OC L D V Change in Magnitude of Common Mode R = 50W (Figure 1) l 0.2 V OC L Output Voltage I Short-Circuit Current V = GND – 150 mA SS OUT I Output Leakage Current –0.25V £ V £ 0.25V, Power Off or l – 1 – 100 m A OZ O No-Cable Mode or Driver Disabled t , t Rise or Fall Time LTC1544C (Figures 2, 5) l 2 15 25 ns r f LTC1544I (Figures 2, 5) l 2 15 35 ns t Input to Output LTC1544C (Figures 2, 5) l 20 40 65 ns PLH LTC1544I (Figures 2, 5) l 20 40 75 ns t Input to Output LTC1544C (Figures 2, 5) l 20 40 65 ns PHL LTC1544I (Figures 2, 5) l 20 40 75 ns D t Input to Output Difference, ‰ t – t ‰ LTC1544C (Figures 2, 5) l 0 3 12 ns PLH PHL LTC1544I (Figures 2, 5) l 0 3 17 ns t Output to Output Skew (Figures 2, 5) 3 ns SKEW V.11 Receiver V Input Threshold Voltage –7V £ V £ 7V l –0.2 0.2 V TH CM D V Input Hysteresis –7V £ V £ 7V l 15 40 mV TH CM I Input Current (A, B) –10V £ V £ 10V l – 0.66 mA IN A,B R Input Impedance –10V £ V £ 10V l 15 30 kW IN A,B t , t Rise or Fall Time (Figures 2, 6) 15 ns r f t Input to Output LTC1544C (Figures 2, 6) l 50 80 ns PLH LTC1544I (Figures 2, 6) l 50 90 ns t Input to Output LTC1544C (Figures 2, 6) l 50 80 ns PHL LTC1544I (Figures 2, 6) l 50 90 ns D t Input to Output Difference, ‰ t – t ‰ LTC1544C (Figures 2, 6) l 0 4 16 ns PLH PHL LTC1544I (Figures 2, 6) l 0 4 21 ns 3

LTC1544 ELECTRICAL CHARACTERISTICS The l denotes specifications which apply over the full operating tempera- ture range, otherwise specifications are at T = 25(cid:176) C. V = 5V, V = 8V, V = –7V for V.28, –5.5V for V.10, V.11 (Notes 2, 3) A CC DD EE SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V.10 Driver V Output Voltage Open Circuit, R = 3.9k l – 4 – 6 V O L V Output Voltage R = 450W (Figure 3) l – 3.6 V T L R = 450W (Figure 3) 0.9V L O I Short-Circuit Current V = GND – 150 mA SS O I Output Leakage Current –0.25V £ V £ 0.25V, Power Off or l – 0.1 – 100 m A OZ O No-Cable Mode or Driver Disabled t , t Rise or Fall Time R = 450W , C = 100pF (Figures 3, 7) 2 m s r f L L t Input to Output R = 450W , C = 100pF (Figures 3, 7) 1 m s PLH L L t Input to Output R = 450W , C = 100pF (Figures 3, 7) 1 m s PHL L L V.10 Receiver V Receiver Input Threshold Voltage l –0.25 0.25 V TH D V Receiver Input Hysteresis l 25 50 mV TH I Receiver Input Current –10V £ V £ 10V l – 0.66 mA IN A R Receiver Input Impedance –10V £ V £ 10V l 15 30 kW IN A t , t Rise or Fall Time (Figures 4, 8) 15 ns r f t Input to Output (Figures 4, 8) 55 ns PLH t Input to Output (Figures 4, 8) 109 ns PHL D t Input to Output Difference, ‰ t – t ‰ (Figures 4, 8) 60 ns PLH PHL V.28 Driver V Output Voltage Open Circuit l – 10 V O R = 3k (Figure 3) l – 5 – 8.5 V L I Short-Circuit Current V = GND l – 150 mA SS O I Output Leakage Current –0.25V £ V £ 0.25V, Power Off or l – 1 – 100 m A OZ O No-Cable Mode or Driver Disabled SR Slew Rate R = 3k, C = 2500pF (Figures 3, 7) l 4 30 V/m s L L t Input to Output R = 3k, C = 2500pF (Figures 3, 7) l 1.3 2.5 m s PLH L L t Input to Output R = 3k, C = 2500pF (Figures 3, 7) l 1.3 2.5 m s PHL L L V.28 Receiver V Input Low Threshold Voltage l 1.5 0.8 V THL V Input High Threshold Voltage l 2 1.6 V TLH D V Receiver Input Hysterisis l 0 0.1 0.3 V TH R Receiver Input Impedance –15V £ V £ 15V l 3 5 7 kW IN A t , t Rise or Fall Time (Figures 4, 8) 15 ns r f t Input to Output (Figures 4, 8) l 60 100 ns PLH t Input to Output (Figures 4, 8) l 150 450 ns PHL Note 1: Absolute Maximum Ratings are those beyond which the safety of a Note 3: All typicals are given for V = 5V, V = 8V, V = –7V for V.28, CC DD EE device may be impaired. –5.5V for V.10, V.11 and T = 25(cid:176) C. A Note 2: All currents into device pins are positive; all currents out of device are negative. All voltages are referenced to device ground unless otherwise specified. 4

LTC1544 PIU FUU CTIOU S V (Pin 1): Positive Supply for the Transceivers. 4.75V £ INVERT (Pin 15): TTL Level Mode Select Input with Pull- CC V £ 5.25V. Connect a 1m F capacitor to ground. Up to V . CC CC V (Pin 2): Positive Supply Voltage for V.28. Connect to D4/R4 A (Pin 16): Receiver 4 Inverting Input and Driver 4 DD V Pin 3 on LTC1543 or 8V supply. Connect a 1m F Output. DD capacitor to ground. R3 B (Pin 17): Receiver 3 Noninverting Input. D1 (Pin 3): TTL Level Driver 1 Input. R3 A (Pin 18): Receiver 3 Inverting Input. D2 (Pin 4): TTL Level Driver 2 Input. R2 B (Pin 19): Receiver 2 Noninverting Input. D3 (Pin 5): TTL Level Driver 3 Input. R2 A (Pin 20): Receiver 2 Inverting Input. R1 (Pin 6): CMOS Level Receiver 1 Output. D3/R1 B (Pin 21): Receiver 1 Noninverting Input and R2 (Pin 7): CMOS Level Receiver 2 Output. Driver 3 Noninverting Output. R3 (Pin 8): CMOS Level Receiver 3 Output. D3/R1 A (Pin 22): Receiver 1 Inverting Input and Driver 3 Inverting Output. D4 (Pin 9): TTL Level Driver 4 Input. D2 B (Pin 23): Driver 2 Noninverting Output. R4 (Pin 10): CMOS Level Receiver 4 Output. D2 A (Pin 24): Driver 2 Inverting Output. M0 (Pin 11): TTL Level Mode Select Input 0 with Pull-Up to V . D1 B (Pin 25): Driver 1 Noninverting Output. CC M1 (Pin 12): TTL Level Mode Select Input 1 with Pull-Up D1 A (Pin 26): Driver 1 Inverting Output. to V . CC GND (Pin 27): Ground. M2 (Pin 13): TTL Level Mode Select Input 2 with Pull-Up V (Pin 28): Negative Supply Voltage. Connect to V Pin EE EE to V . CC 26 on LTC1543 or to –8V supply. Connect a 1m F capacitor DCE/DTE (Pin 14): TTL Level Mode Select Input with to ground. Pull-Up to V . CC TEST CIRCUITS A R50LW B RL 1C0L0pF B R VOD A 100W CL 100pF A RL VOC 15pF 50W B 1544 F01 1544 F02 Figure 1. V.11 Driver Test Circuit Figure 2. V.11 Driver/Receiver AC Test Circuit 5

LTC1544 TEST CIRCUITS D A D A A R CL RL 15pF 1544 F04 1544 F03 Figure 3. V.10/V.28 Driver Test Circuit Figure 4. V.10/V.28 Receiver Test Circuit WODE SELECTIOU LTC1544 MODE NAME M2 M1 M0 DCE/DTE INVERT D1 D2 D3 R1 R2 R3 D4 R4 Not Used (Default V.11) 0 0 0 0 0 V.11 V.11 Z V.11 V.11 V.11 Z V.10 RS530A 0 0 1 0 0 V.11 V.10 Z V.11 V.10 V.11 Z V.10 RS530 0 1 0 0 0 V.11 V.11 Z V.11 V.11 V.11 Z V.10 X.21 0 1 1 0 0 V.11 V.11 Z V.11 V.11 V.11 Z V.10 V.35 1 0 0 0 0 V.28 V.28 Z V.28 V.28 V.28 Z V.28 RS449/V.36 1 0 1 0 0 V.11 V.11 Z V.11 V.11 V.11 Z V.10 V.28/RS232 1 1 0 0 0 V.28 V.28 Z V.28 V.28 V.28 Z V.28 No Cable 1 1 1 0 0 Z Z Z Z Z Z Z Z Not Used (Default V.11) 0 0 0 0 1 V.11 V.11 Z V.11 V.11 V.11 V.10 Z RS530A 0 0 1 0 1 V.11 V.10 Z V.11 V.10 V.11 V.10 Z RS530 0 1 0 0 1 V.11 V.11 Z V.11 V.11 V.11 V.10 Z X.21 0 1 1 0 1 V.11 V.11 Z V.11 V.11 V.11 V.10 Z V.35 1 0 0 0 1 V.28 V.28 Z V.28 V.28 V.28 V.28 Z RS449/V.36 1 0 1 0 1 V.11 V.11 Z V.11 V.11 V.11 V.10 Z V.28/RS232 1 1 0 0 1 V.28 V.28 Z V.28 V.28 V.28 V.28 Z No Cable 1 1 1 0 1 Z Z Z Z Z Z Z Z Not Used (Default V.11) 0 0 0 1 0 V.11 V.11 V.11 Z V.11 V.11 V.10 Z RS530A 0 0 1 1 0 V.11 V.10 V.11 Z V.10 V.11 V.10 Z RS530 0 1 0 1 0 V.11 V.11 V.11 Z V.11 V.11 V.10 Z X.21 0 1 1 1 0 V.11 V.11 V.11 Z V.11 V.11 V.10 Z V.35 1 0 0 1 0 V.28 V.28 V.28 Z V.28 V.28 V.28 Z RS449/V.36 1 0 1 1 0 V.11 V.11 V.11 Z V.11 V.11 V.10 Z V.28/RS232 1 1 0 1 0 V.28 V.28 V.28 Z V.28 V.28 V.28 Z No Cable 1 1 1 1 0 Z Z Z Z Z Z Z Z Not Used (Default V.11) 0 0 0 1 1 V.11 V.11 V.11 Z V.11 V.11 Z V.10 RS530A 0 0 1 1 1 V.11 V.10 V.11 Z V.10 V.11 Z V.10 RS530 0 1 0 1 1 V.11 V.11 V.11 Z V.11 V.11 Z V.10 X.21 0 1 1 1 1 V.11 V.11 V.11 Z V.11 V.11 Z V.10 V.35 1 0 0 1 1 V.28 V.28 V.28 Z V.28 V.28 Z V.28 RS449/V.36 1 0 1 1 1 V.11 V.11 V.11 Z V.11 V.11 Z V.10 V.28/RS232 1 1 0 1 1 V.28 V.28 V.28 Z V.28 V.28 Z V.28 No Cable 1 1 1 1 1 Z Z Z Z Z Z Z Z 6

LTC1544 SWITCHIU G TIW E WAVEFORW S 5V D 1.5V f = 1MHz : tr £ 10ns : tf £ 10ns 1.5V 0V tPLH tPHL B – AVO 50% 90% VDIFF = V(A) – V(B) 90% 50% –VO tr 10% 1/2 VO tf 10% A VO B tSKEW tSKEW 1544 F05 Figure 5. V.11, V.35 Driver Propagation Delays B – VAOD2 0V f = 1MHz : tr ≤ 10ns : tf ≤ 10ns INPUT 0V –VOD2 tPLH tPHL VOH R 1.5V OUTPUT 1.5V VOL 1544 F06 Figure 6. V.11, V.35 Receiver Propagation Delays 3V D 1.5V 1.5V 0V tPHL tPLH VO 3V 3V 1544 F07 A 0V 0V –3V –3V –VO tf tr Figure 7. V.10, V.28 Driver Propagation Delays VIH A 1.3V 1.7V VIL tPHL tPLH VOH 2.4V R 0.8V 1544 F08 VOL Figure 8. V.10, V.28 Receiver Propagation Delays 7

LTC1544 APPLICATIOUNS INUFORWMATIOUN Overview A complete DCE-to-DTE interface operating in EIA530 mode is shown in Figure 9. The LTC1543 of each port is The LTC1543/LTC1544 form the core of a complete soft- used to generate the clock and data signals. The LTC1544 ware-selectable DTE or DCE interface port that supports is used to generate the control signals along with LL (Local the RS232, RS449, EIA530, EIA530-A, V.35, V.36 or X.21 Loop-back).The LTC1344A cable termination chip is used protocols. Cable termination may be implemented using only for the clock and data signals because they must the LTC1344A software-selectable cable termination chip support V.35 cable termination. The control signals do not or by using existing discrete designs. need any external resistors. DTE DCE SERIAL LTC1543 LTC1344A LTC1344A LTC1543 SERIAL CONTROLLER CONTROLLER TXD D1 TXD 103W R3 TXD SCTE D2 SCTE 103W R2 SCTE D3 R1 TXC R1 103W TXC D3 TXC RXC R2 103W RXC D2 RXC RXD R3 103W RXD D1 RXD LTC1544 LTC1544 RTS D1 RTS R3 RTS DTR D2 DTR R2 DTR D3 R1 DCD R1 DCD D3 DCD DSR R2 DSR D2 DSR CTS R3 CTS D1 CTS LL LL D4 R4 LL R4 D4 1544 F09 Figure 9. Complete Multiprotocol Interface in EIA530 Mode 8

LTC1544 APPLICATIOUNS INUFORWMATIOUN Mode Selection unconnected (1) or wired to ground (0) in the cable as shown in Figure 10. The interface protocol is selected using the mode select pins M0, M1 and M2 (see the Mode Selection table). The internal pull-up current sources will ensure a binary 1 when a pin is left unconnected and that the LTC1543/ For example, if the port is configured as a V.35 interface, LTC1544 and the LTC1344A enter the no-cable mode the mode selection pins should be M2 = 1, M1 = 0, M0 = 0. when the cable is removed. In the no-cable mode the For the control signals, the drivers and receivers will LTC1543/LTC1544 supply current drops to less than operate in V.28 (RS232) electrical mode. For the clock and 200m A and all LTC1543/LTC1544 driver outputs and data signals, the drivers and receivers will operate in V.35 LTC1344A resistive terminations are forced into a high electrical mode. The DCE/DTE pin will configure the port impedance state. for DCE mode when high, and DTE when low. The mode selection may also be accomplished by using The interface protocol may be selected simply by plug- jumpers to connect the mode pins to ground or V . ging the appropriate interface cable into the connector. CC The mode pins are routed to the connector and are left 21 LATCH LTC1344A DCE/ DTE M2 M1 M0 (DATA) 22 23 24 1 CONNECTOR (DATA) 11 M0 12 LTC1543 M1 13 M2 NC 14 DCE/DTE NC CABLE LTC1544 14 DCE/DTE 13 M2 12 M1 11 M0 (DATA) 1544 F10 Figure 10: Single Port DCE V.35 Mode Selection in the Cable 9

LTC1544 APPLICATIOUNS INUFORWMATIOUN Cable Termination The V.10 receiver configuration in the LTC1544 is shown in Figure 13. In V.10 mode switch S3 inside the LTC1544 Traditional implementations have included switching is turned off.The noninverting input is disconnected inside resistors with expensive relays, or requiring the user to the LTC1544 receiver and connected to ground. The cable change termination modules every time the interface termination is then the 30k input impedance to ground of standard has changed. Custom cables have been used the LTC1544 V.10 receiver. with the termination in the cable head or separate termina- tions are built on the board and a custom cable routes the signals to the appropriate termination. Switching the IZ 3.25mA terminations with FETs is difficult because the FETs must remain off even though the signal voltage is beyond the supply voltage for the FET drivers or the power is off. Using the LTC1344A along with the LTC1543/LTC1544 –10V –3V solves the cable termination switching problem. Via soft- ware control, the LTC1344A provides termination for the VZ 3V 10V V.10 (RS423), V.11 (RS422), V.28 (RS232) and V.35 electrical protocols. V.10 (RS423) Interface 1544 F12 A typical V.10 unbalanced interface is shown in Figure 11. –3.25mA A V.10 single-ended generator output A with ground C is connected to a differential receiver with inputs A' con- nected to A, and input C' connected to the signal return Figure 12. V.10 Receiver Input Impedance ground C. Usually, no cable termination is required for V.10 interfaces, but the receiver inputs must be compliant with the impedance curve shown in Figure 12. A' A LTC1544 BALANCED R5 R8 INTERCONNECTING 20k 6k GENERATOR CABLE LOAD R6 RECEIVER 10k CABLE S3 TERMINATION RECEIVER A A' R7 R4 10k B' B 20k C C' 1544 F11 C' GND 1544 F13 Figure 11. Typical V.10 Interface Figure 13. V.10 Receiver Configuration 10

LTC1544 APPLICATIOUNS INUFORWMATIOUN V.11 (RS422) Interface V.28 (RS232) Interface A typical V.11 balanced interface is shown in Figure 14. A A typical V.28 unbalanced interface is shown in Figure 16. V.11 differential generator with outputs A and B with A V.28 single-ended generator output A with ground C is ground C is connected to a differential receiver with connected to a single-ended receiver with input A' con- ground C', inputs A' connected to A, B' connected to B. The nected to A, ground C' connected via the signal return V.11 interface has a differential termination at the receiver ground C. end that has a minimum value of 100W . The termination In V.28 mode all switches are off except S3 inside the resistor is optional in the V.11 specification, but for the LTC1543/LTC1544 which connects a 6k (R8) impedance high speed clock and data lines, the termination is required to ground in parallel with 20k (R5) plus 10k (R6) for a to prevent reflections from corrupting the data. The combined impedance of 5k as shown in Figure 17. The receiver inputs must also be compliant with the imped- noninverting input is disconnected inside the LTC1543/ ance curve shown in Figure 12. LTC1544 receiver and connected to a TTL level reference In V.11 mode, all switches are off except S1 inside the voltage for a 1.4V receiver trip point. LTC1344A which connects a 103W differential termina- tion impedance to the cable as shown in Figure 15. BALANCED BALANCED INTERCONNECTING INTERCONNECTING GENERATOR CABLE LOAD GENERATOR CABLE LOAD CABLE CABLE TERMINATION RECEIVER TERMINATION RECEIVER A A' A A' 100W MIN B B' C C' C C' 1544 F16 1544 F14 Figure 14. Typical V.11 Interface Figure 16. Typical V.28 Interface A' A' A LTC1543 A LTC1543 LTC1344A R5 LTC1544 LTC1344A R5 LTC1544 R1 R8 R1 R8 51.5W 6k 20k 51.5W 6k 20k R6 R6 RECEIVER RECEIVER 10k 10k S1 R3 S3 S1 R3 S3 S2 124W S2 124W R512.5W B 2R04k R107k R512.5W B 2R04k R107k B' B' GND GND C' C' 1544 F15 1544 F17 Figure 15. V.11 Receiver Configuration Figure 17. V.28 Receiver Configuration 11

LTC1544 APPLICATIOUNS INUFORWMATIOUN V.35 Interface 100W ␣– 10W , and the impedance between shorted termi- nals (A' and B') and ground C' must be 150W – 15W . A typical V.35 balanced interface is shown in Figure 18. A V.35 differential generator with outputs A and B with In V.35 mode, both switches S1 and S2 inside the LTC1344A ground C is connected to a differential receiver with are on, connecting the T network impedance as shown in ground C', inputs A' connected to A, B' connected to B. The Figure 19. The switch in the LTC1543 is off. The 30k input V.35 interface requires a T or delta network termination at impedance of the receiver is placed in parallel with the T the receiver end and the generator end. The receiver network termination, but does not affect the overall input differential impedance measured at the connector must be impedance significantly. BALANCED INTERCONNECTING GENERATOR CABLE LOAD CABLE TERMINATION RECEIVER A A' 50W 50W 125W 125W 50W 50W B B' C C' 1544 F18 Figure 18. Typical V.35 Interface A' A LTC1543 LTC1344A R5 R1 R8 51.5W 6k 20k R6 RECEIVER 10k S1 R3 S3 S2 124W R2 R7 51.5W R4 10k B 20k B' C' GND 1544 F19 Figure 19. V.35 Receiver Configuration 12

LTC1544 APPLICATIOUNS INUFORWMATIOUN The generator differential impedance must be 50W to Charge Pump 150W and the impedance between shorted terminals (A The LTC1543 uses an internal capacitive charge pump to and B) and ground C must be 150W – 15W . For the generate V and V as shown in Figure 21. A voltage DD EE generator termination, switches S1 and S2 are both on and doubler generates about 8V on V and a voltage inverter DD the top side of the center resistor is brought out to a pin so generates about –7.5V for V . Four 1m F surface mounted EE it can be bypassed with an external capacitor to reduce tantalum or ceramic capacitors are required for C1, C2, C3 common mode noise as shown in Figure 20. and C4. The V capacitor C5 should be a minimum of EE 3.3m F. All capacitors are 16V and should be placed as close A as possible to the LTC1543 to reduce EMI. LTC1344A 51.5W V.35 DRIVER S2 SO1N C3 3 VDD C2+ 28 C2 124W ON 1m F 2 C1+ C2– 27 1m F 51.5W B C1m1F 1 C1– LTC1543 VEE 26 C5 3.3m F C1 4 25 + 100pF C 5V VCC GND C4 1544 F20 1m F 1544 F21 Figure 20. V.35 Driver Using the LTC1344A Figure 21. Charge Pump Any mismatch in the driver rise and fall times or skew in the driver propagation delays will force current through Receiver Fail-Safe the center termination resistor to ground, causing a high All LTC1543/LTC1544 receivers feature fail-safe opera- frequency common mode spike on the A and B terminals. tion in all modes. If the receiver inputs are left floating or The common mode spike can cause EMI problems that are shorted together by a termination resistor, the receiver reduced by capacitor C1 which shunts much of the com- output will always be forced to a logic high. mon mode energy to ground rather than down the cable. DTE vs DCE Operation No-Cable Mode The DCE/DTE pin acts as an enable for Driver 3/Receiver The no-cable mode (M0 = M1 = M2 = 1) is intended for the 1 in the LTC1543, and Driver 3/Receiver 1 and Driver 4/ case when the cable is disconnected from the connector. Receiver 4 in the LTC1544. The INVERT pin in the LTC1544 The charge pump, bias circuitry, drivers and receivers are allows the Driver 4/Receiver 4 enable to be high or low true turned off, the driver outputs are forced into a high polarity. impedance state, and the supply current drops to less than 200m A. 13

LTC1544 APPLICATIOUNS INUFORWMATIOUN The LTC1543/LTC1544 can be configured for either DTE Cable-Selectable Multiprotocol Interface or DCE operation in one of two ways: a dedicated DTE or A cable-selectable multiprotocol DTE/DCE interface is DCE port with a connector of appropriate gender or a port shown in Figure 26. The select lines M0, M1 and DCE/DTE with one connector that can be configured for DTE or DCE are brought out to the connector. The mode is selected by operation by rerouting the signals to the LTC1543/LTC1544 the cable by wiring M0 (connector Pin 18) and M1 (con- using a dedicated DTE cable or dedicated DCE cable. nector Pin 21) and DCE/DTE (connector Pin 25) to ground A dedicated DTE port using a DB-25 male connector is (connector Pin 7) or letting them float. If M0, M1 or DCE/ shown in Figure 22. The interface mode is selected by logic DTE is floating, internal pull-up current sources will pull outputs from the controller or from jumpers to either V the signals to V . The select bit M2 is hard wired to V . CC CC CC or GND on the mode select pins. A dedicated DCE port When the cable is pulled out, the interface will go into the using a DB-25 female connector is shown in Figure 23. no-cable mode. A port with one DB-25 connector, but can be configured Compliance Testing for either DTE or DCE operation is shown in Figure 24. The configuration requires separate cables for proper signal A European standard EN 45001 test report is available for routing in DTE or DCE operation. For example, in DTE the LTC1543/LTC1544/LTC1344A chipset. A copy of the mode, the TXD signal is routed to Pins 2 and 14 via Driver test report is available from LTC or TUV Telecom Services 1 in the LTC1543. In DCE mode, Driver 1 now routes the Inc. (formerly Detecon Inc.) RXD signal to Pins 2 and 14. The title of the report is: Multiprotocol Interface with RL, LL, TM and a DB-25 Test Report No. NET2/102201/97. Connector The address of TUV Telecom Services Inc. is: If the RL, LL and TM signals are implemented, there are not TUV Telecom Services Inc. enough drivers and receivers available in the LTC1543/ Type Approval Division LTC1544. In Figure 25, the required control signals are 1775 Old Highway 8, Ste 107 handled by the LTC1544 but the clock/data signals use the St. Paul, MN 55112 USA LTC1343. The LTC1343 has an additional single-ended Tel. +1 (612) 639-0775 driver/receiver pair that can handle two more optional Fax. +1 (612) 639-0873 control signals such as TM and LL. 14

LTC1544 TYPICAL APPLICATIOU S C6 C7 C8 100pF100pF 100pF 3 8 11 12 13 LTC1344A VCC 5V 14 21 VCC LATCH C13 3 28 1µF C2 C1µ3F 1 27 1µF 1Cµ1F 24 CPHUAMRGPE 2265 +C3.43µF C1µ122F VEE DCE/DTE M2 M1 M0 C5 5 4 6 7 9 10 16 15 18 17 19 20 22 23 24 1 1µF LTC1543 24 2 5 TXD A (103) TXD D1 23 14 TXD B 22 24 6 SCTE A (113) SCTE D2 21 11 SCTE B 7 D3 20 15 8 TXC A (114) TXC R1 19 12 TXC B 18 17 9 RXC A (115) RXC R2 17 9 RXC B 10 16 3 RXD A (104) RXD R3 15 16 11 RXD B M0 7 12 M1 SG 13 M2 1 14 SHIELD DCE/DTE DB-25 MALE C10 C9 VCC CONNECTOR 1µF 1µF 12 VCC VEE 2278 C11 VDD GND 1µF 26 4 3 RTS A (105) RTS D1 25 19 RTS B 24 20 4 DTR A (108) DTR D2 23 23 DTR B 5 D3 LTC1544 22 8 6 DCD A (109) DCD R1 21 10 DCD B 20 6 7 DSR A (107) DSR R2 19 22 DSR B 18 5 8 CTS A (106) CTS R3 17 13 CTS B 10 16 18 LL R4 LL A (141) 9 D4 11 15 M0 INVERT NC 12 M1 13 M2 14 DCE/DTE M2 M1 M0 1544 F22 Figure 22. Controller-Selectable Multiprotocol DTE Port with DB-25 Connector 15

LTC1544 TYPICAL APPLICATIOU S C6 C7 C8 100pF100pF 100pF 3 8 11 12 13 LTC1344A VCC 5V 14 21 VCC LATCH C13 3 28 1µF C1µ3F 1 27 C1µ2F 1Cµ1F 24 CPHUAMRGPE 2265 + C3.43µF C1µ12F2 VEE DCE/DTE M2 M1 M0 C5 5 4 6 7 9 10 16 15 18 17 19 20 22 23 24 1 1µF LTC1543 24 VCC 3 5 RXD A (104) RXD D1 23 16 RXD B 22 17 6 RXC A (115) RXC D2 21 9 RXC B 7 D3 20 15 8 TXC A (114) TXC R1 19 12 TXC B 18 24 9 SCTE A (113) SCTE R2 17 11 SCTE B 10 16 2 TXD A (103) TXD R3 15 14 11 TXD B M0 7 12 M1 SGND (102) 13 M2 1 14 SHIELD (101) NC DCE/DTE DB-25 FEMALE C10 C9 VCC CONNECTOR 1µF 1µF 12 VCC VEE 2278 C11 VDD GND 1µF 26 5 3 CTS A (106) CTS D1 25 13 CTS B 24 6 4 DSR A (107) DSR D2 23 22 DSR B 5 D3 LTC1544 22 8 6 DCD A (109) DCD R1 21 10 DCD B 20 20 7 DTR A (108) DTR R2 19 23 DTR B 18 4 8 RTS A (105) RTS R3 17 19 RTS B 10 16 18 LL R4 LL A (141) 9 D4 11 15 M0 INVERT NC 12 M1 13 M2 14 NC DCE/DTE M2 M1 M0 1544 F23 Figure 23. Controller-Selectable DCE Port with DB-25 Connector 16

LTC1544 TYPICAL APPLICATIOU S C6 C7 C8 100pF100pF 100pF 3 8 11 12 13 LTC1344A VCC 5V 14 21 VCC LATCH C13 3 28 1µF C2 C1µ3F 1Cµ1F 124 CPHUAMRGPE 222765 +1C3µ.43FµF C1µ122F VEE DCE/DTE M2 M1 M0 C5 5 4 6 7 9 10 16 15 18 17 19 20 22 23 24 1 1µF LTC1543 DTE DCE 24 2 5 TXD A RXD A DTE_TXD/DCE_RXD D1 23 14 TXD B RXD B 22 24 6 SCTE A RXC A DTE_SCTE/DCE_RXC D2 21 11 SCTE B RXC B 7 D3 20 15 8 TXC A TXC A DTE_TXC/DCE_TXC R1 19 12 TXC B TXC B 18 17 9 RXC A SCTE A DTE_RXC/DCE_SCTE R2 17 9 RXC B SCTE B 10 16 3 RXD A TXD A DTE_RXD/DCE_TXD R3 15 16 11 RXD B TXD B M0 7 12 M1 SG 13 M2 1 14 SHIELD DCE/DTE DB-25 C10 C9 VCC CONNECTOR 1µF 1µF 12 VCC VEE 2278 C11 VDD GND 1µF 26 4 3 RTS A CTS A DTE_RTS/DCE_CTS D1 25 19 RTS B CTS B 24 20 4 DTR A DSR A DTE_DTR/DCE_DSR D2 23 23 DTR B DSR B 5 D3 LTC1544 22 8 6 DCD A DCD A DTE_DCD/DCE_DCD R1 21 10 DCD B DCD B 20 6 7 DSR A DTR A DTE_DSR/DCE_DTR R2 19 22 DSR B DTR B 18 5 8 CTS A RTS A DTE_CTS/DCE_RTS R3 17 13 CTS B RTS B 10 16 18 DTE_LL/DCE_LL R4 LL A LL A 9 D4 11 15 M0 INVERT NC 12 M1 13 M2 14 DCE/DTE DCE/DTE M2 M1 M0 1544 F24 Figure 24. Controller-Selectable Multiprotocol DTE/DCE Port with DB-25 Connector 17

LTC1544 TYPICAL APPLICATIOU S C6 C7 C8 100pF100pF100pF 3 8 11 12 13 LTC1344A VCC 5V 14 21 VCC LATCH 1 C13 44 1µF C2 C1µ3F 1Cµ1F 324 CPHUAMRGPE 444321 +1C3µ.43FµF C1µ122F VEE DCE/DTE M2 M1 M0 C1µ5F 8 LTC1343 5 4 6 7 9 10 16 15 18 17 19 20 22 23 24 1 DTE DCE 5 39 18 DTE_LL/DCE_TM D1 LL A TM A 38 2 6 TXD A RXD A DTE_TXD/DCE_RXD D2 37 14 TXD B RXD B 36 24 7 SCTE A RXC A DTE_SCTE/DCE_RXC D3 35 11 SCTE B RXC B 34 9 D4 33 10 12 32 15 13 TXC A TXC A DTE_TXC/DCE_TXC R1 31 12 TXC B TXC B 14 30 17 RXC A SCTE A DTE_RXC/DCE_SCTE R2 29 9 RXC B SCTE B 15 28 3 RXD A TXD A DTE_RXD/DCE_TXD R3 27 16 RXD B TXD B 16 26 25 DTE_TM/DCE_LL R4 TM A LL A 20 21 7 CTRL DCE SG 22 19 LATCH M2 11 INVERT M1 18 1 SHIELD 25 17 423SET M0 10R01k VCC 40 24 GND EC LB 23 DB-25 LB CONNECTOR C1µ10F C1µ9F VCC 12 VCC VEE 2278 C11 VDD GND 1µF 26 4 3 RTS A CTS A DTE_RTS/DCE_CTS D1 25 19 RTS B CTS B 24 20 4 DTR A DSR A DTE_DTR/DCE_DSR D2 23 23 DTR B DSR B 5 D3 LTC1544 22 8 6 DCD A DCD A DTE_DCD/DCE_DCD R1 21 10 DCD B DCD B 20 6 7 DSR A DTR A DTE_DSR/DCE_DTR R2 19 22 DSR B DTR B 18 5 8 CTS A RTS A DTE_CTS/DCE_RTS R3 17 13 CTS B RTS B 10 16 21 DTE_RL/DCE_RL R4 RL A RL A 9 D4 11 15 M0 INVERT NC 12 M1 13 M2 14 DCE/DTE DCE/DTE M2 M1 1544 F25 M0 Figure 25. Controller-Selectable Multiprotocol DTE/DCE Port with RL, LL, TM and DB-25 Connector 18

LTC1544 TYPICAL APPLICATIOU S C6 C7 C8 100pF100pF 100pF 3 8 11 12 13 LTC1344A VCC 5V 14 21 VCC LATCH C13 3 28 1µF C2 C1µ3F 1Cµ1F 124 CPHUAMRGPE 222765 +1C3µ.43FµF C1µ122F VEE DCE/DTE M2 M1 M0 C5 5 4 6 7 9 10 16 15 18 17 19 20 22 23 24 1 1µF LTC1543 24 VCC 2 DTE DCE 5 TXD A RXD A DTE_TXD/DCE_RXD D1 23 14 TXD B RXD B 22 24 6 SCTE A RXC A DTE_SCTE/DCE_RXC D2 21 11 SCTE B RXC B 7 D3 20 15 8 TXC A TXC A DTE_TXC/DCE_TXC R1 19 12 TXC B TXC B 18 17 9 RXC A SCTE A DTE_RXC/DCE_SCTE R2 17 9 RXC B SCTE B 16 3 10 RXD A TXD A DTE_RXD/DCE_TXD R3 15 16 11 RXD B TXD B M0 7 12 M1 SG 13 NC M2 1 14 SHIELD DCE/DTE DB-25 CONNECTOR C10 C9 VCC 25 1µF 1µF 12 VCC VEE 2278 C11 21 DMC1E/DTE VDD GND 1µF 18 M0 26 4 3 RTS A CTS A DTE_RTS/DCE_CTS D1 25 19 RTS B CTS B 24 20 4 DTR A DSR A DTE_DTR/DCE_DSR D2 23 23 DTR B DSR B 5 D3 LTC1544 22 8 6 DCD A DCD A DTE_DCD/DCE_DCD R1 21 10 DCD B DCD B 20 6 7 DSR A DTR A DTE_DSR/DCE_DTR R2 19 22 DSR B DTR B 18 5 8 CTS A RTS A DTE_CTS/DCE_RTS R3 17 13 CTS B RTS B 10 16 R4 CABLE WIRING FOR MODE SELECTION CABLE WIRING FOR 9 D4 MODE PIN 18 PIN 21 DTE/DCE SELECTION 11 V.35 PIN 7 PIN 7 MODE PIN 25 12 M0 RS449, V.36 NC PIN 7 DTE PIN 7 13 M1 RS232 PIN 7 NC DCE NC NC M2 14 15 DCE/DTEINVERT NC 1544 F26 Figure 26. Cable-Selectable Multiprotocol DTE/DCE Port with DB-25 Connector Information furnished by Linear Technology Corporation is believed to be accurate and reliable. 19 However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.

LTC1544 PACKAGE DESCRIPTIOU Dimensions in inches (millimeters) unless otherwise noted. G Package 28-Lead Plastic SSOP (0.209) (LTC DWG # 05-08-1640) 10.07 – 10.33* (0.397 – 0.407) 28 272625 24 232221201918171615 7.65 – 7.90 (0.301 – 0.311) 1 2 3 4 5 6 7 8 9 10 1112 13 14 5.20 – 5.38** 1.73 – 1.99 (0.205 – 0.212) (0.068 – 0.078) 0° – 8° 0.65 0.13 – 0.22 0.55 – 0.95 (0.0256) (0.005 – 0.009) (0.022 – 0.037) BSC 0.05 – 0.21 0.25 – 0.38 (0.002 – 0.008) NOTE: DIMENSIONS ARE IN MILLIMETERS (0.010 – 0.015) *DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.152mm (0.006") PER SIDE **DIMENSIONS DO NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.254mm (0.010") PER SIDE G28 SSOP 1098 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTC1321 Dual RS232/RS485 Transceiver Two RS232 Driver/Receiver Pairs or Two RS485 Driver/Receiver Pairs LTC1334 Single 5V RS232/RS485 Multiprotocol Transceiver Two RS232 Driver/Receiver or Four RS232 Driver/Receiver Pairs LTC1343 Software-Selectable Multiprotocol Transceiver 4-Driver/4-Receiver for Data and Clock Signals LTC1344A Software-Selectable Cable Terminator Perfect for Terminating the LTC1543 LTC1345 Single Supply V.35 Transceiver 3-Driver/3-Receiver for Data and Clock Signals LTC1346A Dual Supply V.35 Transceiver 3-Driver/3-Receiver for Data and Clock Signals LTC1543 Software-Selectable Multiprotocol Transceiver Companion to LTC1544 for Data and Clock Signals LTC1546 Multiprotocol Transceiver with Termination Companion to LTC1544 for Data and Clock Signals 20 Linear Technology Corporation sn1544 1544fas LT/TP 0100 2K REV A • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408)4 32-1900 l FAX: (408) 434-0507 l w ww.linear-tech.com ª LINEAR TECHNOLOGY CORPORATION 1998

Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: A nalog Devices Inc.: LTC1544CG#TR LTC1544CG#TRPBF LTC1544IG#PBF LTC1544IG#TR LTC1544IG#TRPBF LTC1544CG LTC1544CG#PBF LTC1544IG