LT6236/LT6237/LT6238 Rail-to-Rail Output 215MHz, 1.1nV/√Hz Op Amp/SAR ADC Driver FeaTures DescripTion n Low Noise: 1.1nV/√Hz The LT®6236/LT6237/LT6238 are single/dual/quad low n Low Supply Current: 3.5mA/Amp Max noise, rail-to-rail output op amps that feature 1.1nV/√Hz n Low Offset Voltage: 350µV Max input referred noise voltage density and draw only 3.5mA n Fast Settling Time: 570ns to 18-Bit, 2V Output of supply current per amplifier. These amplifiers combine P-P n Low Distortion: THD = –116.8dB at 2kHz very low noise and supply current with a 215MHz gain n Wide Supply Range: 3V to 12.6V bandwidth product and a 70V/µs slew rate. Low noise, fast n Output Swings Rail-to-Rail settling time and low offset voltage make this amplifier n 215MHz Gain-Bandwidth Product optimal to drive low noise, high speed SAR ADCs. The n Specified Temperature Range: –40°C to 125°C LT6236 includes a shutdown feature that can be used to n LT6236 Shutdown to 10µA Max reduce the supply current to less than 10µA. n LT6236 in Low Profile (1mm) ThinSOT™ Package This amplifier family has an output that swings within n Dual LT6237 in 3mm × 3mm 8-Lead DFN and 8-Lead 50mV of either supply rail to maximize the signal dynamic MSOP Packages range in low supply applications and is specified on 3.3V, n LT6238 in 16-Lead SSOP Package 5V and ±5V supplies. The LT6236/LT6237/LT6238 are upgrades to the LT6230/ applicaTions LT6231/LT6232, offering similar performance with reduced wideband noise beyond 100kHz. n 16-Bit and 18-Bit SAR ADC Drivers n Active Filters L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the property n Low Noise, Low Power Signal Processing of their respective owners. Typical applicaTion Differentially Driving a SAR ADC LT6237 Driving LTC2389-18 f = 2kHz, IN –1dBFS, 32768-Point FFT VS+= 6V 0 IN+ + –10 VOUT = 7.3VP-P HD2 = –129.5dBc LOWPASS FILTERS –20 1/2 LT6237 –30 HD3 = –118.7dBc – 38.3Ω 270pF 49.9Ω IN+ 18-BIT dBFS) –––654000 STSSHFNINDDRAR =D= = –9= 119 911.7876d...978BdddBBB E ( –70 LTC2389-18 UD –80 T 270pF IN– 2.5Msps PLI –90 38.3Ω 49.9Ω M–100 – A–110 623637 TA01a –120 1/2 LT6237 –130 IN– + –140 VS–= –2V –1500.00.10.20.30.40.50.60.70.80.91.01.11.2 FREQUENCY (MHz) 62367 TA01b 623637fb 1 For more information www.linear.com/LT6236

LT6236/LT6237/LT6238 absoluTe MaxiMuM raTings (Note 1) Total Supply Voltage (V+ to V–) ..............................12.6V Specified Temperature Range (Note 5).....–40°C to125°C Input Current (Note 2) .........................................±40mA Maximum Junction Temperature ..........................150°C Output Short-Circuit Duration (Note 3) ............Indefinite Storage Temperature Range ..................–65°C to 150°C Operating Temperature Range (Note 4)..–40°C to 125°C pin conFiguraTion TOP VIEW TOP VIEW OUT A 1 16 OUT D TOP VIEW OUT A 1 8 V+ TOP VIEW –IN A 2 –A D– 15 –IN D +IN A 3 + + 14 +IN D OUT 1 6 V+ –IN A 2 7 OUT B OUT A 1 8 V+ V– 2 5 ENABLE +IN A 3 9 6 –IN B –IN A 2 7 OUT B V+ 4 13 V– +IN 3 4 –IN V– 4 5 +IN B +INV A– 34 65 –+IINN BB +IN B 5 +B C+ 12 +IN C –IN B 6 – – 11 –IN C MS8 PACKAGE 6-LEADS 6P LPAASCTKIACG TESOT-23 DD PACKAGE 8-LEAD PLASTIC MSOP OUT B 7 10 OUT C TJMAX = 150°C, θJA = 192°C/W 8-LEATJDM (A3Xm = m15 ×0 °3Cm, θmJA) P= L4A3S°CT/IWC DFN TJMAX = 150°C, θJA = 273°C/W NC 8 9 NC UNDERSIDE METAL CONNECTED TO V– GN PACKAGE (PCB CONNECTION OPTIONAL) 16-LEAD NARROW PLASTIC SSOP TJMAX = 150°C, θJA = 110°C/W orDer inForMaTion SPECIFIED LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LT6236CS6#TRMPBF LT6236CS6#TRPBF LTGHM 6-Lead Plastic TSOT-23 0°C to 70°C LT6236IS6#TRMPBF LT6236IS6#TRPBF LTGHM 6-Lead Plastic TSOT-23 –40°C to 85°C LT6236HS6#TRMPBF LT6236HS6#TRPBF LTGHM 6-Lead Plastic TSOT-23 –40°C to 125°C LT6237CDD#PBF LT6237CDD#TRPBF LGHN 8-Lead (3mm × 3mm) Plastic DFN 0°C to 70°C LT6237IDD#PBF LT6237IDD#TRPBF LGHN 8-Lead (3mm × 3mm) Plastic DFN –40°C to 85°C LT6237HDD#PBF LT6237HDD#TRPBF LGHN 8-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C LT6237CMS8#PBF LT6237CMS8#TRPBF LTGHP 8-Lead Plastic MSOP 0°C to 70°C LT6237IMS8#PBF LT6237IMS8#TRPBF LTGHP 8-Lead Plastic MSOP –40°C to 85°C LT6237HMS8#PBF LT6237HMS8#TRPBF LTGHP 8-Lead Plastic MSOP –40°C to 125°C LT6238CGN#PBF LT6238CGN#TRPBF 6238 16-Lead Narrow Plastic SSOP 0°C to 70°C LT6238IGN#PBF LT6238IGN#TRPBF 6238 16-Lead Narrow Plastic SSOP –40°C to 85°C LT6238HGN#PBF LT6238HGN#TRPBF 6238 16-Lead Narrow Plastic SSOP –40°C to 125°C TRM = 500 pieces. *Temperature grades are identified by a label on the shipping container. Consult LTC Marketing for parts specified with wider operating temperature ranges. Consult LTC Marketing for information on lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ 623637fb 2 For more information www.linear.com/LT6236

LT6236/LT6237/LT6238 elecTrical characTerisTics T = 25°C, V = 5V, 0V; V = 3.3V, 0V; V = V = half supply, A S S CM OUT ENABLE = 0V, unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNIT V Input Offset Voltage LT6236 100 500 µV OS LT6237MS8, LT6238GN 50 350 µV LT6237DD8 75 450 µV Input Offset Voltage Match 100 600 µV (Channel-to-Channel) (Note 6) I Input Bias Current 5 10 µA B I Match (Channel-to-Channel) (Note 6) 0.1 0.9 µA B I Input Offset Current 0.1 0.6 µA OS Input Noise Voltage 0.1Hz to 10Hz 180 nV P-P e Input Noise Voltage Density f = 10kHz, V = 5V 1.1 1.7 nV/√Hz n S i Input Noise Current Density, Balanced Source f = 10kHz, V = 5V, R = 10k 1 pA/√Hz n S S Input Noise Current Density, Unbalanced Source f = 10kHz, V = 5V, R = 10k 2.4 pA/√Hz S S R Input Resistance Common Mode 6.5 MΩ IN Differential Mode 7.5 kΩ C Input Capacitance Common Mode 2.9 pF IN Differential Mode 7.7 pF A Large-Signal Gain V = 5V, V = 0.5V to 4.5V, R = 10k to V /2 105 200 V/mV VOL S O L S V = 5V, V = 0.5V to 4.5V, R = 1k to V /2 21 40 V/mV S O L S V = 5V, V = 1V to 4V, R = 100Ω to V /2 5.4 9 V/mV S O L S V = 3.3V, V = 0.65V to 2.65V, R = 10k to V /2 90 175 V/mV S O L S V = 3.3V, V = 0.65V to 2.65V, R = 1k to V /2 16.5 32 V/mV S O L S V Input Voltage Range Guaranteed by CMRR, V = 5V, 0V 1.5 4 V CM S Guaranteed by CMRR, V = 3.3V, 0V 1.15 2.65 V S CMRR Common Mode Rejection Ratio V = 5V, V = 1.5V to 4V 90 115 dB S CM V = 3.3V, V = 1.15V to 2.65V 90 115 dB S CM PSRR Power Supply Rejection Ratio V = 3V to 10V 90 115 dB S Minimum Supply Voltage (Note 7) 3 V V Output Voltage Swing Low (Note 8) No Load 4 40 mV OL I = 5mA 85 190 mV SINK V = 5V, I = 20mA 240 460 mV S SINK V = 3.3V, I = 15mA 185 350 mV S SINK V Output Voltage Swing High (Note 8) No Load 5 50 mV OH I = 5mA 90 200 mV SOURCE V = 5V, I = 20mA 325 600 mV S SOURCE V = 3.3V, I = 15mA 250 400 mV S SOURCE I Short-Circuit Current V = 5V ±30 ±45 mA SC S V = 3.3V ±25 ±40 mA S I Supply Current per Amplifier 3.15 3.5 mA S Disabled Supply Current per Amplifier ENABLE = V+ – 0.35V 0.2 10 µA I ENABLE Pin Current ENABLE = 0.3V –25 –75 µA ENABLE 623637fb 3 For more information www.linear.com/LT6236

LT6236/LT6237/LT6238 elecTrical characTerisTics T = 25°C, V = 5V, 0V; V = 3.3V, 0V; V = V = half supply, A S S CM OUT ENABLE = 0V, unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNIT V ENABLE Pin Input Voltage Low 0.3 V L V ENABLE Pin Input Voltage High V+ – 0.35V V H Output Leakage Current ENABLE = V+ – 0.35V, V = 1.5V to 3.5V 0.2 10 µA O t Turn-On Time ENABLE = 5V to 0V, R = 1k, V = 5V 800 ns ON L S t Turn-Off Time ENABLE = 0V to 5V, R = 1k, V = 5V 41 µs OFF L S GBW Gain-Bandwidth Product Frequency = 1MHz, V = 5V 200 MHz S f –3dB Bandwidth V = 5V, R = 100Ω 90 MHz –3db S L SR Slew Rate V = 5V, A = –1, R = 1k, V = 1.5V to 3.5V 42 60 V/µs S V L O FPBW Full-Power Bandwidth V = 5V, V = 3V (Note 9) 4.4 6.3 MHz S OUT P-P t Settling Time 0.1%, V = 5V, V = 2V, A = 1 50 ns S S STEP V 0.01% 60 ns 0.0015% (16-Bit) 240 ns 4ppm (18-Bit) 570 ns The l denotes the specifications which apply over the 0°C < T < 70°C temperature range. V = 5V, 0V; V = 3.3V, 0V; V = V = A S S CM OUT half supply, ENABLE = 0V, unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNIT V Input Offset Voltage LT6236 l 600 µV OS LT6237MS8, LT6238GN l 450 µV LT6237DD8 l 550 µV Input Offset Voltage Match l 800 µV (Channel-to-Channel) (Note 6) V TC Input Offset Voltage Drift (Note 10) LT6236 l 0.5 2.0 µV/°C OS LT6237MS8 l 0.3 1.4 µV/°C LT6237DD8 l 0.4 2.2 µV/°C LT6238GN l 0.5 2.2 µV/°C I Input Bias Current l 11 µA B I Match (Channel-to-Channel) (Note 6) l 1 µA B I Input Offset Current l 0.7 µA OS A Large-Signal Gain V = 5V, V = 0.5V to 4.5V, R = 10k to V /2 l 78 V/mV VOL S O L S V = 5V, V = 0.5V to 4.5V, R = 1k to V /2 l 17 V/mV S O L S V = 5V, V = 1V to 4V, R = 100Ω to V /2 l 4.1 V/mV S O L S V = 3.3V, V = 0.65V to 2.65V, R = 10k to V /2 l 66 V/mV S O L S V = 3.3V, V = 0.65V to 2.65V, R = 1k to V /2 l 13 V/mV S O L S V Input Voltage Range Guaranteed by CMRR CM V = 5V, 0V l 1.5 4 V S Vs = 3.3V, 0V l 1.15 2.65 V CMRR Common Mode Rejection Ratio V = 5V, V = 1.5V to 4V l 90 dB S CM V = 3.3V, V = 1.15V to 2.65V l 85 dB S CM PSRR Power Supply Rejection Ratio V = 3V to 10V l 85 dB S Minimum Supply Voltage (Note 7) l 3 V V Output Voltage Swing Low (Note 8) No Load l 50 mV OL I = 5mA l 200 mV SINK V = 5V, I = 20mA l 500 mV S SINK V = 3.3V, I = 15mA l 380 mV S SINK 623637fb 4 For more information www.linear.com/LT6236

LT6236/LT6237/LT6238 elecTrical characTerisTics The l denotes the specifications which apply over the 0°C < T < 70°C A temperature range. V = 5V, 0V; V = 3.3V, 0V; V = V = half supply, ENABLE = 0V, unless otherwise noted. S S CM OUT SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNIT V Output Voltage Swing High (Note 8) No Load l 60 mV OH I = 5mA l 215 mV SOURCE V = 5V, I = 20mA l 650 mV S SOURCE V = 3.3V, I = 15mA l 430 mV S SOURCE I Short-Circuit Current V = 5V l ±25 mA SC S V = 3.3V l ±20 mA S I Supply Current per Amplifier l 4.2 mA S Disabled Supply Current per Amplifier ENABLE = V+ – 0.25V l 1 µA I ENABLE Pin Current ENABLE = 0.3V l –85 µA ENABLE V ENABLE Pin Input Voltage Low l 0.3 V L V ENABLE Pin Input Voltage High l V+ – 0.25V V H SR Slew Rate V = 5V, A = –1, R = 1k, V = 1.5V to 3.5V l 35 V/µs S V L O FPBW Full-Power Bandwidth (Note 9) V = 5V, V = 3V l 3.7 MHz S OUT P-P The l denotes the specifications which apply over the –40°C < T < 85°C temperature range. V = 5V, 0V; V = 3.3V, 0V; V = V = A S S CM OUT half supply, ENABLE = 0V, unless otherwise noted. (Note 5) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V Input Offset Voltage LT6236 l 700 µV OS LT6237MS8, LT6238GN l 550 µV LT6237DD8 l 650 µV Input Offset Voltage Match l 1000 µV (Channel-to-Channel) (Note 6) V TC Input Offset Voltage Drift (Note 10) LT6236 l 0.5 2.0 µV/°C OS LT6237MS8 l 0.3 1.4 µV/°C LT6237DD8 l 0.4 2.2 µV/°C LT6238GN l 0.5 2.2 µV/°C I Input Bias Current l 12 µA B I Match (Channel-to-Channel) (Note 6) l 1.1 µA B I Input Offset Current l 0.8 µA OS A Large-Signal Gain V = 5V, V = 0.5V to 4.5V, R = 10k to V /2 l 72 V/mV VOL S O L S V = 5V, V = 0.5V to 4.5V, R = 1k to V /2 l 16 V/mV S O L S V = 5V, V = 1V to 4V, R = 100Ω to V /2 l 3.6 V/mV S O L S V = 3.3V, V = 0.65V to 2.65V, R = 10k to V /2 l 60 V/mV S O L S V = 3.3V, V = 0.65V to 2.65V, R = 1k to V /2 l 12 V/mV S O L S V Input Voltage Range Guaranteed by CMRR CM V = 5V, 0V l 1.5 4 V S V = 3.3V, 0V l 1.15 2.65 V S CMRR Common Mode Rejection Ratio V = 5V, V = 1.5V to 4V l 90 dB S CM V = 3.3V, V = 1.15V to 2.65V l 85 dB S CM PSRR Power Supply Rejection Ratio V = 3V to 10V l 85 dB S Minimum Supply Voltage (Note 7) l 3 V V Output Voltage Swing Low (Note 8) No Load l 60 mV OL I = 5mA l 210 mV SINK V = 5V, I = 15mA l 510 mV S SINK V = 3.3V, I = 15mA l 390 mV S SINK 623637fb 5 For more information www.linear.com/LT6236

LT6236/LT6237/LT6238 elecTrical characTerisTics The l denotes the specifications which apply over the –40°C < T < 85°C A temperature range. V = 5V, 0V; V = 3.3V, 0V; V = V = half supply, ENABLE = 0V, unless otherwise noted. (Note 5) S S CM OUT V Output Voltage Swing High (Note 6) No Load l 70 mV OH I = 5mA l 220 mV SOURCE V = 5V, I = 20mA l 675 mV S SOURCE V = 3.3V, I = 15mA l 440 mV S SOURCE I Short-Circuit Current V = 5V l ±15 mA SC S V = 3.3V l ±15 mA S I Supply Current per Amplifier l 4.4 mA S Disabled Supply Current per Amplifier ENABLE = V+ – 0.2V l 1 µA I ENABLE Pin Current ENABLE = 0.3V l –100 µA ENABLE V ENABLE Pin Input Voltage Low l 0.3 V L V ENABLE Pin Input Voltage High l V+ – 0.2V V H SR Slew Rate V = 5V, A = –1, R = 1k, V = 1.5V to 3.5V l 31 V/µs S V L O FPBW Full-Power Bandwidth (Note 9) V = 5V, V = 3V l 3.3 MHz S OUT P-P The l denotes the specifications which apply over the –40°C < T < 125°C temperature range. V = 5V, 0V; V = 3.3V, 0V; V = V A S S CM OUT = half supply, ENABLE = 0V, unless otherwise noted. (Note 5) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V Input Offset Voltage LT6236 l 750 µV OS LT6237MS8,LT6238GN l 650 µV LT6237DD8 l 700 µV Input Offset Voltage Match l 1000 µV (Channel-to-Channel) (Note 6) V TC Input Offset Voltage Drift (Note 10) LT6236 l 0.5 2.0 µV/°C OS LT6237MS8 l 0.3 1.4 µV/°C LT6237DD8 l 0.4 2.2 µV/°C LT6238GN l 0.5 2.2 µV/°C I Input Bias Current l 12 µA B I Match (Channel-to-Channel) (Note 6) l 1.1 µA B I Input Offset Current l 1.2 µA OS A Large-Signal Gain V = 5V, V = 0.5V to 4.5V, R = 10k to V /2 l 62 V/mV VOL S O L S V = 5V, V = 0.5V to 4.5V, R = 1k to V /2 l 14 V/mV S O L S V = 5V, V = 1V to 4V, R = 100Ω to V /2 l 3 V/mV S O L S V = 3.3V, V = 0.65V to 2.65V, R = 10k to V /2 l 52 V/mV S O L S V = 3.3V, V = 0.65V to 2.65V, R = 1k to V /2 l 11 V/mV S O L S V Input Voltage Range Guaranteed by CMRR CM V = 5V, 0V l 1.5 4 V S V = 3.3V, 0V l 1.15 2.65 V S CMRR Common Mode Rejection Ratio V = 5V, V = 1.5V to 4V l 90 dB S CM V = 3.3V, V = 1.15V to 2.65V l 85 dB S CM PSRR Power Supply Rejection Ratio V = 3V to 10V l 85 dB S Minimum Supply Voltage (Note 7) l 3 V V Output Voltage Swing Low (Note 8) No Load l 60 mV OL I = 5mA l 225 mV SINK V = 5V, I = 15mA l 550 mV S SINK V = 3.3V, I = 15mA l 425 mV S SINK V Output Voltage Swing High (Note 8) No Load l 80 mV OH I = 5mA l 240 mV SOURCE V = 5V, I = 20mA l 700 mV S SOURCE V = 3.3V, I = 15mA l 470 mV S SOURCE 623637fb 6 For more information www.linear.com/LT6236

LT6236/LT6237/LT6238 elecTrical characTerisTics The l denotes the specifications which apply over the –40°C < T < 125°C A temperature range. V = 5V, 0V; V = 3.3V, 0V; V = V = half supply, ENABLE = 0V, unless otherwise noted. (Note 5) S S CM OUT I Short-Circuit Current V = 5V l ±15 mA SC S V = 3.3V l ±15 mA S I Supply Current per Amplifier l 5 mA S Disabled Supply Current per Amplifier ENABLE = V+ – 0.15V l 2 µA I ENABLE Pin Current ENABLE = 0.3V l –100 µA ENABLE V ENABLE Pin Input Voltage Low l 0.3 V L V ENABLE Pin Input Voltage High l V+ – 0.15V V H SR Slew Rate V = 5V, A = –1, R = 1k, V = 1.5V to 3.5V l 31 V/µs S V L O FPBW Full-Power Bandwidth (Note 9) V = 5V, V = 3V l 3.3 MHz S OUT P-P T = 25°C, V = ±5V, V = V = 0V, ENABLE = 0V, unless otherwise noted. A S CM OUT SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V Input Offset Voltage LT6236 100 500 µV OS LT6237MS8, LT6238GN 50 350 µV LT6237DD8 75 450 µV Input Offset Voltage Match 100 600 µV (Channel-to-Channel) (Note 6) I Input Bias Current 5 10 µA B I Match (Channel-to-Channel) (Note 6) 0.1 0.9 µA B I Input Offset Current 0.1 0.6 µA OS Input Noise Voltage 0.1Hz to 10Hz 180 nV P-P e Input Noise Voltage Density f = 10kHz 1.1 1.7 nV/√Hz n i Input Noise Current Density, Balanced Source f = 10kHz, R = 10k 1 pA/√Hz n S Input Noise Current Density, Unbalanced source f = 10kHz, R = 10k 2.4 pA/√Hz S R Input Resistance Common Mode 6.5 MΩ IN Differential Mode 7.5 kΩ C Input Capacitance Common Mode 2.4 pF IN Differential Mode 6.5 pF A Large-Signal Gain V = ±4.5V, R = 10k 140 260 V/mV VOL O L V = ±4.5V, R = 1k 35 65 V/mV O L V = ±2V, R = 100Ω 8.5 16 V/mV O L V Input Voltage Range Guaranteed by CMRR –3 4 V CM CMRR Common Mode Rejection Ratio V = –3V to 4V 95 120 dB CM PSRR Power Supply Rejection Ratio V = ±1.5V to ±5V 90 115 dB S V Output Voltage Swing Low (Note 8) No Load 4 40 mV OL I = 5mA 85 190 mV SINK I = 20mA 240 460 mV SINK V Output Voltage Swing High (Note 8) No Load 5 50 mV OH I = 5mA 90 200 mV SOURCE I = 20mA 325 600 mV SOURCE I Short-Circuit Current ±30 mA SC I Supply Current per Amplifier 3.3 3.9 mA S Disabled Supply Current per Amplifier ENABLE = 4.65V 0.2 µA I ENABLE Pin Current ENABLE = 0.3V –35 –85 µA ENABLE V ENABLE Pin Input Voltage Low 0.3 V L V ENABLE Pin Input Voltage High 4.65 V H 623637fb 7 For more information www.linear.com/LT6236

LT6236/LT6237/LT6238 elecTrical characTerisTics T = 25°C, V = ±5V, V = V = 0V, ENABLE = 0V, unless otherwise noted. A S CM OUT SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Output Leakage Current ENABLE = V+ –0.35V, V = ±1V 0.2 10 µA O t Turn-On Time ENABLE = 5V to 0V, R = 1k 800 ns ON L t Turn-Off Time ENABLE = 0V to 5V, R = 1k 62 µs OFF L GBW Gain-Bandwidth Product Frequency = 1MHz 150 215 MHz SR Slew Rate A = –1, R = 1k, V = –2V to 2V 50 70 V/µs V L O FPBW Full-Power Bandwidth V = 3V (Note 9) 5.3 7.4 MHz OUT P-P t Settling Time 0.1%, V = 4V, A = 1, 60 ns S STEP V 0.01% 80 ns 0.0015% (16-Bit) 470 ns 4ppm (18-Bit) 1200 ns The l denotes the specifications which apply over the 0°C < T < 70°C temperature range. V = ±5V, V = V = 0V, ENABLE = 0V, A S CM OUT unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V Input Offset Voltage LT6236 l 600 µV OS LT6237MS8, LT6238GN l 450 µV LT6237DD8 l 550 µV Input Offset Voltage Match l 800 µV (Channel-to-Channel) (Note 6) V TC Input Offset Voltage Drift (Note 10) LT6236 l 0.7 2.2 µV/°C OS LT6237MS8 l 0.5 1.8 µV/°C LT6237DD8 l 0.4 2.2 µV/°C LT6238GN l 0.5 2.2 µV/°C I Input Bias Current l 11 µA B I Match (Channel-to-Channel) (Note 6) l 1 µA B I Input Offset Current l 0.7 µA OS A Large-Signal Gain V = ±4.5V, R = 10k l 100 V/mV VOL O L V = ±4.5V, R = 1k l 27 V/mV O L V = ±2V, R = 100Ω l 6 V/mV O L V Input Voltage Range Guaranteed by CMRR l –3 4 V CM CMRR Common Mode Rejection Ratio V = –3V to 4V l 95 dB CM PSRR Power Supply Rejection Ratio V = ±1.5V to ±5V l 85 dB S V Output Voltage Swing Low (Note 8) No Load l 50 mV OL I = 5mA l 200 mV SINK I = 20mA l 500 mV SINK V Output Voltage Swing High (Note 8) No Load l 60 mV OH I = 5mA l 215 mV SOURCE I = 20mA l 650 mV SOURCE I Short-Circuit Current l ±25 mA SC I Supply Current per Amplifier l 4.6 mA S Disabled Supply Current per Amplifier ENABLE = 4.75V l 1 µA I ENABLE Pin Current ENABLE = 0.3V l –95 µA ENABLE V ENABLE Pin Input Voltage Low l 0.3 V L V ENABLE Pin Input Voltage High l 4.75 V H SR Slew Rate A = –1, R = 1k, V = –2V to 2V l 44 V/µs V L O FPBW Full-Power Bandwidth V = 3V (Note 9) l 4.66 MHz OUT P-P 623637fb 8 For more information www.linear.com/LT6236

LT6236/LT6237/LT6238 elecTrical characTerisTics The l denotes the specifications which apply over the –40°C < T < 85°C A temperature range. V = ±5V, V = V = 0V, ENABLE = 0V, unless otherwise noted. (Note 5) S CM OUT SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V Input Offset Voltage LT6236 l 700 µV OS LT6237MS8, LT6238GN l 550 µV LT6237DD8 l 650 µV Input Offset Voltage Match l 1000 µV (Channel-to-Channel) (Note 6) V TC Input Offset Voltage Drift (Note 10) LT6236 l 0.7 2.2 µV/°C OS LT6237MS8 l 0.5 1.8 µV/°C LT6237DD8 l 0.4 2.2 µV/°C LT6238GN l 0.5 2.2 µV/°C I Input Bias Current l 12 µA B I Match (Channel-to-Channel) (Note 6) l 1.1 µA B I Input Offset Current l 0.8 µA OS A Large-Signal Gain V = ±4.5V, R = 10k l 93 V/mV VOL O L V = ±4.5V, R = 1k l 25 V/mV O L V = ±1.5V, R = 100Ω l 4.8 V/mV O L V Input Voltage Range Guaranteed by CMRR l –3 4 V CM CMRR Common Mode Rejection Ratio V = –3V to 4V l 95 dB CM PSRR Power Supply Rejection Ratio V = ±1.5V to ±5V l 85 dB S V Output Voltage Swing Low (Note 8) No Load l 60 mV OL I = 5mA l 210 mV SINK I = 15mA l 510 mV SINK V Output Voltage Swing High (Note 8) No Load l 70 mV OH I = 5mA l 220 mV SOURCE I = 20mA l 675 mV SOURCE I Short-Circuit Current l ±15 mA SC I Supply Current per Amplifier l 4.85 mA S Disabled Supply Current per Amplifier ENABLE = 4.8V l 1 µA I ENABLE Pin Current ENABLE = 0.3V l –110 µA ENABLE V ENABLE Pin Input Voltage Low l 0.3 V L V ENABLE Pin Input Voltage High l 4.8 V H SR Slew Rate A = –1, R = 1k, V = –2V to 2V l 37 V/µs V L O FPBW Full-Power Bandwidth V = 3V (Note 9) l 3.9 MHz OUT P-P 623637fb 9 For more information www.linear.com/LT6236

LT6236/LT6237/LT6238 elecTrical characTerisTics The l denotes the specifications which apply over the –40°C < T < 125°C A temperature range. V = ±5V, V = V = 0V, ENABLE = 0V, unless otherwise noted. (Note 5) S CM OUT SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V Input Offset Voltage LT6236 l 750 µV OS LT6237MS8, LT6238GN l 650 µV LT6237DD8 l 700 µV Input Offset Voltage Match l 1000 µV (Channel-to-Channel) (Note 6) V TC Input Offset Voltage Drift (Note 10) LT6236 l 0.7 2.2 µV/°C OS LT6237MS8 l 0.5 1.8 µV/°C LT6237DD8 l 0.4 2.2 µV/°C LT6238GN l 0.5 2.2 µV/°C I Input Bias Current l 12 µA B I Match (Channel-to-Channel) (Note 6) l 1.1 µA B I Input Offset Current l 1.2 µA OS A Large-Signal Gain V = ±4.5V, R = 10k l 76 V/mV VOL O L V = ±4.5V, R = 1k l 21 V/mV O L V = ±1.5V, R = 100Ω l 4.1 V/mV O L V Input Voltage Range Guaranteed by CMRR l –3 4 V CM CMRR Common Mode Rejection Ratio V = –3V to 4V l 95 dB CM PSRR Power Supply Rejection Ratio V = ±1.5V to ±5V l 85 dB S V Output Voltage Swing Low (Note 8) No Load l 70 mV OL I = 5mA l 230 mV SINK I = 15mA l 550 mV SINK V Output Voltage Swing High (Note 8) No Load l 78 mV OH I = 5mA l 240 mV SOURCE I = 20mA l 710 mV SOURCE I Short-Circuit Current l ±15 mA SC I Supply Current per Amplifier l 5.5 mA S Disabled Supply Current per Amplifier ENABLE = 4.85V l 10 µA I ENABLE Pin Current ENABLE = 0.3V l –110 µA ENABLE V ENABLE Pin Input Voltage Low l 0.3 V L V ENABLE Pin Input Voltage High l 4.85 V H SR Slew Rate A = –1, R = 1k, V = –2V to 2V l 37 V/µs V L O FPBW Full-Power Bandwidth V = 3V (Note 9) l 3.9 MHz OUT P-P Note 1: Stresses beyond those listed under Absolute Maximum Ratings The LT6236H/LT6237H/LT6238H are guaranteed to meet specified may cause permanent damage to the device. Exposure to any Absolute performance from –40°C to 125°C. The LT6236C/LT6237C/LT6238C are Maximum Rating condition for extended periods may affect device designed, characterized and expected to meet specified performance from reliability and lifetime. –40°C to 85°C, but are not tested or QA sampled at these temperatures. Note 2: Inputs are protected by back-to-back diodes. If the differential Note 6: Matching parameters are the difference between the two amplifiers input voltage exceeds 0.7V, the input current must be limited to less than A and D and between B and C of the LT6238 and between the two 40mA. amplifiers of the LT6237. Note 3: A heat sink may be required to keep the junction temperature Note 7: Minimum supply voltage is guaranteed by power supply rejection below the absolute maximum rating when the output is shorted ratio test. indefinitely. Note 8: Output voltage swings are measured between the output and Note 4: The LT6236C/LT6236I/LT6236H, the LT6237C/LT6237I/LT6237H power supply rails. and the LT6238C/LT6238I/LT6238H are guaranteed functional over the Note 9: Full-power bandwidth is calculated from the slew rate: temperature range of –40°C to 125°C. FPBW = SR/2πV P Note 5: The LT6236C/LT6237C/LT6238C are guaranteed to meet specified Note 10: This parameter is not 100% tested. performance from 0°C to 70°C. The LT6236I/LT6237I/LT6238I are guaranteed to meet specified performance from –40°C to 85°C. 623637fb 10 For more information www.linear.com/LT6236

LT6236/LT6237/LT6238 Typical perForMance characTerisTics Supply Current vs Supply Voltage Offset Voltage vs Input Common V Distribution (Per Amplifier) Mode Voltage OS 200 6 2.0 VS = ±2.5V VS = 5V, 0V 180 VCM = 0V 1.5 MS8 5 160 R OF UNITS111420000 URRENT (mA) 43 TTAA == 12255°°CC OLTAGE (mV) 10..050 MBE 80 LY C ET V–0.5 NU 60 SUPP 2 TA = –55°C OFFS–1.0 TA = –55°C 40 1 TA = 25°C –1.5 20 TA = 125°C 0 0 –2.0 –225–175–125–75 –25 25 75 125 175 225 0 2 4 6 8 10 12 14 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 INPUT OFFSET VOLTAGE (µV) TOTAL SUPPLY VOLTAGE (V) INPUT COMMON MODE VOLTAGE (V) 62367 GO1 62367 GO2 62367 GO3 Input Bias Current Output Saturation Voltage vs Common Mode Voltage Input Bias Current vs Temperature vs Load Current (Output Low) 14 10 10 VS = 5V, 0V VS = 5V, 0V VS = 5V, 0V 12 9 V) INPUT BIAS CURRENT (µA) 108642 TA T=A 2 =5 °–C55T°AC = 125°C INPUT BIAS CURRENT (µA) 8765 VVCCMM = = 1 4.5VV TPUT SATURATION VOLTAGE ( 0.00.111 TA = 12T5A° C= 2T5A° C= –55°C 0 4 OU –2 3 0.001 –1 0 1 2 3 4 5 6 –50 –25 0 25 50 75 100 125 0.01 0.1 1 10 100 COMMON MODE VOLTAGE (V) TEMPERATURE (°C) LOAD CURRENT (mA) 62367 GO4 62367 GO5 62367 GO6 Output Saturation Voltage Output Short-Circuit Current vs Load Current (Output High) Minimum Supply Voltage vs Power Supply Voltage 10 1.0 70 E (V) VS = 5V, 0V 00..86 VCM = VS/2 NT (mA) 645000 SINKING TA = 125°C TPUT SATURATION VOLTAG0.00.111 TA = 125°CTAT =A 2=5 –°5C5°C OFFSET VOLTAGE (mV)–––00000.....420246 TA = 125°C TA = –55°C UT SHORT-CIRCUIT CURRE ––––231241300000000 SOURCING TA = 125°CTAT =AT 2=A5 –=°5C –55°C5°C OU –0.8 TA = 25°C OUTP ––6500 TA = 25°C 0.001 –1.0 –70 0.01 0.1 1 10 100 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 1.5 2 2.5 3 3.5 4 4.5 5 LOAD CURRENT (mA) TOTAL SUPPLY VOLTAGE (V) POWER SUPPLY VOLTAGE (±V) 62367 G07 62367 G08 62367 GO9 623637fb 11 For more information www.linear.com/LT6236

LT6236/LT6237/LT6238 Typical perForMance characTerisTics Open-Loop Gain Open-Loop Gain Open-Loop Gain 2.5 2.5 2.5 VS = 3V, 0V VS = 5V, 0V VS = ±5V 2.0 TA = 25°C 2.0 TA = 25°C 2.0 TA = 25°C 1.5 1.5 1.5 V) 1.0 V) 1.0 V) 1.0 m m m E ( 0.5 E ( 0.5 E ( 0.5 LTAG 0 RL = 1k LTAG 0 RL = 1k LTAG 0 RL = 1k O O O UT V–0.5 RL = 100Ω UT V–0.5 RL = 100Ω UT V–0.5 RL = 100Ω P P P N–1.0 N–1.0 N–1.0 I I I –1.5 –1.5 –1.5 –2.0 –2.0 –2.0 –2.5 –2.5 –2.5 0 0.5 1 1.5 2 2.5 3 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 –5 –4 –3 –2 –1 0 1 2 3 4 5 OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) 62367 G10 62367 G11 62367 G12 Total Noise vs Total Source Offset Voltage vs Output Current Warm-Up Drift vs Time Resistance 2.0 30 100 VS = ±5V TA = 25°C VS = ±2.5V 1.5 28 VCM = 0V OFFSET VOLTAGE (mV)––1001....05050 TA =T A1 2=5 –°C55°C TA = 25°C NGE IN OFFSET VOLTAGE (µV) 221221406628 VVVSSS == = ±± ±215..55VVV TOTAL NOISE (nV/√Hz) 110 fUSR =ONE SUB1I0ARS0LCTkAEOHNRzCSED AMTPOLTIFAILER RNE ONSIOISSIESTOE RV ONLOTIASGEE HA 14 C –1.5 12 –2.0 10 0.1 –75–60–45–30–15 0 15 30 45 60 75 0 20 40 60 80 100 120 140 160 10 100 1k 10k 100k OUTPUT CURRENT (mA) TIME AFTER POWER-UP (s) SOURCE RESISTANCE (Ω) 62367 G13 62367 G14 62367 G15 Balanced Current Noise Unbalanced Current Noise vs Frequency vs Frequency Noise Voltage vs Frequency 8 8 8 NOISE (pA/√Hz) 675 VVSC M= =± 20.182–V52554V5°°0CC°°CC T NOISE (pA/√Hz) 675 VVSC M= =± 20.182–V52554V5°°0CC°°CC DENSITY (nV/√Hz) 675 VVSC M= =± 20.182–V52554V5°°0CC°°CC RENT 4 RREN 4 OISE 4 R U N CU 3 D C 3 GE 3 BALANCED 21 NBALANCE 21 PUT VOLTA 21 U N I 0 0 0 10 100 1k 10k 100k 1M 10M 10 100 1k 10k 100k 1M 10M 10 100 1k 10k 100k 1M 10M 100M FREQUENCY (Hz) FREQUENCY (Hz) FREQUENCY (Hz) 62367 G56 62367 G57 62367 G58 623637fb 12 For more information www.linear.com/LT6236

LT6236/LT6237/LT6238 Typical perForMance characTerisTics 0.1Hz to 10Hz Input Voltage Gain Bandwidth and Phase Noise Margin vs Temperature Open-Loop Gain vs Frequency 70 80 120 VS = ±2.5V RVCLCL M == =51 pkVFS/2 VS = ±5V PHASE MARGIN 60 7600 PHASE RVCLCL M == =51 pkVFS/2 18000 100nV/DIV–110000nnVV GAIN BANDWIDTH (MHz)222142080000 VVSS =V = S3 ±V=5, 3V0VV, 0V GAIN BANDWIDTH 5400PHASE MARGIN (DEG) GAIN (dB)5341200000 GAVINS = 3VV,S 0 =V ±5VVS = ±5V 624–000020PHASE (dB) 0 –40 160 –10 VS = 3V, 0V –60 140 –20 –80 5s/DIV –55 –25 5 35 65 95 125 100k 1M 10M 100M 1G TEMPERATURE (°C) FREQUENCY (Hz) 62367 G17 62367 G18 62367 G19 Gain Bandwidth and Phase Margin vs Supply Voltage Slew Rate vs Temperature Output Impedance vs Frequency 70 120 1k TA = 25°C AV = –1 VS = 5V, 0V CL = 5pF 60 110 RF = RG = 1k RL = 1k 100 100 WIDTH (MHz)222400 PHASE MARGIN 5400PHASE MAR ATE (V/µs) 987000 VS = ±5V RISINGVS = ±5V FALLING PEDANCE (Ω) 10 AV = 10 D G R M GAIN BAN210800 GAIN BANDWIDTH IN (DEG) SLEW 564000 VS = ±2.5V RISING VS = ±2.5V FALLING OUTPUT I 0.11 AV = 1 AV = 2 160 30 140 20 0.01 0 2 4 6 8 10 12 14 –55 –35 –15 5 25 45 65 85 105 125 100k 1M 10M 100M TOTAL SUPPLY VOLTAGE (V) TEMPERATURE (°C) FREQUENCY (Hz) 62367 G20 62367 G21 62367 G22 Common Mode Rejection Ratio Power Supply Rejection Ratio vs Frequency Channel Separation vs Frequency vs Frequency MODE REJECTION RATIO (dB)114682000000 NNEL SEPARATION (dB)–––––1–1––8760519400000000 AVSV == ±12.5V UPPLY REJECTION RATIO (dB)114682000000 NEGATIVE SUPPLYPOSITIVETVV ASCS MU== P =25P 5VVL°,S YC0/2V MMON 20 CHA–120 18255°C°C WER S 20 CO 0 VVSC M= =5 VV, S0/V2 ––113400 2–54°0C°C PO 0 10k 100k 1M 10M 100M 1G 100k 1M 10M 100M 1k 10k 100k 1M 10M 100M FREQUENCY (Hz) FREQUENCY (Hz) FREQUENCY (Hz) 62367 G23 62367 G24 62367 G25 623637fb 13 For more information www.linear.com/LT6236

LT6236/LT6237/LT6238 Typical perForMance characTerisTics Series Output Resistance and Series Output Resistance and 18-Bit Settling Time to 2VP-P Overshoot vs Capacitive Load Overshoot vs Capacitive Load Output Step 50 50 60 VS = 5V, 0V VS = 5V, 0V VS = ±2.5V 45 AV = 1 45 AV = 2 AV = 1 45 40 40 RS = 10Ω 2.0 30 S OVERSHOOT (%) 332211505050 RRSL == 55R00SΩΩ =R 2S0 =Ω 10Ω OVERSHOOT (%) 332211505050 RRSL == 5500RΩΩS = 20Ω OUTPUT VOLTAGE (V)1100....5050 S1V EODTUITVTL =IN 1G8 -RBEITS IEDRUREOR 10––51350ETTLING RESIDUE (µV) 5 5 –45 0 0 –60 10 100 1000 10 100 1000 CAPACITIVE LOAD (pF) CAPACITIVE LOAD (pF) 0.5µs/DIV 62367 G26 62367 G27 62367 G27a 18-Bit Settling Time to 4V Settling Time vs Output Step Settling Time vs Output Step P-P Output Step (Noninverting) (Inverting) 60 200 200 VS A=V ± =5 V1 45 TVAS == 2±55°VC 500Ω TVAS == 2±55°VC AV = 1 AV = –1 500Ω OUTPUT VOLTAGE (V) 43210 S 1E DTVTIOVLU I=TN G18 R-BEISTI DEUREROR 310––051350SETTLING RESIDUE (µV) SETTLING TIME (ns)11055000 VIN1m+–V 1mV 500ΩVOUT SETTLING TIME (ns)11550000 VIN 1mV+– 1mV VOUT 10mV 10mV 10mV 10mV –45 –60 0 0 –4 –3 –2 –1 0 1 2 3 4 –4 –3 –2 –1 0 1 2 3 4 0.5µs/DIV OUTPUT STEP (V) OUTPUT STEP (V) 62367 G27b 62367 G28 62367 G29 Maximum Undistorted Output Maximum Undistorted Output Maximum Undistorted Output Signal vs Frequency Signal vs Frequency Signal vs Frequency 10 5.0 5.0 9 AV = –1 )P )P 4.5 )P 4.5 VP- 8 AV = 2 VP- VP- NG ( NG ( 4.0 NG ( 4.0 WI 7 WI WI S S S GE 6 GE 3.5 125°C GE 3.5 125°C OUTPUT VOLTA 543 TVAS == 2±55°VC OUTPUT VOLTA 32..05 ARVSVL === ±–121k.82–5554V°°0CC°C OUTPUT VOLTA 32..05 ARVSVL === ±212k.82–5554V°°0CC°C HD2, HD3 < –40dBc HD2, HD3 < –40°C HD2, HD3 < –40°C 2 2.0 2.0 10k 100k 1M 10M 1k 10k 100k 1M 10M 1k 10k 100k 1M 10M FREQUENCY (Hz) FREQUENCY (Hz) FREQUENCY (Hz) 62367 G30 6237 G59 6237 G60 623637fb 14 For more information www.linear.com/LT6236

LT6236/LT6237/LT6238 Typical perForMance characTerisTics Harmonic Distortion (HD2) Harmonic Distortion (HD3) Harmonic Distortion (HD2) vs Frequency vs Frequency vs Frequency –40 –40 –40 VS = ±2.5V VS = ±2.5V VS = ±2.5V –50 AV = 1 –50 AV = 1 –50 AV = 2 VOUT = 2VP-P VOUT = 2VP-P VOUT = 2VP-P –60 RL = 1k –60 RL = 1k –60 RL = 1k N (dBc) ––8700 1822555°°CC°C N (dBc) ––8700 1822555°°CC°C N (dBc) ––8700 1822555°°CC°C RTIO –90 –40°C RTIO –90 –40°C RTIO –90 –40°C O O O DIST–100 DIST–100 DIST–100 –110 –110 –110 –120 –120 –120 –130 –130 –130 1k 10k 100k 1M 10M 1k 10k 100k 1M 10M 1k 10k 100k 1M 10M FREQUENCY (Hz) FREQUENCY (Hz) FREQUENCY (Hz) 62367 G61 62367 G62 62367 G63 Harmonic Distortion (HD3) vs Frequency Distortion vs Frequency –40 –40 VS = ±2.5V VS = ±2.5V –50 AV = 2 –50 AV = –1 VOUT = 4VP-P, HD3 VOUT = 2VP-P RL = 1k –60 RL = 1k –60 Bc) –70 Bc)–70 d d N ( –80 N (–80 RTIO –90 RTIO–90 VOUT = 4VP-P, HD2 O O T T DIS–100 DIS–100 –110 125°C –110 VOUT = 2VP-P, HD2 85°C –120 25°C –120 –130 –40°C –130 VOUT = 2VP-P, HD3 1k 10k 100k 1M 10M 1k 10k 100k 1M 10M FREQUENCY (Hz) FREQUENCY (Hz) 62367 G64 62367 G33 Distortion vs Frequency Distortion vs Frequency –50 –50 VS = ±5V VOUT = 4VP-P, HD2 VS = ±5V –60 AV = 1 –60 AV = –1 RL = 1k RL = 1k –70 –70 dBc)–80 dBc)–80 VOUT = 4VP-P, HD3 N ( N ( RTIO–90 VOUT = 4VP-P, HD3 RTIO–90 VOUT = 4VP-P, HD2 O O T–100 T–100 S S DI DI VOUT = 2VP-P, HD2 –110 –110 –120 VOUT = 2VP-P, HD2 –120 VOUT = 2VP-P, HD3 VOUT = 2VP-P, HD3 –130 –130 1k 10k 100k 1M 10M 1k 10k 100k 1M 10M FREQUENCY (Hz) FREQUENCY (Hz) 62367 G32 62367 G34 623637fb 15 For more information www.linear.com/LT6236

LT6236/LT6237/LT6238 Typical perForMance characTerisTics Large-Signal Response Small-Signal Response 2V V V DI DI 0V V/ 0V V/ m 1 0 5 –2V VS = ±2.5V 200ns/DIV 62367 G35 VS = ±2.5V 200ns/DIV 62367 G36 AV = –1 AV = 1 RL = 1k RL = 1k Large-Signal Response Output Overdrive Recovery 5V V V VINV/DI 0V DI 0V 1 V/ 2 –5V VOUT2V/DIV 0V VS = ±5V 200ns/DIV 62367 G37 VS = ±2.5V 200ns/DIV 62367 G38 AV = 1 AV = 3 RL = 1k (LT6236) ENABLE Characteristics Supply Current ENABLE Pin Current vs ENABLE Pin Voltage vs ENABLE Pin Voltage ENABLE Pin Response Time 4.5 30 NT (mA) 433...050 TA = 25°CTA = 125°C RENT (µA) 2250 TTAA == 2–55°5C°C AVSV == ±12.5V ENABLE PIN 05VV CURRE 22..50 TA = –55°C N CUR 15 TA = 125°C UPPLY 1.5 ABLE PI 10 VOUT0.50VV S N 1.0 E 0.5 5 VS = ±2.5V 100µs/DIV 62367 G41 0 VS = ±2.5V 0 VAIVN = = 1 0.5V –2.0 –1.0 0 1.0 2.0 –2.0 –1.0 0 1.0 2.0 RL = 1k PIN VOLTAGE (V) PIN VOLTAGE (V) 62367 G39 62367 G40 623637fb 16 For more information www.linear.com/LT6236

LT6236/LT6237/LT6238 applicaTions inForMaTion +V +V Q5 CM DESD5 Q3 Q4 VOUT –V +V C1 DESD6 DIFFERENTIAL DESD1 DESD2 –V DRIVE GENERATOR –V –VIN Q1 Q2 +V D1 D2 Q6 +VIN I1 BIAS ENABLE DESD3 DESD4 –V +V –V 62367 F01 Figure 1. Simplified Schematic Functional Description ±0.7V. These input diodes are rugged enough to handle transient currents due to amplifier slew rate overdrive and Figure 1 is a simplified schematic of the LT6236/LT6237/ clipping without protection resistors. Figure 2 shows the LT6238, which has a pair of low noise input transistors output response to an input overdrive with the amplifier Q1 and Q2. A simple current mirror Q3/Q4 converts the connected as a voltage follower. With the input signal differential signal to a single-ended output, and these low, current source I1 saturates and the differential drive transistors are degenerated to reduce their contribution generator drives Q6 into saturation so the output voltage to the overall noise. Capacitor C1 reduces the unity cross swings all the way to V–. The input can swing positive frequency and improves the frequency stability without until transistor Q2 saturates into current mirror Q3/Q4. degrading the gain bandwidth of the amplifier. Capacitor When saturation occurs, the output tries to phase invert, C sets the overall amplifier gain bandwidth. The differ- M but diode D2 conducts current from the signal source to ential drive generator supplies current to transistors Q5 the output through the feedback connection. The output and Q6 that provide rail-to-rail output swing. is clamped a diode drop below the input. In Figure 2, the input signal generator is limiting at about 20mA. Input Protection With the amplifier connected in a gain of A ≥ 2, the output Back-to-back diodes, D1 and D2, limit the differential V can invert with very heavy overdrive. To avoid this inver- input voltage to ±0.7V. The inputs of the LT6236/LT6237/ sion, limit the input overdrive to 0.5V beyond the power LT6238 do not have internal resistors in series with the supply rails. input transistors. This technique is often used to protect the input devices from over voltage that causes excessive current to flow. The addition of these resistors would 2.5V significantly degrade the voltage noise of these amplifiers. For instance, a 100Ω resistor in series with each input V DI 0V would generate 1.8nV/√Hz of noise, and the total amplifier V/ 1 noise voltage would rise from 1.1nV/√Hz to 2.1nV/√Hz. Once the input differential voltage exceeds ±0.7V, steady –2.5V state current conducted through the protection diodes should be limited to ±40mA. This implies 25Ω of protec- 500µs/DIV 62367 F02 tion resistance is necessary per volt of overdrive beyond Figure 2. V = ±2.5V, A = 1 with Large Overdrive S V 623637fb 17 For more information www.linear.com/LT6236

LT6236/LT6237/LT6238 applicaTions inForMaTion ESD be used with a pull-up resistor to ensure that the ampli- fier remains off. When the ENABLE pin is left floating, the The LT6236/LT6237/LT6238 have reverse-biased ESD amplifier is inactive. However, care should be taken to protection diodes on all inputs and outputs as shown in control the leakage current through the pin so the amplifier Figure 1. If these pins are forced beyond either supply, is not inadvertently turned on. See Typical Performance unlimited current will flow through these diodes. If the cur- Characteristics. rent is transient and limited to 100mA or less, no damage to the device will occur. The output leakage current when disabled is very low; however, current can flow into the input protection diodes, Noise D1 and D2, if the output voltage exceeds the input voltage by a diode drop. The noise voltage of the LT6236/LT6237/LT6238 is equiva- lent to that of a 75Ω resistor, and for the lowest possible Power Dissipation noise it is desirable to keep the source and feedback resis- tance at or below this value, i.e. R + R ||R ≤ 75Ω. With The LT6237MS8 combines high speed with large output S G FB R + R ||R = 75Ω the total noise of the amplifier is: current in a small package. Due to the wide supply volt- S G FB age range, it is possible to exceed the maximum junction 2 2 e = (1.1nV) +(1.1nV) =1.55nV/ Hz temperature under certain conditions. Maximum junction N temperature (T ) is calculated from the ambient tempera- J Below this resistance value, the amplifier dominates the ture (T ) and power dissipation (P ) as follows: A D noise, but in the region between 75Ω and about 3k, the T = T + (P • θ ) noise is dominated by the resistor thermal noise. As the J A D JA total resistance is further increased beyond 3k, the amplifier The power dissipation in the IC is the function of the sup- noise current multiplied by the total resistance eventually ply voltage, output voltage and the load resistance. For dominates the noise. a given supply voltage, the worst-case power dissipation P occurs at the maximum quiescent supply current The product of e • √I is an interesting way to gauge D(MAX) N SUPPLY and at the output voltage which is half of either supply low noise amplifiers. Most low noise amplifiers have high voltage (or the maximum swing if it is less than half the I . In applications that require low noise voltage with SUPPLY supply voltage). P is given by: the lowest possible supply current, this product can be D(MAX) helpful. P = (V+– V–)( I ) + (V+/2)2/R D(MAX) S(MAX) L The LT6236/LT6237/LT6238 have an e • √I of only Example: An LT6237HMS8 in the 8-Lead MSOP package N SUPPLY 1.9 per amplifier, yet it is common to see amplifiers with has a thermal resistance of θ = 273°C/W. Operating JA similar noise specifications to have e • √I as high on ±5V supplies with one amplifier driving a 1k load, the N SUPPLY as 13.5. For a complete discussion of amplifier noise, see worst-case power dissipation is given by: the LT1028 data sheet. P = (10V)(11mA) + (2.5V)2/1000Ω= 116mW D(MAX) ENABLE Pin In this example, the maximum ambient temperature that the part is allowed to operate is: The LT6236 includes an ENABLE pin that shuts down the amplifier to 10μA maximum supply current. For normal T = T - (P × 273°C/W) A J D(MAX) operation, the ENABLE pin must be pulled to at least T = 150°C – (116mW)(273°C/W) = 118.3°C 2.7V below V+. The ENABLE pin must be driven high to A within 0.35V of V+ to shut down the amplifier. This can To operate the device at a higher ambient temperature for be accomplished with simple gate logic; however care the same conditions, switch to using two LT6236 in the must be taken if the logic and the LT6236 operate from 6-Lead TSOT-23, or a single LT6237 in the 8-Lead DFN different supplies. If this is the case, open drain logic can package. 623637fb 18 For more information www.linear.com/LT6236

LT6236/LT6237/LT6238 applicaTions inForMaTion Interfacing to ADCs settling time. Output transient settling to 18-bit accuracy will require over twelve RC time constants. To select the When driving an ADC, a single-pole, passive RC filter should resistor value, the resistors in the decoupling network be used between the outputs of the LT6236/LT6237/LT6238 should be at least 10Ω. Keep in mind that these resis- and the inputs of the ADC. The sampling process of ADCs tors also serve to decouple the LT6236/LT6237/LT6238 creates a charge transient from the switching of the ADC outputs from load capacitance. Too large of a resistor will sampling capacitor. This momentarily “shorts” the output leave insufficient settling time. Too small of a resistor will of the amplifier as charge is transferred between amplifier not properly dampen the load transient of the sampling and sampling capacitor. The amplifier must recover and process, and prolong the time required for settling. For settle from this load transient before the acquisition period lowest distortion, choose capacitors with low dielectric has ended for a valid representation of the input signal. absorption such as a C0G multilayer ceramic capacitor. In The RC network between the outputs of the driver and general, large capacitor values attenuate the fixed nonlinear the inputs of the ADC decouples the sampling transient charge kickback, however very large capacitor values will of the ADC. The capacitance serves to provide the bulk detrimentally load the driver at the desired input frequency of the charge during the sampling process, while the two and cause driver distortion. Smaller input swings allow resistors at the outputs of the LT6236/LT6237/LT6238 are for larger filter capacitor values due to decreased loading used to dampen and attenuate any charge injected by the demands on the driver. This property may be limited by ADC. The RC filter provides the benefit of band limiting the particular input amplitude dependence of differential broadband output noise. nonlinear kickback for the specific ADC used. Thanks to the very low wideband noise of the LT6236/ Series resistors should typically be placed at the inputs to LT6237/LT6238, a wideband filter can be used between the ADC in order to further improve distortion performance. the amplifier and the ADC without impacting SNR. This These series resistors function with the ADC sampling is especially important with ADCs or applications that capacitor to filter potential ground bounce or other high require full settling in between each conversion. speed sampling disturbances. Additionally the resistors The selection of an appropriate filter depends on the specific limit the rise time of residual filter glitches that manage to ADC, however the following procedure is suggested for propagate to the driver outputs. Restricting possible glitch choosing filter component values. Begin by selecting an propagation rise time to within the small signal bandwidth appropriate RC time constant for the input signal. Gener- of the driver enables less disturbed output settling. ally, longer time constants improve SNR at the expense of 623637fb 19 For more information www.linear.com/LT6236

LT6236/LT6237/LT6238 Typical applicaTions Single Supply, Low Noise, Low Power, Bandpass Filter with Gain = 10 Frequency Response Plot of Bandpass Filter 23 R1 C2 732Ω 47pF 1 V+ f0 = 2 π R C = 1MHz C = √C1C2, R = R1 = R2 dB) 10C010pF 73R22Ω R103k 0.1µF f0 = (73R2Ω)MHz, MAXIMUM f0 = 1MHz GAIN ( 3 VIN – f–3dB = 2f.05 LT6236 VOUT AV = 20dB at f0 + EN = 4µVRMS INPUT REFERRED C3 R4 EN IS = 3.7mA FOR V+ = 5V –7 0.1µF 10k 100k 1M 10M FREQUENCY (Hz) 62367 TA02 62367 TA03 Driving a Fully Differential ADC LOWPASS FILTERS 6V – 38.3Ω 49.9Ω 4.096V 4.096V 4.096V VA +1/2 LT6237 270pF IN+ OR OR LTC2389-18 0V 0V 0V 1/2 LT6237 270pF IN– VB + 38.3Ω 49.9Ω – 62367 TA04 –2V Driving a Single-Ended ADC 6V LOWPASS FILTER 4.096V + 10Ω 49.9Ω IN+ 0V – LT6236 1nF LTC2389-18 –2V 49.9Ω IN– 62367 TA05 623637fb 20 For more information www.linear.com/LT6236

LT6236/LT6237/LT6238 package DescripTion Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. S6 Package 6-Lead Plastic TSOT-23 (Reference LTC DWG # 05-08-1636) 2.90 BSC 0.62 0.95 (NOTE 4) MAX REF 1.22 REF 1.50 – 1.75 3.85 MAX 2.62 REF 1.4 MIN 2.80 BSC (NOTE 4) PIN ONE ID RECOMMENDED SOLDER PAD LAYOUT 0.30 – 0.45 0.95 BSC PER IPC CALCULATOR 6 PLCS (NOTE 3) 0.80 – 0.90 0.20 BSC 0.01 – 0.10 1.00 MAX DATUM ‘A’ 0.30 – 0.50 REF 1.90 BSC 0.09 – 0.20 (NOTE 3) S6 TSOT-23 0302 NOTE: 1. DIMENSIONS ARE IN MILLIMETERS 2. DRAWING NOT TO SCALE 3. DIMENSIONS ARE INCLUSIVE OF PLATING 4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR 5. MOLD FLASH SHALL NOT EXCEED 0.254mm 6. JEDEC PACKAGE REFERENCE IS MO-193 623637fb 21 For more information www.linear.com/LT6236

LT6236/LT6237/LT6238 package DescripTion Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. DD Package 8-Lead Plastic DFN (3mm × 3mm) (Reference LTC DWG # 05-08-1698 Rev C) 0.70 ±0.05 3.5 ±0.05 1.65 ±0.05 2.10 ±0.05 (2 SIDES) PACKAGE OUTLINE 0.25 ±0.05 0.50 BSC 2.38 ±0.05 RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED R = 0.125 0.40 ±0.10 TYP 5 8 3.00 ±0.10 1.65 ±0.10 (4 SIDES) (2 SIDES) PIN 1 TOP MARK (NOTE 6) (DD8) DFN 0509 REV C 4 1 0.200 REF 0.75 ±0.05 0.25 ±0.05 0.50 BSC 2.38 ±0.10 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON TOP AND BOTTOM OF PACKAGE 623637fb 22 For more information www.linear.com/LT6236

LT6236/LT6237/LT6238 package DescripTion Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. MS8 Package 8-Lead Plastic MSOP (Reference LTC DWG # 05-08-1660 Rev G) 0.889 ±0.127 (.035 ±.005) 5.10 3.20 – 3.45 (.201) (.126 – .136) MIN 3.00 ±0.102 0.42 ± 0.038 0.65 (.118 ±.004) 0.52 (.0165 ±.0015) (.0256) (NOTE 3) 8 7 6 5 (.0205) TYP BSC REF RECOMMENDED SOLDER PAD LAYOUT 3.00 ±0.102 4.90 ±0.152 DETAIL “A” (.118 ±.004) 0.254 (.193 ±.006) (NOTE 4) (.010) 0° – 6° TYP GAUGE PLANE 1 2 3 4 0.53 ±0.152 (.021 ±.006) 1.10 0.86 (.043) (.034) DETAIL “A” MAX REF 0.18 (.007) SEATING PLANE 0.22 – 0.38 0.1016 ±0.0508 (.009 – .015) (.004 ±.002) TYP 0.65 MSOP (MS8) 0213 REV G (.0256) NOTE: BSC 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 623637fb 23 For more information www.linear.com/LT6236

LT6236/LT6237/LT6238 package DescripTion Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. GN Package 16-Lead Plastic SSOP (Narrow .150 Inch) (Reference LTC DWG # 05-08-1641 Rev B) .189 – .196* .045 ±.005 (4.801 – 4.978) .009 (0.229) 16 15 14 13 12 11 109 REF .254 MIN .150 – .165 .229 – .244 .150 – .157** (5.817 – 6.198) (3.810 – 3.988) .0165 ±.0015 .0250 BSC RECOMMENDED SOLDER PAD LAYOUT 1 2 3 4 5 6 7 8 .015 ±.004 × 45° .0532 – .0688 .004 – .0098 (0.38 ±0.10) (1.35 – 1.75) (0.102 – 0.249) .007 – .0098 0° – 8° TYP (0.178 – 0.249) .016 – .050 .008 – .012 .0250 (0.406 – 1.270) (0.203 – 0.305) (0.635) GN16 REV B 0212 NOTE: TYP BSC 1. CONTROLLING DIMENSION: INCHES INCHES 2. DIMENSIONS ARE IN (MILLIMETERS) 3. DRAWING NOT TO SCALE 4. PIN 1 CAN BE BEVEL EDGE OR A DIMPLE * DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE ** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE 623637fb 24 For more information www.linear.com/LT6236

LT6236/LT6237/LT6238 revision hisTory REV DATE DESCRIPTION PAGE NUMBER A 09/13 Added LT6238 quad All B 09/14 Corrected I condition for V specification. 5, 6, 9, 10 SINK OL Corrected V condition for A specification. 9, 10 O VOL Added LT6238 to ESD discussion. 18 623637fb Information furnished by Linear Technology Corporation is believed to be accurate and reliable. 25 However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconnectiFoonr o mf itos rceir cinuiftos rams daetsiocnrib wedw hwer.eliinne wairl.l cnoomt in/fLrTin6g2e 3o6n existing patent rights.

LT6236/LT6237/LT6238 Typical applicaTion The LT6236 is configured as a transimpedance amplifier I which flows into the amplifier circuit. The amplifier PD with an I-to-V conversion gain of 1.5kΩ set by R1. The output falls negative to maintain balance at its inputs. LT6236 is ideally suited to this application because of its The transfer function is therefore V = –I • 1.5k. C1 OUT PD low input offset voltage and current, and its low noise. ensures stability and good settling characteristics. Output This is because the 1.5k resistor has an inherent thermal offset was measured at 280µV, so low in part because R2 noise of 5nV/√Hz or 3.4pA/√Hz at room temperature, while serves to cancel the DC effects of bias current. Output the LT6236 contributes only 1.1nV/√Hz and 2.4pA/√Hz. noise was measured at 1.1mV on a 100MHz measure- P–P So, with respect to both voltage and current noises, the ment bandwidth, with C2 shunting R2’s thermal noise. As LT6236 is actually quieter than the gain resistor. The shown in the scope photo, the rise time is 17ns, indicating circuit uses an avalanche photodiode with the cathode a signal bandwidth of 20MHz. biased to approximately 200V. When light is incident on the photodiode, it induces a current Low Power Avalanche Photodiode Transimpedance Amplifier Photodiode Amplifier Time Domain Response I = 3.3mA S ≈200V BIAS C1 4.7pF ADVANCED PHOTONIX 012-70-62-541 DIV V/ WWW.ADVANCEDPHOTONIX.COM m R1 0 3 1.5k – 5V R2 LT6236 1.5k + –5V 50ns/DIV 62367 TA07 ENABLE C2 62367 TA06 0.1µF OUTPUT OFFSET = 500µV TYPICAL BANDWIDTH = 20MHz OUTPUT NOISE = 1.1mVP-P (100MHz MEASUREMENT BW) relaTeD parTs PART NUMBER DESCRIPTION COMMENTS OPERATIONAL AMPLIFIERS LT6230/LT6231/LT6232 Single, Dual, Quad Low Noise, Rail-to-Rail Output. 1.1nV/√Hz LT6350 Low Noise, Single-Ended to Differential Converter/ADC Driver 4.8mA, –97dBc Distortion at 100kHz, 4V Output P-P LTC6246/LTC6247/LTC6248 Single/Dual/Quad 180MHz Rail-to-Rail Low Power Op Amps 1mA/Amplifier, 4.2nV/√Hz LTC6360 1GHz Very Low Noise Single-Ended SAR ADC Driver with HD2 = –103dBc and HD3 = –109dBc for 4V Output at 40kHz P-P True Zero Output ADCs LTC2389-18 Low Power 18-Bit SAR ADC 2.5Msps LTC2389-16 Low Power 16-Bit SAR ADC 2.5Msps LTC2379-18 Low Power 18-Bit SAR ADC 1.6Msps LTC2378-18 1Msps LTC2377-18 500ksps LTC2376-18 250ksps 623637fb 26 Linear Technology Corporation LT 0914 REV B • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 For more information www.linear.com/LT6236 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com/LT6236  LINEAR TECHNOLOGY CORPORATION 2012

Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: A nalog Devices Inc.: LT6237CDD#TRPBF LT6237IMS8#TRPBF LT6236CS6#PBF LT6237HDD#PBF LT6236CS6#TRMPBF LT6238CGN#TRPBF LT6237CMS8#PBF LT6236IS6#TRMPBF LT6237IDD#PBF LT6238CGN#PBF LT6238IGN#PBF LT6237HMS8#PBF LT6236HS6#PBF LT6236HS6#TRMPBF LT6237HDD#TRPBF LT6236CS6#TRPBF LT6237IDD#TRPBF LT6236IS6#TRPBF LT6238HGN#TRPBF LT6236HS6#TRPBF LT6237CDD#PBF LT6237IMS8#PBF LT6237CMS8#TRPBF LT6238HGN#PBF LT6236IS6#PBF LT6238IGN#TRPBF LT6237HMS8#TRPBF