LT6220/LT6221/LT6222 Single/Dual/Quad 60MHz, 20V/µs, Low Power, Rail-to-Rail Input and Output Precision Op Amps FeaTures DescripTion n Gain Bandwidth Product: 60MHz The LT®6220/LT6221/LT6222 are single/dual/quad, low n Input Common Mode Range Includes Both Rails power, high speed rail-to-rail input and output operational n Output Swings Rail-to-Rail amplifiers with excellent DC performance. The LT6220/ n Low Quiescent Current: 1mA Max LT6221/LT6222 feature reduced supply current, lower n Input Offset Voltage: 350µV Max input offset voltage, lower input bias current and higher n Input Bias Current: 150nA Max DC gain than other devices with comparable bandwidth. n Wide Supply Range: 2.2V to 12.6V Typically, the LT6220/LT6221/LT6222 have an input offset n Large Output Current: 50mA Typ voltage of less than 100µV, an input bias current of less than n Low Voltage Noise: 10nV√Hz Typ 15nA and an open-loop gain of 100V/mV. The parts have n Slew Rate: 20V/µs Typ an input range that includes both supply rails and an output n Common Mode Rejection: 102dB Typ that swings within 10mV of either supply rail to maximize n Power Supply Rejection: 105dB Typ the signal dynamic range in low supply applications. n Open-Loop Gain: 100V/mV Typ n Operating Temperature Range: –40°C to 85°C The LT6220/LT6221/LT6222 maintain performance for n Single in the 8-Lead SO and 5-Lead Low Profile supplies from 2.2V to 12.6V and are specified at 3V, 5V (1mm) ThinSOT™ Packages and ±5V supplies. The inputs can be driven beyond the n Dual in the 8-Lead SO and (3mm × 3mm) DFN supplies without damage or phase reversal of the output. Packages The LT6220 is housed in the 8-lead SO package with the n Quad in the 16-Lead SSOP Package standard op amp pinout as well as the 5-lead SOT-23 package. The LT6221 is available in 8-lead SO and DFN applicaTions (3mm × 3mm low profile dual fine pitch leadless) packages with the standard op amp pinout. The LT6222 features the n Low Voltage, High Frequency Signal Processing standard quad op amp configuration and is available in n Driving A/D Converters the 16-lead SSOP package. The LT6220/LT6221/LT6222 n Rail-to-Rail Buffer Amplifiers can be used as plug-in replacements for many op amps n Active Filters to improve input/output range and performance. n Video Amplifiers n Fast Current Sensing Amplifiers L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. Typical applicaTion V Distribution, V = 0V OS CM (S8, PNP Stage) Stepped-Gain Photodiode Amplifier VS+ 50 VS = 5V, 0V 45 VCM = 0V 30pF 10k 40 3.24k S (%) 35 NIT 30 VS+ 1pF OF U 25 100k T N 20 IPD VS+ PERCE 15 PHOTODIODE – VS– 33k LT1634-1.25 10 ~4pF LT6220 VOUT 5 + VS = ±1.5V TO ±5V 0 VS– VVOOUUTT =< 0–V1. 2T5OV ,– T1R.2A5NV,S TIMRAPNEDSIAMNPCEED =A (N1C0E0 k= |1| 030.2k4k) = 3.14k –250 –1I5N0PUT O–F5F0SET0 VOL5T0AGE (µ1V5)0 250 622012 TA01a 622012 TA01b 622012fc 1 For more information www.linear.com/LT6220/LT6221/LT6222

LT6220/LT6221/LT6222 absoluTe MaxiMuM raTings (Note 1) Total Supply Voltage (V – to V +) ..........................12.6V Maximum Junction Temperature ..........................150°C S S Input Voltage (Note 2) ...............................................±V (DD Package) ....................................................125°C S Input Current (Note 2) ..........................................±10mA Storage Temperature..............................–65°C to 150°C Output Short Circuit Duration (Note 3) ............Indefinite (DD Package) .....................................–65°C to 125°C Operating Temperature Range (Note 4)....–40°C to 85°C Lead Temperature (Soldering, 10 sec.) ..................300°C Specified Temperature Range (Note 5) ....–40°C to 85°C pin conFiguraTion TOP VIEW TOP VIEW NC 1 8 NC VOV+USINT– 123 + – 54 V–ISN+ –+IINN 23 +– 76 VVSO+UT VS– 4 5 NC S5 PACKAGE 5-LEAD PLASTIC TSOT-23 S8 PACKAGE TJMAX = 150°C, θJA = 250°C/W (NOTE 10) 8-LEAD PLASTIC SO TJMAX = 150°C, θJA = 190°C/W TOP VIEW TOP VIEW OUT A 1 16 OUT D TOP VIEW O–UINT AA 21 78 VOSU+T B OUT A 1 8 VS+ –+IINN AA 23 A D 1154 –+IINN DD +IN A 3 A 6 –IN B –IN A 2 A 7 OUT B VS+ 4 13 VS– VS– 4 B 5 +IN B +IN A 3 B 6 –IN B +IN B 5 B C 12 +IN C VS– 4 5 +IN B –IN B 6 11 –IN C DD PACKAGE OUT B 7 10 OUT C S8 PACKAGE 8-LEAD (3mm × 3mm) PLASTIC DFN 8-LEAD PLASTIC SO NC 8 9 NC EXPTOJSMEADX =P A1D25 I°NCT,E θRJNA A=L 1L6Y0 C°OC/NWN E(NCOTETDE 1T0O) VS– TJMAX = 150°C, θJA = 190°C/W GN PACKAGE (PCB CONNECTION OPTIONAL) 16-LEAD NARROW PLASTIC SSOP TJMAX = 150°C, θJA = 135°C/W orDer inForMaTion LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION SPECIFIED TEMPERATURE RANGE LT6220CS5#PBF LT6220CS5#TRPBF LTAFP 5-Lead Plastic TSOT-23 0°C to 70°C LT6220IS5#PBF LT6220IS5#TRPBF LTAFP 5-Lead Plastic TSOT-23 –40°C to 85°C LT6220CS8#PBF LT6220CS8#TRPBF 6220 8-Lead Plastic SO 0°C to 70°C LT6220IS8#PBF LT6220IS8#TRPBF 6220I 8-Lead Plastic SO –40°C to 85°C LT6221CDD#PBF LT6221CDD#TRPBF LADZ 8-Lead (3mm × 3mm) Plastic DFN 0°C to 70°C LT6221IDD#PBF LT6221IDD#TRPBF LADZ 8-Lead (3mm × 3mm) Plastic DFN –40°C to 85°C LT6221CS8#PBF LT6221CS8#TRPBF 6221 8-Lead Plastic SO 0°C to 70°C LT6221IS8#PBF LT6221IS8#TRPBF 6221I 8-Lead Plastic SO –40°C to 85°C LT6222CGN#PBF LT6222CGN#TRPBF 6222 16-Lead Narrow Plastic SSOP 0°C to 70°C LT6222IGN#PBF LT6222IGN#TRPBF 6222I 16-Lead Narrow Plastic SSOP –40°C to 85°C Consult LTC Marketing for parts specified with wider operating temperature ranges. Consult LTC Marketing for information on nonstandard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ 622012fc 2 For more information www.linear.com/LT6220/LT6221/LT6222

LT6220/LT6221/LT6222 elecTrical characTerisTics T = 25°C, V = 5V, 0V; V = 3V, 0V; V = V = half supply, unless otherwise noted. A S S CM OUT SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V Input Offset Voltage V = 0V 70 350 µV OS CM V = 0V (DD Package) 150 700 µV CM V = 0V (S5 Package) 200 850 µV CM V = V 0.5 2.5 mV CM S V = V (S5 Package) 0.5 3 mV CM S ∆V Input Offset Voltage Shift V = 5V, V = 0V to 3.5V 30 195 µV OS S CM V = 3V, V = 0V to 1.5V 15 120 µV S CM Input Offset Voltage Match (Channel-to-Channel) V = 0V 100 600 µV CM (Note 9) V = 0V (DD Package) 150 1100 µV CM I Input Bias Current V = 1V 15 150 nA B CM V = V 250 600 nA CM S Input Bias Current Match (Channel-to-Channel) V = 1V 15 175 nA CM (Note 9) V = V 20 250 nA CM S I Input Offset Current V = 1V 15 100 nA OS CM V = V 15 100 nA CM S Input Noise Voltage 0.1Hz to 10Hz 0.5 µV P-P e Input Noise Voltage Density f = 10kHz 10 nV/√Hz n i Input Noise Current Density f = 10kHz 0.8 pA/√Hz n C Input Capacitance 2 pF IN A Large Signal Voltage Gain V = 5V, V = 0.5V to 4.5V, R = 1k at V /2 35 100 V/mV VOL S OUT L S V = 5V, V = 1V to 4V, R = 100Ω at V /2 3.5 10 V/mV S OUT L S V = 3V, V = 0.5V to 2.5V, R = 1k at V /2 30 90 V/mV S OUT L S CMRR Common Mode Rejection Ratio V = 5V, V = 0V to 3.5V 85 102 dB S CM V = 3V, V = 0V to 1.5V 82 102 dB S CM CMRR Match (Channel-to-Channel) (Note 9) V = 5V, V = 0V to 3.5V 79 100 dB S CM V = 3V, V = 0V to 1.5V 76 100 dB S CM Input Common Mode Range 0 V V S PSRR Power Supply Rejection Ratio V = 2.5V to 10V, V = 0V 84 105 dB S CM PSRR Match (Channel-to-Channel) (Note 9) 79 105 dB Minimum Supply Voltage (Note 6) 2.2 2.5 V V Output Voltage Swing LOW (Note 7) No Load 5 40 mV OL I = 5mA 100 200 mV SINK I = 20mA 325 650 mV SINK V Output Voltage Swing HIGH (Note 7) No Load 5 40 mV OH I = 5mA 130 250 mV SOURCE I = 20mA 475 900 mV SOURCE I Short-Circuit Current V = 5V 20 45 mA SC S V = 3V 20 35 mA S I Supply Current Per Amplifier 0.9 1 mA S GBW Gain-Bandwidth Product V = 5V, Frequency = 1MHz 35 60 MHz S SR Slew Rate V = 5V, A = –1, R = 1k, V = 4V 10 20 V/µs S V L OUT FPBW Full Power Bandwidth V = 5V, A = 1, V = 4V 1.6 MHz S V OUT P-P HD Harmonic Distortion V = 5V, A = 1, R = 1k, V = 2V , f = 500kHz –77.5 dBc S V L OUT P-P C t Settling Time 0.01%, V = 5V, V = 2V, A = 1, R = 1k 300 ns S S STEP V L ∆G Differential Gain (NTSC) V = 5V, A = 2, R = 1k 0.3 % S V L ∆θ Differential Phase (NTSC) VS = 5V, AV = 2, RL= 1k 0.3 Deg 622012fc 3 For more information www.linear.com/LT6220/LT6221/LT6222

LT6220/LT6221/LT6222 elecTrical characTerisTics The l denotes the specifications which apply over the 0°C ≤ T ≤ 70°C A temperature range. V = 5V, 0V; V = 3V, 0V; V = V = half supply, unless otherwise noted. S S CM OUT SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V Input Offset Voltage V = 0V l 90 500 µV OS CM V = 0V (DD Package) l 180 850 µV CM V = 0V (S5 Package) l 230 1250 µV CM V = V l 0.5 3 mV CM S V = V (S5 Package) l 0.5 3.5 mV CM S ∆V Input Offset Voltage Shift V = 5V, V = 0V to 3.5V l 30 280 µV OS S CM V = 3V, V = 0V to 1.5V l 15 190 µV S CM Input Offset Voltage Match (Channel-to-Channel) V = 0V l 110 850 µV CM (Note 9) V = 0V (DD Package) l 180 1400 µV CM V TC Input Offset Voltage Drift (Note 8) l 1.5 5 µV/°C OS (S5 Package) l 3.5 10 µV/°C I Input Bias Current V = 1V l 20 175 nA B CM V = V – 0.2V l 275 800 nA CM S Input Bias Current Match (Channel-to-Channel) V = 1V l 15 200 nA CM (Note 9) V = V – 0.2V l 20 300 nA CM S I Input Offset Current V = 1V l 15 125 nA OS CM V = V – 0.2V l 15 125 nA CM S A Large Signal Voltage Gain V = 5V, V = 0.5V to 4.5V, R = 1k at V /2 l 30 90 V/mV VOL S OUT L S V = 5V, V = 1V to 4V, R = 100Ω at V /2 l 3 9 V/mV S OUT L S V = 3V, V = 0.5V to 2.5V, R = 1k at V /2 l 25 80 V/mV S OUT L S CMRR Common Mode Rejection Ratio V = 5V, V = 0V to 3.5V l 82 100 dB S CM V = 3V, V = 0V to 1.5V l 78 100 dB S CM CMRR Match (Channel-to-Channel) (Note 9) V = 5V, V = 0V to 3.5V l 77 100 dB S CM V = 3V, V = 0V to 1.5V l 73 100 dB S CM Input Common Mode Range l 0 V V S PSRR Power Supply Rejection Ratio V = 2.5V to 10V, V = 0V l 81 104 dB S CM PSRR Match (Channel-to-Channel) (Note 9) l 76 104 dB Minimum Supply Voltage (Note 6) l 2.2 2.5 V V Output Voltage Swing LOW (Note 7) No Load l 8 50 mV OL I = 5mA l 110 220 mV SINK I = 20mA l 375 750 mV SINK V Output Voltage Swing HIGH (Note 7) No Load l 8 50 mV OH I = 5mA l 150 300 mV SOURCE I = 20mA l 600 1100 mV SOURCE I Short-Circuit Current V = 5V l 20 40 mA SC S V = 3V l 20 30 mA S I Supply Current Per Amplifier l 1 1.4 mA S GBW Gain-Bandwidth Product V = 5V, Frequency = 1MHz l 30 60 MHz S SR Slew Rate V = 5V, AV = –1, R = 1k, V = 4V l 9 18 V/µs S L OUT P-P 622012fc 4 For more information www.linear.com/LT6220/LT6221/LT6222

LT6220/LT6221/LT6222 elecTrical characTerisTics The l denotes the specifications which apply over the –40°C ≤ T ≤ 85°C A temperature range. V = 5V, 0V; V = 3V, 0V; V = V = half supply, unless otherwise noted. (Note 5) S S CM OUT SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V Input Offset Voltage V = 0V l 125 700 µV OS CM V = 0V (DD Package) l 300 1300 µV CM V = 0V (S5 Package) l 350 2000 µV CM V = V l 0.75 3.5 mV CM S V = V (S5 Package) l 1 4.5 mV CM S ∆V Input Offset Voltage Shift V = 5V, V = 0V to 3.5V l 30 300 µV OS S CM V = 3V, V = 0V to 1.5V l 30 210 µV S CM Input Offset Voltage Match (Channel-to-Channel) V = 0V l 175 1200 µV CM (Note 9) V = 0V (DD Package) l 300 2200 µV CM V TC Input Offset Voltage Drift (Note 8) l 1.5 7.5 µV/°C OS (S5 Package) l 3.5 15 µV/°C I Input Bias Current V = 1V l 25 200 nA B CM V = V – 0.2V l 300 900 nA CM S Input Bias Current Match (Channel-to-Channel) V = 1V l 15 250 nA CM (Note 9) V = V – 0.2V l 20 350 nA CM S I Input Offset Current V = 1V l 20 150 nA OS CM V = V – 0.2V l 20 150 nA CM S A Large Signal Voltage Gain V = 5V, V = 0.5V to 4.5V, R = 1k at V /2 l 25 70 V/mV VOL S OUT L S V = 5V, V = 1.5V to 3.5V, R = 100Ω at V /2 l 2.5 8 V/mV S OUT L S V = 3V, V = 0.5V to 2.5V, R = 1k at V /2 l 20 60 V/mV S OUT L S CMRR Common Mode Rejection Ratio V = 5V, V = 0V to 3.5V l 81 100 dB S CM V = 3V, V = 0V to 1.5V l 77 100 dB S CM CMRR Match (Channel-to-Channel) (Note 9) V = 5V, V = 0V to 3.5V l 76 100 dB S CM V = 3V, V = 0V to 1.5V l 72 100 dB S CM Input Common Mode Range l 0 V V S PSRR Power Supply Rejection Ratio V = 2.5V to 10V, V = 0V l 79 104 dB S CM PSRR Match (Channel-to-Channel) (Note 9) l 74 104 dB Minimum Supply Voltage (Note 6) l 2.2 2.5 V V Output Voltage Swing LOW (Note 7) No Load l 10 60 mV OL I = 5mA l 120 240 mV SINK I = 10mA l 220 450 mV SINK V Output Voltage Swing HIGH (Note 7) No Load l 10 60 mV OH I = 5mA l 160 325 mV SOURCE I = 10mA l 325 650 mV SOURCE I Short-Circuit Current V = 5V l 12.5 30 mA SC S V = 3V l 12.5 25 mA S I Supply Current Per Amplifier l 1.1 1.5 mA S GBW Gain-Bandwidth Product V = 5V, Frequency = 1MHz l 25 50 MHz S SR Slew Rate V = 5V, A = –1, R = 1k, V = 4V l 8 15 V/µs S V L OUT 622012fc 5 For more information www.linear.com/LT6220/LT6221/LT6222

LT6220/LT6221/LT6222 elecTrical characTerisTics T = 25°C, V = ±5V, V = 0V, V = 0V, unless otherwise noted. A S CM OUT SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V Input Offset Voltage V = –5V 80 500 µV OS CM V = –5V (DD Package) 150 750 µV CM V = –5V (S5 Package) 200 900 µV CM V = 5V 0.7 2.5 mV CM V = 5V (S5 Package) 0.7 3 mV CM ∆V Input Offset Voltage Shift V = –5V to 3.5V 70 675 µV OS CM Input Offset Voltage Match (Channel-to-Channel) V = –5V 100 850 µV CM (Note 9) V = –5V (DD Package) 150 1300 µV CM I Input Bias Current V = –4V 20 150 nA B CM V = 5V 250 700 nA CM Input Bias Current Match (Channel-to-Channel) V = –4V 15 175 nA CM V = 5V 20 250 nA CM I Input Offset Current V = –4V 15 100 nA OS CM V = 5V 15 100 nA CM Input Noise Voltage 0.1Hz to 10Hz 0.5 µV P-P e Input Noise Voltage Density f = 10kHz 10 nV/√Hz n i Input Noise Current Density f = 10kHz 0.8 pA/√Hz n C Input Capacitance f = 100kHz 2 pF IN A Large Signal Voltage Gain V = –4V to 4V, R = 1k 35 95 V/mV VOL OUT L V = –2V to 2V, R = 100Ω 3.5 10 V/mV OUT L CMRR Common Mode Rejection Ratio V = –5V to 3.5V 82 102 dB CM CMRR Match (Channel-to-Channel) 77 100 dB Input Common Mode Range V – V + V S S PSRR Power Supply Rejection Ratio V + = 2.5V to 10V, V – = 0V, V = 0V 84 105 dB S S CM PSRR Match (Channel-to-Channel) 79 105 dB V Output Voltage Swing LOW (Note 7) No Load 5 40 mV OL I = 5mA 100 200 mV SINK I = 20mA 325 650 mV SINK V Output Voltage Swing HIGH (Note 7) No Load 5 40 mV OH I = 5mA 130 250 mV SOURCE I = 20mA 475 900 mV SOURCE I Short-Circuit Current 25 50 mA SC I Supply Current Per Amplifier 1 1.5 mA S GBW Gain-Bandwidth Product Frequency = 1MHz 60 MHz SR Slew Rate A = –1, R = 1k, V = ±4V, 20 V/µs V L OUT Measure at V = ±2V OUT FPBW Full Power Bandwidth V = 8V 0.8 MHz OUT P-P HD Harmonic Distortion A = 1, R = 1k, V = 2V , f = 500kHz –77.5 dBc V L OUT P-P C t Settling Time 0.01%, V = 5V, A = 1, R = 1k 375 ns S STEP V L ∆G Differential Gain (NTSC) A = 2, R = 1k 0.15 % V L ∆θ Differential Phase (NTSC) AV = 2, RL = 1k 0.6 Deg 622012fc 6 For more information www.linear.com/LT6220/LT6221/LT6222

LT6220/LT6221/LT6222 elecTrical characTerisTics The l denotes the specifications which apply over the 0°C ≤ T ≤ 70°C A temperature range. V = ±5V, V = 0V, V = 0V, unless otherwise noted. S CM OUT SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V Input Offset Voltage V = –5V l 100 650 µV OS CM V = –5V (DD Package) l 180 900 µV CM V = –5V (S5 Package) l 230 1300 µV CM V = 5V l 0.75 3 mV CM V = 5V (S5 Package) l 0.75 3.5 mV CM ∆V Input Offset Voltage Shift V = –5V to 3.5V l 90 850 µV OS CM Input Offset Voltage Match (Channel-to-Channel) V = –5V l 90 1100 µV CM (Note 9) V = –5V (DD Package) l 180 1500 µV CM V TC Input Offset Voltage Drift (Note 8) l 1.5 5 µV/°C OS (S5 Package) l 3.5 10 µV/°C I Input Bias Current V = –4V l 20 175 nA B CM V = 4.8V l 275 800 nA CM Input Bias Current Match (Channel-to-Channel) V = –4V l 15 200 nA CM (Note 9) V = 4.8V l 20 300 nA CM I Input Offset Current V = –4V l 15 125 nA OS CM V = 4.8V l 15 125 nA CM A Large Signal Voltage Gain V = –4V to 4V, R = 1k l 30 90 V/mV VOL OUT L V = –2V to 2V, R =100Ω l 3 9 V/mV OUT L CMRR Common Mode Rejection Ratio V = –5V to 3.5V l 80 100 dB CM CMRR Match (Channel-to-Channel) (Note 9) l 75 100 dB Input Common Mode Range l V – V + V S S PSRR Power Supply Rejection Ratio V + = 2.5V to 10V, V – = 0V, V = 0V l 81 104 dB S S CM PSRR Match (Channel-to-Channel) (Note 9) l 76 104 dB V Output Voltage Swing LOW (Note 7) No Load l 8 50 mV OL I = 5mA l 110 220 mV SINK I = 20mA l 375 750 mV SINK V Output Voltage Swing HIGH (Note 7) No Load l 8 50 mV OH I = 5mA l 150 300 mV SOURCE I = 20mA l 600 1100 mV SOURCE I Short-Circuit Current l 20 40 mA SC I Supply Current Per Amplifier l 1.2 2 mA S GBW Gain-Bandwidth Product Frequency = 1MHz l 60 MHz SR Slew Rate A = –1, R = 1k, V = ±4V, l 18 V/µs V L OUT Measure at V = ±2V OUT 622012fc 7 For more information www.linear.com/LT6220/LT6221/LT6222

LT6220/LT6221/LT6222 elecTrical characTerisTics The l denotes the specifications which apply over the –40°C ≤ T ≤ 85°C A temperature range. V = ±5V, V = 0V, V = 0V, unless otherwise noted. (Note 5) S CM OUT SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V Input Offset Voltage V = –5V l 150 800 µV OS CM V = –5V (DD Package) l 300 1300 µV CM V = –5V (S5 Package) l 350 2000 µV CM V = 5V l 0.75 3.5 mV CM V = 5V (S5 Package) l 1 4.5 mV CM ∆V Input Offset Voltage Shift V = – 5V to 3.5V l 90 950 µV OS CM Input Offset Voltage Match (Channel-to-Channel) V = –5V l 175 1350 µV CM (Note 9) V = –5V (DD Package) l 300 2200 µV CM V TC Input Offset Voltage Drift (Note 8) l 1.5 7.5 µV/°C OS (S5 Package) l 3.5 15 µV/°C I Input Bias Current V = –4V l 25 200 nA B CM V = 4.8V l 300 900 nA CM Input Bias Current Match (Channel-to-Channel) V = –4V l 15 250 nA CM (Note 9) V = 4.8V l 20 350 nA CM I Input Offset Current V = –4V l 20 150 nA OS CM V = 4.8V l 20 150 nA CM A Large Signal Voltage Gain V = –4V to 4V, R = 1k l 25 70 V/mV VOL OUT L V = –1V to 1V, R = 100Ω l 2.5 8 V/mV OUT L CMRR Common Mode Rejection Ratio V = –5V to 3.5V l 79 100 dB CM CMRR Match (Channel-to-Channel) (Note 9) l 74 100 dB Input Common Mode Range l –5 5 V PSRR Power Supply Rejection Ratio V + = 2.5V to 10V, V – = 0V, V = 0V l 79 104 dB S S CM PSRR Match (Channel-to-Channel) (Note 9) l 74 104 dB V Output Voltage Swing LOW (Note 7) No Load l 10 60 mV OL I = 5mA l 120 240 mV SINK I = 10mA l 220 450 mV SINK V Output Voltage Swing HIGH (Note 7) No Load l 10 60 mV OH I = 5mA l 160 325 mV SOURCE I = 10mA l 325 650 mV SOURCE I Short-Circuit Current l 12.5 30 mA SC I Supply Current l 1.4 2.25 mA S GBW Gain-Bandwidth Product Frequency = 1MHz l 50 MHz SR Slew Rate A = –1, R = 1k, V = ±4V, l 15 V/µs V L OUT Measure at V = ±2V OUT Note 1: Stresses beyond those listed under Absolute Maximum Ratings LT6220I/LT6221I/LT6222I are guaranteed to meet specified performance may cause permanent damage to the device. Exposure to any Absolute from –40°C to 85°C. Maximum Rating condition for extended periods may affect device Note 6: Minimum supply voltage is guaranteed by power supply rejection reliability and lifetime. ratio test. Note 2: The inputs are protected by back-to-back diodes. If the differential Note 7: Output voltage swings are measured between the output and input voltage exceeds 1.4V, the input current should be limited to less than power supply rails. 10mA. Note 8: This parameter is not 100% tested. Note 3: A heat sink may be required to keep the junction temperature below Note 9: Matching parameters are the difference between amplifiers A and the absolute maximum rating when the output is shorted indefinitely. D and between B and C on the LT6222; between the two amplifiers on the Note 4: The LT6220C/LT6221C/LT6222C and LT6220I/LT6221I/LT6222I LT6221. are guaranteed functional over the temperature range of –40°C and 85°C. Note 10: Thermal resistance (θJA) varies with the amount of PC board Note 5: The LT6220C/LT6221C/LT6222C are guaranteed to meet specified metal connected to the package. The specified values are for short performance from 0°C to 70°C. The LT6220C/LT6221C/LT6222C are traces connected to the leads. If desired, the thermal resistance can be designed, characterized and expected to meet specified performance from substantially reduced by connecting Pin 2 of the LT6220CS5/LT6220IS5 or –40°C to 85°C but is not tested or QA sampled at these temperatures. The the underside metal of DD packages to a larger metal area (V – trace). S 622012fc 8 For more information www.linear.com/LT6220/LT6221/LT6222

LT6220/LT6221/LT6222 Typical perForMance characTerisTics V Distribution, V = 0V V Distribution, V = 0V V Distribution, V = 5V OS CM OS CM OS CM (S8, PNP Stage) (SOT5, PNP Stage) (S8, NPN Stage) 50 50 50 VS = 5V, 0V VS = 5V, 0V VS = 5V, 0V 45 VCM = 0V 45 VCM = 0V 45 VCM = 5V 40 40 40 %) %) %) S ( 35 S ( 35 S ( 35 NIT 30 NIT 30 NIT 30 U U U F 25 F 25 F 25 O O O T T T N 20 N 20 N 20 E E E C C C ER 15 ER 15 ER 15 P P P 10 10 10 5 5 5 0 0 0 –250 –150 –50 0 50 150 250 –1000 –600 –200 0 200 600 1000 –2000 –1200 –400 0 400 1200 2000 INPUT OFFSET VOLTAGE (µV) INPUT OFFSET VOLTAGE (µV) INPUT OFFSET VOLTAGE (µV) 622012 G01 622012 G02 622012 G03 V Distribution, V = 5V Offset Voltage OS CM (SOT5, NPN Stage) Supply Current vs Supply Voltage vs Input Common Mode Voltage 50 3 700 VS = 5V, 0V VS = 5V, 0V 45 VCM = 5V mA) 500 TYPICAL PART 40 R ( E PERCENT OF UNITS (%) 321231000555 LY CURRENT PER AMPLIFI 12 TA = 125°TCA = 25°C OFFSET VOLTAGE (µV)––113300000000 TTTAAA == = –1 225555°°°CCC PP TA = –55°C –500 5 U S 0 0 –700 –3000 –1800 –600 0 600 1800 3000 0 1 2 3 4 5 6 7 8 9 10 11 12 0 1 2 3 4 5 INPUT OFFSET VOLTAGE (µV) TOTAL SUPPLY VOLTAGE (V) INPUT COMMON MODE VOLTAGE (V) 622012 G04 622012 G05 622012 G06 Input Bias Current Input Bias Current Output Saturation Voltage vs Common Mode Voltage vs Temperature vs Load Current (Output Low) 400 0.6 10 VS = 5V, 0V TA = 25°C VS = 5V, 0V VS = 5V, 0V 300 TA = –55°C 0.5 V) CURRENT (nA)–1210000000 TA = 125°C CURRENT (µA) 000...342 NVPCNM A =C T5IVVE TION VOLTAGE ( 0.11 TA = 125°C NPUT BIAS ––230000 NPUT BIAS 0.10 PNVCPM A C= T1IVVE UT SATURA0.01 TA = 25°C I–400 I TP U –500 –0.1 O TA = –55°C –600 –0.2 0.001 0 1 2 3 4 5 6 –55 –25 5 35 65 95 125 0.01 0.1 1 10 100 COMMON MODE VOLTAGE (V) TEMPERATURE (°C) LOAD CURRENT (mA) 622012 G07 622012 G08 622012 G09 622012fc 9 For more information www.linear.com/LT6220/LT6221/LT6222

LT6220/LT6221/LT6222 Typical perForMance characTerisTics Output Saturation Voltage Output Short-Circuit Current vs Load Current (Output High) Minimum Supply Voltage vs Power Supply Voltage 10 0.6 70 VS = 5V, 0V A) 60 TA = 25°C OUTPUT SATURATION VOLTAGE (V)00.0.111 TA = 25°CTTAA = = – 15255°°CC CHANGE IN OFFSET VOLTAGE (mV)––0000....22404 TTAAT A== =–1 252555°°°CCC OUTPUT SHORT-CIRCUIT CURRENT (m––––––53135164224000000000000 TA = 25°TCTTAAA === –1–525555°°°CCC TA = S1O2SU5I°NRCKCIINNGG 0.001 –0.6 –70 0.01 0.1 1 10 100 0 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 1.5 2 2.5 3 3.5 4 4.5 5 LOAD CURRENT (mA) TOTAL SUPPLY VOLTAGE (V) POWER SUPPLY VOLTAGE (±V) 622012 G10 622012 G11 622012 G12 Open-Loop Gain Open-Loop Gain Open-Loop Gain 1000 1000 1000 VS = 3V, 0V VS = 5V, 0V VS = ±5V N OFFSET VOLTAGE (µV)–2264800000000000 RL = 1k RL TO GND N OFFSET VOLTAGE (µV)–2624800000000000 RL = 1RkL = 100RΩL TO GND N OFFSET VOLTAGE (µV)–2624800000000000 RL = R1Lk TO GND HANGE I––460000 RL = 100Ω HANGE I––640000 HANGE I––640000 RL = 100Ω C C C –800 –800 –800 –1000 –1000 –1000 0 0.5 1 1.5 2 2.5 3 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 6 –5 –4 –3 –2 –1 0 1 2 3 4 5 OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) 622012 G13 622012 G14 622012 G15 Offset Voltage vs Output Current Warm-Up Drift vs Time Input Noise Voltage vs Frequency 2.0 10 40 VS = ±5V VS = 5V, 0V V) 1.5 V) 8 35 CHANGE IN OFFSET VOLTAGE (m–––10011.....050505 TA = –5T5A° =C 125°C TA = 25°C CHANGE IN OFFSET VOLTAGE (µ ––––26260448 VVSLLS GGTT= =6N6N ± 2211±222665.225VV VVSLLS SSTT= OO=66 ± 22TT±222555.005VV VVSLLS TT= SS=66 ± 2288±2225.115VV NOISE VOLTAGE (nV/√Hz) 12231005055 VNPVCNPCMNPM = AA= CC4 2TT.2.II5VV5VVEE –2.0 –10 0 –75–60–45–30–15 0 15 30 45 60 75 0 5 10 15 20 25 30 35 40 45 50 0.01 0.1 1 10 100 OUTPUT CURRENT (mA) TIME AFTER POWER-UP (SECONDS) FREQUENCY (kHz) 622012 G16 622012 G17 622012 G18 622012fc 10 For more information www.linear.com/LT6220/LT6221/LT6222

LT6220/LT6221/LT6222 Typical perForMance characTerisTics Gain Bandwidth and Phase Input Current Noise vs Frequency 0.1Hz to 10Hz Output Voltage Noise Margin vs Supply Voltage 3.0 800 90 VS = 5V, 0V VS = 5V, 0V TA = 25°C 80 600 2.5 V) 70 GAIN BANDWIDTH PRODUCT NOISE CURRENT (pA/√Hz) 211...050 PVNCPM A=C 2T.I5VVE UTPUT NOISE VOLTAGE (n––4224000000000 GAIN BANDWIDTH (MHz) 5600 PHASE MARGIN 46750000 PHASE MARGIN (DEG) 0.5 NPN ACTIVE O VCM = 4.25V –600 30 0 –800 20 0.01 0.1 1 10 100 0 1 2 3 4 5 6 7 8 9 10 0 1 2 3 4 5 6 7 8 9 10 FREQUENCY (kHz) TIME (SECONDS) TOTAL SUPPLY VOLTAGE (V) 622012 G19 622012 G20 622012 G21 Gain Bandwidth and Phase Margin vs Temperature Gain and Phase vs Frequency Slew Rate vs Temperature 90 80 120 30 AV = –1 80 70 100 RF = RG = 1k GAIN BANDWIDTH (MHz)675000 GAIN BAPNHDAWSIED MTHA RPGRIONDUCVVVVTSSSS ==== ±±±±2525.V.V55VV 657000PHASE MARGIN (DEG) GAIN (dB)456213000000 GAVISN =P H±A5VSVVESS = = ±V ±2S2. 5.=5V V±5V 0468–2000200PHASE (DEG) SLEW RATE (V/µs) 2205 RL = 1k VS =V ±S 5=V ±2.5V 40 0 –40 30 –10 –60 20 –20 –80 15 –55 –25 5 35 65 95 125 10k 100k 1M 10M 100M –55 –25 5 35 65 95 125 TEMPERATURE (°C) FREQUENCY (Hz) TEMPERATURE (°C) 622012 G22 622012 G23 622012 G24 Gain vs Frequency (A = 1) Gain vs Frequency (A = 2) Output Impedance vs Frequency V V 15 15 1000 AV = 1 VS = ±2.5V 12 CL = 10pF 12 9 RL = 1k 9 100 Ω) 6 6 E ( 10 AV = 10 N GAIN (dB) –330 VS = ±5V VS = ±2.5V GAIN (dB) –330 VS = ±5V VS = ±2.5V T IMPEDAC 1 AV = 2 –6 –6 AV = 2 UTPU 0.1 AV = 1 –9 –9 RCFF == 2R0Gp =F 1k O0.01 –12 –12 CL = 10pF RL = 1k –15 –15 0.001 0.1 1 10 100 0.1 1 10 100 0.1 1 10 100 FREQUENCY (MHz) FREQUENCY (MHz) FREQUENCY (MHz) 622012 G25 622012 G26 620012 G27 622012fc 11 For more information www.linear.com/LT6220/LT6221/LT6222

LT6220/LT6221/LT6222 Typical perForMance characTerisTics Common Mode Rejection Ratio Power Supply Rejection Ratio Series Output Resistor vs Frequency vs Frequency vs Capacitive Load 120 120 50 VS = 5V, 0V VS = 5V, 0V VS = 5V, 0V dB) dB) 45 AV = 1 TIO (100 TIO (100 POSITIVE 40 RL = ∞, UNLESS NOTED RA RA SUPPLY 35 ON 80 ON 80 %) ROS = 10Ω N MODE REJECTI 4600 SUPPLY REJECTI 6400 NESGUAPTPIVLYE OVERSHOOT ( 32120055 ROS = RL = 5R0OΩS = 20Ω MMO 20 WER 20 10 O O 5 C P 0 0 0 0.01 0.1 1 10 100 0.001 0.01 0.1 1 10 100 10 100 1000 10000 FREQUENCY (MHz) FREQUENCY (MHz) CAPACITIVE LOAD (pF) 622012 G28 622012 G29 622012 G31 Series Output Resistor vs Capacitive Load Distortion vs Frequency Distortion vs Frequency 50 –30 –30 VS = 5V, 0V VS = 5V, 0V VS = 5V, 0V 45 AV = 2 –40 AV = 1 –40 AV = 2 40 RL = ∞, UNLESS NOTED VOUT = 2VP-P VOUT = 2VP-P –50 –50 HOOT (%) 332055 TION (dBc) ––6700 RL = 1530RΩD,RL = 1520NΩD, TION (dBc) ––6700 RL = 152R0NΩLD =, 1530RΩD, 2RNL D= 1k, OVERS 2105 ROS = 10Ω DISTOR –80 2RNL D= 1k, DISTOR –80 3RRL D= 1k, 10 –90 RL = 1k, –90 ROS = 20Ω –100 3RD –100 5 ROS = RL = 50Ω 0 –110 –110 10 100 1000 10000 0.01 0.1 1 10 0.01 0.1 1 10 CAPACITIVE LOAD (pF) FREQUENCY (MHz) FREQUENCY (MHz) 622012 G32 622012 G33 622012 G34 Maximum Undistorted Output Signal vs Frequency 5V Large-Signal Response 5V Small-Signal Response 5.0 4.5 )P P- V 4.0 NG ( AV = –1 AV = 2 50mV/DIV WI 3.5 2.5V E S 1V/DIV G 3.0 A T L O 2.5 V 0V T U P 2.0 T U O 11..05 RVSL == 51Vk, 0V ARVSVL === 115kV, 0V 100ns/DIV 622012 G36 ARVSVL === 115kV, 0V 50ns/DIV 622012 G37 0 0.01 0.1 1 10 FREQUENCY (MHz) 622012 G35 622012fc 12 For more information www.linear.com/LT6220/LT6221/LT6222

LT6220/LT6221/LT6222 Typical perForMance characTerisTics ±5V Large-Signal Response ±5V Small-Signal Response Output Overdriven Recovery VIN 1V/DIV 2V/DIV 50mV/DIV 0V 0V 0V VOUT 2V/DIV 0V VS = ±5V 200ns/DIV 622012 G38 VS = ±5V 50ns/DIV 622012 G39 VS = 5V, 0V 200ns/DIV 622012 G40 AV = 1 AV = 1 AV = 2 RL = 1k RL = 1k RL = 1k applicaTions inForMaTion Circuit Description tail current, I , to the current mirror, Q6/Q7, activating the 1 NPN differential pair and the PNP pair becomes inactive The LT6220/LT6221/LT6222 have an input and output for the rest of the input common mode range up to the signal range that covers from the negative power supply positive supply. Also, at the input stage, devices Q17 to to the positive power supply. Figure 1 depicts a simplified Q19 act to cancel the bias current of the PNP input pair. schematic of the amplifier. The input stage comprises When Q1/Q2 are active, the current in Q16 is controlled two differential amplifiers, a PNP stage, Q1/Q2, and an to be the same as the current Q1/Q2. Thus, the base cur- NPN stage, Q3/Q4, that are active over different ranges rent of Q16 is nominally equal to the base current of the of common mode input voltage. The PNP stage is active input devices. The base current of Q16 is then mirrored by between the negative supply to approximately 1.2V below devices Q17-Q19 to cancel the base current of the input the positive supply. As the input voltage moves closer devices Q1/Q2. toward the positive supply, the transistor Q5 will steer the V+ R3 R4 R5 V+ V– + + ESDD1 ESDD2 D1 Q12 I2 I1 Q11 Q13 Q15 +IN C2 + D6 D8 D2 Q5 VBIAS I3 OUT D5 D7 CC V– –IN Q4 Q3 Q1 Q2 D3 ESDD4 ESDD3 BUFFER AND OUTPUT BIAS V– V+ D4 Q10 Q9 Q8 Q16 C1 Q17 Q18 Q19 Q7 Q6 Q14 R1 R2 V– 622012 F01 Figure 1. LT6220/LT6221/LT6222 Simplified Schematic Diagram 622012fc 13 For more information www.linear.com/LT6220/LT6221/LT6222

LT6220/LT6221/LT6222 applicaTions inForMaTion A pair of complementary common emitter stages Q14/Q15 Input Offset Voltage that enable the output to swing from rail-to-rail construct The offset voltage will change depending upon which input the output stage. The capacitors C2 and C3 form the local stage is active. The PNP input stage is active from the nega- feedback loops that lower the output impedance at high tive supply rail to 1.2V below the positive supply rail, then frequency. These devices are fabricated by Linear Tech- the NPN input stage is activated for the remaining input nology’s proprietary high speed complementary bipolar range up to the positive supply rail during which the PNP process. stage remains inactive. The offset voltage is typically less than 70µV in the range that the PNP input stage is active. Power Dissipation The LT6222, with four amplifiers, is housed in a small Input Bias Current 16-lead SSOP package and typically has a thermal resis- The LT6220/LT6221/LT6222 employ a patent pending tance (θ ) of 135°C/W. It is necessary to ensure that the JA technique to trim the input bias current to less than 150nA die’s junction temperature does not exceed 150°C. The for the input common mode voltage of 0.2V above the junction temperature, T , is calculated from the ambi- J negative supply rail to 1.2V below the positive rail. The ent temperature, T , power dissipation, P , and thermal A D low input offset voltage and low input bias current of the resistance, θ : JA LT6220/LT6221/LT6222 provide precision performance T = T + (P • θ ) especially for high source impedance applications. J A D JA The power dissipation in the IC is the function of the sup- Output ply voltage, output voltage and the load resistance. For a given supply voltage, the worst-case power dissipation The LT6220/LT6221/LT6222 can deliver a large output cur- P occurs when the maximum supply current and rent, so the short-circuit current limit is set around 50mA D(MAX) the output voltage is at half of either supply voltage for a to prevent damage to the device. Attention must be paid to given load resistance. P is given by: keep the junction temperature of the IC below the absolute D(MAX) maximum rating of 150°C (refer to the Power Dissipation 2 V  section) when the output is in continuous short circuit. P =(V •I )+ S /R D(MAX) S S(MAX)  2  L The output of the amplifier has reverse-biased diodes connected to each supply. If the output is forced beyond Example: For an LT6222 in a 16-lead SSOP package either supply, unlimited current will flow through these operating on ±5V supplies and driving a 100Ω load, the diodes. If the current is transient and limited to several worst-case power dissipation is given by: hundred milliamperes, no damage will occur to the device. 2 P /Amp=(10•1.8mA)+(2.5) /100 D(MAX) Overdrive Protection =0.018+0.0625=80.5mW When the input voltage exceeds the power supplies, two pair of crossing diodes, D1 to D4, will prevent the output If all four amplifiers are loaded simultaneously, then the from reversing polarity. If the input voltage exceeds ei- total power dissipation is 322mW. ther power supply by 700mV, diode D1/D2 or D3/D4 will The maximum ambient temperature at which the part is turn on to keep the output at the proper polarity. For the allowed to operate is: phase reversal protection to perform properly, the input current must be limited to less than 5mA. If the amplifier T = T – (P • 135°C/W) A J D(MAX) = 150°C – (0.322W • 135°C/W) = 106.5°C 622012fc 14 For more information www.linear.com/LT6220/LT6221/LT6222

LT6220/LT6221/LT6222 applicaTions inForMaTion is severely overdriven, an external resistor should be used larger capacitive load, a resistor of 10Ω to 50Ω should be to limit the overdriven current. connected between the output and the capacitive load to avoid ringing or oscillation. The feedback should still be The LT6220/LT6221/LT6222’s input stages are also pro- taken from the output so that the resistor will isolate the tected against a large differential input voltage of 1.4V or capacitive load to ensure stability. Graphs on capacitive higher by a pair of back-to-back diodes, D5/D8, to prevent loads show the transient response of the amplifier when the emitter-base breakdown of the input transistors. The driving capacitive load with specified series resistors. current in these diodes should be limited to less than 10mA when they are active. The worse-case differential Feedback Components input voltage usually occurs when the input is driven while the output is shorted to ground in a unity-gain configura- When feedback resistors are used to set up gain, care must tion. In addition, the amplifier is protected against ESD be taken to ensure that the pole formed by the feedback strikes up to 3kV on all pins by a pair of protection diodes resistors and the total capacitance at the inverting input on each pin that are connected to the power supplies as does not degrade stability. For instance, the LT6220/ shown in Figure 1. LT6221/LT6222, set up with a noninverting gain of 2, two 5k resistors and a capacitance of 5pF (part plus PC board), Capacitive Load will probably oscillate. The pole is formed at 12.7MHz that will reduce phase margin by 52 degrees when the crossover The LT6220/LT6221/LT6222 are optimized for high frequency of the amplifier is around 10MHz. A capacitor bandwidth, low power and precision applications. They of 10pF or higher connecting across the feedback resistor can drive a capacitive load up to 100pF in a unity-gain will eliminate any ringing or oscillation. configuration and more for higher gain. When driving a Typical applicaTions Stepped-Gain Photodiode Amplifier so Q1 is reverse biased and no current flows through R2. So for small signals, the only feedback path is R1 (and The circuit of Figure 2 is a stepped gain transimpedance C1) and the circuit is a simple transimpedance amplifier photodiode amplifier. At low signal levels, the circuit has with 100kΩ gain. a high 100kΩ gain, but at high signal levels the circuit automatically and smoothly changes to a low 3.2kΩ gain. VS+ The benefit of a stepped gain approach is that it maximizes R4 dynamic range, which is very useful on limited supplies. R2 C2 PHILIPS 10k 3.24k 30pF BCV62 Put another way, in order to get 100kΩ sensitivity and still 3 4 handle a 1mA signal level without resorting to gain reduc- tion, the circuit would need a 100V negative voltage supply. VS+ R1 C1 Q1 Q2 100k 1pF The operation of the circuit is quite simple. At low photodi- IPD VS+ 2 1 ode currents (below 10µA) the output and inverting input PHOTODIODE – VS– R333k LT1634-1.25 of the op amp will be no more than 1V below ground. The ~4pF LT6220 VOUT LT1634 in parallel with R3 and Q2 keep a constant current + VS = ±1.5V TO ±5V though Q2 of about 20µA. R4 maintains quiescent current VS– 622012 F02 through the LT1634 and pulls Q2’s emitter above ground, Figure 2. Stepped-Gain Photodiode Amplifier 622012fc 15 For more information www.linear.com/LT6220/LT6221/LT6222

LT6220/LT6221/LT6222 Typical applicaTions As the signal level increases though, the output of the op 20 amp goes more negative. At 12.5µA of photodiode cur- 0 rent, the 100kΩ gain dictates that the LT6220 output will –20 be about 1.25V below ground. However, at that point the emitter of Q2 will be at ground, and the base of Q1 will B)–40 d be 1V below ground. Thus, Q1 turns on and photodiode N ( AI–60 G current starts to flow through R2. The transimpedance gain –80 is therefore now reduced to R1||R2, or about 3.1kΩ. The circuit response is shown in Figure 3. Note the smooth –100 transition between the two operating gains, as well as –120 the linearity. 1k 10k 100k 1M 10M 100M FREQUENCY (Hz) 622012 F05 Figure 5. Frequency Response of Filter PHOTO CURRENT 100µA/DIV Differential-In/Differential-Out Amplifier The circuit of Figure 6 shows the LT6222 applied as a buffered differential-in differential-out amplifier with a gain of 2. Op amps A and B are configured as simple unity-gain VOUT 0.5V/DIV buffers, offering high input impedance to upstream cir- cuitry. Resistors R1 and R2 perform an averaging function 622012 F03 on the common mode input voltage and R3 attenuates it 5µs/DIV by a factor of 2/3 and references it to the voltage source Figure 3. Stepped-Gain Photodiode Amplifier Response V . The resultant voltage, V = 2/3 • V , is placed OCM MID ICM at the noninverting inputs of op amps C and D. The other Single 3V Supply, 1MHz, 4th Order Butterworth Filter four resistors set gains of +3 from the noninverting input The circuit shown in Figure 4 makes use of the low voltage and –2 through the inverting path. Thus the output voltage operation and the wide bandwidth of the LT6221 to create of the upper path is: a DC accurate 1MHz 4th order lowpass filter powered from –OUT = 3 • (2/3 • V + 1/3 • V ) – 2 a 3V supply. The amplifiers are configured in the inverting ICM OCM • (V + V /2) mode for the lowest distortion and the output can swing ICM DIFF rail-to-rail for maximum dynamic range. Figure 5 displays = 2VICM + VOCM – 2VICM – VDIFF the frequency response of the filter. Stopband attenuation = V – V OCM DIFF is greater than 100dB at 50MHz. 909Ω 47pF 1.1k 22pF 909Ω 2.67k VIN – 3V 1.1k 2.21k 220pF 1/2 LT6221 – + 470pF 1/2 LT6221 VOUT + VS/2 622012 F04 Figure 4. 3V, 1MHz, 4th Order Butterworth Filter 622012fc 16 For more information www.linear.com/LT6220/LT6221/LT6222

LT6220/LT6221/LT6222 Typical applicaTions and the output of the lower path is: giving rise to the effective differential gain of 2. Calcula- tions show that using 1% resistors gives worst-case input +OUT = 3 • (2/3 • V + 1/3 • V ) – 2 ICM OCM common mode feedthrough better than –31dB, whether • (V – V /2) ICM DIFF looking at the output common mode or difference mode. = 2V + V – 2V + V ICM OCM ICM DIFF Considering the 6dB of gain, worst-case common mode = VOCM + VDIFF rejection ratio is 37dB. (Remember this is assuming 1% resistors. Of course, this can be improved with more pre- Note that the input common mode voltage does not appear cise resistors.) Results achieved on the bench with typical in the output as either a common mode or a difference 1% resistors showed 67dB of CMRR at low frequency and mode term. However the voltage V does appear in OCM 40dB CMRR at 1MHz. Gains other than 2 can be achieved the output terms, and with the same polarity, so it sets by setting R3 = α • (R1||R2), R5 = α • R4 and R7 = α • R6 up the output DC level. Also, the differential input voltage where gain = α. V appears fully at both outputs with opposite polarity, DIFF package DescripTion Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. DD Package 8-Lead Plastic DFN (3mm × 3mm) (Reference LTC DWG # 05-08-1698 Rev C) R = 0.125 0.40 ±0.10 TYP 5 8 0.70 ±0.05 3.5 ±0.05 1.65 ±0.05 3.00 ±0.10 1.65 ±0.10 2.10 ±0.05 (2 SIDES) PIN 1 (4 SIDES) (2 SIDES) TOP MARK (NOTE 6) PACKAGE OUTLINE (DD8) DFN 0509 REV C 4 1 0.25 ±0.05 0.200 REF 0.75 ±0.05 0.25 ±0.05 0.50 0.50 BSC BSC 2.38 ±0.10 2.38 ±0.05 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON TOP AND BOTTOM OF PACKAGE 622012fc 17 For more information www.linear.com/LT6220/LT6221/LT6222

LT6220/LT6221/LT6222 package DescripTion Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. S5 Package 5-Lead Plastic TSOT-23 S5 Package (Reference LTC DWG # 05-08-1635) 5-Lead Plastic TSOT-23 (Reference LTC DWG # 05-08-1635) 0.62 0.95 2.90 BSC MAX REF (NOTE 4) 1.22 REF 1.50 – 1.75 3.85 MAX 2.62 REF 1.4 MIN 2.80 BSC (NOTE 4) PIN ONE RECOMMENDED SOLDER PAD LAYOUT 0.30 – 0.45 TYP 0.95 BSC PER IPC CALCULATOR 5 PLCS (NOTE 3) 0.80 – 0.90 0.20 BSC 0.01 – 0.10 1.00 MAX DATUM ‘A’ 0.30 – 0.50 REF 0.09 – 0.20 1.90 BSC NOTE: (NOTE 3) S5 TSOT-23 0302 1. DIMENSIONS ARE IN MILLIMETERS 2. DRAWING NOT TO SCALE 3. DIMENSIONS ARE INCLUSIVE OF PLATING 4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR 5. MOLD FLASH SHALL NOT EXCEED 0.254mm 6. JEDEC PACKAGE REFERENCE IS MO-193 622012fc 18 For more information www.linear.com/LT6220/LT6221/LT6222

LT6220/LT6221/LT6222 package DescripTion Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. S8 Package 8-Lead Plastic SmSa8l lP Oauctklaingee (Narrow .150 Inch) 8-Lead (PRleafesrteicnc Se mLTaCl lD OWuGt l#i n0e5 -(0N8-a1r6r1o0w R .e1v5 G0) Inch) (Reference LTC DWG # 05-08-1610 Rev G) .189 – .197 .045 ±.005 (4.801 – 5.004) .050 BSC NOTE 3 8 7 6 5 .245 MIN .160 ±.005 .150 – .157 .228 – .244 (3.810 – 3.988) (5.791 – 6.197) NOTE 3 .030 ±.005 TYP 1 2 3 4 RECOMMENDED SOLDER PAD LAYOUT .010 – .020 × 45° .053 – .069 (0.254 – 0.508) (1.346 – 1.752) .004 – .010 .008 – .010 (0.203 – 0.254) 0°– 8° TYP (0.101 – 0.254) .016 – .050 .014 – .019 .050 (0.406 – 1.270) (0.355 – 0.483) (1.270) NOTE: INCHES TYP BSC 1. DIMENSIONS IN (MILLIMETERS) 2. DRAWING NOT TO SCALE 3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm) SO8 REV G 0212 4. PIN 1 CAN BE BEVEL EDGE OR A DIMPLE 622012fc 19 For more information www.linear.com/LT6220/LT6221/LT6222

LT6220/LT6221/LT6222 package DescripTion Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. GN Package 16-Lead Plastic SSOP (Narrow .150 Inch) GN Package (Reference LTC DWG # 05-08-1641 Rev B) 16-Lead Plastic SSOP (Narrow .150 Inch) (Reference LTC DWG # 05-08-1641 Rev B) .189 – .196* .045 ±.005 (4.801 – 4.978) .009 (0.229) 16 15 14 13 12 11 109 REF .254 MIN .150 – .165 .229 – .244 .150 – .157** (5.817 – 6.198) (3.810 – 3.988) .0165 ±.0015 .0250 BSC RECOMMENDED SOLDER PAD LAYOUT 1 2 3 4 5 6 7 8 .015 ±.004 × 45° .0532 – .0688 .004 – .0098 (0.38 ±0.10) (1.35 – 1.75) (0.102 – 0.249) .007 – .0098 0° – 8° TYP (0.178 – 0.249) .016 – .050 .008 – .012 .0250 (0.406 – 1.270) (0.203 – 0.305) (0.635) GN16 REV B 0212 NOTE: TYP BSC 1. CONTROLLING DIMENSION: INCHES INCHES 2. DIMENSIONS ARE IN (MILLIMETERS) 3. DRAWING NOT TO SCALE 4. PIN 1 CAN BE BEVEL EDGE OR A DIMPLE * DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE ** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE 622012fc 20 For more information www.linear.com/LT6220/LT6221/LT6222

LT6220/LT6221/LT6222 revision hisTory (Revision history begins at Rev B) REV DATE DESCRIPTION PAGE NUMBER B 05/14 Added V information to Typical Application. 1 OUT Updated the Order Information table. 2 C 05/15 Updated Order Information table to reflect Specified Temperature Range 2 622012fc Information furnished by Linear Technology Corporation is believed to be accurate and reliable. 21 However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the inFteorrc omnnoercet ioinnf oofr imts actiricounit sw aws dwe.slicnreibaerd.c hoemrei/nL Tw6il2l n2o0t /inLTfr6in2g2e 1o/nL eTx6is2ti2n2g patent rights.

LT6220/LT6221/LT6222 Typical applicaTion R5 5.6pF 2k VICM ++ IVNDIFF/2 + R4 VS+ A 1k – 1/4 LT6222 D – 1/4 LT6222 –OUT R1 + 2k R3 VMID 2k VOCM R2 + 2k VICM –– IVNDIFF/2 + B R1k6 1/4 LCT6222 +OUT – 1/4 LT6222 – VS– R2k7 5.6pF 622012 F06 VS = ±1.3V TO ±6V BW ≅ 11MHz Figure 6. Buffered Gain of 2 Differential-In/Differential-Out Amplifier relaTeD parTs PART NUMBER DESCRIPTION COMMENTS LT1498/LT1499 Dual/Quad 10MHz, 6V/µs Rail-to-Rail Input/ High DC Accuracy, 475µV V Max Supply Current 2.2mA/Amp, OS(MAX) Output C Op Amps Wide Supply Range, 2.2V to 30V LOAD LT1800/LT1801/LT1802 Single/Dual/Quad 80MHz, 25V/µs, 350µV V , 250nA I , Max Supply Current 2mA/Amp OS(MAX) BIAS(MAX) Low Power Rail-to-Rail Input/Output Precision Op Amps LT1803/LT1804/LT1805 Single/Dual/Quad 85MHz, 100V/µs 2mV V , Max Supply Current 3mA/Amp OS(MAX) Rail-to-Rail Input/Output Op Amps LT1806/LT1807 Single/Dual 325MHz, 140V/µs Rail-to-Rail Input/ High DC Accuracy, 550µV V Max Low Noise 3.5nV/√Hz OS(MAX) Output Op Amps Low Distortion –80dBc at 5MHz, Power Down (LT1806) LT1809/LT1810 Single/Dual 180MHz, Rail-to-Rail Input/Output Op Amps 350V/µs Slew Rate, Low Distortion –90dBc at 5MHz, Power Down (LT1809) 622012fc 22 Linear Technology Corporation LT 0515 REV C • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 For more information www.linear.com/LT6220/LT6221/LT6222 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com/LT6220  LINEAR TECHNOLOGY CORPORATION 2003

Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: A nalog Devices Inc.: LT6220IS8#PBF LT6221CS8#TRPBF LT6221IDD#TR LT6222IGN LT6220CS5#TRPBF LT6221CDD LT6221CDD#TRPBF LT6221IS8#PBF LT6222CGN#PBF LT6222IGN#TRPBF LT6220CS8#TR LT6220IS5#TRM LT6221CDD#PBF LT6222IGN#PBF LT6220CS5#PBF LT6220CS8#TRPBF LT6220IS5#TRMPBF LT6220CS5#TR LT6221CS8 LT6220IS5#TR LT6221CDD#TR LT6221IS8#TR LT6221IS8 LT6221IS8#TRPBF LT6222CGN#TR LT6220CS8 LT6220IS8#TR LT6221CS8#PBF LT6220IS5#TRPBF LT6220CS5#TRMPBF LT6222CGN LT6221CS8#TR LT6222CGN#TRPBF LT6220IS8#TRPBF LT6221IDD#PBF LT6220CS8#PBF LT6220IS5 LT6220IS8 LT6220CS5 LT6220CS5#TRM LT6220IS5#PBF LT6222IGN#TR LT6221IDD#TRPBF LT6221IDD