LT4363 High Voltage Surge Stopper with Current Limit FeaTures DescripTion n Withstands Surges Over 100V with VCC Clamp The LT®4363 surge stopper protects loads from high voltage n Wide Operating Voltage Range: 4V to 80V transients. It regulates the output during an overvoltage n Adjustable Output Clamp Voltage event, such as load dump in vehicles, by controlling the n Fast Overcurrent Limit: Less Than 5µs gate of an external N-channel MOSFET. The output is limited n Reverse Input Protection to –60V to a safe value allowing the loads to continue functioning. n Adjustable UV/OV Comparator Thresholds The LT4363 also monitors the voltage drop between the n Low 7µA Shutdown Current SNS and OUT pins to protect against overcurrent faults. n Shutdown Pin Withstands –60V to 100V An internal amplifier limits the voltage across the current n Adjustable Fault Timer sense resistor to 50mV. In either fault condition, a timer is n Controls N-Channel MOSFET started inversely proportional to MOSFET stress. Before the n Less Than 1% Retry Duty Cycle During Faults, timer expires, the FLT pin pulls low to warn of an impend- LT4363-2 ing power down. If the condition persists, the MOSFET is n Available in 12-Pin (4mm × 3mm) DFN, 12-Pin turned off. The LT4363-1 remains off until reset whereas MSOP and 16-Pin SO Packages the LT4363-2 restarts after a cool down period. Two precision comparators can monitor the input supply applicaTions for overvoltage (OV) and undervoltage (UV) conditions. When the potential is below the UV threshold, the external n Automotive/Avionic/Industrial Surge Protection MOSFET is kept off. If the input supply voltage is above the n Hot Swap™/Live Insertion OV threshold, the MOSFET is not allowed to turn back on. n High Side Switch for Battery Powered Systems Back-to-back MOSFETs can be used in lieu of a Schottky n Intrinsic Safety Applications diode for reverse input protection, reducing voltage drop L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and No RSENSE, ThinSOT and Hot Swap are trademarks of Linear Technology Corporation. All other and power loss. A shutdown pin reduces the quiescent trademarks are the property of their respective owners. current to less than 7µA during shutdown. Typical applicaTion 4A, 12V Overvoltage Output Regulator with 150V Surge Protection Overvoltage Protector Regulates Output at 27V During Transient FDB33N25 10mΩ VIN OUTPUT 12V CLAMP 80V INPUT SURGE CTMR = 6.8µF 1k 22µF AT 16V ILOAD = 500mA 10Ω 57.6k 0.1µF VIN VCC GATE SNS OUT 20V/DIV 127k FB SMAJ58A SHDN 4.99k VCC 12V UV LT4363-2 CONDVCE/DRCTER VOUT 27V ADJUSTABLE CLAMP 20V/DIV 49.9k ENOUT SHDN GND 12V OV FLT FAULT GND TMR 100ms/DIV 4363 TA01b 4363 TA01 0.1µF 4363fb 1 For more information www.linear.com/LT4363

LT4363 absoluTe MaxiMuM raTings (Notes 1, 2) V , SHDN, UV, OV ...................................–60V to 100V Operating Temperature Range CC SNS, OUT .................................................–0.3V to 100V LT4363C ..................................................0°C to 70°C SNS to OUT .................................................–30V to 30V LT4363I ................................................–40°C to 85°C GATE (Note 3) ..................................–0.3V to SNS + 10V LT4363H ............................................–40°C to 125°C ENOUT, FLT ..............................................–0.3V to 100V LT4363MP .........................................–55°C to 125°C FB .............................................................–0.3V to 5.5V Storage Temperature Range TMR ......................................................................0.5mA DE12 ..................................................–65°C to 125°C MS, SO ..............................................–65°C to 150°C Lead Temperature (Soldering, 10 sec) MS, SO .............................................................300°C pin conFiguraTion LT4363-1 LT4363-1 LT4363-1 TOP VIEW TOP VIEW OUT 1 16 FB FB 1 12 TMR TOP VIEW SNS 2 15 TMR OUT 2 11 ENOUT FB 1 12 TMR NC 3 14 NC SNS 3 13 10 FLT OUT 2 11 ENOUT GATE 4 GND 9 GND SNS 3 10 FLT GATE 4 13 ENOUT GATE 4 9 GND NC 5 12 FLT VCC 5 8 UV VCC 5 8 UV SHDN 6 7 GND VCC 6 11 GND SHDN 6 7 GND NC 7 10 UV MS PACKAGE DE PACKAGE 12-LEAD PLASTIC MSOP SHDN 8 9 GND 12-LEAD (4mm × 3mm) PLASTIC DFN TJMAX = 125°C, θJA = 135°C/W TJMAX = 125°C, θJA = 43°C/W S PACKAGE EXPOSED PAD (PIN 13) IS GND, CONNECTION TO PCB 16-LEAD PLASTIC SO OPTIONAL TJMAX = 125°C, θJA = 80°C/W LT4363-2 LT4363-2 LT4363-2 TOP VIEW TOP VIEW OUT 1 16 FB FB 1 12 TMR TOP VIEW SNS 2 15 TMR OUT 2 11 ENOUT FB 1 12 TMR NC 3 14 NC SNS 3 13 10 FLT OUT 2 11 ENOUT GATE 4 GND 9 GND SNS 3 10 FLT GATE 4 13 ENOUT GATE 4 9 GND NC 5 12 FLT VCC 5 8 UV VCC 5 8 UV SHDN 6 7 OV VCC 6 11 GND SHDN 6 7 OV NC 7 10 UV MS PACKAGE DE PACKAGE 12-LEAD PLASTIC MSOP SHDN 8 9 OV 12-LEAD (4mm × 3mm) PLASTIC DFN TJMAX = 125°C, θJA = 135°C/W TJMAX = 125°C, θJA = 43°C/W S PACKAGE EXPOSED PAD (PIN 13) IS GND, CONNECTION TO PCB 16-LEAD PLASTIC SO OPTIONAL TJMAX = 125°C, θJA = 80°C/W 4363fb 2 For more information www.linear.com/LT4363

LT4363 orDer inForMaTion LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LT4363CDE-1#PBF LT4363CDE-1#TRPBF 43631 12-Lead (4mm × 3mm) Plastic DFN 0°C to 70°C LT4363IDE-1#PBF LT4363IDE-1#TRPBF 43631 12-Lead (4mm × 3mm) Plastic DFN –40°C to 85°C LT4363HDE-1#PBF LT4363HDE-1#TRPBF 43631 12-Lead (4mm × 3mm) Plastic DFN –40°C to 125°C LT4363CDE-2#PBF LT4363CDE-2#TRPBF 43632 12-Lead (4mm × 3mm) Plastic DFN 0°C to 70°C LT4363IDE-2#PBF LT4363IDE-2#TRPBF 43632 12-Lead (4mm × 3mm) Plastic DFN –40°C to 85°C LT4363HDE-2#PBF LT4363HDE-2#TRPBF 43632 12-Lead (4mm × 3mm) Plastic DFN –40°C to 125°C LT4363CMS-1#PBF LT4363CMS-1#TRPBF 43631 12-Lead Plastic MSOP 0°C to 70°C LT4363HMS-1#PBF LT4363HMS-1#TRPBF 43631 12-Lead Plastic MSOP –40°C to 125°C LT4363IMS-1#PBF LT4363IMS-1#TRPBF 43631 12-Lead Plastic MSOP –40°C to 85°C LT4363MPMS-1#PBF LT4363MPMS-1#TRPBF 43631 12-Lead Plastic MSOP –55°C to 125°C LT4363CMS-2#PBF LT4363CMS-2#TRPBF 43632 12-Lead Plastic MSOP 0°C to 70°C LT4363HMS-2#PBF LT4363HMS-2#TRPBF 43632 12-Lead Plastic MSOP –40°C to 125°C LT4363IMS-2#PBF LT4363IMS-2#TRPBF 43632 12-Lead Plastic MSOP –40°C to 85°C LT4363MPMS-2#PBF LT4363MPMS-2#TRPBF 43632 12-Lead Plastic MSOP –55°C to 125°C LT4363CS-1#PBF LT4363CS-1#TRPBF LT4363S-1 16-Lead Plastic SO 0°C to 70°C LT4363HS-1#PBF LT4363HS-1#TRPBF LT4363S-1 16-Lead Plastic SO –40°C to 125°C LT4363IS-1#PBF LT4363IS-1#TRPBF LT4363S-1 16-Lead Plastic SO –40°C to 85°C LT4363MPS-1#PBF LT4363MPS-1#TRPBF LT4363S-1 16-Lead Plastic SO –55°C to 125°C LT4363CS-2#PBF LT4363CS-2#TRPBF LT4363S-2 16-Lead Plastic SO 0°C to 70°C LT4363HS-2#PBF LT4363HS-2#TRPBF LT4363S-2 16-Lead Plastic SO –40°C to 125°C LT4363IS-2#PBF LT4363IS-2#TRPBF LT4363S-2 16-Lead Plastic SO –40°C to 85°C LT4363MPS-2#PBF LT4363MPS-2#TRPBF LT4363S-2 16-Lead Plastic SO –55°C to 125°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ elecTrical characTerisTics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T = 25°C. V = 12V, unless otherwise noted. A CC SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V Operating Voltage Range LT4363 l 4 80 V CC I V Supply Current SHDN Open, OUT = SNS = 12V l 0.7 1.2 mA CC CC SHDN = 0V, OUT = SNS = 0V 7 20 µA l 40 µA I Reverse Input Current V = –60V, SHDN, UV, OV Open l –0.5 –4 mA R CC V = SHDN = UV = OV = –60V l –3 –10 mA CC ΔVGATE GATE Drive ΔVGATE = (GATE – SNS);VCC = OUT V = 4V; I = –0.5µA, 0µA l 4.5 V CC GATE 9V ≤ V ≤ 80V; I = –1µA, 0µA l 10 13 16 V CC GATE I GATE Pull-Up Current V = GATE = OUT = 12V l –15 –30 –45 µA GATE(UP) CC V = GATE = OUT = 48V l –20 –40 –65 µA CC I GATE Pull-Down Current Overvoltage: FB = 1.5V, GATE = 12V, OUT = 5V l 75 150 mA GATE(DN) Overcurrent: ΔVSNS = 150mV, VGATE = 10V, OUT = 0V l 50 100 mA Shutdown/UV Mode: SHDN = 0V, GATE = 10V l 50 1000 µA UV = 1V, GATE = 10V l 200 1000 µA V FB Servo Voltage GATE = 12V; OUT = 8V l 1.25 1.275 1.3 V FB 4363fb 3 For more information www.linear.com/LT4363

LT4363 elecTrical characTerisTics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T = 25°C. V = 12V, unless otherwise noted. A CC SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS I FB Input Current V = 1.275V l ±0.2 ±1 µA FB FB ΔVSNS Current Limit Sense Voltage VCC = 12V, OUT = 3V to 12V l 45 50 55 mV ΔVSNS = (SNS – OUT) VCC = 48V, OUT = 3V to 48V l 48 53 58 mV Current Limit Foldback V = 12V, OUT = 0V to 1V l 15 25 35 mV CC V = 48V, OUT = 0V to 1V l 16 27 36 mV CC I SNS Input Current OUT = SNS = 3V to 80V l 20 40 µA SNS OUT = SNS = 0V l –10 –15 µA ITMR TMR Pull-up Current, Overvoltage TMR = 1V, FB = 1.5V, ΔVDS = 0.5V l –1.7 –4 –6 µA TMR = 1V, FB = 1.5V, ΔVDS = 75V l –42 –50 –58 µA TMR Pull-up Current, OV Warning TMR = 1.325V, FB = 1.5V, ΔVDS = 0.5V l –3 –5 –7 µA TMR Pull-up Current, Overcurrent TMR = 1V, ΔVSNS = 100mV, ΔVDS = 0.5V l –5 –9 –13 µA TMR = 1V, ΔVSNS = 100mV, ΔVDS = 80V l –190 –250 –310 µA TMR Pull-up Current, Cool Down TMR = 3V, FB = 1.5V, ΔVSNS = 0V, ΔVDS = 0V l –1 –2.3 –3.5 µA TMR Pin Pull-down Current, Cool Down VTMR = 3V, FB = 1.5V, ΔVSNS = 0V, ΔVDS = 0V l 1 2 4 µA V TMR Fault Threshold TMR Rising l 1.235 1.275 1.31 V TMR(F) V TMR Gate Off Threshold TMR Rising l 1.335 1.375 1.41 V TMR(G) V TMR Restart Threshold TMR Falling, LT4363-2 l 0.47 0.5 0.53 V TMR(R) ΔVTMR Early Warning Window VTMR(G) – VTMR(F) l 80 100 120 mV V TMR Cool Down High Threshold V = 7V to 80V, TMR Rising l 3.5 4.3 5.4 V TMR(H) CC V UV Input Threshold UV Rising l 1.24 1.275 1.31 V UV V UV Input Hysteresis 12 mV UV(HYST) V OV Input Threshold OV Rising l 1.24 1.275 1.31 V OV V OV Input Hysteresis 7.5 mV OV(HYST) I UV, OV Input Current UV = 1.275V l ±0.2 ±1 µA IN UV = –60V l –1 –2 mA I FLT, ENOUT Leakage Current FLT, ENOUT = 80V l ±0.5 ±2.5 µA LEAK V FLT, ENOUT Output Low I = 0.1mA l 300 800 mV OL SINK I = 2mA l 2 9 V SINK ΔVOUT(TH) OUT High Threshold ΔVOUT = VCC – VOUT, ENOUT From Low to High l 0.25 0.5 0.75 V ΔVOUT(RST) OUT Reset Threshold ENOUT From High to Low l 1.8 2.7 3.6 V I OUT Input Current V = OUT = 12V, SHDN Open l 0.25 0.5 mA OUT CC V = OUT = 12V, SHDN = 0V l 0.25 1 mA CC V SHDN Threshold V = 4V to 80V 0.6 1.4 1.7 V SHDN CC l 0.4 2.1 V V SHDN Open Voltage V = 4V to 80V l 2.2 V SHDN(Z) CC I SHDN Current SHDN = 0.4V l –1 –4 –8 µA SHDN t SHDN Reset Time SHDN ≤ 0.4V; LT4363-1 l 100 µs RESET D Retry Duty Cycle; Overvoltage V = 80V, OUT = 16V, FB = 1.5V; LT4363-2 l 1 2 % CC Retry Duty Cycle; Output Short V = 12V, OUT = 0V, ∆V = 100mV; LT4363-2 l 0.76 1 % CC SNS t Undervoltage Turn Off Propagation Delay UV Steps from 1.5V to 1V l 2 5 µs OFF(UV) t Overvoltage Turn Off Propagation Delay FB Steps from 0V to 1.5V; OUT = 0V l 0.25 1 µs OFF(OV) t Overcurrent Turn Off Propagation Delay ∆V Steps from 0V to 150mV; OUT = 0V l 1 2.5 µs OFF(OC) SNS Note 1: Stresses beyond those listed under Absolute Maximum Ratings Note 2: All currents into device pins are positive, all currents out of device pins may cause permanent damage to the device. Exposure to any Absolute are negative. All voltages are referenced to GND unless otherwise specified. Maximum Rating condition for extended periods may affect device Note 3: An internal clamp limits the GATE pin to a minimum of 10V above reliability and lifetime. the OUT pin. Driving this pin to voltages beyond the clamp may damage the device. 4363fb 4 For more information www.linear.com/LT4363

LT4363 Typical perForMance characTerisTics Specifications are at V = 12V, T = 25°C, unless CC A otherwise noted. Supply Current During Shutdown Supply Current During Shutdown Supply Current vs Supply Voltage vs Temperature vs Supply Voltage (I vs V ) (I vs Temperature) (I vs V ) CC CC CC(SHDN) CC(SHDN) CC 1000 8 6 OUT = SNS = 0V OUT = SNS = 0V 7 5 800 6 4 5 600 A) A) A) (µC (µC 4 (µC 3 C C C I 400 I I 3 2 2 200 1 1 0 0 0 0 10 20 30 40 50 60 70 80 –50 –25 0 25 50 75 100 125 0 10 20 30 40 50 60 70 80 VCC (V) TEMPERATURE (°C) VCC (V) 4363 G01 4363 G02 4363 G03 GATE Pull-Up Current vs SHDN Current vs Temperature GATE Pull-Up Current vs V Temperature CC 3.0 –50 –35 2.5 SHDN = 0V –40 –30 2.0 I (µA)CC(SHDN) 11..50 SHDN = 0.4V I (µA)GATE(UP)––3200 I (µA)GATE(UP)–25 –20 –10 0.5 0 0 –15 –50 –25 0 25 50 75 100 125 0 10 20 30 40 50 60 70 80 –50 –25 0 25 50 75 100 125 TEMPERATURE (°C) VCC (V) TEMPERATURE (°C) 4363 G04 4363 G05 4363 G06 GATE Pull-Down Current vs GATE Pull-Down Current vs Gate Drive Voltage vs Gate Temperature: Overcurrent Temperature: Overvoltage Pull-Down Current ΔV vs I GATE GATE 200 200 14 VCC = SNS = OUT 175 175 150 150 13 A) A) m 125 m 125 (ATE(DN,OC) 10705 (ATE(DN,OV) 10705 ∆V (V)GATE 12 G G I I 50 50 11 25 ∆VSNS = 150mV 25 SNS = OUT = 5V OUT = 0V GATE = 12V GATE = 10V FB = 1.5V 0 0 10 –50 –25 0 25 50 75 100 125 –50 –25 0 25 50 75 100 125 0 –2 –4 –6 –8 –10 TEMPERATURE (°C) TEMPERATURE (°C) IGATE (µA) 4363 G07 4363 G08 4363 G09 4363fb 5 For more information www.linear.com/LT4363

LT4363 Typical perForMance characTerisTics Specifications are at V = 12V, T = 25°C, unless CC A otherwise noted. Gate Drive vs Temperature Gate Drive vs Supply Voltage TMR High Threshold vs (ΔV vs Temperature) (ΔV vs V ) Supply Voltage GATE GATE CC 14 16 5 VCC = SNS = OUT 14 IGATE = 0µA IGATE = 0µA 13 12 4 10 ∆V (V)GATE 12 IGATE = –1µA ∆V (V)GATE 86 IGATE = 1µA V (V)TMR 3 11 4 2 2 VCC = SNS = OUT 10 0 1 –50 –25 0 25 50 75 100 125 0 4 8 12 16 20 60 70 80 0 10 20 30 40 50 60 70 80 TEMPERATURE (°C) VCC (V) VCC (V) 4363 G10 4363 G11 4363 G12 Overvoltage TMR Current vs Overcurrent TMR Current vs Warning Period TMR Current (V – V ) (V – V ) vs V CC OUT CC OUT CC –50 –260 –7 TMR = 1V TMR = 1V ∆VDS = 0.5V –220 –40 –6 A) A)–160 A) (µV)–30 (µC) (µW) –5 MR(UP,O–20 MR(UP,O–120 MR(OV,E –4 IT IT –80 IT –10 –3 –40 0 0 –2 0 10 20 30 40 50 60 70 80 0 10 20 30 40 50 60 70 80 0 10 20 30 40 50 60 70 80 VCC – VOUT (V) VCC – VOUT (V) VCC (V) 4363 G13 4363 G14 4363 G15 TMR Pull-Down Current vs TMR Pull-Up Current (Cool Down) Temperature vs Temperature Output Low Voltage vs Current 2.4 –3.0 6 TMR = 1V TMR = 3V OUT = SNS = 3V 2.0 –2.5 5 1.6 A) –2.0 4 I (µA)TMR(DN) 10..28 (µTMR(UP,COOL)––11..50 V (V)OL 32 I 0.4 –0.5 1 0 0 0 –50 –25 0 25 50 75 100 125 –50 –25 0 25 50 75 100 125 0 0.5 1.0 1.5 2.0 2.5 3.0 TEMPERATURE (°C) TEMPERATURE (°C) ISINK (mA) 4363 G16 4363 G17 4363 G18 4363fb 6 For more information www.linear.com/LT4363

LT4363 Typical perForMance characTerisTics Specifications are at V = 12V, T = 25°C, unless CC A otherwise noted. Overvoltage Turn-Off Time vs Overcurrent Turn-Off Time vs Temperature Temperature 350 1.4 300 1.2 OUT = 0V 250 1.0 ∆VSNS = 150mV s) s) n 200 µ 0.8 (V) (C) OUT = 3V O O OFF( 150 OFF( 0.6 ∆VSNS = 300mV t t 100 0.4 50 0.2 0 0 –50 –25 0 25 50 75 100 125 –50 –25 0 25 50 75 100 125 TEMPERATURE (°C) TEMPERATURE (°C) 4363 G19 4363 G20 Reverse Current vs Reverse Current Limit Foldback Voltage (ΔV vs OUT) SNS –7 60 VCC = SHDN –6 50 –5 40 mA) –4 mV) I (GND –3 ∆V (SNS30 20 –2 –1 10 0 0 0 –10 –20 –30 –40 –50 –60 –70 –80 0 1 2 3 4 5 VCC (V) OUT (V) 4363 G21 4363 G22 4363fb 7 For more information www.linear.com/LT4363

LT4363 pin FuncTions ENOUT: Open Collector Enable Output. The ENOUT pin goes below the threshold of 0.4V. Pull this pin above 2.1V or high impedance when the voltage at the OUT pin is within disconnect it to allow the internal current source to turn 0.5V of V and 3V above GND, indicating the external the part back on. The leakage current to ground at the CC MOSFET is fully on. The state of the pin is latched until the pin should be limited to no more than 1µA if no external OUT pin voltage drops below 2V, resetting the latch. The pull up is used to turn the part on. The SHDN pin can be internal NPN is capable of sinking up to 2mA of current. pulled up to 100V or below GND by 60V without damage. Exposed Pad (DFN Package Only): Exposed pad may be SNS: Current Sense Input. Connect this pin to the input of left open or connected to device ground (GND). the current sense resistor. The current limit circuit controls the GATE pin to limit the sense voltage between SNS and FB: Voltage Regulator Feedback Input. Connect this pin to OUT pins to 50mV. This is reduced to 25mV in a severe the center tap of the resistive divider connected between fault when OUT is below 2V. When in current limit mode, the OUT pin and ground. During an overvoltage condition, a current source charges up the TMR pin. The voltage the GATE pin is controlled to maintain a 1.275V threshold difference with the OUT pin must be limited to less than at the FB pin. Connect to GND to disable the OV clamp. 30V. Connect to OUT pin if unused. FLT: Open Collector Fault Output. This pin pulls low after TMR: Fault Timer Input. Connect a capacitor between this the voltage at the TMR pin has reached the fault threshold pin and ground to set the times for early fault warning, of 1.275V. It indicates the pass transistor is about to turn off fault turn-off, and cool down periods. The current charg- because either the supply voltage has stayed at an elevated ing up this pin during fault conditions depends on the level for an extended period of time (voltage fault) or the voltage difference between the V and OUT pins. When device is in an overcurrent condition (current fault). The CC TMR reaches 1.275V, the FLT pin pulls low to indicate the internal NPN is capable of sinking up to 2mA of current. detection of a fault condition. If the condition persists, the GATE: N-Channel MOSFET Gate Drive Output. The GATE pin pass transistor turns off when TMR reaches the threshold is pulled up by an internal charge pump current source to of 1.375V. A 2µA current source then continues to pull the 13V above the OUT pin. A 14V protection clamp limits this TMR up. When TMR reaches 4.3V, the 2µA current reverses voltage during faults. Both voltage and current amplifiers direction and starts to pull the TMR pin low. When TMR control the GATE pin to regulate the output voltage and reaches the retry threshold of 0.5V, the GATE pin pulls limit the current through the MOSFET. high turning back on the pass transistor for the LT4363-2 version. The GATE pin latches low after fault time out for GND: Device Ground. the LT4363-1. A minimum of 10nF capacitor is needed to OUT: Output Voltage Sense Input. This pin senses the compensate the loop. voltage at the source of the external N-channel MOSFET. UV: Undervoltage Comparator Input. When UV falls below The voltage difference between V and OUT sets the fault CC its threshold of 1.275V, the GATE is pulled down with a timer current. When this difference drops below 0.5V, the 1mA current. When UV rises above 1.275V plus the hys- EN pin goes high impedance. teresis, the pull down current disappears and the GATE OV (LT4363-2): Overvoltage Comparator Input. When OV pin is pulled up by the internal charge pump. If unused, is above its threshold of 1.275V, the fault retry function connect to V . CC is inhibited even when the TMR pin voltage has reached V : Positive Supply Voltage Input. The positive supply its retry threshold. As soon as the voltage at OV pin falls CC input ranges from 4V to 80V for normal operation. It can below its lower threshold the GATE pin is allowed to turn also be pulled below ground by up to 60V during a reverse back on. Connect to GND if unused. battery condition, without damaging the part. Shutting SHDN: Shutdown Control Input. The LT4363 can be down the LT4363 by pulling the SHDN pin to ground will shutdown to a low current mode by pulling the SHDN pin reduce the supply current to 7µA. 4363fb 8 For more information www.linear.com/LT4363

LT4363 block DiagraM VCC GATE 14V SNS OUT CHARGE PUMP 50mV/ + FB 25mV – + + – VA – 1.275V IA SHDN FLT UV – SHDN UV ENOUT + CONTROL 1.275V LOGIC + RETRY – GATEOFF FLT OV (LT4363-2 ONLY) 1.375V – VCC + + – ITMR 0.5V + 2µA 1.275V – + 4.3V – TMR GND 4363 BD 4363fb 9 For more information www.linear.com/LT4363

LT4363 operaTion Some power systems must cope with high voltage surges sufficient time for TMR to discharge to 0.5V and for the of short duration such as those in vehicles. Load circuitry MOSFET to cool before attempting to reset the part. To must be protected from these transients, yet high availability reset, pull the SHDN pin low for at least 100µs, then pull systems must continue operating during these events. high with a slew rate of at least 10V/ms. The LT4363 is an overvoltage protection regulator that The fault timer allows the load to continue functioning drives an external N-channel MOSFET as the pass transis- during short transient events while protecting the MOSFET tor. It operates from a wide supply voltage range of 4V to from being damaged by a long period of supply overvolt- 80V. It can also be pulled below ground potential by up age, such as a load dump in vehicles. The timer period to 60V without damage. The low power supply require- varies with the voltage across the MOSFET. A higher volt- ment of 4V allows it to operate even during cold cranking age corresponds to a shorter fault timer period, helping conditions in automotive applications. The internal charge to keep the MOSFET within its safe operating area (SOA). pump turns on the N-channel MOSFET to supply current The LT4363 senses an overcurrent condition by monitor- to the loads with very little power loss. Two MOSFETs can ing the voltage across an optional sense resistor placed be connected back to back to replace an inline Schottky between the SNS and OUT pins. An active current limit diode for reverse input protection. This improves the ef- circuit (IA) controls the GATE pin to limit the sense volt- ficiency and increases the available supply voltage level age to 50mV, if the OUT pin potential is above 2V. In the to the load circuitry during cold crank. case of a severe output short that brings OUT below 2V, Normally, the pass transistor is fully on, powering the loads the servo sense voltage is reduced to 25mV to reduce with very little voltage drop. When the supply voltage surges the stress on the pass transistor. During current limit, the too high, the voltage amplifier (VA) controls the gate of the current charging the TMR capacitor is about 5 times the MOSFET and regulates the voltage at the OUT pin to a level current during an overvoltage event. The FLT pin pulls low that is set by the external resistive divider from the OUT when the TMR voltage reaches 1.275V and the MOSFET pin to ground and the internal 1.275V reference. A current is turned off when it reaches 1.375V. The MOSFET turns source starts charging up the capacitor connected at the back on and the FLT pin returns to a high impedance state TMR pin to ground. If the TMR voltage reaches 1.275V, after TMR has reached the 0.5V threshold for the LT4363-2 the FLT pin pulls low to indicate impending turn-off due version. For the latch-off version, LT4363-1, both the GATE to the overvoltage condition. The pass transistor stays on and FLT pins remain low even after TMR has reached until TMR reaches 1.375V, at which point the GATE pin the 0.5V threshold. Reset the part in the same way as in pulls low turning off the MOSFET. overvoltage time-out case. A current continues to pull the TMR pin up until it reaches An accurate undervoltage comparator keeps the GATE about 4.3V, at which point the current reverses direction pin low until the voltage at the UV pin is above the and pulls the TMR pin down. For the LT4363-2 version, 1.275V threshold. An overvoltage comparator prevents when the voltage at the TMR pin reaches 0.5V the GATE the MOSFET from turning on after fault time-out while pin begins rising, turning on the MOSFET. The FLT pin will the voltage at the OV pin is still above 1.275V for the then return to a high impedance state. For the latch-off LT4363-2. The SHDN pin turns off the pass transistor version, LT4363-1, both the GATE and FLT pins remain and all the internal circuitry, reducing the supply current low even after TMR has reached the 0.5V threshold. Allow to a mere 7µA. 4363fb 10 For more information www.linear.com/LT4363

LT4363 applicaTions inForMaTion The LT4363 limits the voltage and current delivered to the conditions. In the presence of a fault the timer first charges load during supply transient or output overload events. The to 1.275V, and then enters the early warning phase of total fault timer period is set to ride through short-duration operation. At this point the FLT pin pulls low and after faults, while longer events cause the output to shut off charging to 1.375V, the timer shuts off the MOSFET. The and protect the MOSFET pass device from damage. The warning phase is indicated by FLT low and gives time for MOSFET provides a low resistance path from the input to the load to perform house-keeping chores such as data the load during normal operation, while in fault conditions storage in anticipation of impending power loss. After it operates as a series regulator. faulting off, the timer enters the cool down phase. At the end of the cool down period the LT4363-1 remains off until Overvoltage Fault reset, while the LT4363-2 automatically restarts. For the LT4363-2 retry is inhibited if the OV pin is greater than The LT4363 limits the voltage at the output during an 1.275V. This prevents motorboating in the event there is overvoltage at the input. An internal amplifier regulates a sustained input overvoltage condition. the GATE pin to maintain 1.275V at the FB pin. During this interval the MOSFET is on and supplies current to Fault Timer Operation in Overvoltage the load. This allows uninterrupted operation during short overvoltage events. If the overvoltage condition persists, In the presence of an overvoltage condition when the the timer causes the MOSFET to turn off. LT4363 regulates the output voltage, the timer charges from 0.5V to 1.275V with a current that varies as a func- Overcurrent Fault tion of V (see Figure 1). V is inferred from the drop DS DS across V and OUT. The timer current increases linearly The LT4363 features and adjustable current limit that pro- CC from around 4µA with V ≤ 0.5V, to 50µA with V = 75V. tects against output short circuits or excessive load current. DS DS Because V is measured indirectly, clamping or filtering During an overcurrent event, the GATE pin is regulated to DS at the V pin affects the timer current response. A graph limit the current sense voltage across the SNS and OUT CC of Overvoltage TMR Current vs (V – V ) is shown in pins to 50mV. In the case of a severe short at the output, CC OUT the Typical Performance Characteristics. where OUT is less than 2V, the current sense voltage is reduced to 25mV to further reduce power dissipation in When TMR reaches 1.275V, the FLT pin is latched low as the MOSFET. If the overcurrent condition persists, the an early warning of impending shutdown. The timer cur- timer causes the MOSFET to turn off. rent is cut to a fixed value of 6µA and continues to run until TMR reaches 1.375V, producing a fixed early warning Fault Timer Overview period given by: Overvoltage and overcurrent conditions are limited in 6µA C =t • duration by an adjustable timer. A capacitor at the TMR pin TMR WARNING 100mV sets the delay time before a fault condition is reported at the FLT pin as well as the overall delay before the MOSFET When TMR reaches 1.375V, the MOSFET is turned off and is turned off. The same capacitor also sets the cool down allowed to cool for an extended period. The total elapsed time before the MOSFET is allowed to turn back on. time between the onset of output regulation and turn-off is given by: When either an overvoltage or overcurrent fault condition occurs, a current source charges the TMR pin capacitor. 0.775V 100mV The exact current level varies as a function of the type of tREG=CTMR• I + 6µA  fault and the V voltage drop across the MOSFET. This TMR DS scheme takes better advantage of the MOSFET’s available Because I is a function of V – V , the exact time in TMR CC OUT Safe Operating Area (SOA) than would a fixed timer current. regulation depends upon the input waveform and the time The TMR pin is biased to 0.5V under normal operating required for the output voltage to come into regulation. 4363fb 11 For more information www.linear.com/LT4363

LT4363 applicaTions inForMaTion Fault Timer Operation in Overcurrent When TMR reaches 1.275V, the FLT pin is latched low as an early warning of impending shutdown. But unlike the TMR pin behavior in overcurrent is substantially the same overvoltage case, the timer current is not reduced and as in overvoltage. In the presence of an overcurrent con- instead continues unabated until TMR reaches 1.375V, dition when the LT4363 regulates the output current, the producing an early warning period given by: timer charges from 0.5V to 1.275V with a current that varies as a function of V (see Figure 2). The current is I DS C =t • TMR about 5 times the value produced in overvoltage, under TMR WARNING 100mV similar conditions V , increasing linearly from 8µA with DS V < 0.5V to 260µA with V = 80V. V is inferred from When TMR reaches 1.375V, the MOSFET is turned off and DS DS DS the drop across V and OUT. Because V is measured allowed to cool for an extended period. The total elapsed CC DS indirectly, clamping or filtering at the V pin affects the time between the onset of current limiting and turn-off CC timer current response. A graph of Overcurrent TMR Cur- is given by: rent vs (V – V ) is shown in the Typical Performance CC OUT 0.875V Characteristics. tLIM=CTMR• I TMR VTMR(V) Because I is a function of V – V , the exact time ITMR = 6µA ITMR = 6µA TMR CC OUT in current limit depends upon the input waveform and the 1.375 time required for the output current to come into regulation. 1.275 VDS = 75V (ITMR = 50µA) Cool Down Phase VDS = 10V (ITMR = 8µA) Cool Down behavior is the same whether initiated by overvoltage or overcurrent. During the cool down phase, the timer continues to charge from 1.375V to 4.3V with 0.50 TIME 2µA, and then discharges back down to 0.5V with 2µA, tFLT tWARNING = 15.5ms/µF = 16.67ms/µF for a total equivalent voltage swing of 6.725V. The cool tFLT = 96.9ms/µF tWARNING down time is given by: = 16.67ms/µF TOTAL FAULT TIMER = tFLT + tWARNING 4363 F01 2.925V+3.8V t =C • Figure 1. Overvoltage Fault Timer Current COOL TMR 2µA VTMR(V) Up to this point the operation of the LT4363-1 and LT4363-2 is the same. Behavior at the end of the cool down phase 1.375 and in response to the SHDN pin is entirely different. 1.275 VDS = 80V At the end of the cool down phase the LT4363-1 remains (ITMR = 260µA) (ITVMDRS == 3150µVA) latched off and FLT remains low. It may be restarted by pulling the SHDN pin low for at least 100µs or by cycling power. The cool down phase may be interrupted at any- time by pulling SHDN low for at least 1s/µF of C ; the TMR 0.50 TIME tWARNING LT4363-1 will restart when SHDN goes high. tFLT = 0.38ms/µF = 2.98ms/µF The LT4363-2 will automatically retry at the end of the tFLT = 22.14ms/µF TOTAL FAULT TIMER = tFLT + tWARNING = t2W.8A6RmNIsN/GµF 4363 F02 c1o.2o7l 5dVo;w tnh ips hparseev.e Rnetstr rye ipse itnithivibei treedtr iife sth we hOiVle pthine i sin apbuot vies Figure 2. Overcurrent Fault Timer Current held in a sustained overvoltage condition. Retry is auto- 4363fb 12 For more information www.linear.com/LT4363

LT4363 applicaTions inForMaTion matically initiated once the OV pin falls below 1.268V. OV dissipating very little power. But during either overvolt- has no effect on initial start-up when power is first applied age or overcurrent faults, the GATE pin is controlled to and upon exiting shutdown. The cool down phase may regulate either the output voltage or the current through be interrupted in the LT4363-2 by pulling SHDN low for the MOSFET. Large current and high voltage drop across at least 1s/µF of C . the MOSFET can coexist in these cases. The SOA curves TMR of the MOSFET must be considered carefully along with For both the LT4363-1 and LT4363-2 the FLT pin goes the selection of the fault timer capacitor. high in shutdown and is cleared high when power is first applied to V . If FLT is set low, it can be reset during the CC Transient Stress in the MOSFET cool down phase by pulling SHDN low for at least 1s/µF of C . During an overvoltage event, the LT4363 drives a series TMR pass MOSFET to regulate the output voltage at an acceptable Intermittent Fault Conditions level. The load circuitry may continue operating throughout this interval, but only at the expense of dissipation in the Brief overvoltage or overcurrent conditions interrupt the MOSFET pass device. MOSFET dissipation or stress is a operation of the timer. If the TMR pin has not yet reached function of the input voltage waveform, regulation voltage 1.275V when the input falls below the regulation value and load current. The MOSFET must be sized to survive or drops out of current limit, the timer capacitor is dis- this stress. charged back to 0.5V with a 2µA current sink. If the TMR voltage crosses 1.275V FLT is set low. If the overvoltage Most transient event specifications use the prototypi- or overcurrent abates before reaching 1.375V, the timer cal waveshape shown in Figure 3, comprising a linear capacitor discharges with 2µA back to 0.5V, whereupon ramp of rise time t, reaching a peak voltage of V and r PK FLT resets high. If several short overvoltage or overcurrent exponentially decaying back to V with a time constant IN events occur in rapid succession, the timer capacitor will of τ. A common automotive transient specification has integrate the charging and discharging currents. constants of t  = 10µs, V = 80V and τ = 1ms. A surge r PK condition known as load dump commonly has constants MOSFET Selection of t = 5ms, V = 60V and τ = 200ms. r PK The LT4363 drives an N-channel MOSFET to conduct the MOSFET stress is the result of power dissipated within load current. The important features of the MOSFET are the device. For long duration surges of 100ms or more, on-resistance RDS(ON), the maximum drain-source voltage stress is increasingly dominated by heat transfer; this is V(BR)DSS, the threshold voltage, and the SOA. a matter of device packaging and mounting, and heat sink thermal mass. This is best analyzed by simulation, using The maximum allowable drain-source voltage must be the MOSFET thermal model. higher than the supply voltage. If the output is shorted to ground or during an overvoltage event, the full supply For short duration transients of less than 100ms, MOSFET voltage will appear across the MOSFET. survival is increasingly a matter of safe operating area The gate drive for the MOSFET is guaranteed to be more VPK than 10V and less than 16V for those applications with V CC higher than 9V. This allows the use of standard threshold τ voltage N-channel MOSFETs. For systems with V less CC than 9V, a logic level MOSFET is required since the gate drive can be as low as 4.5V. VIN The SOA of the MOSFET must encompass all fault condi- tions. In normal operation the pass transistor is fully on, tr 4363 F03 Figure 3. Prototypical Transient Waveform 4363fb 13 For more information www.linear.com/LT4363

LT4363 applicaTions inForMaTion (SOA), an intrinsic property of the MOSFET. SOA quanti- Let fies the time required at any given condition of V and DS a = V – V I to raise the junction temperature of the MOSFET to its REG IN D rated maximum. MOSFET SOA is expressed in units of b = V – V PK IN watt-squared-seconds (P2t). This figure is essentially con- (V = Nominal Input Voltage) IN stant for intervals of less than 100ms for any given device Then type, and rises to infinity under DC operating conditions. Destruction mechanisms other than bulk die temperature P2t = I 2• distort the lines of an accurately drawn SOA graph so that LOAD P2t is not the same for all combinations of ID and VDS. 1 (b–a)3 1  2 b 2 2  In particular P2t tends to degrade as VDS approaches the 3tr b +2τ2a lna+3a +b -4ab    maximum rating, rendering some devices useless for absorbing energy above a certain voltage. Typically V ≈ V and τ » t simplifying the above to REG IN r When a fast input voltage step occurs, the current through the pass transistor to supply the load and charge up the out- P2t=1I 2(V –V )2τ [W2s] LOAD PK REG put capacitor can be high enough to trigger an overcurrent 2 event. The gate pulls low to 1V above the OUT pin, turning For the transient conditions of V = 80V, V = 12V, PK IN off the MOSFET momentarily. The internal charge pump V = 16V, t = 10µs and τ = 1ms, and a load current REG r will then start to pull the GATE pin high and turn on the of 3A, P2t is 18.4W2s – easily handled by a MOSFET in MOSFET to support the load current and charge up the a DPAK package. The P2t of other transient waveshapes OUT pin. The fault timer may not start yet because the is evaluated by integrating the square of MOSFET power current level is below the overcurrent limit threshold and over time. LTSpice can be used to simulate timer behavior the output voltage has not reached the servo voltage. This for more complex transients and cases where overvoltage extra stress needs to be included in calculating the overall and overcurrent faults coexist. stress level of the MOSFET. Calculating Short-Circuit Stress Calculating Transient Stress SOA stress must also be calculated for short-circuit condi- To select a MOSFET suitable for any given application, the tions. Short-circuit P2t is given by: SOA stress must be calculated for each input transient which shall not interrupt operation. It is then a simple matter 2 to choose a device which has adequate SOA to survive the P2t=∆VDS•∆VSNS •tTMR [W2s]  R  maximum calculated stress. P2t for a prototypical transient SNS waveform is calculated as follows (Figure 4): Where ∆V is the voltage across the MOSFET, and ∆V DS SNS is the SNS pin threshold, and t is the overcurrent timer TMR VPK interval. τ For V = 15V, ∆V = 13V (V = 2V), ∆V = 50mV, IN DS OUT SNS R = 12mΩ and C = 100nF, P2t is 6.3W2s – less SNS TMR than the transient SOA calculated in the previous example. VREG VIN Nevertheless, to account for circuit tolerances this figure tr should be doubled to 12.6W2s. 4363 F04 Figure 4. Safe Operating Area Required to Survive Prototypical Transient Waveform 4363fb 14 For more information www.linear.com/LT4363

LT4363 applicaTions inForMaTion Limiting Inrush Current and GATE Pin Compensation threshold during a fault. The pass transistor is not allowed to turn back on even after the cool down period has finished. The LT4363 limits the inrush current to any load capacitance This prevents the pass transistor from cycling between ON by controlling the GATE pin voltage slew rate. An external and OFF states when the input voltage stays at an elevated capacitor can be connected from GATE to ground to reduce level for a long period of time, reducing the stress on the the inrush current at the expense of slower turn-off time. N-channel MOSFET. For the latch-off version, LT4363-1, The gate capacitor is set at: the overvoltage comparator function is not available. I GATE(UP) C1= •C L Reverse Input Protection I INRUSH A blocking diode is commonly employed to protect the The LT4363 does not need extra compensation compo- load when reverse input is possible, such as in automo- nents at the GATE pin for stability during an overvoltage or tive applications. This diode causes extra power loss, overcurrent event. With transient input voltage slew rates generates heat, and reduces the available supply voltage faster than 5V/µs, a gate capacitor, C1, to ground is needed range. During cold crank, the extra voltage drop across to prevent self enhancement of the N-channel MOSFET. the diode is particularly undesirable. The extra gate capacitance slows down the turn off time The LT4363 is designed to withstand reverse voltage with- during fault conditions and may allow excessive current out damage to itself. The V , SHDN, UV, and OV pins can CC during an output short event. An extra resistor, R1, in series withstand up to 60V of DC voltage below the GND potential. with the gate capacitor can improve the turn off time. A Back-to-back MOSFETs must be used to block the current diode, D1, should be placed across R1 with the cathode path through Q1’s body diode (Figure 6). Figure 7 shows connected to C1 as shown in Figure 5. the approach with a P-channel MOSFET in place of Q2. Q1 Q2 Q1 RSNS D1 VIN IRLR2908 IRLR2908 10mΩ VOUT 1N4148W 12V 12V, 3A CLAMPED D1* R3 SMAJ58CA Q3 R4 R5 R3 AT 16V R1 2N3904 10Ω 1M 10Ω C1 R1 GATE 57.6k D2 R7 C1 1N4148 10k 47nF LT4363 4 3 2 4363 F05 GATE SNS OUT 5 1 VCC FB Figure 5. External GATE network R2 4.99k Undervoltage/Overvoltage Comparators LT4363DE-2 The LT4363 has both undervoltage and overvoltage com- 6 SHDN parators that can be used to sense the input supply volt- 8 11 UV ENOUT age. When the voltage at the UV pin is below the 1.275V 7 10 OV GND TMR FLT threshold, the GATE pin is held low to keep the external 9 12 4363 F06 MOSFET off. The supply voltage at the V pin should be *DIODES INC. CTMR CC 0.1µF at least 4V for the UV comparator to function. Figure 6. Overvoltage Regulator with N-channel MOSFET The overvoltage comparator prevents the LT4363-2 from Reverse Input Protection restarting if the voltage at the OV pin is above the 1.275V 4363fb 15 For more information www.linear.com/LT4363

LT4363 applicaTions inForMaTion Q2 Q1 RSNS Q1 RSNS 1V2IVN SI7461DP IRLR2908 10mΩ V12OVU,T 3A VIN FDB33N25 10mΩ VOUT D2 CLAMPED CL** SMAJ58DC1A* 11N5V5245 R103Ω AT 16V R7 4C71nF R103Ω 22µF R7 R1 1k 10k C1 57.6k 47nF 4 3 2 C2 5 4 3 2 R1010k 5 VCC GATE SNS OUFTB 1 0.1µF VCC GATE SNS OUFTB 1 R2 D1* R2 4.99k SMAJ58A 4.99k LT4363DE-2 6 SHDN VCC R4 LT4363DE-2 6 DC/DC SHDN 374k 8 CONVERTER 8 11 UV UV ENOUT R5 ENOUT 11 SHDN 7 10 90.9k OV GND TMR FLT 7 OV GND TMR FLT 10 FAULT *DIODES INC. 9 12C0.T1MµRF 4363 F07 1R06k 9 12CTMR4363 F08 GND 47nF *DIODES INC. **SANYO 25CE22GA Figure 7. Overvoltage Regulator with P-channel MOSFET Figure 8. Overvoltage Regulator with Input Voltage Detection Reverse Input Protection Another way to limit transients above 100V at the V Shutdown CC pin is to use a Zener diode and a resistor, D1 and R7 in The LT4363 can be shut down to a low current mode when Figure 8. The Zener diode limits the voltage at the pin while the voltage at the SHDN pin is pulled below the shutdown the resistor limits the current through the diode to a safe threshold of 0.4V. The quiescent current drops down to level during the surge. However, D1 can be omitted if the 7µA with internal circuitry turned off. filtered voltage, due to R7 and C1, at the V pin is below CC 100V. The inclusion of R7 in series with the V pin will The SHDN pin can be pulled up to 100V or below GND by CC increase the minimum required voltage at V due to the up to 60V without damage. Leaving the pin open allows IN extra voltage drop across it. This voltage drop is due to the an internal current source to pull it up and turn on the part supply current of the LT4363 and the leakage current of D1. while clamping the pin to 2.2V. The leakage current at the pin should be limited to no more than 1µA if no pull up A total bulk capacitance of at least 22µF low ESR electro- device is used to help turn it on. lytic is required close to the source pin of MOSFET Q1. In addition, the bulk capacitance should be at least 10 times Supply Transient Protection larger than the total ceramic bypassing capacitor on the input of the DC/DC converter. The LT4363 is tested to operate to 80V and guaranteed to be safe from damage up to 100V. Nevertheless, voltage Layout Considerations transients above 100V may cause permanent damage. During a short-circuit condition, the large change in cur- To achieve accurate current sensing, Kelvin connection rent flowing through power supply traces and associated to the current sense resistor (R in Figure 8) is recom- SNS wiring can cause inductive voltage transients which could mended. The minimum trace width for 1 oz copper foil is exceed 100V. To minimize the voltage transients, the power 0.02" per amp to ensure the trace stays at a reasonable trace parasitic inductance should be minimized by using temperature. 0.03" per amp or wider is recommended. wide traces. A small RC filter, in Figure 8, at the V pin Note that 1oz copper exhibits a sheet resistance of about CC will clamp the voltage spikes. 530µΩ/square. Small resistances can cause large errors in high current applications. Noise immunity will be improved 4363fb 16 For more information www.linear.com/LT4363

LT4363 applicaTions inForMaTion significantly by locating resistive dividers close to the pins Choose 4.99kΩ for R2. with short V and GND traces. CC (27V–1.275V)•R2 R1= =100.7kΩ Design Example 1.275V As a design example, take an application with the follow- The nearest standard value for R1 is 100kΩ. ing specifications: V = 8V to 14V DC with a transient of CC Next calculate the sense resistor, R , value: 150V and decay time constant (τ) of 400ms, V ≤ 27V, SNS OUT current limit (I ) at 5A, low battery detection of 6V, input 50mV 50mV LIM R = = =10mΩ overvoltage level at 60V, and 1ms of overvoltage early SNS I 5A LIM warning (Figure 8). C is then chosen for 1ms of early warning time: Selection of SMAJ58A for D1 will limit the voltage at the TMR V pin to less than 71V during 150V surge. The minimum 1ms•6µA CC C = =60nF required voltage at the V pin is 4V when V is at 8V; TMR CC IN 100mV the supply current for LT4363 is 1.5mA. The maximum value for R7 to ensure proper operation is: The nearest standard value for C is 47nF. TMR 8V–4V Finally, calculate R4, R5, and R6 for 6V low battery detec- R7= =2.67kΩ tion and 60V input overvoltage level: 1.5mA R5+R6 Select 1kΩ for R7 to accommodate all conditions. 6V• =1.275V R4+R5+R6 The maximum current through R7 into D1 is then calcu- lated as: R6 60V• =1.275V 150V–64V R4+R5+R6 I = =86mA D1 1kΩ Choose 10kΩ for R6. which is easily handled by the SMAJ58A for more than 60V•10kΩ R4+R5= –10kΩ=460.6kΩ 500ms. 1.275V With 0.1µF of bypass capacitance, C2, along with 1k of 460.6kΩ+10kΩ R7, high voltage transients up to 200V with a pulse width R5=1.275V• –10kΩ=90kΩ 6V less than 10µs are filtered out at the V pin. CC Next, calculate the resistive divider value to limit V to R4 = 460.6kΩ – 90kΩ = 370.6kΩ OUT 27V during an overvoltage event: Select 90.9kΩ for R5 and 374kΩ for R4. 1.275V•(R1+R2) The pass transistor, Q1, should be chosen to withstand a V = =27V REG R2 short-circuit with VCC = 14V. In the case of a severe output short where V = 0V, the total overcurrent fault time is: OUT Set the current through R1 and R2 during the overvoltage condition to 250µA. 47nF•0.875V t = =0.904ms OC 45.5µA 1.275V R2= =5kΩ 250µA 4363fb 17 For more information www.linear.com/LT4363

LT4363 applicaTions inForMaTion The power dissipation in Q1 is: The power dissipation in Q1 is: 14V•25mV (14V–2V)•50mV P= =35W P= =60W 10mΩ 10mΩ During an output overload or soft short, the voltage at the These conditions are well within the Safe Operating Area OUT pin could stay at 2V or higher. The total overcurrent of the FDB33N25. fault time when V = 2V is: OUT 47nF•0.875V t = =1.028ms OC 40µA Typical applicaTions Overvoltage Regulator with Output Keep Alive During Shutdown Q1 RSNS R9 VIN IRLR2908 10mΩ 1k, 1W V12OVU,T 4A R7 CL** REGULATED 1k 22µF R3 AT 16V 10Ω C2 D1* D2 0.1µF SMAJ58A C1 1N4746A 47nF 18V R1 1W 5 4 3 2 287k VCC GATE SNS OUT 1 FB R2 24.9k 6 SHDN R4 LT4363DE-2 147k 8 UV R5 ENOUT 11 30.1k 7 10 UV = 6V OV GND TMR FLT OV = 24V R6 9 12 4363 TA02 *DIODES INC. 10k CTMR **SANYO 25CE22GA 0.1µF 4363fb 18 For more information www.linear.com/LT4363

LT4363 Typical applicaTions 2.5A, 48V Hot Swap with Overvoltage Output Regulation at 72V Q1 RSNS VIN FDB3632 15mΩ V48OVU,T 2.5A R7 CL 1k 300µF R3 10Ω C1 47nF R1 4 3 2 221k 5 GATE SNS OUT VCC 1 C2 D1* FB 0.1µF SMAT70A R2 4.02k 6 SHDN R4 LT4363DE-2 604k 8 UV R5 ENOUT 11 13k 7 10 OV GND TMR FLT R6 9 12 4363 TA03 UV = 35V 10k CTMR OV = 80V 0.1µF *DIODES INC. 2.5A, 28V Hot Swap with Overvoltage Output Regulation at 36V Q1 RSNS VIN IRLR2908 15mΩ VOUT 28V 28V, 2.5A R7 CL 1k 300µF R3 10Ω C1 47nF R1 4 3 2 110k 5 GATE SNS OUT VCC 1 C2 D1* FB 0.1µF SMAJ58A R2 4.02k 6 SHDN R4 LT4363DE-2 261k 8 UV R5 ENOUT 11 10k 7 10 OV GND TMR FLT R6 9 12 4363 TA04 UV = 18V 10k CTMR OV = 36V 0.1µF *DIODES INC. 4363fb 19 For more information www.linear.com/LT4363

LT4363 Typical applicaTions Overvoltage Regulator with Reverse Input Protection Up to –80V Q2 Q1 RSNS VIN IRLR2908 IRLR2908 10mΩ VOUT 12V 12V, 3A CL** CLAMPED 22µF R4 R3 AT 16V Q3 10Ω 10Ω 2N3904 D2 R5 R1 1N4148 1M C1 57.6k 47nF R7 10k D1* 5 4 3 2 D3** SMAJ58CA VCC GATE SNS OUT 1 1N4148 FB R2 4.99k 6 LT4363DE-2 SHDN 8 UV 11 ENOUT 7 10 OV GND TMR FLT *DIODES INC. 9 12 4363 TA05 **SANYO 25CE22GA CTMR ***OPTIONAL COMPONENT 0.1µF FOR REDUCED STANDBY CURRENT Overvoltage Regulator with 250V Surge Protection Q1 RSNS FDB33N25 10mΩ VIN OUTPUT 12V CLAMP R6 CL AT 16V 49.9k 22µF Q2 R3 MPS-A42 10Ω D1* SMAJ58A R1 C1 57.6k 47nF 5 4 3 2 C2 0.1µF R4 VCC GATE SNS OUT 127k 1 FB 6 SHDN R2 VCC 4.99k 8 DC/DC UV LT4363DE-2 CONVERTER R5 49.9k 11 ENOUT SHDN GND 7 10 OV FLT FAULT GND TMR 9 12 4363 TA07 CTMR 0.1µF *DIODES INC. 4363fb 20 For more information www.linear.com/LT4363

LT4363 package DescripTion Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. DE/UE Package 12-Lead Plastic DFN (4mm × 3mm) (Reference LTC DWG # 05-08-1695 Rev D) 0.70 ±0.05 3.30 ±0.05 3.60 ±0.05 2.20 ±0.05 1.70 ± 0.05 PACKAGE OUTLINE 0.25 ± 0.05 0.50 BSC 2.50 REF RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 4.00 ±0.10 R = 0.115 0.40 ± 0.10 (2 SIDES) TYP 7 12 R = 0.05 TYP 3.30 ±0.10 3.00 ±0.10 (2 SIDES) 1.70 ± 0.10 PIN 1 PIN 1 NOTCH TOP MARK R = 0.20 OR (NOTE 6) 0.35 × 45° CHAMFER 6 1 (UE12/DE12) DFN 0806 REV D 0.200 REF 0.75 ±0.05 0.25 ± 0.05 0.50 BSC 2.50 REF 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING PROPOSED TO BE A VARIATION OF VERSION (WGED) IN JEDEC PACKAGE OUTLINE M0-229 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 4363fb 21 For more information www.linear.com/LT4363

LT4363 package DescripTion Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. MS Package 12-Lead Plastic MSOP (Reference LTC DWG # 05-08-1668 Rev A) 4.039 ±0.102 (.159 ±.004) (NOTE 3) 0.406 ±0.076 121110 9 87 (.016 ±.003) REF DETAIL “A” 3.00 ±0.102 0.889 ±0.127 0.254 4.90 ±0.152 (.118 ±.004) (.035 ±.005) (.010) 0° – 6° TYP (.193 ±.006) (NOTE 4) GAUGE PLANE 0.53 ±0.152 5.10 3.20 – 3.45 (.021 ±.006) 1.10 1 2 3 4 5 6 0.86 (.201) MIN (.126 – .136) DETAIL “A” (.043) (.034) MAX REF 0.18 SEATING (.007) PLANE 0.42 ±0.038 0.65 (.0165 ±.0015) (.0256) 0.22 – 0.38 0.1016 ±0.0508 TYP BSC (.009T Y–P .015) 0.650 (.004 ±.002) RECOMMENDED SOLDER PAD LAYOUT (.0256) MSOP (MS12) 0213 REV A NOTE: BSC 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX S Package 16-Lead Plastic Small Outline (Narrow .150 Inch) (Reference LTC DWG # 05-08-1610 Rev G) .386 – .394 .045 ±.005 (9.804 – 10.008) .050 BSC NOTE 3 16 15 14 13 12 11 10 9 N N .245 MIN .160 ±.005 .150 – .157 .228 – .244 (3.810 – 3.988) (5.791 – 6.197) NOTE 3 1 2 3 N/2 N/2 .030 ±.005 TYP RECOMMENDED SOLDER PAD LAYOUT 1 2 3 4 5 6 7 8 .010 – .020 × 45° .053 – .069 (0.254 – 0.508) (1.346 – 1.752) .004 – .010 .008 – .010 (0.203 – 0.254) 0° – 8° TYP (0.101 – 0.254) .014 – .019 .050 .016 – .050 (0.355 – 0.483) (1.270) (0.406 – 1.270) TYP BSC S16 REV G 0212 NOTE: INCHES 1. DIMENSIONS IN (MILLIMETERS) 2. DRAWING NOT TO SCALE 3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm) 4. PIN 1 CAN BE BEVEL EDGE OR A DIMPLE 4363fb 22 For more information www.linear.com/LT4363

LT4363 revision hisTory REV DATE DESCRIPTION PAGE NUMBER A 3/12 Add 57.6k resistor to Typical Application 24 B 6/13 Added H and MP temperature grades to Order Information 3 Operating Voltage Range for all temperature grades is 4V to 80V 3 Reverse Input Current maximum changed to –4mA from –3mA 3 I : At 12V, changed from [–10, –20, –35]µA to [–15, –30, –45]µA. At 48V, changed from [–10, –25, –40]µA GATE(UP) to [–20, –40, –65]µA 3 Current Limit Sense Voltage: At 12V, improved from 43mV — 58mV to 45mV — 55mV. At 48V, improved from 45mV — 59mV to 48mV — 58mV 4 I maximum changed from 30µA to 40µA 4 SNS V range changed from 3.7V — 5V to 3.5V — 5.4V 4 TMR(H) OUT Reset Threshold minimum changed from 1.9V to 1.8V 4 Updated curves in graphs G05, G06 and G09 5 Corrected Y-axis numbers in Warning Period TMR Current, graph G15 6 Replaced Current Limit at Supply Voltage graph with Current Limit Foldback 7 GATE Pin Description: Added information on 14V protection clamp 8 TMR Pin Description: Added 10nF minimum capacitor requirement 8 Changed GATE to SNS clamp in Block Diagram to 14V from 13V 9 Added 0.1µF C2 to Typical Application circuits 18, 19 4363fb Information furnished by Linear Technology Corporation is believed to be accurate and reliable. 23 However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconnecFtoiorn m ofo itrse c iirncfuoitrsm asa tdieosnc rwibwedw h.elirneiena wr.icllo nmot /iLnTfr4in3g6e3 on existing patent rights.

LT4363 Typical applicaTion Overvoltage Regulator with Ideal Diode Reverse Voltage Protection M1 VIN FDB3632 IRLR2908 10mΩ OUTPUT 12V CLAMP 22µF AT 16V 10Ω IN GATE OUT LTC4357 VDD 47nF VCC GATE SNS OUT 57.6k FB DCLAMP GND SMAT70A SHDN 4.99k VCC D1 127k LT4363 DC/DC MMBD1205 CONVERTER –60V TO 75V DC PROTECTION UV 100V TRANSIENT MAXIMUM 49.9k ENOUT SHDN UV = 4.5V GND TMR FLT FAULT GND 4363 TA06 0.1µF relaTeD parTs PART NUMBER DESCRIPTION COMMENTS LTC1696 Overvoltage Protection Controller ThinSOT™ Package, 2.7V to 27V LTC2909 Triple/Dual Inputs UV/OV Negative Monitor Pin Selectable Input Polarity Allows Negative and OV Monitoring LTC2912/LTC2913 Single/Dual UV/OV Voltage Monitor Ads UV and OV Trip Values, ±1.5% Threshold Accuracy LTC2914 Quad UV/OV Monitor For Positive and Negative Supplies LTC3827/LTC3827-1 Low I , Dual, Synchronous Controller 4V ≤ V ≤ 36V, 0.8V ≤ V ≤ 10V, 80µA Quiescent Current Q IN OUT LTC3835/LTC3835-1 Low I , Synchronous Step-Down Controller Single Channel LTC3827/LTC3827-1 Q LT3845 Low I , Synchronous Step-Down Controller 4V ≤ V ≤ 60V, 1.23V ≤ V ≤ 36V, 120µA Quiescent Current Q IN OUT LT3850 Dual, 550kHz, 2-Phase Synchronous Step-Down Dual 180° Phased Controllers, VIN 4V to 24V, 97% Duty Cycle, 4mm × 4mm Controller QFN-28, SSOP-28 Packages LTC3890 Low I , Dual 2-Phase, Synchronous Step-Down 4V ≤ V ≤ 60V, 0.8V ≤ V ≤ 24V, 50µA Quiescent Current Q IN OUT Controller LT4256-1 Positive 48V Hot Swap Controller with Foldback Current Limiting, Open-Circuit and Overcurrent Fault Output, Up to 80V Open-Circuit Detect Supply LTC4260 Positive High Voltage Hot Swap Controller with Wide Operating Range 8.5V to 80V 8-Bit ADC and I2C LTC4352 Ideal MOSFET ORing Diode External N-Channel MOSFETs Replace ORing Diodes, 0V to 18V LTC4354 Negative Voltage Diode-OR Controller Controls Two N-Channel MOSFETs, 1µs Turn-Off, 80V Operation LTC4355 Positive Voltage Diode-OR Controller Controls Two N-Channel MOSFETs, 0.3µs Turn-Off, 80V Operation LT4356-1 High Voltage Surge Stopper 100V Overvoltage and Overcurrent Protection, Latch-Off and Auto-Retry Options LTC4364 Surge Stopper with Ideal Diode 4V to 80V Operation; –40V Reverse Input, –20V Reverse Output Protection LTC4365 Window Passer - OV, UV and Reverse Supply 2.5V to 34V Operation, Protects 60V to –40V Protection Controller 4363fb 24 Linear Technology Corporation LT 0613 REV B • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 For more information www.linear.com/LT4363 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com/LT4363  LINEAR TECHNOLOGY CORPORATION 2011

Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: A nalog Devices Inc.: LT4363IDE-2#PBF LT4363MPMS-1#PBF LT4363CMS-2#PBF LT4363IDE-2 LT4363HMS-2#TRPBF LT4363IMS- 1#TRPBF LT4363MPMS-2#TRPBF LT4363CS-1#TRPBF LT4363HMS-1#TRPBF LT4363IMS-2#PBF LT4363IDE- 2#TRPBF LT4363CMS-2#TRPBF LT4363CS-2#PBF LT4363CDE-1#PBF LT4363HDE-1#TRPBF LT4363MPMS- 1#TRPBF LT4363HS-1#TRPBF LT4363MPS-2#TRPBF LT4363HS-2#TRPBF LT4363IS-1#TRPBF LT4363CS- 2#TRPBF LT4363HS-1#PBF LT4363CDE-1#TRPBF LT4363IMS-2#TRPBF LT4363MPS-1#TRPBF LT4363CMS- 1#PBF LT4363HDE-2#PBF LT4363IDE-1#TRPBF LT4363CDE-2#PBF LT4363IDE-1#PBF LT4363MPS-2#PBF LT4363HDE-1#PBF LT4363MPMS-2#PBF LT4363IS-2#PBF LT4363HDE-2#TRPBF LT4363IMS-1#PBF LT4363CS- 1#PBF LT4363IS-2#TRPBF LT4363HMS-2#PBF LT4363CMS-1#TRPBF LT4363HMS-1#PBF LT4363CDE- 2#TRPBF LT4363MPS-1#PBF LT4363IS-1#PBF LT4363HS-2#PBF