LT4356-3 Surge Stopper with Fault Latchoff FeAtures Description n Stops High Voltage Surges The LT®4356-3 surge stopper protects loads from high n Adjustable Output Clamp Voltage voltage transients. It regulates the output during an n Overcurrent Protection overvoltage event, such as load dump in automobiles, n Wide Operation Range: 4V to 80V by controlling the gate of an external N-channel MOSFET. n Reverse Input Protection to –60V The output is limited to a safe value thereby allowing the n Low 7µA Shutdown Current loads to continue functioning. The LT4356-3 also monitors n Adjustable Latchoff Fault Timer the voltage drop between the V and SNS pins to protect CC n Controls N-channel MOSFET against overcurrent faults. An internal amplifier limits n Shutdown Pin Withstands –60V to 100V the current sense voltage to 50mV. In either fault condi- n Fault Output Indication tion, a timer is started inversely proportional to MOSFET n Auxiliary Amplifier for Level Detection Comparator or stress. If the timer expires, the FLT pin pulls low to warn Linear Regulator Controller of an impending power down. If the condition persists, n Available in (4mm × 3mm) 12-Pin DFN, the MOSFET is turned off, until the SHDN pin pulls low 10-Pin MSOP or 16-Pin SO Packages momentarily. The auxiliary amplifier may be used as a voltage detection ApplicAtions comparator or as a linear regulator controller driving an external PNP pass transistor. n Automotive/Avionic Surge Protection n Hot Swap/Live Insertion Back-to-back FETs can be used in lieu of a Schottky diode n High Side Switch for Battery Powered Systems for reverse input protection, reducing voltage drop and n Intrinsic Safety Applications power loss. The SHDN input turns off the part, including L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and the auxiliary amplifier, and reduces the quiescent current No RSENSE and ThinSOT are trademarks of Analog Devices, Inc. All other trademarks are the to less than 7µA. property of their respective owners. typicAl ApplicAtion 4A, 12V Overvoltage Output Regulator Overvoltage Protector Regulates Output at 27V During Transient VIN 10mΩ IRLR2908 VOUT 12V 80V INPUT SURGE CTMR = 6.8µF ILOAD = 500mA 10Ω 102k VIN VCC SNS GATE OUT 20V/DIV 383k FB SHDN 4.99k VCC 12V 27V ADJUSTABLE CLAMP IN+ LT4356DE-3 CONDVCE-DRCTER VOUT 20V/DIV 100k 12V EN SHDN GND UNDERVOLTAGE AOUT GND TMR FLT FAULT 100ms/DIV LT4356-3TA01b 43563 TA01 0.1µF 43563fc 1 For more information www.linear.com/LT4356-3

LT4356-3 Absolute mAximum rAtings (Notes 1 and 2) V , SHDN ................................................–60V to 100V LT4356H-3 .........................................–40°C to 125°C CC SNS .............................V – 30V or –60V to V + 0.3V LT4356MP-3 ......................................–55°C to 125°C CC CC OUT, A , FLT, EN .....................................–0.3V to 80V Storage Temperature Range OUT GATE (Note 3) .................................–0.3V to V + 10V DE12 ..................................................–65°C to 125°C OUT FB, TMR, IN+ ................................................–0.3V to 6V MS, SO ..............................................–65°C to 150°C A , EN, FLT, IN+ ..................................................–3mA Lead Temperature (Soldering, 10 sec) OUT Operating Temperature Range MS, SO .............................................................300°C LT4356C-3 ...............................................0°C to 70°C LT4356I-3 ............................................–40°C to 85°C pin conFigurAtion TOP VIEW TOP VIEW TMR 1 16 IN+ TMR 1 12 IN+ FB 2 15 NC TOP VIEW FB 2 11 AOUT FB 1 10 TMR NC 3 14 AOUT OUT 3 13 10 GND OUT 2 9 GND OUT 4 13 NC GATE 4 9 EN GATE 3 8 EN SNS 4 7 FLT GATE 5 12 GND SNS 5 8 FLT VCC 5 6 SHDN NC 6 11 EN VCC 6 7 SHDN MS PACKAGE SNS 7 10 FLT 10-LEAD PLASTIC MSOP DE PACKAGE TJMAX = 125°C, θJA = 160°C/W VCC 8 9 SHDN 12-LEAD (4mm × 3mm) PLASTIC DFN S PACKAGE EXPOSED PAD T(PJMINAX 1 =3 )1 P2C5°BC G, NθJDA C=O 4N3N°CE/CWT ION OPTIONAL 16-LEAD PLASTIC SO TJMAX = 150°C, θJA = 100°C/W orDer inFormAtion http://www.linear.com/product/LT4356-3#orderinfo LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LT4356CDE-3#PBF LT4356CDE-3#TRPBF 43563 12-Lead (4mm × 3mm) Plastic DFN 0°C to 70°C LT4356IDE-3#PBF LT4356IDE-3#TRPBF 43563 12-Lead (4mm × 3mm) Plastic DFN –40°C to 85°C LT4356HDE-3#PBF LT4356HDE-3#TRPBF 43563 12-Lead (4mm × 3mm) Plastic DFN –40°C to 125°C LT4356CMS-3#PBF LT4356CMS-3#TRPBF LTFFK 10-Lead Plastic MSOP 0°C to 70°C LT4356IMS-3#PBF LT4356IMS-3#TRPBF LTFFK 10-Lead Plastic MSOP –40°C to 85°C LT4356HMS-3#PBF LT4356HMS-3#TRPBF LTFFK 10-Lead Plastic MSOP –40°C to 125°C LT4356MPMS-3#PBF LT4356MPMS-3#TRPBF LTGGZ 10-Lead Plastic MSOP –55°C to 125°C LT4356CS-3#PBF LT4356CS-3#TRPBF LT4356S-3 16-Lead Plastic SO 0°C to 70°C LT4356IS-3#PBF LT4356IS-3#TRPBF LT4356S-3 16-Lead Plastic SO –40°C to 85°C LT4356HS-3#PBF LT4356HS-3#TRPBF LT4356S-3 16-Lead Plastic SO –40°C to 125°C LT4356MPS-3#PBF LT4356MPS-3#TRPBF LT4356MPS-3 16-Lead Plastic SO –55°C to 125°C LEAD BASED FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LT4356CDE-3 LT4356CDE-3#TR 43563 12-Lead (4mm × 3mm) Plastic DFN 0°C to 70°C LT4356IDE-3 LT4356IDE-3#TR 43563 12-Lead (4mm × 3mm) Plastic DFN –40°C to 85°C LT4356HDE-3 LT4356HDE-3#TR 43563 12-Lead (4mm × 3mm) Plastic DFN –40°C to 125°C 43563fc 2 For more information www.linear.com/LT4356-3

LT4356-3 orDer inFormAtion LEAD BASED FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LT4356CMS-3 LT4356CMS-3#TR LTFFK 10-Lead Plastic MSOP 0°C to 70°C LT4356IMS-3 LT4356IMS-3#TR LTFFK 10-Lead Plastic MSOP –40°C to 85°C LT4356HMS-3 LT4356HMS-3#TR LTFFK 10-Lead Plastic MSOP –40°C to 125°C LT4356MPMS-3 LT4356MPMS-3#TR LTGGZ 10-Lead Plastic MSOP –55°C to 125°C LT4356CS-3 LT4356CS-3#TR LT4356S-3 16-Lead Plastic SO 0°C to 70°C LT4356IS-3 LT4356IS-3#TR LT4356S-3 16-Lead Plastic SO –40°C to 85°C LT4356HS-3 LT4356HS-3#TR LT4356S-3 16-Lead Plastic SO –40°C to 125°C LT4356MPS-3 LT4356MPS-3#TR LT4356MPS-3 16-Lead Plastic SO –55°C to 125°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix. electricAl chArActeristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T = 25°C. V = 12V unless otherwise noted. A CC SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V Operating Voltage Range l 4 80 V CC I V Supply Current V = Float l 1 1.5 mA CC CC SHDN V = 0V, IN+ = 1.3V 7 25 µA SHDN LT4356C, LT4356I l 7 30 µA LT4356H, LT4356MP l 7 40 µA I Reverse Input Current V = V = –30V, SHDN Open l 0.3 1 mA R SNS CC V = V = V = –30V l 0.8 2 mA SNS CC SHDN ΔVGATE GATE Pin Output High Voltage VCC = 4V; (VGATE – VOUT) l 4.5 8 V 80V ≥ V ≥ 8V; (V – V ) l 10 16 V CC GATE OUT I GATE Pin Pull-Up Current V = 12V; V = 12V; LT4356C, LT4356I, LT4356H l –4 –23 –36 µA GATE(UP) GATE CC V = 12V; V = 12V; LT4356MP l –4 –23 –38 µA GATE CC V = 48V; V = 48V l –4.5 –30 –50 µA GATE CC I GATE Pin Pull-Down Current Overvoltage, V = 1.4V, V = 12V l 75 150 mA GATE(DN) FB GATE Overcurrent, V – V = 120mV, V = 12V l 4 10 mA CC SNS GATE Shutdown Mode, V = 0V, V = 12V l 1.5 5 mA SHDN GATE V FB Pin Servo Voltage V = 12V, V = 12V; LT4356C, LT4356I l 1.225 1.25 1.275 V FB GATE OUT V = 12V, V = 12V; LT4356H, LT4356MP l 1.215 1.25 1.275 V GATE OUT I FB Pin Input Current V = 1.25V l 0.3 1 µA FB FB ΔVSNS Overcurrent Fault Threshold ΔVSNS = (VCC – VSNS), VCC = 12V; LT4356C, LT4356I l 45 50 55 mV ΔVSNS = (VCC – VSNS), VCC = 12V; LT4356H l 42.5 50 55 mV ΔVSNS = (VCC – VSNS), VCC = 12V; LT4356MP l 42.5 50 56 mV ΔVSNS = (VCC – VSNS), VCC = 48V; LT4356C, LT4356I l 46 51 56 mV ΔVSNS = (VCC – VSNS), VCC = 48V; LT4356H l 43 51 56 mV ΔVSNS = (VCC – VSNS), VCC = 48V; LT4356MP l 43 51 57 mV I SNS Pin Input Current V = V = 12V to 48V l 5 10 22 µA SNS SNS CC I FLT, EN Pins Leakage Current FLT, EN = 80V l 2.5 µA LEAK A Pin Leakage Current A = 80V 4.5 µA OUT OUT I TMR Pin Pull-up Current V = 1V, V = 1.5V, (V – V ) = 0.5V l –1.5 –2.5 –4 µA TMR TMR FB CC OUT V = 1V, V = 1.5V, (V – V ) = 75V l –44 –50 –56 µA TMR FB CC OUT V = 1.3V, V = 1.5V, (V – V ) = 75V l –3.5 –5.5 –8.5 µA TMR FB CC OUT VTMR = 1V, ΔVSNS = 60mV, (VCC – VOUT) = 0.5V l –2.5 –4.5 –6.5 µA VTMR = 1V, ΔVSNS = 60mV, (VCC – VOUT) = 80V l –195 –260 –325 µA TMR Pin Pull-down Current VTMR = 1V, VFB = 1V, ΔVSNS = 0V l 1.5 2.2 2.7 µA V TMR Pin Thresholds FLT From High to Low, V = 5V to 80V l 1.22 1.25 1.28 V TMR CC 43563fc 3 For more information www.linear.com/LT4356-3

LT4356-3 electricAl chArActeristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T = 25°C. V = 12V unless otherwise noted. A CC SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS ΔVTMR Early Warning Period From FLT going Low to GATE going Low, VCC = 5V to 80V l 80 100 120 mV V + IN+ Pin Threshold l 1.22 1.25 1.28 V IN I + IN+ Pin Input Current V + = 1.25V l 0.3 1 µA IN IN V FLT, EN, A Pins Output Low I = 2mA l 2 8 V OL OUT SINK I = 0.1mA l 300 800 mV SINK I OUT Pin Input Current V = V = 12V; LT4356C, LT4356I, LT4356H l 200 300 µA OUT OUT CC V = V = 12V; LT4356MP l 200 310 µA OUT CC V = V = 12V, V = 0V l 6 14 mA OUT CC SHDN ΔVOUT OUT Pin High Threshold ΔVOUT = VCC – VOUT; EN From Low to High l 0.25 0.5 0.7 V V SHDN Pin Threshold V = 12V to 48V 0.6 1.4 1.7 V SHDN CC l 0.4 2.1 V V SHDN Pin Float Voltage V = 12V to 48V l 0.6 1.2 2.1 V SHDN(FLT) CC I SHDN Pin Current V = 0V l –1 –4 –8 µA SHDN SHDN tOFF(OC) Overcurrent Turn Off Delay Time GATE From High to Low, ΔVSNS = 0 → 120mV; LT4356C, LT4356I, LT4356H l 2 4 µs LT4356MP l 2 4.5 µs tOFF(OV) Overvoltage Turn Off Delay Time GATE From High to Low, VFB = 0 → 1.5V l 0.25 1 µs Note 1: Stresses beyond those listed under Absolute Maximum Ratings Note 3: An internal clamp limits the GATE pin to a minimum of 10V above may cause permanent damage to the device. Exposure to any Absolute the OUT pin. Driving this pin to voltages beyond the clamp may damage Maximum Rating condition for extended periods may affect device the device. reliability and lifetime. Note 2: All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to GND unless otherwise specified. typicAl perFormAnce chArActeristics Specifications are at V = 12V, T = 25°C unless otherwise noted. CC A I vs V I (Shutdown) vs V I (Shutdown) vs Temperature CC CC CC CC CC 1000 60 35 30 50 800 25 40 600 A) A) A) 20 (µC (µC 30 (µC IC400 IC IC 15 20 10 200 10 5 0 0 0 0 10 20 30 40 50 60 70 80 0 10 20 30 40 50 60 70 80 –50 –25 0 25 50 75 100 125 VCC (V) VCC (V) TEMPERATURE (°C) 43563 G02 43563 G01 43563 G03 43563fc 4 For more information www.linear.com/LT4356-3

LT4356-3 typicAl perFormAnce chArActeristics Specifications are at V = 12V, T = 25°C unless otherwise noted. CC A GATE Pull-Up Current vs SHDN Current vs Temperature GATE Pull-Up Current vs V Temperature CC 6 40 35 VSHDN = 0V VGATE = VOUT = 12V 5 35 30 30 25 4 25 I (µA)SHDN 3 I (µA)GATE 2105 I (µA)GATE 1250 2 10 10 1 5 5 0 0 0 –50 –25 0 25 50 75 100 125 0 10 20 30 40 50 60 70 80 –50 –25 0 25 50 75 100 125 TEMPERATURE (°C) VCC (V) TEMPERATURE (°C) 43563 G04 43563 G05 43563 G06 GATE Pull-Down Current vs GATE Pull-Down Current vs Temperature Temperature ΔVGATE vs IGATE 220 12 14 OVERVOLTAGE CONDITION OVERCURRENT CONDITION VOUT = 12V VFB = 1.5V ∆VSNS = 120mV 200 10 12 10 A)180 A) 8 m m (OWN)160 (OWN) 6 (V)ATE 8 GATE(D140 GATE(D 4 ∆VG 6 I I 4 120 2 2 100 0 0 –50 –25 0 25 50 75 100 125 –50 –25 0 25 50 75 100 125 0 2 4 6 8 10 12 14 16 TEMPERATURE (°C) TEMPERATURE (°C) IGATE (µA) 43563 G07 43563 G08 43563 G09 Overvoltage TMR Current vs ΔV vs Temperature ΔV vs V (V – V ) GATE GATE CC CC OUT 14 16 48 12 IGATE = –1µA VCC = 8V 14 TA = 130°C 40 OVVOTVMUETRR V== O 51LVVTAGE CONDITION 10 12 TA = –45°C 32 (V)ATE 8 (V)ATE180 TA = 25°C (µA)R 24 G G M ∆V 6 ∆V 6 IT VCC = 4V 16 4 4 8 2 2 IGATE = –1µA VOUT = VCC 0 0 0 –50 –25 0 25 50 75 100 125 0 10 20 30 40 50 60 70 80 0 10 20 30 40 50 60 70 80 TEMPERATURE (°C) VCC (V) VCC – VOUT (V) 43563 G10 43563 G11 43563 G12 43563fc 5 For more information www.linear.com/LT4356-3

LT4356-3 typicAl perFormAnce chArActeristics Specifications are at V = 12V, T = 25°C unless otherwise noted. CC A Overcurrent TMR Current vs Warning Period TMR Pull-Down Current vs (V – V ) TMR Current vs V Temperature CC OUT CC 280 14 3.0 OVERCURRENT CONDITION OVERVOLTAGE, EARLY VTMR = 1V VOUT = 0V WARNING PERIOD 240 VTMR = 1V 12 VFB = 1.5V 2.5 VTMR = 1.3V 200 10 2.0 A) 160 A) 8 A) (µR (µR (µR1.5 ITM120 ITM 6 ITM 1.0 80 4 0.5 40 2 0 0 0 0 10 20 30 40 50 60 70 80 0 10 20 30 40 50 60 70 80 –50 –25 0 25 50 75 100 125 VCC – VOUT (V) VCC (V) TEMPERATURE (°C) 43563 G13 43563 G14 43563 G15 Overvoltage Turn-Off Time vs Output Low Voltage vs Current Temperature 4.0 500 OVERVOLTAGE CONDITION 3.5 VFB = 1.5V AOUT 400 3.0 2.5 300 V (V)OL 2.0 FLT EN (ns)OFF t200 1.5 1.0 100 0.5 0 0 0 0.5 1.0 1.5 2.0 2.5 3.0 –50 –25 0 25 50 75 100 125 CURRENT (mA) TEMPERATURE (°C) 43563 G16 43563 G17 Overcurrent Turn-Off Time vs Reverse Current vs Reverse Temperature Voltage 4.0 –20 OVERCURRENT CONDITION VCC = SNS ∆VSNS = 120mV 3.5 –15 3.0 µs) mA) t (OFF 2.5 I (CC–10 2.0 –5 1.5 1.0 0 –50 –25 0 25 50 75 100 125 0 –20 –40 –60 –80 TEMPERATURE (°C) VCC (V) 43563 G18 43563 G19 43563fc 6 For more information www.linear.com/LT4356-3

LT4356-3 pin Functions A (DFN and SO Packages Only): Amplifier Output. OUT: Output Voltage Sense Input. This pin senses the OUT Open collector output of the auxiliary amplifier. It is capable voltage at the source of the N-channel MOSFET and sets of sinking up to 2mA from 80V. The negative input of the the fault timer current. When the OUT pin voltage reaches amplifier is internally connected to a 1.25V reference. 0.7V away from V , the EN pin goes high impedance. CC EN: Open-Collector Enable Output. The EN pin goes high SHDN: Shutdown Control Input. The LT4356-3 can be shut impedance when the voltage at the OUT pin is above (V down to a low current mode by pulling the SHDN pin below CC – 0.7V), indicating the external MOSFET is fully on. The the shutdown threshold of 0.4V. All functions, including state of the pin is latched until the OUT pin voltage resets the spare amplifier, are turned off. Pull this pin above 1.7V at below 0.5V and goes back up above 2V. The internal or disconnect it and allow the internal current source to NPN is capable of sinking up to 3mA of current from 80V turn the part back on. After GATE pin pulls low due to fault to drive an LED or opto-coupler. time out, the part can be restarted by pulling the SHDN pin low for at least 100µs and pulled high with a slew rate Exposed Pad: Exposed pad may be left open or connected faster than 10V/ms. The leakage current to ground at the to device ground (GND). pin should be limited to no more than 1µA if no pull up FB: Voltage Regulator Feedback Input. Connect this pin device is used to turn the part on. The SHDN pin can be to the center tap of the output resistive divider connected pulled up to 100V or below GND by 60V without damage. between the OUT pin and ground. During an overvoltage SNS: Current Sense Input. Connect this pin to the output of condition, the GATE pin is servoed to maintain a 1.25V the current sense resistor. The current limit circuit controls threshold at the FB pin. This pin is clamped internally to the GATE pin to limit the sense voltage between V and 7V. Tie to GND to disable the OV clamp. CC SNS pins to 50mV. At the same time the sense amplifier FLT: Open-Collector Fault Output. This pin pulls low also starts a current source to charge up the TMR pin. after the voltage at the TMR pin has reached the fault This pin can be pulled below GND by up to 60V, though threshold of 1.25V. It indicates the pass transistor is the voltage difference with the V pin must be limited to CC about to turn off because either the supply voltage has less than 30V. Connect to V if unused. CC stayed at an elevated level for an extended period of TMR: Fault Timer Input. Connect a capacitor between this time (voltage fault) or the device is in an overcurrent pin and ground to set the times for early warning and fault condition (current fault). The internal NPN is capable of periods. The current charging up this pin during fault sinking up to 3mA of current from 80V to drive an LED or conditions depends on the voltage difference between the opto-coupler. V and OUT pins. When V reaches 1.25V, the FLT pin CC TMR GATE: N-Channel MOSFET Gate Drive Output. The GATE pulls low to indicate the detection of a fault condition. If pin is pulled up by an internal charge pump current source the condition persists, the pass transistor turns off when and clamped to 14V above the OUT pin. Both voltage and V reaches the threshold of 1.35V. The GATE pin remains TMR current amplifiers control the GATE pin to regulate the low even after the fault condition has disappeared and the output voltage and limit the current through the MOSFET. voltage at the TMR pin has reached 0.5V. A minimum of 10nF capacitor is needed to compensate the loop. A 10V GND: Device Ground. rated X7R capacitor is recommended for C . TMR IN+ (DFN and SO Packages Only): Positive Input of the V : Positive Supply Voltage Input. The positive supply Auxiliary Amplifier. This amplifier can be used as a level CC input ranges from 4V to 80V for normal operation. It detection comparator with external hysteresis or linear can also be pulled below ground potential by up to 60V regulator controlling an external PNP transistor. This pin during a reverse battery condition, without damaging the is clamped internally to 7V. Connect to ground if unused. part. The supply current is reduced to 7µA with all the functional blocks off. 43563fc 7 For more information www.linear.com/LT4356-3

LT4356-3 block DiAgrAm VCC SNS GATE OUT + 14V 50mV – CHARGE PUMP FB + – + VA IA – 1.25V SHDN FLT AOUT OC OUT OV – 1.25V SHDN AUXILIARY CONTROL EN AMPLIFIER LOGIC + GATEOFF FLT IN+ 1.35V – VCC + 0.5V + ITMR – + 2µA 1.25V – TMR GND 43563 BD 43563fc 8 For more information www.linear.com/LT4356-3

LT4356-3 operAtion Some power systems must cope with high voltage surges The potential at the TMR pin starts decreasing as soon of short duration such as those in automobiles. Load as the overvoltage condition disappears, but the GATE circuitry must be protected from these transients, yet pin remains low even when the voltage at the TMR pin high availability systems must continue operating during reaches 0.5V. Pulling the SHDN pin low momentarily will these events. turn the GATE pin back on. The LT4356-3 is an overvoltage protection regulator that The fault timer allows the load to continue functioning drives an external N-channel MOSFET as the pass transis- during short transient events while protecting the MOSFET tor. It operates from a wide supply voltage range of 4V to from being damaged by a long period of supply overvolt- 80V. It can also be pulled below ground potential by up age, such as a load dump in automobiles. The timer period to 60V without damage. The low power supply require- varies with the voltage across the MOSFET. A higher voltage ment of 4V allows it to operate even during cold cranking corresponds to a shorter fault timer period, ensuring the conditions in automotive applications. The internal charge MOSFET operates within its safe operating area (SOA). pump turns on the N-channel MOSFET to supply current The LT4356-3 senses an overcurrent condition by monitor- to the loads with very little power loss. Two MOSFETs can ing the voltage across an optional sense resistor placed be connected back to back to replace an inline Schottky between the V and SNS pins. An active current limit CC diode for reverse input protection. This improves the ef- circuit (IA) controls the GATE pin to limit the sense volt- ficiency and increases the available supply voltage level age to 50mV. A current is also generated to start charging to the load circuitry during cold crank. up the TMR pin. This current is about 5 times the current Normally, the pass transistor is fully on, powering the generated during an overvoltage event. The FLT pin pulls loads with very little voltage drop. When the supply volt- low when the voltage at the TMR pin reaches 1.25V and age surges too high, the voltage amplifier (VA) controls the MOSFET is turned off when it reaches 1.35V. the gate of the MOSFET and regulates the voltage at the An auxiliary amplifier is provided with the negative input source pin to a level that is set by the external resistive connected to an internal 1.25V reference. The output pull divider from the OUT pin to ground and the internal 1.25V down device is capable of sinking up to 2mA of current reference. A current source starts charging up the capaci- allowing it to drive an LED or opto coupler. This amplifier tor connected at the TMR pin to ground. If the voltage at can be configured as a linear regulator controller driving the TMR pin, V , reaches 1.25V, the FLT pin pulls low TMR an external PNP transistor or a comparator function to to indicate impending turn-off due to the overvoltage monitor voltages. condition. The pass transistor stays on until the TMR pin reaches 1.35V, at which point the GATE pin pulls low The SHDN pin turns off the pass transistor and reduces turning off the MOSFET. the supply current to less than 7µA. 43563fc 9 For more information www.linear.com/LT4356-3

LT4356-3 ApplicAtions inFormAtion The LT4356-3 can limit the voltage and current to the load Overcurrent Fault circuitry during supply transients or overcurrent events. The LT4356-3 features an adjustable current limit that The total fault timer period should be set to ride through protects against short circuits or excessive load current. short overvoltage transients while not causing damage During an overcurrent event, the GATE pin is regulated to to the pass transistor. The selection of this N-channel limit the current sense voltage across the V and SNS CC MOSFET pass transistor is critical for this application. pins to 50mV. It must stay on and provide a low impedance path from An overcurrent fault occurs when the current limit circuitry the input supply to the load during normal operation and has been engaged for longer than the time-out delay set then dissipate power during overvoltage or overcurrent by the timer capacitor. The GATE pin is then immediately conditions. pulled low by a 10mA current to GND turning off the The following sections describe the overcurrent and the MOSFET. The GATE pin stays low until the SHDN pin is overvoltage faults, and the selection of the timer capacitor pulled low for at least 100µs and pulled high with a slew value based on the required warning time. The selection rate faster than 10V/ms. of the N-channel MOSFET pass transistor is discussed next. Auxiliary amplifier, reverse input, and the shutdown Fault Timer functions are covered after the MOSFET selection. External The LT4356-3 includes an adjustable fault timer pin. Con- component selection is discussed in detail in the Design necting a capacitor from the TMR pin to ground sets the Example section. delay timer period before the MOSFET is turned off. The same capacitor also sets the cool down period before the Overvoltage Fault MOSFET is allowed to turn back on after the fault condition The LT4356-3 limits the voltage at the OUT pin during an has disappeared. overvoltage situation. An internal voltage amplifier regu- Once a fault condition, either overvoltage or overcurrent, lates the GATE pin voltage to maintain a 1.25V threshold at is detected, a current source charges up the TMR pin. The the FB pin. During this period of time, the power MOSFET current level varies depending on the voltage drop across is still on and continues to supply current to the load. This the drain and source terminals of the power MOSFET(V ), allows uninterrupted operation during short overvoltage DS which is typically from the V pin to the OUT pin. This transient events. CC scheme takes better advantage of the available Safe Oper- When the voltage regulation loop is engaged for longer ating Area (SOA) of the MOSFET than would a fixed timer than the time-out period, set by the timer capacitor con- current. The timer function operates down to V = 5V CC nected from the TMR pin to ground, an overvoltage fault across the whole temperature range. is detected. The GATE pin is pulled down to the OUT pin by a 150mA current. This prevents the power MOSFET from being damaged during a long period of overvoltage, such as during load dump in automobiles. Pulling the SHDN pin low for at least 100µs and pulled high with a slew rate faster than 10V/ms will allow the GATE pin to pull back up. 43563fc 10 For more information www.linear.com/LT4356-3

LT4356-3 ApplicAtions inFormAtion Fault Timer Current When the voltage at the TMR pin, V , reaches the 1.25V TMR threshold, the FLT pin pulls low to indicate the detection The timer current starts at around 2µA with 0.5V or less of a fault condition and provide warning to the load of of V , increasing linearly to 50µA with 75V of V dur- DS DS the impending power loss. In the case of an overvoltage ing an overvoltage fault (Figure 1). During an overcurrent fault, the timer current then switches to a fixed 5µA. The fault, it starts at 4µA with 0.5V or less of V but increases DS interval between FLT asserting low and the MOSFET turn- to 260µA with 80V across the MOSFET (Figure 2). This ing off is given by: arrangement allows the pass transistor to turn off faster during an overcurrent event, since more power is dissipated C • 100mV t = TMR during this condition. Refer to the Typical Performance WARNING 5µA Characteristics section for the timer current at different V in both overvoltage and overcurrent events. DS VTMR(V) ITMR = 5µA ITMR = 5µA 1.35 1.25 VDS = 75V (ITMR = 50µA) VDS = 10V (ITMR = 8µA) 0.50 TIME tFLT tWARNING = 15ms/µF = 20ms/µF tFLT = 93.75ms/µF tWARNING = 20ms/µF TOTAL FAULT TIMER = tFLT + tWARNING 43563 F01 Figure 1. Overvoltage Fault Timer Current VTMR(V) 1.35 1.25 VDS = 80V (ITMR = 260µA) VDS = 10V (ITMR = 35µA) 0.50 TIME tWARNING tFLT = 0.38ms/µF = 2.88ms/µF tFLT = 21.43ms/µF tWARNING TOTAL FAULT TIMER = tFLT + tWARNING = 2.86ms/µF 43563 F02 Figure 2. Overcurrent Fault Timer Current 43563fc 11 For more information www.linear.com/LT4356-3

LT4356-3 ApplicAtions inFormAtion This fixed early warning period allows time for the system The SOA of the MOSFET must encompass all fault condi- to perform necessary backup or house-keeping functions tions. In normal operation the pass transistor is fully on, before power is cut off. When V crosses the 1.35V dissipating very little power. But during either overvoltage TMR threshold, the GATE pin pulls low immediately and turns or overcurrent faults, the GATE pin is servoed to regu- off the MOSFET. Note that during an overcurrent event the late either the output voltage or the current through the timer current is not reduced to 5µA when V reaches MOSFET. Large current and high voltage drop across the TMR 1.25V, since it would lengthen the overall fault timer period MOSFET can coexist in these cases. The SOA curves of and cause additional MOSFET stress. After the GATE pin the MOSFET must be considered carefully along with the pulls low due to a fault time out, the LT4356-3 latches off. selection of the fault timer capacitor. Allow sufficient time for the TMR pin to discharge to 0.5V (typical discharge current is 2.2µA) and for the MOSFET Transient Stress in the MOSFET to cool before attempting to reset the part. To reset, pull During an overvoltage event, the LT4356-3 drives a series the SHDN pin low for at least 100µs, then pull high with pass MOSFET to regulate the output voltage at an acceptable a slew rate of at least 10V/ms. level. The load circuitry may continue operating throughout this interval, but only at the expense of dissipation in the MOSFET Selection MOSFET pass device. MOSFET dissipation or stress is a The LT4356-3 drives an N-channel MOSFET to conduct the function of the input voltage waveform, regulation voltage load current. The important features of the MOSFET are and load current. The MOSFET must be sized to survive on-resistance RDS(ON), the maximum drain-source voltage this stress. V , the threshold voltage, and the SOA. (BR)DSS Most transient event specifications use the model shown The maximum allowable drain-source voltage must be in Figure 3. The idealized waveform comprises a linear higher than the supply voltage. If the output is shorted ramp of rise time t , reaching a peak voltage of V and r PK to ground or during an overvoltage event, the full supply exponentially decaying back to V with a time constant IN voltage will appear across the MOSFET. of t. A common automotive transient specification has The gate drive for the MOSFET is guaranteed to be more constants of tr = 10µs, VPK = 80V and t = 1ms. A surge than 10V and less than 16V for those applications with VCC condition known as “load dump” has constants of tr = 5ms, higher than 8V. This allows the use of standard threshold VPK = 60V and t = 200ms. voltage N-channel MOSFETs. For systems with V less CC than 8V, a logic level MOSFET is required since the gate drive can be as low as 4.5V. VPK τ VIN tr 43563 F03 Figure 3. Prototypical Transient Waveform 43563fc 12 For more information www.linear.com/LT4356-3

LT4356-3 ApplicAtions inFormAtion MOSFET stress is the result of power dissipated within VPK the device. For long duration surges of 100ms or more, stress is increasingly dominated by heat transfer; this is τ a matter of device packaging and mounting, and heat sink thermal mass. This is analyzed by simulation, using the VREG MOSFET thermal model. VIN tr For short duration transients of less than 100ms, MOSFET 43563 F04 survival is increasingly a matter of safe operating area Figure 4. Safe Operating Area Required to Survive Prototypical (SOA), an intrinsic property of the MOSFET. SOA quanti- Transient Waveform fies the time required at any given condition of V and DS I to raise the junction temperature of the MOSFET to its D rated maximum. MOSFET SOA is expressed in units of Typically VREG ≈ VIN and t >> tr simplifying the above to watt-squared-seconds (P2t). This figure is essentially con- 1 P2t = I 2(V –V )2 τ (W2s) stant for intervals of less than 100ms for any given device LOAD PK REG 2 type, and rises to infinity under DC operating conditions. Destruction mechanisms other than bulk die temperature For the transient conditions of V = 80V, V = 12V, V PK IN REG distort the lines of an accurately drawn SOA graph so that = 16V, t = 10µs and t = 1ms, and a load current of 3A, r P2t is not the same for all combinations of I and V . P2t is 18.4W2s—easily handled by a MOSFET in a D-pak D DS In particular P2t tends to degrade as V approaches the package. The P2t of other transient waveshapes is evaluated DS maximum rating, rendering some devices useless for by integrating the square of MOSFET power versus time. absorbing energy above a certain voltage. Calculating Short-Circuit Stress Calculating Transient Stress SOA stress must also be calculated for short-circuit condi- To select a MOSFET suitable for any given application, the tions. Short-circuit P2t is given by: SOA stress must be calculated for each input transient P2t = (V • ΔV /R )2 • t (W2s) IN SNS SNS TMR which shall not interrupt operation. It is then a simple matter to chose a device which has adequate SOA to survive the where, ΔVSNS is the SENSE pin threshold, and tTMR is the maximum calculated stress. P2t for a prototypical transient overcurrent timer interval. waveform is calculated as follows (Figure 4). For V = 14.7V, V = 50mV, R = 12mΩ and C IN SNS SNS TMR Let = 100nF, P2t is 6.6W2s—less than the transient SOA calculated in the previous example. Nevertheless, to a = V – V REG IN account for circuit tolerances this figure should be doubled b = V – V PK IN to 13.2W2s. (V = Nominal Input Voltage) IN Then Limiting Inrush Current and GATE Pin Compensation 3 The LT4356-3 limits the inrush current to any load capaci- 1 (b a) 2 2 P t=I t + tance by controlling the GATE pin voltage slew rate. An LOAD r 3 b external capacitor can be connected from GATE to ground 1 b 2 2 2 to slow down the inrush current further at the expense of 2a ln +3a +b 4ab 2 a slower turn-off time. The gate capacitor is set at: I GATE(UP) C1 = •C L I INRUSH 43563fc 13 For more information www.linear.com/LT4356-3

LT4356-3 ApplicAtions inFormAtion The LT4356-3 does not need extra compensation compo- RLIM 2N2905A OR nents at the GATE pin for stability during an overvoltage *4.7Ω BCP53 INPUT 2.5V OUTPUT or overcurrent event. However, with fast, high voltage ≈ 150mA MAX 10µF transient steps at the input, a gate capacitor, C1, to ground R6 D1* * OPTIONAL FOR is needed to prevent turn-on of the N-channel MOSFET. 100k BAV99 CURRENT LIMIT Tdhueri negx tfraau glta cteo ncdapitaiocnitsa nacned smloawys a dlloowwn e xthcee stsuirvne ocfuf rtrimenet AOU1T1 R2449k 47nF VOUT = 10.2.75R4R +5 R5 during an output short event. An extra resistor, R1, in series LT4356DE-3 IN+ 12 ILIM ≈ RLIM with the gate capacitor can improve the turn off time. A R5 249k diode, D1, should be placed across R1 with the cathode connected to C1 as shown in Figure 5. 43563 F06 Figure 6. Auxiliary LDO Output with Optional Current Limit Q1 Reverse Input Protection D1 A blocking diode is commonly employed when reverse IN4148W input potential is possible, such as in automotive applica- R3 tions. This diode causes extra power loss, generates heat, R1 and reduces the available supply voltage range. During C1 cold crank, the extra voltage drop across the diode is GATE particularly undesirable. LT4356-3 The LT4356-3 is designed to withstand reverse voltage 43563 F05 without damage to itself or the load. The V , SNS, and CC Figure 5 SHDN pins can withstand up to 60V of DC voltage below the GND potential. Back-to-back MOSFETs must be used Auxiliary Amplifier to eliminate the current path through their body diodes An uncommitted amplifier is included in the LT4356-3 to (Figure 7). Figure 8 shows the approach with a P-Channel provide flexibility in the system design. With the negative MOSFET in place of Q2. input connected internally to the 1.25V reference, the amplifier can be connected as a level detect comparator RSNS Q2 Q1 VIN 10mΩ IRLR2908 IRLR2908 VOUT with external hysteresis. The open collector output pin, 12V 12V, 3A D2* CLAMPED AOUT, is capable of driving an opto or LED. It can also SMAJ58CA Q3 R4 R5 R3 AT 16V interface with the system via a pull-up resistor to a supply 2N3904 10Ω 1M 10Ω voltage up to 80V. R1 59k D1 R7 The amplifier can also be configured as a low dropout 1N4148 10k 5 4 3 linear regulator controller. With an external PNP transistor, SNS GATE OUT 6 2 such as 2N2905A, it can supply up to 100mA of current VCC FB R2 with only a few hundred mV of dropout voltage. Current 4.99k limit can be easily included by adding two diodes and one LT4356DE-3 resistor (Figure 6). The amplifier is turned off when the 7 SHDN LT4356-3 is shut down. 11 AOUT FLT 8 12 IN+ GND TMR EN 9 10 1 43563 F07 *DIODES INC. C0.T1MµRF Figure 7. Overvoltage Regulator with N-channel MOSFET Reverse Input Protection 43563fc 14 For more information www.linear.com/LT4356-3

LT4356-3 ApplicAtions inFormAtion RSNS Q2 Q1 RSNS Q1 SMAJ15V28DIVCN2A* 10mΩ Si44351N512D54V15 IRLR2908 V1C2OLVAU,TM 3PAED AT 16V VINSMAJ5D8A2 10mΩ IRLR2908 2C2L*µF R106k R103Ω R591k R103Ω R591k 5 4 3 5 4 3 6 SNS GATE OUT SNS GATE OUT VCC 2 6 VCC FB 2 38R34k 7 SHDN FB R2 VCC R2 4.99k 12 IN+ LT4356DE-3 4.99k DC-DC CONVERTER R5 7 SHDN LT4356DE-3 100k EN 9 SHDN GND 11 8 11 AOUT FLT 8 UNDERVOLTAGE AOUT GND TMR FLT FAULT 12 IN+ GND TMR EN 9 10 1 CTM43R563 F09 *SANYO 25CE22GA 47nF 10 1 43563 F08 CTMR *DIODES INC. 0.1µF Figure 9. Overvoltage Regulator with Low-Battery Detection Figure 8. Overvoltage Regulator with P-Channel MOSFET wiring can cause inductive voltage transients which could Reverse Input Protection exceed 100V. To minimize the voltage transients, the power trace parasitic inductance should be minimized by using Shutdown wide traces. A small surge suppressor, D2, in Figure 9, The LT4356-3 can be shut down to a low current mode at the input will clamp the voltage spikes. when the voltage at the SHDN pin goes below the shutdown A total bulk capacitance of at least 22µF low ESR is required threshold of 0.6V. The quiescent current drops to 7µA. All close to the source pin of MOSFET Q1. In addition, the functions are turned off including the auxiliary amplifier. bulk capacitance should be at least 10 times larger than After the GATE pin pulls low due to a fault time out, the the total ceramic bypassing capacitor on the input of the LT4356-3 latches off. Allow sufficient time for the TMR pin DC/DC converter. to discharge to 0.5V (typical discharge current is 2.2µA) Layout Considerations and for the MOSFET to cool before attempting to reset the part. To reset, pull the SHDN pin low for at least 100µs, To achieve accurate current sensing, Kelvin connection then pull high with a slew rate of at least 10V/ms. to the current sense resistor (RSNS in Figure 9) is recom- mended. The minimum trace width for 1oz copper foil is The SHDN pin can be pulled up to V or below GND by CC 0.02" per amp to ensure the trace stays at a reasonable up to 60V without damaging the pin. Leaving the pin open temperature. 0.03" per amp or wider is recommended. allows an internal current source to pull it up and turn Note that 1oz copper exhibits a sheet resistance of about on the part while clamping the pin to 2.5V. The leakage 530µΩ/square. Small resistances can cause large errors in current at the pin should be limited to no more than 1µA high current applications. Noise immunity will be improved if no pull up device is used to help turn it on. significantly by locating resistive dividers close to the pins with short V and GND traces. Supply Transient Protection CC The LT4356-3 is 100% tested and guaranteed to be safe Design Example from damage with supply voltages up to 80V. Nevertheless, As a design example, take an application with the following voltage transients above 100V may cause permanent dam- specifications: V = 8V to 14V DC with transient up to 80V, CC age. During a short-circuit condition, the large change in V ≤ 16V, current limit (I ) at 5A, low battery detection OUT LIM current flowing through power supply traces and associated at 6V, and 1ms of overvoltage early warning (Figure 9). 43563fc 15 For more information www.linear.com/LT4356-3

LT4356-3 ApplicAtions inFormAtion First, calculate the resistive divider value to limit V to Finally, calculate R4 and R5 for the 6V low battery thresh- OUT 16V during an overvoltage event: old detection: 1.25V • (R1 + R2) 1.25V • (R4 + R5) V = =16V 6V = REG R2 R5 Set the current through R1 and R2 during the overvoltage Choose 100kΩ for R5. condition to 250µA. (6V – 1.25V) • R5 R4 = = 380kΩ 1.25V R2 = = 5kΩ 1.25V 250µA Select 383kΩ for R4. Choose 4.99kΩ for R2. The pass transistor, Q1, should be chosen to withstand (16V – 1.25V) • R2 the output short condition with V = 14V. CC R1 = = 58.88kΩ 1.25V The total overcurrent fault time is: The closest standard value for R1 is 59kΩ. 47nF • 0.85V t = = 0.878ms OC 45.5µA Next calculate the sense resistor, RSNS, value: 50mV 50mV The power dissipation on Q1 equals to: R = = = 10mΩ SNS I 5A LIM 14V • 50mV P = = 70W C is then chosen for 1ms of early warning time: 10mΩ TMR 1ms • 5µA These conditions are well within the Safe Operating Area C = = 50nF TMR of IRLR2908. 100mV The closest standard value for C is 47nF. TMR 43563fc 16 For more information www.linear.com/LT4356-3

LT4356-3 typicAl ApplicAtions Wide Input Range 5V to 28V Hot Swap with Undervoltage Lockout RSNS Q1 0.02Ω SUD50N03-10 VIN VOUT 100µF R6 R3 118k 10Ω C1 47nF VCC SNS GATE OUT SHDN FB AOUT IN+ LT4356DE-3 R7 49.9k FLT EN GND TMR 43563 TA10 CTMR 1µF 24V Overvoltage Regulator Withstands 150V at V IN Q1 VIN IRF640 VOUT 24V CLAMPED AT 32V R9 1k R3 1W 10Ω R1 5 4 3 118k SNS GATE OUT 6 2 VCC FB D2* R2 SMAT70A 4.99k 7 LT4356DE-3 SHDN 8 FLT 9 EN GND TMR 10 1 43563 TA05 *DIODES INC. CTMR 0.1µF 43563fc 17 For more information www.linear.com/LT4356-3

LT4356-3 typicAl ApplicAtions Overvoltage Regulator with Low Battery Detection and Output Keep Alive During Shutdown 1k 0.5W RSNS Q1 VIN 10mΩ IRLR2908 1V2OVU,T 4A 12V CLAMPED AT 16V D2* SMAJ58A R3 10Ω D1 Q2 1N4746A R4 VN2222 18V 402k 5 4 3 R1 1W SNS GATE OUT 294k 6 VCC FB 2 R2 VDD 24.9k R6 LT4356DE-3 47k 12 IN+ AOUT 11 LBO R5 7 8 THRESHOLD = 6V 105k SHDN FLT 9 EN GND TMR *DIODES INC. 10 1 43563 TA03 CTMR 0.1µF 2.5A, 48V Hot Swap with Overvoltage Output Regulation at 72V and UV Shutdown at 35V RSNS Q1 VIN 15mΩ FDB3632 VOUT 48V 48V R4 R6 2.5A D2* SMAT70A R3 140k 100k 10Ω CL 300µF C1 6.8nF D1 6 5 4 3 1N4714 VCC SNS GATE OUT R7 BV = 33V7 IN+ 12 1M SHDN R5 R8 4.02k R1 47k 226k LT4356DE-3 2 FB R2 8 4.02k FLT 9 11 EN AOUT PWRGD GND TMR *DIODES INC. 10 1 43563 TA06 CTMR 0.1µF 43563fc 18 For more information www.linear.com/LT4356-3

LT4356-3 typicAl ApplicAtions 2.5A, 28V Hot Swap with Overvoltage Output Regulation at 36V and UV Shutdown at 15V RSNS Q1 VIN 15mΩ FDB3632 VOUT 28V 28V R4 R6 2.5A D2* SMAT70A R3 113k 27k 10Ω CL 300µF C1 6.8nF D1 6 5 4 3 1N4700 VCC SNS GATE OUT R7 BV = 13V7 IN+ 12 1M SHDN R5 R8 4.02k R1 47k 110k LT4356DE-3 2 FB R2 8 4.02k FLT 9 11 EN AOUT PWRGD GND TMR *DIODES INC. 10 1 43563 TA07 CTMR 0.1µF Overvoltage Regulator with Reverse Input Protection Up to –80V Q2 RSNS Q1 VIN IRLR2908 10mΩ IRLR2908 VOUT 12V 12V, 3A CLAMPED D2* R4 SMAJ58CA R3 AT 16V Q3 10Ω R5 10Ω 2N3904 1M 6 5 4 3 R1 D1 R7 VCC SNS GATE OUT 2 59k 1N4148 10k FB R2 D3** 4.99k 1N4148 LT4356DE-3 7 SHDN 11 8 AOUT FLT 12 IN+ GND TMR EN 9 *DIODES INC. 10 1 43563 TA09 CTMR **OPTIONAL COMPONENT 0.1µF FOR REDUCED STANDBY CURRENT 43563fc 19 For more information www.linear.com/LT4356-3

LT4356-3 pAckAge Description Please refer to http://www.linear.com/product/LT4356-3#packaging for the most recent package drawings. DE/UE Package 12-Lead Plastic DFN (4mm × 3mm) (Reference LTC DWG # 05-08-1695 Rev D) 0.70 ±0.05 3.30 ±0.05 3.60 ±0.05 2.20 ±0.05 1.70 ± 0.05 PACKAGE OUTLINE 0.25 ± 0.05 0.50 BSC 2.50 REF RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 4.00 ±0.10 R = 0.115 0.40 ± 0.10 (2 SIDES) TYP 7 12 R = 0.05 TYP 3.30 ±0.10 3.00 ±0.10 (2 SIDES) 1.70 ± 0.10 PIN 1 PIN 1 NOTCH TOP MARK R = 0.20 OR (NOTE 6) 0.35 × 45° CHAMFER 6 1 (UE12/DE12) DFN 0806 REV D 0.200 REF 0.75 ±0.05 0.25 ± 0.05 0.50 BSC 2.50 REF 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING PROPOSED TO BE A VARIATION OF VERSION (WGED) IN JEDEC PACKAGE OUTLINE M0-229 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 43563fc 20 For more information www.linear.com/LT4356-3

LT4356-3 pAckAge Description Please refer to http://www.linear.com/product/LT4356-3#packaging for the most recent package drawings. MS Package 10-Lead Plastic MSOP (Reference LTC DWG # 05-08-1661 Rev F) 0.889 ±0.127 (.035 ±.005) 5.10 3.20 – 3.45 (.201) (.126 – .136) MIN 3.00 ±0.102 0.305 ±0.038 0.50 (.118 ±.004) 0.497 ±0.076 (.0120 ±.0015) (.0197) (NOTE 3) (.0196 ±.003) 10 9 8 76 TYP BSC REF RECOMMENDED SOLDER PAD LAYOUT 3.00 ±0.102 4.90 ±0.152 DETAIL “A” (.193 ±.006) (.118 ±.004) 0.254 (NOTE 4) (.010) 0° – 6° TYP GAUGE PLANE 1 2 3 4 5 0.53 ±0.152 (.021 ±.006) 1.10 0.86 (.043) (.034) DETAIL “A” MAX REF 0.18 (.007) SEATING PLANE 0.17 – 0.27 0.1016 ±0.0508 (.007 – .011) (.004 ±.002) 0.50 TYP (.0197) MSOP (MS) 0213 REV F NOTE: BSC 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 43563fc 21 For more information www.linear.com/LT4356-3

LT4356-3 pAckAge Description Please refer to http://www.linear.com/product/LT4356-3#packaging for the most recent package drawings. S Package 16-Lead Plastic Small Outline (Narrow .150 Inch) (Reference LTC DWG # 05-08-1610 Rev G) .386 – .394 .045 ±.005 (9.804 – 10.008) .050 BSC NOTE 3 16 15 14 13 12 11 10 9 N N .245 MIN .160 ±.005 .150 – .157 .228 – .244 (3.810 – 3.988) (5.791 – 6.197) NOTE 3 1 2 3 N/2 N/2 .030 ±.005 TYP RECOMMENDED SOLDER PAD LAYOUT 1 2 3 4 5 6 7 8 .010 – .020 × 45° .053 – .069 (0.254 – 0.508) (1.346 – 1.752) .004 – .010 .008 – .010 (0.101 – 0.254) (0.203 – 0.254) 0° – 8° TYP .014 – .019 .050 .016 – .050 (0.355 – 0.483) (1.270) (0.406 – 1.270) TYP BSC S16 REV G 0212 NOTE: INCHES 1. DIMENSIONS IN (MILLIMETERS) 2. DRAWING NOT TO SCALE 3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm) 4. PIN 1 CAN BE BEVEL EDGE OR A DIMPLE 43563fc 22 For more information www.linear.com/LT4356-3

LT4356-3 revision history REV DATE DESCRIPTION PAGE NUMBER A 12/09 Revise Features and Description 1 Update Absolute Maximum Ratings, Pin Configuration, Order Information and Electrical Characteristics to Include 2-4 H-grade Revise Pin Functions 7 Revise Block Diagram 8 Minor Text Edits to Operation Section 9 Text Added to Applications Information 12, 15 Update Typical Applications 18, 19 B 8/12 Added MP-Grade 2, 3, 4 C 9/17 Updated TMR pin function with minimum recommended capacitance 7 43563fc 23 Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconnFecotrio mn oofr iets icnirfcourimts aasti odens cwriwbewd .hlienreeianr w.cilol nmo/tL inTfr4in3g5e6 o-n3 existing patent rights.

LT4356-3 typicAl ApplicAtion Overvoltage Regulator with Linear Regulator Up to 100mA Q2 2N2905A 2.5V, 100mA C5 RSNS Q1 10µF VIN 10mΩ IRLR2908 VOUT 12V 12V, 3A D2* CLAMPED AT 16V SMAJ58A R3 10Ω R1 5 4 3 59k R6 SNS GATE OUT 100k 6 2 VCC FB R2 4.99k R4 C3 LT4356DE-3 249k 47nF 11 AOUT IN+ 12 R5 7 8 SHDN FLT 249k 9 EN GND TMR *DIODES INC. 10 1 43563 TA04 CTMR 0.1µF relAteD pArts PART NUMBER DESCRIPTION COMMENTS LT1641-1/LT1641-2 Positive High Voltage Hot Swap Controllers Active Current Limiting, Supplies From 9V to 80V LTC1696 Overvoltage Protection Controller ThinSOT™ Package, 2.7V to 28V LTC1735 High Efficiency Synchronous Step-Down Output Fault Protection, 16-Pin SSOP Switching Regulator LTC1778 No R ™ Wide Input Range Synchronous Up to 97% Efficiency, 4V ≤ V ≤ 36V, 0.8V ≤ V ≤ (0.9)(V ), SENSE IN OUT IN Step-Down Controller I Up to 20A OUT LTC2909 Triple/Dual Inputs UV/OV Negative Monitor Pin Selectable Input Polarity Allows Negative and OV Monitoring LTC2912/LTC2913 Single/Dual UV/OV Voltage Monitor Ads UV and OV Trip Values, ±1.5% Threshold Accuracy LTC2914 Quad UV/OV Monitor For Positive and Negative Supplies LTC3727/LTC3727-1 2-Phase, Dual, Synchronous Controller 4V ≤ V ≤ 36V, 0.8V ≤ V ≤ 14V IN OUT LTC3827/LTC3827-1 Low I , Dual, Synchronous Controller 4V ≤ V ≤ 36V, 0.8V ≤ V ≤ 10V, 80µA Quiescent Current Q IN OUT LTC3835/LTC3835-1 Low I , Synchronous Step-Down Controller Single Channel LTC3827/LTC3827-1 Q LT3845 Low I , Synchronous Step-Down Controller 4V ≤ V ≤ 60V, 1.23V ≤ V ≤ 36V, 120µA Quiescent Current Q IN OUT LTC3850 Dual, 550kHz, 2-Phase Synchronous Step-Down Dual 180° Phased Controllers, VIN 4V to 24V, 97% Duty Cycle, 4mm × 4mm Controller QFN-28, SSOP-28 Packages LT4256-1/LT4256-2 Positive 48V Hot Swap Controller with Foldback Current Limiting, Open-Circuit and Overcurrent Fault Output, Up to Open-Circuit Detect 80V Supply LTC4260 Positive High Voltage Hot Swap Controller with Wide Operating Range 8.5V to 80V ADC and I2C LTC4352 Ideal MOSFET ORing Diode External N-channel MOSFETs Replace ORing Diodes, 0V to 18V LTC4354 Negative Voltage Diode-OR Controller Controls Two N-channel MOSFETs, 1µs Turn-Off, 80V Operation LTC4355 Positive Voltage Diode-OR Controller Controls Two N-channel MOSFETs, 0.5µs Turn-Off, 80V Operation 43563fc 24 LT 0917 REV C • PRINTED IN USA www.linear.com/LT4356-3 For more information www.linear.com/LT4356-3  LINEAR TECHNOLOGY CORPORATION 2009

Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: A nalog Devices Inc.: LT4356MPS-3 LT4356CS-3#TRPBF LT4356IMS-3#PBF LT4356CMS-3#PBF LT4356MPMS-3 LT4356HDE-3 LT4356HMS-3#PBF LT4356MPS-3#PBF LT4356CMS-3#TRPBF LT4356HMS-3#TRPBF LT4356IMS-3#TRPBF LT4356IS-3#PBF LT4356HS-3#PBF LT4356HDE-3#PBF LT4356HDE-3#TRPBF LT4356MPS-3#TRPBF LT4356HS- 3#TRPBF LT4356IDE-3#PBF LT4356IS-3#TRPBF LT4356MPMS-3#TRPBF LT4356CDE-3#TRPBF LT4356CDE- 3#PBF LT4356IDE-3#TRPBF LT4356CS-3#PBF LT4356MPMS-3#TR LT4356MPS-3#TR LT4356HMS-3 LT4356MPMS-3#PBF