LT3681 36V, 2A, 2.8MHz Step-Down Switching Regulator with Integrated Power Schottky Diode FEATURES DESCRIPTIOU ■ Wide Input Voltage Range: 3.6V to 34V Operating, The LT®3681 is an adjustable frequency (300kHz to 2.8MHz) 36V Maximum monolithic buck switching regulator that accepts input ■ 2A Maximum Output Current voltages up to 34V (36V maximum). A high effi ciency ■ Low Ripple Burst Mode® Operation 0.18Ω switch is included on the die along with a boost 50µA I at 12V to 3.3V Schottky diode and the necessary oscillator, control, and Q IN OUT Output Ripple < 15mV logic circuitry. An undedicated power Schottky diode is P-P ■ Adjustable Switching Frequency: 300kHz to 2.8MHz integrated into the LT3681 to minimize the solution size. ■ Low Shutdown Current: I < 1µA Current mode topology is used for fast transient response Q ■ Integrated Boost Diode and good loop stability. Low ripple Burst Mode operation ■ Integrated Power Schottky Diode maintains high effi ciency at low output currents while ■ Power Good Flag keeping output ripple below 15mV in a typical application. ■ Saturating Switch Design: 0.18Ω On-Resistance In addition, the LT3681 can further enhance low output ■ 1.265V Feedback Reference Voltage current effi ciency by drawing bias current from the output ■ Output Voltage: 1.265V to 20V when V is above 3V. Shutdown reduces input supply OUT ■ Soft-Start Capability current to less than 1µA while a resistor and capacitor on ■ Small 14-Pin Thermally Enhanced the RUN/SS pin provide a controlled output voltage ramp (4mm x 3mm) DFN Package (soft-start). A power good fl ag signals when V reaches OUT 90% of the programmed output voltage. The LT3681 APPLICATIOUS is available in 14-Pin 4mm x 3mm DFN package with exposed pads for low thermal resistance. ■ Automotive Battery Regulation , LT, LTC and LTM are registered trademarks of Linear Technology Corporation. ■ Power for Portable Products Burst Mode is a registered trademark of Linear Technology Corporation. All other ■ Distributed Supply Regulation trademarks are the property of their respective owners. ■ Industrial Supplies ■ Wall Transformer Regulation TYPICAL APPLICATIOU 5V Step-Down Converter Effi ciency VIN VOUT 100 10.0000 6.3V TO 5V 34V 2A 90 VIN BD 80 1.0000 OFF ON RUN/SS BOOST 4.7(cid:0)F 20k VC LT3681 SW 0.47(cid:0)F6.8L(cid:0)H NCY (%) 675000 0.1000POWER L 330pF RT DDCA EFFICIE 4300 0.0100OSS (W) PG BIAS 590k 20 VVIONU =T =1 23V.3V 0.0010 60.4k FB 10 L = 4.7(cid:0)H GND F = 800 kHz 200k 22(cid:0)F 0 0.0001 0.0001 0.001 0.01 0.1 1 10 ILOAD (A) 3681 TA01b L: NEC PLC-0745-6R8 3681 TA01 3681f 1

LT3681 ABSOLUTE WAXIWUW RATIUGS PACKAGE/ORDER IUFORWATIOU (Note 1) TOP VIEW V , RUN/SS Voltage .................................................36V IN BOOST Pin Voltage ...................................................56V PG 1 14 RUN/SS BOOST Pin Above SW Pin .........................................30V BIAS 2 15 13 VIN FB 3 12 SW FB, RT, V Voltage .......................................................5V C GND 4 11 BOOST BIAS, PG, BD Voltage ................................................30V VC 5 10 BD Maximum Junction Temperature ..........................125°C RT 6 16 9 DC DC above DA .............................................................40V GND 7 8 DA Operating Temperature Range (Note 2) DE14MA PACKAGE LT3681E ...............................................–40°C to 85°C 14-LEAD (4mm (cid:0) 3mm) PLASTIC DFN TJMAX = 125°C, θJA = 43°C/W Storage Temperature Range ...................–65°C to 150°C EXPOSED PAD (PIN 15) IS GND, MUST BE SOLDERED TO PCB EXPOSED PAD PIN 16 IS DC ORDER PART NUMBER DE PART MARKING LT3681EDE 3681 Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/ Consult LTC Marketing for parts specifi ed with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS The ● denotes the specifi cations which apply over the full operating temperature range, otherwise specifi cations are at T = 25°C. V = 10V, V = 10V, V = 15V, V = 3.3V unless otherwise A IN RUNS/SS BOOST BIAS noted. (Note 2) PARAMETER CONDITIONS MIN TYP MAX UNITS Minimum Input Voltage ● 3 3.6 V Quiescent Current from V V = 0.2V 0.01 0.5 μA IN RUN/SS V = 3V, Not Switching ● 22 60 μA BIAS V = 0, Not Switching 75 120 μA BIAS Quiescent Current from BIAS V = 0.2V 0.01 0.5 μA RUN/SS V = 3V, Not Switching ● 50 120 μA BIAS V = 0, Not Switching 0 5 μA BIAS Minimum Bias Voltage 2.7 3 V Feedback Voltage 1.25 1.265 1.29 V ● 1.24 1.265 1.3 V FB Pin Bias Current (Note 3) V = 1.25V, V = 0.4V ● 30 100 nA FB C FB Voltage Line Regulation 4V < V < 34V 0.002 0.02 %/V IN Error Amp GM 330 μMho Error Amp Gain 800 V Source Current 65 μA C V Sink Current 85 μA C V Pin to Switch Current Gain 3.5 A/V C V Clamp Voltage 2 V C 3681f 2

LT3681 ELECTRICAL CHARACTERISTICS The ● denotes the specifi cations which apply over the full operating temperature range, otherwise specifi cations are at T = 25°C. V = 10V, V = 10V V = 15V, V = 3.3V unless otherwise A IN RUNS/SS BOOST BIAS noted. (Note 2) PARAMETER CONDITIONS MIN TYP MAX UNITS Power Schottky Diode Forward Voltage I = 1A 0.50 V DA I = 2A 0.56 V DA Power Schottky Diode Leakage Current V = 40V 100 μA DC-DA Switching Frequency RT = 8.66k 2.5 2.8 3.1 MHz RT = 29.4k 1.25 1.4 1.55 MHz RT = 187k 250 300 350 kHz Minimum Switch Off-Time ● 130 200 nS Switch Current Limit Duty Cycle = 5% 3.2 3.8 4.4 A Switch V I = 2A 360 mV CESAT SW Boost Schottky Reverse Leakage V = 10V, V = 0V 0.02 2 µA SW BIAS Minimum Boost Voltage (Note 4) ● 1.5 2.1 V BOOST Pin Current I = 1A 18 35 mA SW RUN/SS Pin Current V = 2.5V 5 10 μA RUN/SS RUN/SS Input Voltage High 2.5 V RUN/SS Input Voltage Low 0.2 V PG Threshold Offset from Feedback Voltage V Rising 122 mV FB PG Hysteresis 5 mV PG Leakage V = 5V 0.1 1 μA PG PG Sink Current V = 3V ● 100 600 μA PG Note 1: Stresses beyond those listed under Absolute Maximum Ratings Note 3: Bias current fl ows into the FB pin. may cause permanent damage to the device. Exposure to any Absolute Note 4: This is the minimum voltage across the boost capacitor needed to Maximum Rating condition for extended periods may affect device guarantee full saturation of the switch. reliability and lifetime. Note 2: The LT3681E is guaranteed to meet performance specifi cations from 0°C to 85°C. Specifi cations over the –40°C to 85°C operating temperature range are assured by design, characterization and correlation with statistical process controls. 3681f 3

LT3681 TYPICAL PERFORW AU CE CHARACTERISTICS T = 25°C unless otherwise noted. A Effi ciency (V = 5.0V) Effi ciency (V = 3.3V) Effi ciency vs Switching Frequency OUT OUT 100 100 90 90 VIN = 12V 90 85 VIN = 12V 80 80 VIN = 7V VIN = 24V 80 EFFICIENCY (%) 4365700000 EFFICIENCY (%) 4365700000 VIN = 24V VIN = 12V EFFICIENCY (%) 776055 VIN = 24V 60 20 20 VOUT = 3.3V 10 L: NEC PLC-0745-4R7 10 L: NEC PLC-0745-4R7 55 L = 10µH f: 800kHz f: 800kHz LOAD = 1A 0 0 50 0.0001 0.001 0.01 0.1 1 10 0.0001 0.001 0.01 0.1 1 10 0 0.5 1 1.5 2 2.5 3 LOAD CURRENT (A) LOAD CURRENT (A) SWITCHING FREQUENCY (MHz) 3681 G01 3681 G02 3681 G03 No Load Supply Current vs No Load Supply Current Temperature Maximum Load Current 90 100 4.0 VIN = 12V 80 VOUT = 3.3V 90 3.5 70 µSUPPLY CURRENT (A) 46530000 µSUPPLY CURRENT (A) 867000 ICDHNUIICOGRRDHREE TEA LENSEMTEA PDDKE UASREGUA EPTT OPUAL TRCYEATCH LOAD CURRENT (A) 232...500 20 50 1.5 VL O=U 4T. 7=µ 3H.3V 10 f = 800 kHz FRONT PAGE APPLICATION 0 40 1.0 0 5 10 15 20 25 30 35 –40 –20 0 20 40 60 80 5 10 15 20 25 30 INPUT VOLTAGE (V) TEMPERATURE (°C) INPUT VOLTAGE (V) 3681 G04 3681 G05 3681 G06 Maximum Load Current Switch Current Limit Switch Current Limit 4.0 4.0 4.5 DUTY CYCLE = 10 % 4.0 3.5 3.5 A) A) ENT (A) 3.0 NT LIMIT( 3.0 NT LIMIT ( 23..50 DUTY CYCLE = 90 % RR 2.5 RE 2.5 RE 2.0 U R R C U U OAD 2.0 CH C 2.0 CH C 1.5 L WIT WIT 1.0 1.5 VL O=U 4T. 7=µ 5H.0V S 1.5 S 0.5 f = 800 kHz 1.0 1.0 0 5 10 15 20 25 30 0 20 40 60 80 100 –50 –25 0 25 50 75 100 125 INPUT VOLTAGE (V) DUTY CYCLE (%) TEMPERATURE (°C) 3681 G07 3681 G08 3681 G09 3681f 4

LT3681 TYPICAL PERFORW AU CE CHARACTERISTICS T = 25°C unless otherwise noted. A Switch Voltage Drop Boost Pin Current Feedback Voltage 700 90 1.290 600 80 1.285 OP (mV) 450000 RENT (mA) 567000 LTAGE (V)11..228705 R R O D U V1.270 GE 300 N C 40 CK LTA T PI 30 DBA1.265 VO 200 BOOS 20 FEE1.260 100 10 1.255 0 0 1.250 0 500 1000 1500 2000 2500 3000 3500 0 500 1000 1500 2000 2500 3000 3500 –50 –25 0 25 50 75 100 125 SWITCH CURRENT (mA) SWITCH CURRENT (mA) TEMPERATURE (°C) 3681 G10 3681 G11 4681 G12 Switching Frequency Frequency Foldback Minimum Switch On-Time 1.20 1200 140 RT = 45.3kΩ RT = 45.3kΩ 1.15 120 1.10 kHz) 1000 E (ns) Hz) CY ( 800 TIM 100 M 1.05 N N FREQUENCY ( 100...099005 WITCHING FREQUE 460000 NIMUM SWITCH O 864000 0.85 S 200 MI 20 0.80 0 0 –50 –25 0 25 50 75 100 125 0 200 400 600 800 1000 1200 1400 –50 –25 0 25 50 75 100 125 TEMPERATURE (°C) FB PIN VOLTAGE (mV) TEMPERATURE (˚C) 4681 G13 3681 G14 3681 G15 Soft Start RUN/SS Pin Current Boost Diode 4.0 12 1.6 3.5 1.4 10 WITCH CURRENT LIMIT (A) 12321.....00055 µUN/SS PIN CURRENT (A) 468 BOOST DIODE V (V)f 01100.....80264 S R 2 0.5 0.2 0 0 0 0 0.5 1 1.5 2 2.5 3 3.5 0 5 10 15 20 25 30 35 0 0.5 1.0 1.5 2.0 RUN/SS PIN VOLTAGE (V) RUN/SS PIN VOLTAGE (V) BOOST DIODE CURRENT (A) 3681 G16 3681 G17 3681 G18 3681f 5

LT3681 TYPICAL PERFORW AU CE CHARACTERISTICS T = 25°C unless otherwise noted. A Error Amp Output Current Minimum Input Voltage Minimum Input Voltage 100 4.5 6.5 80 4.0 6.0 60 µRRENT (A) 2400 OLTAGE (V) 3.5 OLTAGE (V) 5.5 U 0 V V N C UT 3.0 UT 5.0 VPIC –20 INP INP –40 2.5 VOUT = 3.3V 4.5 VOUT = 5.0V –60 L = 4.7(cid:0) L = 4.7(cid:0) f = 800kHz f = 800kHz –80 2.0 4.0 1.065 1.165 1.265 1.365 1.465 0.001 0.01 0.1 1 10 0.001 0.01 0.1 1 10 FB PIN VOLTAGE (V) LOAD CURRENT (A) LOAD CURRENT (A) 3681 G19 3681 G20 3681 G20 Switching Waveforms; V Voltages Power Good Threshold Burst Mode C 2.50 1.200 VIN = 12V; FRONT PAGE APPLICATION ILOAD = 10mA 2.00 1.180 IL V) V) 0.5A/DIV E ( CURRENT LIMIT CLAMP E ( G G A 1.50 A 1.160 T T L L O O D V D V VSW HOL 1.00 HOL 1.140 5V/DIV S S RE SWITCHING THRESHOLD RE H H T 0.50 T 1.120 VOUT 10mV/DIV PG RISING 0 1.100 –50 –25 0 25 50 75 100 125 –50 –25 0 25 50 75 100 125 2µs/DIV 3681 G24 TEMPERATURE (°C) TEMPERATURE (°C) 3681 G22 3681 G23 Switching Waveforms; Transition from Burst Mode to Full Switching Waveforms; Full Power Schottky Diode Forward Frequency Frequency Continuous Operation Voltage vs Current 6000 IL IL 0.5A/DIV 5000 0.5A/DIV 4000 A) m VRUN/SS VRUN/SS T ( 5V/DIV 5V/DIV EN 3000 R R U C 2000 VOUT VOUT 10mV/DIV 10mV/DIV 1000 VIN = 12V; FRONT PAGE APPLICATION VIN = 12V; FRONT PAGE APPLICATION ILOAD = 140mA ILOAD = 1A 0 1µs/DIV 3681 G25 1µs/DIV 3681 G26 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 FORWARD VOLTAGE (V) 3681 G29 3681f 6

LT3681 PIU FUUCTIOUS PG (Pin 1): The PG pin is the open collector output of an BD (Pin 10): This pin connects to the anode of the internal internal comparator. PG remains low until the FB pin is boost Schottky diode. within 10% of the fi nal regulation voltage. PG output is BOOST (Pin 11): This pin is used to provide a drive valid when V is above 3.5V and RUN/SS is high. IN voltage, higher than the input voltage, to the internal BIAS (Pin 2): The BIAS pin supplies the current to the bipolar NPN power switch. Connect a capacitor between LT3681’s internal regulator. Tie this pin to the lowest this pin and SW. available voltage source above 3V (typically V ). This OUT SW (Pin 12): The SW pin is the output of the internal architecture increases effi ciency especially when the input power switch. Connect this pin to the inductor, DC and voltage is much higher than the output. boost capacitor. FB (Pin 3): The LT3681 regulates the FB pin to 1.265V. V (Pin 13): The V pin supplies current to the LT3681’s IN IN Connect the feedback resistor divider tap to this pin. internal regulator and to the internal power switch. This V (Pin 5): The V pin is the output of the internal error pin must be locally bypassed. C C amplifi er. The voltage on this pin controls the peak switch RUN/SS (Pin 14): The RUN/SS pin is used to put the current. Tie an RC network from this pin to ground to LT3681 in shutdown mode. Tie to ground to shut down compensate the control loop. the LT3681. Tie to 2.3V or more for normal operation. If RT (Pin 6): Oscillator Resistor Input. Connecting a resistor the shutdown feature is not used, tie this pin to the V IN to ground from this pin sets the switching frequency. pin. RUN/SS also provides a soft-start function; see the Applications Information section. DA (Pin 8): This is the anode of the integrated power Schottky diode. High frequency, large amplitude currents GND (Pins 4, 7, Exposed Pad 15): All three of these fl ow through this pin, so tie it to ground through a low terminals internally connect to the LT3681 control IC’s impedance connection. signal return, while exposed pad 15 performs the added function of providing a low thermal resistance heat fl ow DC (Pin 9, Exposed Pad 16): These pins connect to the path between the IC and the system heatsink. Tie all of cathode of the integrated power Schottky diode. High fre- these terminals to a copper pour on the top layer of the quency, large amplitude currents fl ow through these pins, printed circuit board. Please refer to the Applications so tie them to SW through a low impedance connection. Information section for more details. 3681f 7

LT3681 BLOCK DIAGRAW VIN 13 VIN C1 BIAS 2 INTERNAL 1.265V REF – BD + 10 14 RUN/SS (cid:0) SLOPE COMP SWITCH BOOST LATCH 11 C3 R 6 RT 30O0SkCHIzL–L2A.T8OMRHz S Q L1 RT DISABLE SW 12 VOUT C2 DC SOFT-START BurstMode 9 DETECT DC 16 PG 1 DA ERROR AMP VC CLAMP 8 + 1.12V + VC 5 – – CC CF RC GNDGND GND FB 4 7 15 3 R2 R1 3681 BD OPERATION The LT3681 is a constant frequency, current mode step- The switch driver operates from either the input or from down regulator. An oscillator, with frequency set by RT, the BOOST pin. An external capacitor is used to generate sets an RS fl ip-fl op, turning on the internal power switch. a voltage at the BOOST pin that is higher than the input An amplifi er and comparator monitor the current fl owing supply. This allows the driver to fully saturate the internal between the V and SW pins, turning the switch off when bipolar NPN power switch for effi cient operation. IN this current reaches a level determined by the voltage at To further optimize effi ciency, the LT3681 automatically V . An error amplifi er measures the output voltage through C switches to Burst Mode operation in light load situations. an external resistor divider tied to the FB pin and servos Between bursts, all circuitry associated with controlling the V pin. If the error amplifi er’s output increases, more C the output switch is shut down reducing the input supply current is delivered to the output; if it decreases, less cur- current to 55µA in a typical application. rent is delivered. An active clamp on the V pin provides C The oscillator reduces the LT3681’s operating frequency current limit. The V pin is also clamped to the voltage on C when the voltage at the FB pin is low. This frequency the RUN/SS pin; soft-start is implemented by generating a foldback helps to control the output current during startup voltage ramp at the RUN/SS pin using an external resistor and overload. and capacitor. The LT3681 contains a power good comparator which trips An internal regulator provides power to the control cir- when the FB pin is at 91% of its regulated value. The PG cuitry. The bias regulator normally draws power from the output is an open-collector transistor that is off when the V pin, but if the BIAS pin is connected to an external IN output is in regulation, allowing an external resistor to pull voltage higher than 3V bias power will be drawn from the the PG pin high. Power good is valid when the LT3681 is external source (typically the regulated output voltage). enabled and V is above 3.6V. This improves effi ciency. The RUN/SS pin is used to place IN the LT3681 in shutdown, disconnecting the output and The LT3681 integrates a high quality, 36V, 2A power reducing the input current to less than 1µA. Schottky diode to reduce the overall solution size. 3681f 8

LT3681 APPLICATIONS INFORMATION FB Resistor Network where V is the typical input voltage, V is the out- IN OUT put voltage, V is the power Schottky catch diode drop The output voltage is programmed with a resistor divider D (~0.55V), V is the internal switch drop (~0.5V at max between the output and the FB pin. Choose the 1% resis- SW load). This equation shows that slower switching frequency tors according to: is necessary to safely accommodate high V /V ratio. IN OUT Also, as shown in the next section, lower frequency al- ⎛ V ⎞ R1=R2⎜ OUT –1⎟ lows a lower dropout voltage. The reason input voltage ⎝1.265 ⎠ range depends on the switching frequency is because the LT3681 switch has fi nite minimum on and off times. The Reference designators refer to the Block Diagram. switch can turn on for a minimum of ~150ns and turn off for a minimum of ~150ns. This means that the minimum Setting the Switching Frequency and maximum duty cycles are: The LT3681 uses a constant frequency PWM architecture DC =f t ( ) that can be programmed to switch from 300kHz to 2.8MHz MIN SW ONMIN by using a resistor tied from the RT pin to ground. A table DC =1–f t ( ) MAX SW OFF MIN showing the necessary RT value for a desired switching frequency is in Figure 1. where f is the switching frequency, the t is the SW ON(MIN) SWITCHING FREQUENCY (MHz) R VALUE (kΩ) minimum switch on time (~150ns), and the tOFF(MIN) is T the minimum switch off time (~150ns). These equations 0.3 187 0.4 133 show that duty cycle range increases when switching 0.6 84.5 frequency is decreased. 0.8 60.4 1.0 45.3 A good choice of switching frequency should allow ad- 1.2 36.5 equate input voltage range (see next section) and keep 1.4 29.4 1.6 23.7 the inductor and capacitor values small. 1.8 20.5 2.0 16.9 Input Voltage Range 2.2 14.3 2.4 12.1 The maximum input voltage for LT3681 applications de- 2.6 10.2 2.8 8.66 pends on switching frequency, the Absolute Maximum Rat- Figure 1. Switching Frequency vs. RT Value ings on VIN and BOOST pins, and on operating mode. If the output is in start-up or short-circuit operating modes, Operating Frequency Tradeoffs then V must be below 34V and below the result of the IN Selection of the operating frequency is a tradeoff between following equation: effi ciency, component size, minimum dropout voltage, and V +V maximum input voltage. The advantage of high frequency V ( )= OUT D –V +V INMAX D SW operation is that smaller inductor and capacitor values may fSWtON(MIN) be used. The disadvantages are lower effi ciency, lower where V is the maximum operating input voltage, maximum input voltage, and higher dropout voltage. The IN(MAX) V is the output voltage, V is the catch diode drop highest acceptable switching frequency (f ) for a OUT D SW(MAX) (~0.55V), V is the internal switch drop (~0.5V at max given application can be calculated as follows: SW load), f is the switching frequency (set by R ), and SW T V +V tON(MIN) is the minimum switch on time (~150ns). Note that f ( )= (D OUT ) a higher switching frequency will depress the maximum SW MAX t ( ) V +V –V ONMIN D IN SW operating input voltage. Conversely, a lower switching 3681f 9

LT3681 APPLICATIONS INFORMATION frequency will be necessary to achieve safe operation at at least 3.5A at low duty cycles and decreases linearly to high input voltages. 2.5A at DC = 0.8. The maximum output current is a func- tion of the inductor ripple current: If the output is in regulation and no short-circuit or start-up events are expected, then input voltage transients of up to I = I – ΔI /2 OUT(MAX) LIM L 36V are acceptable regardless of the switching frequency. Be sure to pick an inductor ripple current that provides In this mode, the LT3681 may enter pulse skipping opera- suffi cient maximum output current (I ). OUT(MAX) tion where some switching pulses are skipped to maintain output regulation. In this mode the output voltage ripple The largest inductor ripple current occurs at the highest and inductor current ripple will be higher than in normal VIN. To guarantee that the ripple current stays below the operation. specifi ed maximum, the inductor value should be chosen according to the following equation: The minimum input voltage is determined by either the LT3681’s minimum operating voltage of ~3.6V or by its ⎛ ⎞ ⎛ V +V ⎞ V +V maximum duty cycle (see equation in previous section). L=⎜ OUT D⎟⎜1– OUT D⎟ The minimum input voltage due to duty cycle is: ⎝ f∆IL ⎠⎝⎜ VIN(MAX) ⎟⎟⎠ V +V where VD is the voltage drop of the integrated Schottky VIN(MIN)=1–fOUTt (D ) –VD+VSW diode (~0.55V), VIN(MAX) is the maximum input voltage, SW OFF MIN VOUT is the output voltage, fSW is the switching frequency (set by RT), and L is in the inductor value. where V is the minimum input voltage, and t IN(MIN) OFF(MIN) is the minimum switch off time (150ns). Note that higher The inductor’s RMS current rating must be greater than the switching frequency will increase the minimum input maximum load current and its saturation current should be voltage. If a lower dropout voltage is desired, a lower about 30% higher. For robust operation in fault conditions switching frequency should be used. (start-up or short circuit) and high input voltage (>30V), the saturation current should be above 3.5A. To keep the Inductor Selection effi ciency high, the series resistance (DCR) should be less than 0.1Ω, and the core material should be intended for For a given input and output voltage, the inductor value high frequency applications. Table 1 lists several vendors and switching frequency will determine the ripple current. and suitable types. The ripple current ΔI increases with higher V or V L IN OUT and decreases with higher inductance and faster switch- Table 1. Inductor Vendors ing frequency. A reasonable starting point for selecting VENDOR URL PART SERIES TYPE the ripple current is: Murata www.murata.com LQH55D Open ΔI = 0.4(I ) TDK www.componenttdk.com SLF7045 Shielded L OUT(MAX) SLF10145 Shielded where I is the maximum output load current. To Toko www.toko.com D75C Shielded OUT(MAX) guarantee suffi cient output current, peak inductor current D75F Open must be lower than the LT3681’s switch current limit (I ). FDV0620 Shielded LIM The peak inductor current is: Sumida www.sumida.com CDRH74 Shielded CDRH6D38 Shielded I = I + ΔI /2 L(PEAK) OUT(MAX) L CR75 Open where I is the peak inductor current, I is CDRH8D43 Shielded L(PEAK) OUT(MAX) the maximum output load current, and ΔI is the inductor NEC www.nec.tokin.com PLC-0745 Shielded L ripple current. The LT3681’s switch current limit (I ) is LIM 3681f 10

LT3681 APPLICATIONS INFORMATION Of course, such a simple design guide will not always re- ceramic input capacitor concerns the maximum input sult in the optimum inductor for your application. A larger voltage rating of the LT3681. A ceramic input capacitor value inductor provides a slightly higher maximum load combined with trace or cable inductance forms a high current and will reduce the output voltage ripple. If your quality (under damped) tank circuit. If the LT3681 circuit load is lower than 2A, then you can decrease the value of is plugged into a live supply, the input voltage can ring to the inductor and operate with higher ripple current. This twice its nominal value, possibly exceeding the LT3681’s allows you to use a physically smaller inductor, or one voltage rating. This situation is easily avoided (see the Hot with a lower DCR resulting in higher effi ciency. There are Plugging Safely section). several graphs in the Typical Performance Characteristics For space sensitive applications, a 2.2µF ceramic capaci- section of this data sheet that show the maximum load tor can be used for local bypassing of the LT3681 input. current as a function of input voltage and inductor value However, the lower input capacitance will result in in- for several popular output voltages. Low inductance may creased input current ripple and input voltage ripple, and result in discontinuous mode operation, which is okay may couple noise into other circuitry. Also, the increased but further reduces maximum load current. For details of voltage ripple will raise the minimum operating voltage maximum output current and discontinuous mode opera- of the LT3681 to ~3.7V. tion, see Linear Technology Application Note 44. Finally, for duty cycles greater than 50% (V /V > 0.5), there OUT IN Output Capacitor and Output Ripple is a minimum inductance required to avoid subharmonic The output capacitor has two essential functions. Along oscillations. See Application Note 19. with the inductor, it fi lters the square wave generated by the Input Capacitor LT3681 to produce the DC output. In this role it determines the output ripple, and low impedance at the switching Bypass the input of the LT3681 circuit with a ceramic capaci- frequency is important. The second function is to store tor of X7R or X5R type. Y5V types have poor performance energy in order to satisfy transient loads and stabilize the over temperature and applied voltage, and should not be LT3681’s control loop. Ceramic capacitors have very low used. A 4.7µF to 10µF ceramic capacitor is adequate to equivalent series resistance (ESR) and provide the best bypass the LT3681 and will easily handle the ripple current. ripple performance. A good starting value is: Note that larger input capacitance is required when a lower 100 switching frequency is used. If the input power source has C = OUT high impedance, or there is signifi cant inductance due to V f OUTSW long wires or cables, additional bulk capacitance may be where f is in MHz, and C is the recommended necessary. This can be provided with a low performance SW OUT output capacitance in µF. Use X5R or X7R types. This electrolytic capacitor. choice will provide low output ripple and good transient Step-down regulators draw current from the input sup- response. Transient performance can be improved with ply in pulses with very fast rise and fall times. The input a higher value capacitor if the compensation network is capacitor is required to reduce the resulting voltage also adjusted to maintain the loop bandwidth. A lower ripple at the LT3681 and to force this very high frequency value of output capacitor can be used to save space and switching current into a tight local loop, minimizing EMI. cost but transient performance will suffer. See the Fre- A 4.7µF capacitor is capable of this task, but only if it is quency Compensation section to choose an appropriate placed close to the LT3681 and the catch diode (see the compensation network. PCB Layout section). A second precaution regarding the 3681f 11

LT3681 APPLICATIONS INFORMATION Table 2. Capacitor Vendors VENDOR PHONE URL PART SERIES COMMENTS Panasonic (714) 373-7366 www.panasonic.com Ceramic, Polymer, EEF Series Tantalum Kemet (864) 963-6300 www.kemet.com Ceramic, Tantalum T494, T495 Sanyo (408) 749-9714 www.sanyovideo.com Ceramic, Polymer, POSCAP Tantalum Murata (408) 436-1300 www.murata.com Ceramic AVX www.avxcorp.com Ceramic, Tantalum TPS Series Taiyo Yuden (864) 963-6300 www.taiyo-yuden.com Ceramic When choosing a capacitor, look carefully through the frequencies, generating audible noise. Since the LT3681 data sheet to fi nd out what the actual capacitance is under operates at a lower current limit during Burst Mode op- operating conditions (applied voltage and temperature). eration, the noise is typically very quiet to a casual ear. A physically larger capacitor, or one with a higher voltage If this is unacceptable, use a high performance tantalum rating, may be required. High performance tantalum or or electrolytic capacitor at the output. electrolytic capacitors can be used for the output capacitor. A fi nal precaution regarding ceramic capacitors concerns Low ESR is important, so choose one that is intended for the maximum input voltage rating of the LT3681. A ceramic use in switching regulators. The ESR should be specifi ed input capacitor combined with trace or cable inductance by the supplier, and should be 0.05Ω or less. Such a forms a high quality (under damped) tank circuit. If the capacitor will be larger than a ceramic capacitor and will LT3681 circuit is plugged into a live supply, the input volt- have a larger capacitance, because the capacitor must be age can ring to twice its nominal value, possibly exceeding large to achieve low ESR. Table 2 lists several capacitor the LT3681’s rating. This situation is easily avoided (see vendors. the Hot Plugging Safely section). Catch Diode Frequency Compensation The integral power Schottky catch diode conducts current only during switch off time. Average forward current in The LT3681 uses current mode control to regulate the normal operation can be calculated from: output. This simplifi es loop compensation. In particular, the LT3681 does not require the ESR of the output capacitor I = I (V – V )/V D(AVG) OUT IN OUT IN for stability, so you are free to use ceramic capacitors to where IOUT is the output load current. achieve low output ripple and small circuit size. Frequency compensation is provided by the components tied to the Ceramic Capacitors V pin, as shown in Figure 2. Generally a capacitor (C ) C C Ceramic capacitors are small, robust and have very low and a resistor (R ) in series to ground are used. In ad- C ESR. However, ceramic capacitors can cause problems dition, there may be a lower value capacitor in parallel. when used with the LT3681 due to their piezoelectric nature. This capacitor (C ) is not part of the loop compensation F When in Burst Mode operation, the LT3681’s switching but is used to fi lter noise at the switching frequency, and frequency depends on the load current, and at very light is required only if a phase-lead capacitor is used or if the loads the LT3681 can excite the ceramic capacitor at audio output capacitor has high ESR. 3681f 12

LT3681 APPLICATIONS INFORMATION Loop compensation determines the stability and transient VIN = 12V performance. Designing the compensation network is a bit complicated and the best values depend on the ap- plication and in particular the type of output capacitor. A IL 1A/DIV practical approach is to start with one of the circuits in this data sheet that is similar to your application and tune the compensation network to optimize the performance. VOUT Stability should then be checked across all operating 100mV/DIV conditions, including load current, input voltage and temperature. The LT1375 data sheet contains a more thorough discussion of loop compensation and describes 10(cid:0)s/DIV 3681 F03 how to test the stability using a transient load. Figure 2 Figure 3. Transient Load Response of the LT3681 3.3V Application shows an equivalent circuit for the LT3681 control loop. as the Load Current is Stepped from 500mA to 1500mA. The error amplifi er is a transconductance amplifi er with fi nite output impedance. The power section, consisting of Burst Mode Operation the modulator, power switch and inductor, is modeled as a transconductance amplifi er generating an output cur- To enhance effi ciency at light loads, the LT3681 auto- rent proportional to the voltage at the V pin. Note that matically switches to Burst Mode operation which keeps C the output capacitor integrates this current, and that the the output capacitor charged to the proper voltage while capacitor on the V pin (C ) integrates the error ampli- minimizing the input quiescent current. During Burst Mode C C fi er output current, resulting in two poles in the loop. In operation, the LT3681 delivers single cycle bursts of current most cases a zero is required and comes from either the to the output capacitor followed by sleep periods where output capacitor ESR or from a resistor R in series with the output power is delivered to the load by the output C C . This simple model works well as long as the value capacitor. In addition, V and BIAS quiescent currents are C IN of the inductor is not too high and the loop crossover reduced to typically 20µA and 50µA respectively during frequency is much lower than the switching frequency. the sleep time. As the load current decreases towards a A phase lead capacitor (C ) across the feedback divider no load condition, the percentage of time that the LT3681 PL may improve the transient response. Figure 3 shows the operates in sleep mode increases and the average input transient response when the load current is stepped from current is greatly reduced resulting in higher effi ciency. 500mA to 1500mA and back to 500mA. See Figure 4. LT3681 CURRENT MODE SW POWER STAGE OUTPUT gm = 3.5mho AMERPRLIOFRIER R1 CPL VILIONA =D 1=2 1V0; mVOAUT = 3.3V FB IL – 0.5A/DIV gm = 330µmho ESR + 1.265V + C1 3Meg C1 VSW 5V/DIV POLYMER CERAMIC OR VC GND TANTALUM VOUT CF RC R2 10mV/DIV CC 5(cid:0)s/DIV 3681 F04 3681 F02 Figure 2. Model for Loop Response Figure 4. Burst Mode Operation 3681f 13

LT3681 APPLICATIONS INFORMATION BOOST and BIAS Pin Considerations boost diode can be tied to V ; however, this restricts the IN input range to one-half of the absolute maximum rating Capacitor C3 and the internal boost Schottky diode (see of the BOOST pin. the Block Diagram) are used to generate a boost volt- age that is higher than the input voltage. In most cases At light loads, the inductor current becomes discontinuous a 0.22µF capacitor will work well. Figure 5 shows three and the effective duty cycle at the BOOST pin (not the SW ways to arrange the boost circuit. The BOOST pin must be pin) can be very high. This reduces the minimum input more than 2.3V above the SW pin for best effi ciency. For voltage to approximately 300mV above V . At higher load OUT outputs of 2.8V and above, the standard circuit (Figure 5a) currents, the inductor current is continuous and the duty is best. For outputs between 2.8V and 3V, use a 1µF boost cycle is limited by the maximum duty cycle of the LT3681, capacitor. A 2.5V output presents a special case because it requiring a higher input voltage to maintain regulation. is marginally adequate to support the boosted drive stage while using the internal boost diode. For reliable BOOST pin operation with 2.5V outputs use a good external Schottky VOUT diode (such as the ON Semi MBR0540), and a 1µF boost BD BOOST capacitor (see Figure 5b). For lower output voltages the boost diode can be tied to the input (Figure 5c), or to VIN VIN LT3681 DC C3 another supply greater than 2.8V. The circuit in Figure 5a SW 4.7(cid:0)F GND DA is more effi cient because the BOOST pin current and BIAS COUT pin quiescent current comes from a lower voltage source. You must also be sure that the maximum voltage ratings of the BOOST and BIAS pins are not exceeded. (5a) For VOUT > 2.8V The minimum operating voltage of an LT3681 application VOUT is limited by the minimum input voltage (3.6V) and by the BD D2 maximum duty cycle as outlined in a previous section. For BOOST proper startup, the minimum input voltage is also limited VIN VIN LT3681 DC C3 by the boost circuit. If the input voltage is ramped slowly, SW or the LT3681 is turned on with its RUN/SS pin when the 4.7(cid:0)F GND DA output is already in regulation, then the boost capacitor COUT may not be fully charged. Because the boost capacitor is charged with the energy stored in the inductor, the circuit (5b) For 2.5V < V < 2.8V OUT will rely on some minimum load current to get the boost circuit running properly. This minimum load will depend VOUT on input and output voltages, and on the arrangement of BD the boost circuit. The minimum load generally goes to zero BOOST once the circuit has started. If, however, the LT3681 is VIN VIN LT3681 DC C3 started by the RUN/SS pin and the output is discharged, the SW discharged output capacitance will often present enough 4.7(cid:0)F GND DA COUT of a load to allow the circuit to start. Figure 6 gives plots of the input voltage required for three different situations: the worst case situation where RUN/SS is tied to V and IN (5c) For V < 2.5V OUT V is ramped up very slowly, the minimum input voltage 3681 FO5 IN at which the circuit will regulate when start-up is controlled by RUN/SS, and the minimum input voltage required to Figure 5. Three Circuits For Generating The Boost Voltage maintain output regulation. For lower start-up voltage, the 3681f 14

LT3681 APPLICATIONS INFORMATION 6.0 Synchronization VOUT = 3.3V 5.5 TA = 25(cid:0)C L = 4.7(cid:1) f = 800 kHz The internal oscillator of the LT3681 can be synchronized 5.0 GE (V) 4.5 to an external 275kHz to 475kHz clock by using a 5pF OLTA 4.0 to 20pF capacitor to connect the clock signal to the RT V PUT 3.5 pin. The resistor tying the RT pin to ground should be N I 3.0 chosen such that the LT3681 oscillates 20% lower than TO START (RUN/SS = VIN) 2.5 TO START (RUN/SS CONTROL) the intended synchronization frequency (see Setting the TO RUN 2.0 Switching Frequency section). 0.001 0.01 0.1 1 10 LOAD CURRENT (A) The LT3681 should not be synchronized until its output 787...005 TVLA O= U= 4T 2. 7=5(cid:1) (cid:0) 5C.0V idso nneea wr ritehg tuhlaet sioyns taesm in mdiiccarotecdo nbtyr othllee rP/mG iflc arogp. rTohciess csaonr boer 6.5 f = 800 kHz GE (V) 65..05 wsigitnha al idsi sacpreptleie dci rwcuhiitl eb yth ues PinGg itsh elo PwG, tohuet pLuTt3. 6If8 a1 smynayc VOLTA 5.0 exhibit erratic operation. UT 4.5 NP 4.0 I 3.5 When applying a sync signal, positive clock transitions 3.0 TO START (RUN/SS = VIN) TO START (RUN/SS CONTROL) reset LT3681’s internal clock and negative transitions 2.5 TO RUN 2.0 initiate a switch cycle. The amplitude of the sync signal 0.001 0.01 0.1 1 10 LOAD CURRENT (A) must be at least 2V. The sync signal duty cycle can range 3681 F06 from 5% up to a maximum value given by the following Figure 6. The Minimum Input Voltage Depends on equation: Output Voltage, Load Current and Boost Circuit Soft-Start DC ( )=⎛⎜1– VOUT+VD ⎞⎟ –f (cid:127)6000ns SYNCMAX ⎝ V –V +V ⎠ SW The RUN/SS pin can be used to soft-start the LT3681, IN SW D reducing the maximum input current during start-up. where V is the programmed output voltage, V is the The RUN/SS pin is driven through an external RC fi lter to OUT D diode forward drop, V is the typical input voltage, V create a voltage ramp at this pin. Figure 7 shows the start- IN SW is the switch drop, and f is the desired switching fre- up and shut-down waveforms with the soft-start circuit. SW quency. For example, a 24V input to 5V output at 300kHz By choosing a large RC time constant, the peak start-up can be synchronized to a square wave with a maximum current can be reduced to the current that is required to duty cycle of 60%. For some applications, such as 12V regulate the output, with no overshoot. Choose the value IN to 5V at 350kHz, the maximum allowable sync duty of the resistor so that it can supply 20µA when the RUN/SS OUT cycle will be less than 50%. If a low duty cycle clock cannot pin reaches 2.3V. be obtained from the system, then a one-shot should be used between the sync signal and the LT3681. The value of the coupling capacitor which connects the clock signal RUN I1LA/DIV to the RT pin should be chosen based on the clock signal 15k amplitude. Good starting values for 3.3V and 5V clock 0.22µF RUNG/SNSD V2VR/UDNI/VSS signals are 10pF and 5pF, respectively. These values should be tested and adjusted for each individual application to VOUT assure reliable operation. 2V/DIV 2ms/DIV 3681 F07 Figure 7. To Soft-Start the LT3681, Add a Resistor and Capacitor to the RUN/SS Pin 3681f 15

LT3681 APPLICATIONS INFORMATION Caution should be used when synchronizing more than a battery or some other supply is diode ORed with the 50% above the initial switching frequency (as set by the LT3681’s output. If the V pin is allowed to fl oat and the IN RT resistor) because at higher clock frequencies the RUN/SS pin is held high (either by a logic signal or because amplitude of the internal slope compensation used to it is tied to V ), then the LT3681’s internal circuitry will IN prevent subharmonic switching is reduced. This type of pull its quiescent current through its SW pin. This is fi ne subharmonic switching only occurs at input voltages less if your system can tolerate a few mA in this state. If you than twice output voltage. Higher inductor values will tend ground the RUN/SS pin, the SW pin current will drop to to reduce this problem. essentially zero. However, if the V pin is grounded while IN the output is held high, then parasitic diodes inside the Reversed Input Protection LT3681 can pull large currents from the output through In some systems, the output may be held high when the the SW pin and the V pin. Figure 8 shows a circuit that IN input to the LT3681 is absent. This may occur in battery will run only when the input voltage is present and that charging applications or in battery backup systems where protects against a shorted or reversed input. D4 MBRS140 VIN VIN BD BOOST LT3681 RUN/SS SW VOUT VC DC GND DA FB BACKUP 3681 F08 Figure 8. Diode D4 Prevents a Shorted Input from Discharging a Backup Battery Tied to the Output. It Also Protects the Circuit from a Reversed Input. The LT3681 Runs Only When the Input is Present 3681f 16

LT3681 APPLICATIONS INFORMATION PCB Layout unbroken ground plane below these components. The SW and BOOST nodes should be as small as possible. Finally, For proper operation and minimum EMI, care must be taken keep the FB and V nodes small so that the ground traces during printed circuit board layout. Figure 9 shows the C will shield them from the SW and BOOST nodes. Each of recommended component placement with trace, ground the Exposed Pads on the bottom of the package must be plane and via locations. Note that large, switched currents soldered to copper pours so that the pad acts as a heat fl ow in the LT3681’s V and SW pins, the integrated IN sink. To keep thermal resistance low, extend the ground Schottky diode the input capacitor (C ) and the output IN plane as much as possible, and add thermal vias under capacitor (C ). The loop formed by these components OUT and near the LT3681 to additional ground planes within should be as small as possible. These components, the circuit board and on the bottom side. Keep in mind along with the inductor and output capacitor, should be that the thermal design must keep the junctions of the IC placed on the same side of the circuit board, and their and power diode below the specifi ed absolute maximum connections should be made on that layer. Place a local, temperature of 125°C. 1 14 VIN 2 13 3 12 4 11 CIN 5 10 6 9 7 8 COUT 3681 F11 VIAS TO GND VIAS TO VIN VIAS TO VOUT VIAS TO DC HEATSINK Figure 9. A Good PCB Layout Ensures Proper, Low EMI Operation 3681f 17

LT3681 APPLICATIONS INFORMATION Hot Plugging Safely 125°C. When operating at high ambient temperatures, the maximum load current should be derated as the ambient The small size, robustness and low impedance of ceramic temperature approaches 125°C. capacitors make them an attractive option for the input bypass capacitor of LT3681 circuits. However, these Power dissipation within the LT3681 can be estimated capacitors can cause problems if the LT3681 is plugged by calculating the total power loss from an effi ciency into a live supply (see Linear Technology Application measurement. The die temperature is calculated by Note 88 for a complete discussion). The low loss ceramic multiplying the LT3681 power dissipation by the thermal capacitor, combined with stray inductance in series with resistance from junction to ambient. the power source, forms an under damped tank circuit, Also keep in mind that the leakage current of the integrated and the voltage at the V pin of the LT3681 can ring IN power Schottky diode, like all Schottky diodes, goes up to twice the nominal input voltage, possibly exceeding with junction temperature. The curves in Figure 11 show the LT3681’s rating and damaging the part. If the input how the leakage current in the power Schottky diode supply is poorly controlled or the user will be plugging varies with temperature and reverse voltage. When the the LT3681 into an energized supply, the input network power switch is closed, the power Schottky diode is in should be designed to prevent this overshoot. Figure 10 parallel with the power converter’s output fi lter stage. As shows the waveforms that result when an LT3681 circuit a result, an increase in a diode’s leakage current results is connected to a 24V supply through six feet of 24-gauge in an effective increase in the load, and a corresponding twisted pair. The fi rst plot (10a) is the response with a increase in input power. 4.7µF ceramic capacitor at the input. The input voltage rings as high as 50V and the input current peaks at 26A. 10000 A good solution is shown in Figure 10b. A 0.7Ω resistor VR = 10V VR = 25V is added in series with the input to eliminate the voltage VR = 40V overshoot (it also reduces the peak inrush current). A µA) 1000 T ( 0.1µF capacitor improves high frequency fi ltering. For N E R high input voltages its impact on effi ciency is minor, UR 100 C reducing effi ciency by 1.5 percent for a 5V output at GE A K full load operating from 24V. Another effective method A LE 10 of reducing the overshoot is to add a 22µF aluminum electrolytic capacitor, as shown in Figure 10c. 1 –50 0 50 100 150 High Temperature Considerations TEMPERATURE (°C) 3681 F12 The PCB must provide heat sinking to keep the LT3681 Figure 11. Like all Schottky Diodes, the LT3681 Integrated Power cool. The Exposed Pads on the bottom of the package Diode Leakage Current Varies with Temperature and Applied Reverse Voltage V . must be soldered to copper pours, which in turn should be R tied to large copper layers below with thermal vias; these Other Linear Technology Publications layers will spread the heat dissipated by the LT3681. Place additional vias to reduce thermal resistance further. With Application Notes 19, 35, 44 and 76 contain more detailed these steps, the thermal resistance from die (or junction) descriptions and design information for buck regulators to ambient can be reduced to θ = 35°C/W or less. With and other switching regulators. The LT1376 data sheet JA 100 LFPM airfl ow, this resistance can fall by another 25%. has a more extensive discussion of output ripple, loop Further increases in airfl ow will lead to lower thermal resis- compensation and stability testing. Design Note 100 tance. Because of the large output current capability of the shows how to generate a bipolar output supply using a LT3681, it is possible to dissipate enough power to raise buck regulator. the junction temperature beyond the absolute maximum of 3681f 18

LT3681 APPLICATIONS INFORMATION CLOSING SWITCH DANGER SIMULATES HOT PLUG VIN IIN VIN 20V/DIV LT3681 RINGING VIN MAY EXCEED + ABSOLUTE MAXIMUM RATING 4.7(cid:0)F LOW STRAY IIN 10A/DIV IMPEDANCE INDUCTANCE ENERGIZED DUE TO 6 FEET 24V SUPPLY (2 METERS) OF 20(cid:0)s/DIV TWISTED PAIR (10a) 0.7(cid:0) VIN LT3681 20V/DIV + 0.1(cid:0)F 4.7(cid:0)F IIN 10A/DIV (10b) 20(cid:1)s/DIV VIN LT3681 20V/DIV + + 22(cid:1)F 35V 4.7(cid:1)F AI.EI. IIN 10A/DIV (10c) 20(cid:1)s/DIV 3681 F10 Figure 10. A Well Chosen Input Network Prevents Input Voltage Overshoot and Ensures Reliable Operation when the LT3681 is Connected to a Live Supply 3681f 19

LT3681 TYPICAL APPLICATIONS 5V Step-Down Converter VIN VOUT 6.3V TO 34V 5V VIN BD 2A ON OFF RUN/SS BOOST L 0.47(cid:0)F 6.8(cid:0)H 4.7(cid:0)F VC LT3681 SW DC RT 20k DA PG BIAS 590k 60.4k FB GND 330pF 200k 22(cid:0)F f = 800kHz 3681 TA02 L: NEC PLC-0745-6R8 3.3V Step-Down Converter VIN VOUT 4.4V TO 34V 3.3V VIN BD 2A ON OFF RUN/SS BOOST L 0.47(cid:0)F 4.7(cid:0)H 4.7(cid:0)F VC LT3681 SW DC RT 20k DA PG BIAS 324k 60.4k FB GND 330pF 200k 22(cid:0)F f = 800kHz 3681 TA03 L: NEC PLC-0745-4R7 3681f 20

LT3681 TYPICAL APPLICATIONS 2.5V Step-Down Converter VIN VOUT 4V TO 34V 2.5V VIN BD D2 2A ON OFF RUN/SS BOOST L 1(cid:0)F 4.7(cid:0)H VC SW 4.7(cid:0)F LT3681 DC RT 22k DA PG BIAS 196k 84.5k FB GND 680pF 200k 47(cid:0)F f = 600kHz 3681 TA04 D2: MBR0540 L: SUMIDA CDRH8D43-4R7 5V, 2MHz Step-Down Converter VIN VOUT 8.6V TO 22V 5V TRANSIENT TO 36V VIN BD 2A ON OFF RUN/SS BOOST L 0.47(cid:0)F 2.2(cid:0)H 2.2(cid:0)F VC LT3681 SW DC RT 6.8k DA PG BIAS 590k 16.9k FB GND 470pF 200k 10(cid:0)F f = 2MHz 3681 TA05 L: TOKO FDV0620-2R2 3681f 21

LT3681 TYPICAL APPLICATIONS 12V Step-Down Converter VIN VOUT 15V TO 34V 12V VIN BD 2A ON OFF RUN/SS BOOST L 0.47(cid:0)F 10(cid:0)H 10(cid:0)F VC LT3681 SW DC RT 24k DA PG BIAS 845k 60.4k FB GND 470pF 100k 22(cid:0)F f = 800kHz 3681 TA06 L: SUMIDA CDRH8D43-100 1.8V Step-Down Converter VIN VOUT 3.6V TO 27V 1.8V VIN BD 2A ON OFF RUN/SS BOOST 0.47µF L 3.3µH 10µF VC LT3681 SW DC RT DA 15k PG BIAS 84.5k 105k FB GND 330pF 200k 47µF f = 500kHz 3681 TA09 L: SUMIDA CDRH8D28-3R3 3681f 22

LT3681 PACKAGE DESCRIPTION DE14MA Package 14-Lead Plastic DFN, Multichip (4mm × 3mm) (Reference LTC DWG # 05-08-1731 Rev 0) 1.78 ±0.05 0.70 ±0.05 3.50 ±0.05 0.10 TYP 0.51 TYP 1.65 ± 0.05 1.65 ± 0.05 2.10 ±0.05 ±10.0.075 PACKAGE OUTLINE 0.25 ± 0.05 0.50 BSC 3.00 REF RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 4.00 ±0.10 R = 0.115 1.78 ±0.10 TYP (2 SIDES) 8 14 R = 0.05 TYP 1.07 3.00 ±0.10 1.65 ± 0.10 ±0.10 0.10 TYP 1.65 ± 0.10 (2 SIDES) 0.51 TYP PIN 1 TOP MARK (SEE NOTE 6) PIN 1 NOTCH 0.200 REF 0.75 ±0.05 0.40 ± 0.10 7 0.251 ± 0.05 R0. 2=5 0 ×.2 405 O°R 0.50 BSC CHAMFER 3.00 REF (DE14MA) DFN 1106 REV Ø 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING PROPOSED IS NOT A JEDEC PACKAGE OUTLINE 2.DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 3681f Information furnished by Linear Technology Corporation is believed to be accurate and reliable. 23 However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

LT3681 TYPICAL APPLICATIOU 1.265V Step-Down Converter VIN VOUT 3.6V TO 27V 1.265V VIN BD 2A ON OFF RUN/SS BOOST L 0.47(cid:0)F 3.3(cid:0)H 4.7(cid:0)F VC LT3681 SW DC RT DA 13k PG BIAS 105k FB GND 330pF 47(cid:0)F f = 500kHz 3681 TA10 L: NEC PLC-0745-3R3 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LT1766 60V, 1.2A (I ), 200kHz, High Effi ciency Step-Down DC/DC V = 5.5V to 60V, V = 1.20V, I = 2.5mA, I 25μA OUT IN OUT Q SD Converter TSSOP16E Package LT1767 25V, 1.2A (I ), 1.2MHz, High Effi ciency Step-Down DC/DC V = 3.0V to 25V, V = 1.20V, I = 1mA, I < 6μA OUT IN OUT Q SD Converter MS8E Package LT1933 500mA (I ), 500kHz Step-Down Switching Regulator in SOT-23 V = 3.6V to 36V, V = 1.2V, I = 1.6mA, I < 1μA OUT IN OUT Q SD ThinSOT Package LT1936 36V, 1.4A (I ), 500kHz High Effi ciency Step-Down DC/DC Converter V = 3.6V to 36V, V = 1.2V, I = 1.9mA, I < 1μA OUT IN OUT Q SD MS8E Package LT1940 Dual 25V, 1.4A (I ), 1.1MHz, High Effi ciency Step-Down DC/DC V = 3.6V to 25V, V = 1.20V, I = 3.8mA, I < 30μA OUT IN OUT Q SD Converter TSSOP16E Package LT1976/LT1977 60V, 1.2A (I ), 200kHz/500kHz, High Effi ciency Step-Down DC/DC V = 3.3V to 60V, V = 1.20V, I = 100μA, I < 1μA OUT IN OUT Q SD Converter with Burst Mode TSSOP16E Package LT3434/LT3435 60V, 2.4A (I ), 200/500kHz, High Effi ciency Step-Down DC/DC V = 3.3V to 60V, V = 1.20V, I = 100μA, I < 1μA OUT IN OUT Q SD Converter with Burst Mode TSSOP16E Package LT3437 60V, 400mA (I ), MicroPower Step-Down DC/DC Converter with V = 3.3V to 60V, V = 1.25V, I = 100μA, I < 1μA OUT IN OUT Q SD Burst Mode (3mm × 3mm) DFN-10 TSSOP16E Package LT3480 36V with Transient Protection to 60V, 2A (I ), 2.4MHz, High V = 3.6V to 38V, V = 0.78V, I = 70μA, I < 1μA OUT IN OUT Q SD Effi ciency Step-Down DC/DC Converter with Burst Mode Operation (3mm × 3mm) DFN-10 MSOP10E Package LT3481 34V with Transient Protection to 36V, 2A (I ), 2.8MHz, High V = 3.6V to 34V, V = 1.265V, I = 50μA, I < 1μA OUT IN OUT Q SD Effi ciency Step-Down DC/DC Converter with Burst Mode Operation (3mm × 3mm) DFN-10 MSOP10E Package LT3493 36V, 1.4A (I ), 750kHz High Effi ciency Step-Down DC/DC Converter V = 3.6V to 36V, V = 0.8V, I = 1.9mA, I < 1μA OUT IN OUT Q SD (2mm × 3mm)DFN-6 Package LT3505 36V with Transient Protection to 40V, 1.4A (I ), 3MHz, High V = 3.6V to 34V, V = 0.78V, I = 2mA, I < 2μA OUT IN OUT Q SD Effi ciency Step-Down DC/DC Converter (3mm × 3mm) DFN-8 MSOP8E Package LT3508 36V with Transient Protection to 40V, Dual 1.4A (I ), 3MHz, High V = 3.7V to 37V, V = 0.8V, I = 4.6mA, I < 1μA OUT IN OUT Q SD Effi ciency Step-Down DC/DC Converter (4mm × 4mm) QFN-24 TSSOP16E Package LT3684 34V with Transient Protection to 36V, 2A (I ), 2.8MHz, High V = 3.6V to 34V, V = 01.26V, I = 850mA, I < 1μA OUT IN OUT Q SD Effi ciency Step-Down DC/DC Converter (3mm × 3mm) DFN-10 MSOP10E Package LT3685 36V with Transient Protection to 60V, 2A (I ), 2.4MHz, High V = 3.6V to 38V, V = 0.78V, I = 70mA, I < 1μA OUT IN OUT Q SD Effi ciency Step-Down DC/DC Converter (3mm × 3mm) DFN-10 MSOP10E Package 3681f 24 Linear Technology Corporation LT 0407 • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com © LINEAR TECHNOLOGY CORPORATION 2006