LT3092 200mA 2-Terminal Programmable Current Source FeaTures DescripTion n Programmable 2-Terminal Current Source The LT®3092 is a programmable 2-terminal current n Maximum Output Current: 200mA source. It requires only two resistors to set an output n Wide Input Voltage Range: 1.2V to 40V current between 0.5mA and 200mA. A multitude of analog n Input/Output Capacitors Not Required techniques lend themselves to actively programming the n Resistor Ratio Sets Output Current output current. The LT3092 is stable without input and n Initial Set Pin Current Accuracy: 1% output capacitors, offering high DC and AC impedance. This n Reverse-Voltage Protection feature allows operation in intrinsically safe applications. n Reverse-Current Protection The SET pin features 1% initial accuracy and low tem- n <0.001%/V Line Regulation Typical perature coefficient. Current regulation is better than n Current Limit and Thermal Shutdown Protection 10ppm/V from 1.5V to 40V. n Available in 8-Lead SOT-23, 3-Lead SOT-223 and 8-Lead 3mm × 3mm DFN Packages The LT3092 can operate in a 2-terminal current source configuration in series with signal lines. It is ideal for driv- ing sensors, remote supplies, and as a precision current applicaTions limiter for local supplies. n 2-Terminal Floating Current Source Internal protection circuitry includes reverse-battery and n GND Referred Current Source reverse-current protection, current limiting and thermal n Variable Current Source limiting. The LT3092 is offered in the 8-lead TSOT-23, n In-Line Limiter 3-lead SOT-223 and 8-lead 3mm × 3mm DFN packages. n Intrinsic Safety Circuits L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Typical applicaTion Adjustable 2-Terminal Current Source SET Pin Current vs Temperature VIN – VOUT = 1.2V TO 40V 10.100 LT3092 IN 10.075 10µA A) 10.050 µ T ( 10.025 + EN R R 10.000 – U C N PI 9.975 SET OUT ET S 9.950 RSET ROUT 9.925 3092 TA01a 9.900 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) ISOURCE=10µA•RROSUETT 3092 TA01b 3092fc 1 For more information www.linear.com/LT3092

LT3092 absoluTe MaxiMuM raTings (Note 1) All Voltages Relative to V OUT IN Pin Voltage Relative to SET, OUT ........................±40V Operating Junction Temperature Range (Notes 2, 8) SET Pin Current (Note 6) .....................................±15mA E, I Grades .........................................–40°C to 125°C SET Pin Voltage (Relative to OUT, Note 6) ..............±10V MP Grade ...........................................–55°C to 125°C Output Short-Circuit Duration ..........................Indefinite Storage Temperature Range ..................–65°C to 150°C Lead Temperature (ST, TS8 Packages Only) Soldering, 10 sec ..............................................300°C pin conFiguraTion TOP VIEW TOP VIEW 3 IN TOP VIEW OUT 1 8 IN OUT 2 9 7 IN TAB IS OUT 2 OUT ONUCT 12 87 IINN NC 3 6 NC OUT 3 6 NC SET 4 5 NC 1 SET OUT 4 5 SET ST PACKAGE TS8 PACKAGE DD PACKAGE 3-LEAD PLASTIC SOT-223 8-LEAD PLASTIC TSOT-23 8-LEAD (3mm × 3mm) PLASTIC DFN TJMAX = 125°C, θJA = 24°C/W, θJC = 15°C/W TJMAX = 125°C, θJA = 57°C/W, θJC = 15°C/W TJMAX = 125°C, θJA = 28°C/W, θJC = 10°C/W TAB IS OUT, MUST BE SOLDERED TO OUT ON THE PCB. EXPOSED PAD (PIN 9) IS OUT, MUST BE SOLDERED TO OUT SEE THE APPLICATIONS INFORMATION SECTION. ON THE PCB. SEE THE APPLICATIONS INFORMATION SECTION. 3092fc 2 For more information www.linear.com/LT3092

LT3092 orDer inForMaTion http://www.linear.com/product/LT3092#orderinfo LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LT3092EDD#PBF LT3092EDD#TRPBF LFJD 8-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C LT3092IDD#PBF LT3092IDD#TRPBF LFJD 8-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C LT3092EST#PBF LT3092EST#TRPBF 3092 3-Lead Plastic SOT-223 –40°C to 125°C LT3092IST#PBF LT3092IST#TRPBF 3092 3-Lead Plastic SOT-223 –40°C to 125°C LT3092MPST#PBF LT3092MPST#TRPBF 3092MP 3-Lead Plastic SOT-223 –55°C to 125°C LT3092ETS8#PBF LT3092ETS8#TRPBF LTFJW 8-Lead Plastic SOT-23 –40°C to 125°C LT3092ITS8#PBF LT3092ITS8#TRPBF LTFJW 8-Lead Plastic SOT-23 –40°C to 125°C LEAD BASED FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LT3092EDD LT3092EDD#TR LFJD 8-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C LT3092IDD LT3092IDD#TR LFJD 8-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C LT3092EST LT3092EST#TR 3092 3-Lead Plastic SOT-223 –40°C to 125°C LT3092IST LT3092IST#TR 3092 3-Lead Plastic SOT-223 –40°C to 125°C LT3092MPST LT3092MPST#TR 3092MP 3-Lead Plastic SOT-223 –55°C to 125°C LT3092ETS8 LT3092ETS8#TR LTFJW 8-Lead Plastic SOT-23 –40°C to 125°C LT3092ITS8 LT3092ITS8#TR LTFJW 8-Lead Plastic SOT-23 –40°C to 125°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix. 3092fc 3 For more information www.linear.com/LT3092

LT3092 elecTrical characTerisTics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T = 25°C. (Note 2) J PARAMETER CONDITIONS MIN TYP MAX UNITS SET Pin Current I V = 2V, I = 1mA 9.9 10 10.1 µA SET IN LOAD 2V ≤ V ≤ 40V, 1mA ≤ I ≤ 200mA l 9.8 10 10.2 µA IN LOAD Offset Voltage (V – V ) V V = 2V, I = 1mA –2 2 mV OUT SET OS IN LOAD V = 2V, I = 1mA l –4 4 mV IN LOAD Current Regulation (Note 7) ∆I ∆I = 1mA to 200mA –0.1 nA SET LOAD ∆V ∆I = 1mA to 200mA l –0.5 –2 mV OS LOAD Line Regulation ∆I ∆V = 2V to 40V, I = 1mA 0.03 0.2 nA/V SET IN LOAD ∆V ∆V = 2V to 40V, I = 1mA 0.003 0.010 mV/V OS IN LOAD Minimum Load Current (Note 3) 2V ≤ V ≤ 40V l 300 500 µA IN Dropout Voltage (Note 4) I = 10mA l 1.22 1.45 V LOAD I = 200mA l 1.3 1.65 V LOAD Current Limit V = 5V, V = 0V, V = –0.1V l 200 300 mA IN SET OUT Reference Current RMS Output Noise (Note 5) 10Hz ≤ f ≤ 100kHz 0.7 nA RMS Ripple Rejection f = 120Hz, V = 0.5V , I = 0.1A, 90 dB RIPPLE P-P LOAD C = 0.1µF, C = 2.2µF SET OUT f = 10kHz 75 dB f = 1MHz 20 dB Thermal Regulation I 10ms Pulse 0.003 %/W SET Note 1: Stresses beyond those listed under Absolute Maximum Ratings Note 4: For the LT3092, dropout is specified as the minimum input-to- may cause permanent damage to the device. Exposure to any Absolute output voltage differential required supplying a given output current. Maximum Rating condition for extended periods may affect device Note 5: Adding a small capacitor across the reference current resistor reliability and lifetime. lowers output noise. Adding this capacitor bypasses the resistor shot noise Note 2: Unless otherwise specified, all voltages are with respect to V . and reference current noise (see the Applications Information section). OUT The LT3092E is tested and specified under pulse load conditions such Note 6: Diodes with series 1k resistors clamp the SET pin to the OUT pin. that TJ @ TA. The LT3092E is 100% tested at TA = 25°C. Performance at These diodes and resistors only carry current under transient overloads. –40°C and 125°C is assured by design, characterization, and correlation Note 7: Current regulation is Kelvin-sensed at the package. with statistical process controls. The LT3092I is guaranteed to meet all Note 8: This IC includes overtemperature protection that protects the data sheet specifications over the full –40°C to 125°C operating junction device during momentary overload conditions. Junction temperature temperature range. The LT3092MP is 100% tested and guaranteed over exceeds the maximum operating junction temperature when the –55°C to 125°C operating junction temperature range. overtemperature protection is active. Continuous operation above the Note 3: Minimum load current is equivalent to the quiescent current of specified maximum operating junction temperature may impair device the part. Since all quiescent and drive current is delivered to the output reliability. of the part, the minimum load current is the minimum current required to maintain regulation. 3092fc 4 For more information www.linear.com/LT3092

LT3092 Typical perForMance characTerisTics SET Pin Current SET Pin Current Distribution Offset Voltage (V – V ) OUT SET 10.100 2.0 N = 1326 10.075 1.5 A)10.050 V) 1.0 µ m URRENT (1100..000205 OLTAGE ( 00..05 C V SET PIN 99..997550 OFFSET ––01..50 9.925 –1.5 9.900 –2.0 –50 –25 0 25 50 75 100 125 150 9.80 9.90 10 10.10 10.20 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) SET PIN CURRENT DISTRIBUTION (µA) TEMPERATURE (°C) 3092 G01 3092 G02 3092 G03 Offset Voltage Distribution Offset Voltage 1.00 N = 1326 IOUT = 1mA 0.75 V) 0.50 m E ( 0.25 G A LT 0 O V ET –0.25 S F F O–0.50 –0.75 –1.00 –2 –1 0 1 2 0 5 10 15 20 25 30 35 40 VOS DISTRIBUTION (mV) INPUT-TO-OUTPUT VOLTAGE (V) 3092 G04 3092 G05 Offset Voltage Current Regulation 100 20 ∆IOUT = 1mA TO 200mA 50 T 10 VIN – VOUT = 3V 0 EN 0 R V) –50 UR –10 SET VOLTAGE (µ–––121005000 N REFERENCE CWITH LOAD (nA)–––243000 OFF–250 GE I –50 N –300 A –60 H C –350 –70 –400 –80 0 50 100 150 200 –50 –25 0 25 50 75 100 125 150 LOAD CURRENT (mA) TEMPERATURE (°C) 3092 G06 3092 G07 3092fc 5 For more information www.linear.com/LT3092

LT3092 Typical perForMance characTerisTics Minimum Output Current Dropout Voltage Dropout Voltage 600 1.6 1.6 RENT (µA) 540000 – V) (V)OUT 11..24 – V) (V)OUT 11..24 ILOAD = 200mA UT CUR 300 GE (V IN 01..80 GE (V IN 01..80 ILOAD = 10mA P A A M OUT 200 T VOLT 0.6 T VOLT 0.6 U U U M O 0.4 O 0.4 MINI 100 DROP 0.2 TTJJ == –2555°C°C DROP 0.2 TJ = 125°C 0 0 0 –50 –25 0 25 50 75 100 125 150 0 25 50 75 100 125 150 175 200 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) LOAD CURRENT (mA) TEMPERATURE (°C) 3092 G08 3092 G09 3092 G10 Current Limit Current Limit 400 500 450 350 400 300 mA) mA) 350 MIT (250 MIT (300 RENT LI210500 RENT LI 220500 R R U U 150 C100 C 100 50 50 VIN = 7V TJ = 25°C VOUT = 0V 0 0 0 2 4 6 8 10 –50 –25 0 25 50 75 100 125 150 INPUT-TO-OUTPUT DIFFERENTIAL VOLTAGE (V) TEMPERATURE (°C) 3092 G12 3092 G11 Line Transient Response Line Transient Response V) 8 V)10 GE ( 6 GE ( 8 A A LT 4 1.5 LT 6 10mA CURRENT SOURCE O O V V CONFIGURATION T 2 1mA CURRENT SOURCE 1.0 T 4 10 U U P CONFIGURATION P IN 0 0.5 DOU IN 2 5 DOU 0 EVIATPU 0 EVIATPU TT TT –0.5 IO C –5 IO C NU NU –1.0 (mRR –10 (mRR A)ENT A)ENT 0 10 20 30 40 50 60 70 80 90 100 0 10 20 30 40 50 60 70 80 90 100 TIME (µs) TIME (µs) 3092 G13 3092 G14 3092fc 6 For more information www.linear.com/LT3092

LT3092 Typical perForMance characTerisTics Turn-On Response Turn-On Response V) 8 V) 8 GE ( 6 GE ( 6 A 1mA CURRENT SOURCE A 10mA CURRENT SOURCE T T L 4 CONFIGURATION L 4 CONFIGURATION O O V V T 2 T 2 U U P P IN 0 IN 0 15 1.0 C 10 C U U 00.5 RRENT (mOUTPUT 05 RRENT (mOUTPUT A A ) ) 0 5 10 15 20 25 30 35 40 45 50 0 5 10 15 20 25 30 35 40 45 50 TIME (µs) TIME (µs) 3092 G15 3092 G16 Residual Output for Less Than Minimum Output Current Output Impedance 800 1G 700 SET PIN = 0V 100M ISOURCE = 1mA VIN VOUT VIN = 36V 10M ISOURCE = OLTAGE (mV) 654000000 RTEST VIN = 5V PEDANCE (Ω) 1010Mk 10mA V M 10k OUTPUT 320000 OUTPUT I 1010k ISOURCE = 100mA 100 10 VRSET = 100mV 0 1 0 1000 2000 10 100 1k 10k 100k 1M 10M RTEST (Ω) 3092 G17 FREQUENCY (Hz) 3092 G18 Noise Spectral Density 100 Hz) √ A/ 10 RRENTSITY (p UN CE CE L D 1 NA ER RT EC FE EP RE S 0.1 S OI N 0.01 10 100 1k 10k 100k FREQUENCY (Hz) 3092 G19 3092fc 7 For more information www.linear.com/LT3092

LT3092 pin FuncTions (DD/ST/TS8) IN (Pins 7, 8/Pin 3/Pins 7, 8): Input. This pin supplies SET (Pin 4/Pin 1/Pin 5): Set. This pin is the error ampli- power to bias internal circuitry and supply output load fier’s noninverting input and also sets the operating bias current. For the device to operate properly and regulate, point of the circuit. A fixed 10μA current source flows out the voltage on this pin must be 1.2V to 1.4V above the OUT of this pin. Two resistors program I as a function of OUT pin (depending on output load current—see the dropout the resistor ratio relative to 10μA. Output current range voltage specifications in the Electrical Characteristics table). is 0.5mA to the maximum rated 200mA level. NC (Pins 3, 5, 6/NA/Pins 1, 6): No Connection. These Exposed Pad/Tab (Pin 9/Tab/NA): Output. The Exposed pins have no connection to internal circuitry and may be Pad of the DFN package and the Tab of the SOT-223 tied to IN, OUT, GND or floated. package are tied internally to OUT. Tie them directly to the OUT pins (Pins 1, 2/Pin 2) at the PCB. The amount OUT (Pins 1, 2/Pin 2/Pins 2, 3, 4): Output. This is the of copper area and planes connected to OUT determine power output of the device. The minimum current source the effective thermal resistance of the packages (see the value to which the LT3092 can be set is 0.5mA or the Applications Information section). device will not regulate. block DiagraM IN 10µA + – SET OUT 3092 BD 3092fc 8 For more information www.linear.com/LT3092

LT3092 applicaTions inForMaTion Introduction With a 10μA current source generating the reference that gains up to set output current, leakage paths to or from The LT3092 is a versatile IC that operates as a 2-terminal the SET pin can create errors in the reference and output programmable current source with the addition of only currents. High quality insulation should be used (e.g., two external resistors; no external bypass capacitors are Teflon, Kel-F). The cleaning of all insulating surfaces to needed for stability. remove fluxes and other residues may be required. Surface The LT3092 is easy to use and has all the protection fea- coating may be necessary to provide a moisture barrier tures expected in high performance products. Included in high humidity environments. are reverse-voltage protection, reverse-current protec- Minimize board leakage by encircling the SET pin and tion, short-circuit protection and thermal shutdown with circuitry with a guard ring operated at a potential close hysteresis. to itself; tie the guard ring to the OUT pin. Guarding The LT3092 operates with or without input and output both sides of the circuit board is required. Bulk leakage capacitors. The simplest current source application reduction depends on the guard ring width. Ten nano- requires only two discrete resistors to set a constant amperes of leakage into or out of the SET pin and its as- output current up to 200mA. A variety of analog tech- sociated circuitry creates a 0.1% reference current error. niques lend themselves to regulating and varying the Leakages of this magnitude, coupled with other sources current source value. of leakage, can cause significant offset voltage and refer- ence current drift, especially over the possible operating The device utilizes a precision “0” TC 10μA reference cur- temperature range. rent source to program output current. This 10µA current source connects to the noninverting input of a power operational amplifier. The power operational amplifier LT3092 IN provides a low impedance buffered output of the voltage 10µA on the noninverting input. IOUT≥0.5mA + VSET=10µA•RSET Minpanuyt aanpdp liocuattpiount acraepaasc ietxoirsst iins wadhvicahn toagpeeorautsio. nA w fietwho ouft SET – OUT IOUT=RVOSEUTT=10µRAO•URTSET these applications include sensitive circuits that cannot + endure surge currents under fault or overload conditions VSET RSET ROUT – and intrinsic safety applications in which safety regula- IOUT 3092 F01 tions limit energy storage devices that may spark or arc. Figure 1. Using the LT3092 as a Current Source Programming Output Current in 2-Terminal Current Source Mode Selecting R and R SET OUT Setting the LT3092 to operate as a 2-terminal current In Figure 1, both resistors R and R program the SET OUT source is a simple matter. The 10µA reference current from value of the output current. The question now arises: the the SET pin is used with one resistor to generate a small ratio of these resistors is known, but what value should voltage, usually in the range of 100mV to 1V (200mV is a each resistor be? level that will help reject offset voltage, line regulation, and The first resistor to select is R . The value selected should SET other errors without being excessively large). This voltage generate enough voltage to minimize the error caused by is then applied across a second resistor that connects from the offset between the SET and OUT pins. A reasonable OUT to the first resistor. Figure 1 shows connections and starting level is 200mV of voltage across R (R equal SET SET formulas to calculate a basic current source configuration. to 20k). Resultant errors due to offset voltage are a few percent. The lower the voltage across R becomes, the SET higher the error term due to the offset. 3092fc 9 For more information www.linear.com/LT3092

LT3092 applicaTions inForMaTion From this point, selecting R is easy, as it is a straight- inductive components and may be complex distributed OUT forward calculation from R . Take note, however, resistor networks. In addition, the current source’s value will dif- SET errors must be accounted for as well. While larger voltage fer between applications and its connection may be GND drops across R minimize the error due to offset, they referenced, power supply referenced or floating in a signal SET also increase the required operating headroom. line path. Linear Technology strongly recommends that stability be tested in situ for any LT3092 application. Obtaining the best temperature coefficient does not require the use of expensive resistors with low ppm temperature In LT3092 applications with long wires or PCB traces, the coefficients. Instead, since the output current of the LT3092 inductive reactance may cause instability. In some cases, is determined by the ratio of R to R , those resistors adding series resistance to the input and output lines (as SET OUT should have matching temperature characteristics. Less shown in Figure 2) may sufficiently dampen these possible expensive resistors made from the same material will high-Q lines and provide stability. The user must evaluate provide matching temperature coefficients. See resistor the required resistor values against the design’s headroom manufacturers’ data sheets for more details. constraints. In general, operation at low output current levels (< 5mA) automatically requires higher values of Stability and Frequency Compensation programming resistors and may provide the necessary damping without additional series impedance. The LT3092 does not require input or output capacitors for stability in many current-source applications. Clean, If the line impedances in series with the LT3092 are tight PCB layouts provide a low reactance, well controlled complex enough such that series damping resistors are operating environment for the LT3092 without requiring not sufficient, a frequency compensation network may be capacitors to frequency-compensate the circuit. The front necessary. Several options may be considered. page Typical Application circuit illustrates the simplicity of using the LT3092. Some current source applications will use a capacitor LONG LINE REACTANCE/INDUCTANCE connected in parallel with the SET pin resistor to lower the current source’s noise. This capacitor also provides a RSERIES soft-start function for the current source. This capacitor LT3092 IN connection is depicted in Figure 7 (see the Quieting the 10µA Noise section). + When operating with a capacitor across the SET pin resis- – tor, external compensation is usually required to maintain stability and compensate for the introduced pole. The SET OUT following paragraphs discuss methods for stabilizing RSET ROUT the LT3092 for either this capacitance or other complex impedances that may be presented to the device. Linear RSERIES 3092 F02 Technology strongly recommends testing stability in situ with final components before beginning production. LONG LINE REACTANCE/INDUCTANCE Although the LT3092’s design strives to be stable without any capacitors over a wide variety of operating conditions, it Figure 2. Adding Series Resistor Decouples is not possible to test for all possible combinations of input and Dampens Long Line Reactances and output impedances that the LT3092 will encounter. These impedances may include resistive, capacitive and 3092fc 10 For more information www.linear.com/LT3092

LT3092 applicaTions inForMaTion Figure 3 depicts the simplest frequency compensation Technology strongly recommends testing stability in situ network as a single capacitor connected across the two for any LT3092 application across all operating conditions, terminals of the current source. In this case, either a especially ones that present complex impedance networks capacitor with a value less than 1000pF, or greater than at the input and output of the current source. 1µF (ESR < 0.5Ω), may stabilize the circuit. Some applica- If an application refers the bottom of the LT3092 current tions may use the small value capacitor to stand off DC source to GND, it may be necessary to bypass the top voltage, but allow the transfer of data down a signal line. of the current source with a capacitor to GND. In some For some applications, this capacitance range may be cases, this capacitor may already exist and no additional unacceptable or present a design constraint. One circuit capacitance is required. For example, if the LT3092 was example typifying this is an “intrinsically-safe” circuit in used as a variable current source on the output of a power which an overload or fault condition potentially allows supply, the output bypass capacitance would suffice to the capacitor’s stored energy to create a spark or arc. provide LT3092 stability. Other applications may require For applications in which a single capacitor is unacceptable, the addition of a bypass capacitor. Once again, the same Figure 3 alternately shows a series RC network connected capacitor value requirements previously mentioned apply in that an upper bound of 1000pF exists for small values across the two terminals of the current source. This network of capacitance, and a lower bound of 1µF (ESR < 0.5Ω) has two benefits. First, it limits the potential discharge exists for large value capacitors. A series RC network may current of the capacitor under a fault condition, preventing also be used as necessary, and depends on the application sparks or arcs. Second, it bridges the gap between the requirements. upper bound of 1000pF for small capacitors to the lower bound of 1µF for large capacitors such that almost any In some extreme cases, capacitors or series RC networks value capacitor can be used. This allows the user greater may be required on both the LT3092’s input and output to flexibility for frequency compensating the loop and fine stabilize the circuit. Figure 4 depicts a general application tuning the RC network for complex impedance networks. using input and output capacitor networks, rather than In many instances, a series RC network is the best solution an input-to-output capacitor. As the input of the current for stabilizing the application circuit. Typical resistor values source tends to be high impedance, placing a capacitor will range from 100Ω to about 5k, especially for capacitor on the input does not have the same effect as placing a values in between 1000pF and 1µF. Once again, Linear capacitor on the lower impedance output, and the same VIN LT3092 IN RIN LT3092 IN RCOMP 10µA CIN 10µA CCOMP OR + + CCOMP – – SET OUT SET OUT RSET ROUT RSET ROUT 3092 F03 3092 F04 IOUT ROUT COUT OR COUT Figure 3. Compensation From Input to Output of Current Source Provides Stability Figure 4. Input and/or Output Capacitors May Be Used for Compensation 3092fc 11 For more information www.linear.com/LT3092

LT3092 applicaTions inForMaTion restrictions do not apply. Capacitors in the range of 0.1µF coefficients as shown in Figures 5 and 6. When used with to 1µF usually provide sufficient bypassing on the input, a 5V regulator, a 16V 10μF Y5V capacitor can exhibit an and the value of input capacitance may be increased effective value as low as 1μF to 2μF for the DC bias voltage without limit. applied and over the operating temperature range. The X5R and X7R dielectrics result in more stable characteristics If an application uses GND referred capacitors on the input and are more suitable for use as the output capacitor. or output (particularly the input), pay attention to the length The X7R type has better stability across temperature, of the lines powering and returning ground from the circuit. while the X5R is less expensive and is available in higher In the case where long power supply and return lines are values. Care still must be exercised when using X5R and coupled with low ESR input capacitors, application-specific X7R capacitors; the X5R and X7R codes only specify voltage spikes, oscillations and reliability concerns may operating temperature range and maximum capacitance be seen. This is not an issue with LT3092 stability, but change over temperature. Capacitance change due to DC rather the low ESR capacitor forming a high-Q resonant bias with X5R and X7R capacitors is better than Y5V and tank circuit with the inductance of the input wires. Adding Z5U capacitors, but can still be significant enough to drop series resistance with the input of the LT3092, or with the capacitor values below appropriate levels. Capacitor DC input capacitor, often solves this. Resistor values of 0.1Ω bias characteristics tend to improve as component case to 1Ω are often sufficient to dampen this resonance. size increases, but expected capacitance at operating voltage should be verified. Give extra consideration to the use of ceramic capacitors. Ceramic capacitors are manufactured with a variety of di- Voltage and temperature coefficients are not the only electrics, each with different behavior across temperature sources of problems. Some ceramic capacitors have a and applied voltage. The most common dielectrics used piezoelectric response. A piezoelectric device generates are specified with EIA temperature characteristic codes of voltage across its terminals due to mechanical stress. In a Z5U, Y5V, X5R and X7R. The Z5U and Y5V dielectrics are ceramic capacitor the stress can be induced by vibrations good for providing high capacitances in a small package, in the system or thermal transients. but they tend to have strong voltage and temperature 20 40 BOTH CAPACITORS ARE 16V, 1210 CASE SIZE, 10µF 20 0 %) X5R %) 0 X5R E (–20 E ( U U L L –20 A A V V N –40 N E I E I –40 G G Y5V N N A–60 A H H –60 C Y5V C –80 –80 BOTH CAPACITORS ARE 16V, 1210 CASE SIZE, 10µF –100 –100 0 2 4 6 8 10 12 14 16 –50 –25 0 25 50 75 100 125 DC BIAS VOLTAGE (V) TEMPERATURE (°C) 3092 F05 3092 F06 Figure 5. Ceramic Capacitor DC Bias Characteristics Figure 6. Ceramic Capacitor Temperature Characteristics 3092fc 12 For more information www.linear.com/LT3092

LT3092 applicaTions inForMaTion Quieting the Noise Paralleling Devices When a reduction in the noise of the current source is Obtain higher output current by paralleling multiple desired, a small capacitor can be placed across R (C LT3092’s together. The simplest application is to run SET SET in Figure 7). Normally, the 10µA reference current source two current sources side by side and tie their inputs generates noise current levels of 2.7pA/√Hz (0.7nARMS together and their outputs together, as shown in Figure over the 10Hz to 100kHz bandwidth). The SET pin resistor 8. This allows the sum of the current sources to deliver generates a spot noise equal to in = √4kT/R (k = Boltzmann’s more output current than a single device is capable of constant, 1.38 • 10–23J/°K, and T is absolute temperature) delivering. which is RMS-summed with the noise generated by the Another method of paralleling devices requires fewer 10µA reference current source. Placing a C capacitor SET components and helps to share power between devices. across R (as shown in Figure 7) bypasses this noise SET Tie the individual SET pins together and tie the individual current. Note that this noise reduction capacitor increases IN pins together. Connect the outputs in common using start-up time as a factor of the time constant formed by small pieces of PC trace as ballast resistors to promote R • C . When using a capacitor across the SET pin SET SET equal current sharing. PC trace resistance in milliohms/ resistor, the external pole introduced usually requires inch is shown in Table 1. Ballasting requires only a tiny compensation to maintain stability. See the Stability and area on the PCB. Frequency Compensation section for detailed descriptions on compensating LT3092 circuits. Table 1. PC Board Trace Resistance A curve in the Typical Performance Characteristics section WEIGHT (oz) 10mil WIDTH 20mil WIDTH depicts noise spectral density for the reference current 1 54.3 27.1 2 27.1 13.6 over a 10Hz to 100kHz bandwidth. Trace resistance is measured in mΩ/in The worst-case room temperature offset, only ±2mV be- tween the SET pin and the OUT pin, allows the use of very small ballast resistors. LT3092 IN RCOMP As shown in Figure 9, each LT3092 has a small 40mΩ 10µA CCOMP OR ballast resistor, which at full output current gives better + CCOMP than 80% equalized sharing of the current. The external – resistance of 40mΩ (20mΩ for the two devices in paral- lel) only adds about 8mV of output voltage compliance at SET OUT an output of 0.4A. Of course, paralleling more than two CSET LT3092’s yields even higher output current. Spreading the RSET ROUT device on the PC board also spreads the heat. Series input 3092 F07 resistors can further spread the heat if the input-to-output difference is high. Figure 7. Adding C Lowers Current Noise SET Thermal Considerations The LT3092’s internal power and thermal limiting circuitry protects itself under overload conditions. For continuous normal load conditions, do not exceed the 125°C maximum junction temperature. Carefully consider all sources of thermal resistance from junction-to-ambient. This includes (but is not limited to) junction-to-case, case-to-heat sink 3092fc 13 For more information www.linear.com/LT3092

LT3092 applicaTions inForMaTion IOUT LT3092 IN LT3092 IN 10µA 10µA 300Ω 300Ω + + – – SET OOUUTT OOUUTT SET 20k 1.33Ω 1.33Ω 20k 3092 F08 IOUT, 300mA Figure 8. Connect Two LT3092s for Higher Current IOUT LT3092 IN LT3092 IN 10µA 10µA Rx + + VIN(MAX)•R – – Rx= 90% 40mΩ* SET SET 40mΩ* R 1V 50k 2.5Ω 3092 F09 *40mΩ PC BOARD TRACE IOUT, 400mA Figure 9. Parallel Devices interface, heat sink resistance or circuit board-to-ambient Note that the Exposed Pad of the DFN package and the as the application dictates. Consider all additional, adjacent Tab of the SOT-223 package are electrically connected heat generating sources in proximity on the PCB. to the output (V ). OUT Surface mount packages provide the necessary heat The following tables list thermal resistance as a function sinking by using the heat spreading capabilities of the of copper areas in a fixed board size. All measurements PC board, copper traces and planes. Surface mount heat were taken in still air on a four-layer FR-4 board with 1oz sinks, plated through-holes and solder filled vias can also solid internal planes and 2oz external trace planes with a spread the heat generated by power devices. total finished board thickness of 1.6mm. Junction-to-case thermal resistance is specified from the PCB layers, copper weight, board layout and thermal vias IC junction to the bottom of the case directly, or the bot- affect the resultant thermal resistance. Please reference tom of the pin most directly, in the heat path. This is the JEDEC standard JESD51-7 for further information on high lowest thermal resistance path for heat flow. Only proper thermal conductivity test boards. Achieving low thermal device mounting ensures the best possible thermal flow resistance necessitates attention to detail and careful layout. from this area of the package to the heat sinking material. 3092fc 14 For more information www.linear.com/LT3092

LT3092 applicaTions inForMaTion Demo circuit 1531A’s board layout using multiple inner V = 16.5 (15V + 10%) IN(MAX CONTINUOUS) V planes and multiple thermal vias achieves 28°C/W OUT V = 11.4V (12V – 5%) OUT(MIN CONTINUOUS) performance for the DFN package. I = 200mA OUT Table 2. DD Package, 8-Lead DFN Power dissipation under these conditions equals: COPPER AREA THERMAL RESISTANCE TOPSIDE* BACKSIDE BOARD AREA (JUNCTION-TO-AMBIENT) PTOTAL = (16.5 – 11.4V)(200mA) = 1.02W 2500mm2 2500mm2 2500mm2 25°C/W Junction temperature equals: 1000mm2 2500mm2 2500mm2 25°C/W 225mm2 2500mm2 2500mm2 28°C/W TJ = TA + PTOTAL • θJA 100mm2 2500mm2 2500mm2 32°C/W T = 50°C + (1.02W • 30°C/W) = 80.6°C J *Device is mounted on topside In this example, the junction temperature is below the maximum rating, ensuring reliable operation. Table 3. TS8 Package, 8-Lead SOT-23 COPPER AREA THERMAL RESISTANCE Protection Features TOPSIDE* BACKSIDE BOARD AREA (JUNCTION-TO-AMBIENT) The LT3092 incorporates several protection features ideal 2500mm2 2500mm2 2500mm2 54°C/W for battery-powered circuits, among other applications. 1000mm2 2500mm2 2500mm2 54°C/W In addition to normal circuit protection features such as 225mm2 2500mm2 2500mm2 57°C/W current limiting and thermal limiting, the LT3092 protects 100mm2 2500mm2 2500mm2 63°C/W itself against reverse-input voltages, reverse-output volt- *Device is mounted on topside ages, and reverse OUT-to-SET pin voltages. Table 4. ST Package, 3-Lead SOT-223 Current limit protection and thermal overload protection COPPER AREA protect the IC against output current overload conditions. THERMAL RESISTANCE TOPSIDE* BACKSIDE BOARD AREA (JUNCTION-TO-AMBIENT) For normal operation, do not exceed a junction temperature 2500mm2 2500mm2 2500mm2 20°C/W of 125°C. The thermal shutdown circuit’s typical tempera- 1000mm2 2500mm2 2500mm2 20°C/W ture threshold is 165°C and has about 5°C of hysteresis. 225mm2 2500mm2 2500mm2 24°C/W The LT3092’s IN pin withstands ±40V voltages with respect 100mm2 2500mm2 2500mm2 29°C/W to the SET and OUT pins. Reverse-current flow, if OUT is *Device is mounted on topside greater than IN, is less than 1mA (typically under 100µA), For further information on thermal resistance and using thermal information, protecting the LT3092 and sensitive loads. refer to JEDEC standard JESD51, notably JESD51-12. Clamping diodes and 1k limiting resistors protect the LT3092’s SET pin relative to the OUT pin voltage. These Calculating Junction Temperature protection components typically only carry current under Example: Given an industrial factory application with an transient overload conditions. These devices are sized to input voltage of 15V ±10%, an output voltage of 12V ±5%, handle ±10V differential voltages and ±15mA crosspin an output current of 200mA and a maximum ambient current flow without concern. temperature of 50°C, what would be the maximum junc- tion temperature for a DFN package? The total circuit power equals: P = (V – V )(I ) TOTAL IN OUT OUT The SET pin current is negligible and can be ignored. 3092fc 15 For more information www.linear.com/LT3092

LT3092 Typical applicaTions Paralleling Current Sources for Higher Current Paralleling LT3092s with Ballast Resistor LT3092 IN LT3092 IN LT3092 IN LT3092 IN 10µA 10µA 10µA 10µA + + + + – – – – SET OUT SET OUT SET OUT SET OUT R2 R1 R4 R3 R1 R3 40mΩ 40mΩ 3092 TA02 IOUT=10µA•⎛⎝⎜RR21+RR34⎞⎠⎟ IOUT R402.2k R2Ω4 3092 TA03 400mA High Voltage Current Source Decreasing Power Dissipation in LT3092 100mA Current Source LT3092 IN LT3092 IN 10µA 10µA D1 Rx + 35V + VMAX=(VIN–VOUT)MAX – – OUT Rx=200mVMVAX •90% R1 SET OUT SET R4 R3 R2 R1 20k 2Ω IOUT≥0.5mA 20k 2Ω 200mV IOUT= R1 3092 TA05 LT3092 IN IOUT 100mA 10µA D2 + 35V Capacitor Adds Stability, But Limits Slew Rate – SET OUT + R2 R1 LT3092 IN 200mV 20k 2Ω – 10µA C1 3092 TA04 IOUT + LIMITdV≤90%•IOUT 100mA dt C1 – OUT SET R2 R1 20k 2Ω 3092 TA06 IOUT 100mA 3092fc 16 For more information www.linear.com/LT3092

LT3092 Typical applicaTions Remote Temperature Sensor DAC Controlled Current Source Active Load VIN I O U T = 100.50mmAA TO V+ LT3092 IN LT3092 IN LT3092 IN 10µA 10µA 10µA + + + – – – SET OUT SET OUT SET OUT DAC OUTPUT 10k 100Ω 0V TO 1V 10Ω 49.9k 49.9Ω OUTPUT MURATA 3092 TA08 INPUT 1mA NCP15WF104F03RC 1% 100k IOUT 3092 TA09 LOAD 3092 TA07 Fully Floating Current Source Switches Pulsed Current Source, Load to Ground From 200mA to Quiescent Current VIN VIN LT3092 IN LT3092 IN 10µA 10µA + + – – SET OUT SET OUT OPTO-FET 3092 TA11 20k 1Ω IOUT 100k 4.99Ω 200mA ON OFF VN2222LL LOAD NEC PS 7801-1A 200mA 3092 TA10 3092fc 17 For more information www.linear.com/LT3092

LT3092 Typical applicaTions Pulsed Current Source, Load to V 2-Terminal AC Current Limiter IN VIN LOAD IOUT LT3092 IN LT3092 10µA 10µA + + IOUT IOUT – – 0.2V SET OUT 20k R= IOUT IOUT 20k 1Ω ISET 3092 TA13 OFF ON 3092 TA12 Voltage Clamp High Accuracy Current Source IN LT3092 LT3092 IN VIN 10µA 10µA + + – – 10k OUT4.99Ω VOUT SET SET OUT 10k 100k 124Ω 10V LT1634-1.25 0.1% 2N3906 3092 TA14 10mA 2N3904 IOUT 3092 TA15 10k VIN – VOUT = 11V TRIP POINT 3092fc 18 For more information www.linear.com/LT3092

LT3092 Typical applicaTions 2-Level Current Source VIN LT3092 IN 10µA + – SET OUT 4.99Ω 100k 100k* VN2222LL* 10V* 10k* VOUT IOUT = 200mA, IF VIN – VOUT < 12V = 100mA, IF VIN – VOUT > 12V *CURRENT FOLDBACK CIRCUIT LIMITS THE LT3092 POWER DISSIPATION 3092 TA16 More Efficient Current Source 0.22µF VIN VIN BOOST 33µH + – 36V SW SHDN BIAS C3 LT3092 IN LT3470A 47µF 100Ω 10µA ZVP3306F FB + GND 1nF 1k – SET OUT 1Ω 20k 3092 TA17 IOUT 3092fc 19 For more information www.linear.com/LT3092

LT3092 package DescripTion Please refer to http://www.linear.com/product/LT3092#packaging for the most recent package drawings. DD Package 8-Lead Plastic DFN (3mm × 3mm) (Reference LTC DWG # 05-08-1698 Rev C) 0.70 ±0.05 3.5 ±0.05 1.65 ±0.05 2.10 ±0.05 (2 SIDES) PACKAGE OUTLINE 0.25 ±0.05 0.50 BSC 2.38 ±0.05 RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED R = 0.125 0.40 ±0.10 TYP 5 8 3.00 ±0.10 1.65 ±0.10 (4 SIDES) (2 SIDES) PIN 1 TOP MARK (NOTE 6) (DD8) DFN 0509 REV C 4 1 0.200 REF 0.75 ±0.05 0.25 ±0.05 0.50 BSC 2.38 ±0.10 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON TOP AND BOTTOM OF PACKAGE 3092fc 20 For more information www.linear.com/LT3092

LT3092 package DescripTion Please refer to http://www.linear.com/product/LT3092#packaging for the most recent package drawings. ST Package 3-Lead Plastic SOT-223 (Reference LTC DWG # 05-08-1630) .248 – .264 .129 MAX (6.30 – 6.71) .114 – .124 .059 MAX (2.90 – 3.15) .264 – .287 .248 BSC (6.70 – 7.30) .130 – .146 (3.30 – 3.71) .039 MAX .059 MAX .090 BSC .181 MAX .0905 .033 – .041 RECOMMENDED SOLDER PAD LAYOUT (2.30) (0.84 – 1.04) BSC 10° – 16° .010 – .014 .071 10° (0.25 – 0.36) (1.80) MAX MAX 10° – 16° .024 – .033 .012 .0008 – .0040 (0.60 – 0.84) (0.31) (0.0203 – 0.1016) .181 MIN (4.60) ST3 (SOT-233) 0502 BSC 3092fc 21 For more information www.linear.com/LT3092

LT3092 package DescripTion Please refer to http://www.linear.com/product/LT3092#packaging for the most recent package drawings. TS8 Package 8-Lead Plastic TSOT-23 (Reference LTC DWG # 05-08-1637 Rev A) 2.90 BSC 0.40 0.65 (NOTE 4) MAX REF 1.22 REF 1.50 – 1.75 3.85 MAX2.62 REF 1.4 MIN 2.80 BSC (NOTE 4) PIN ONE ID RECOMMENDED SOLDER PAD LAYOUT 0.22 – 0.36 0.65 BSC PER IPC CALCULATOR 8 PLCS (NOTE 3) 0.80 – 0.90 0.20 BSC 0.01 – 0.10 1.00 MAX DATUM ‘A’ 0.30 – 0.50 REF 1.95 BSC 0.09 – 0.20 TS8 TSOT-23 0710 REV A (NOTE 3) NOTE: 1. DIMENSIONS ARE IN MILLIMETERS 2. DRAWING NOT TO SCALE 3. DIMENSIONS ARE INCLUSIVE OF PLATING 4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR 5. MOLD FLASH SHALL NOT EXCEED 0.254mm 6. JEDEC PACKAGE REFERENCE IS MO-193 3092fc 22 For more information www.linear.com/LT3092

LT3092 revision hisTory (Revision history begins at Rev B) REV DATE DESCRIPTION PAGE NUMBER B 12/09 Update Order Information 2 C 2/17 Update Dropout Voltage graphs 6 Amended Application Circuit connection 1, 8, 9, 10, 11, 13, 14, 16, 17, 18, 19, 24 3092fc Information furnished by Linear Technology Corporation is believed to be accurate and reliable. 23 However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconneFctoior nm ofo irtse ciinrcfuoirtsm aast dioesnc rwibwedw h.elirneeina wr.icll onmot /inLfTri3n0ge9 o2n existing patent rights.

LT3092 Typical applicaTions USB LED Driver Current Limiter for Remote Power VIN USB LT3092 IN LT3092 IN 10µA 10µA + + – – SET OUT SET OUT 100k 4.99Ω ADJUST LIMIT 1Ω 20k LDO VOUT 200mA LED 3092 TA18 3092 TA19 relaTeD parTs PART NUMBER DESCRIPTION COMMENTS LDO LT1761 100mA, Low Noise LDO 300mV Dropout Voltage, Low Noise: 20µV , V = 1.8V to 20V, ThinSOT™ Package RMS IN LT1762 150mA, Low Noise LDO 300mV Dropout Voltage, Low Noise: 20µV , V = 1.8V to 20V, MS8 Package RMS IN LTC1844 150mA, Very Low Dropout LDO 80mV Dropout Voltage, Low Noise <30µV , V = 1.6V to 6.5V, Stable with 1µF Output RMS IN Capacitors, ThinSOT Package LT1962 300mA, Low Noise LDO 270mV Dropout Voltage, Low Noise: 20µV , V = 1.8V to 20V, MS8 Package RMS IN LT1964 200mA, Low Noise, Negative LDO 340mV Dropout Voltage, Low Noise 30µV , V = –1.8V to –20V, ThinSOT Package RMS IN LT3008 20mA, 45V, 3µA I Micropower LDO 280mV Dropout Voltage, Low I : 3µA, V = 2V to 45V, V = 0.6V to 39.5V; Q Q IN OUT ThinSOT and 2mm × 2mm DFN-6 Packages LT3009 20mA, 20V, 3µA I Micropower LDO 280mV Dropout Voltage, Low I : 3µA, V = 1.6V to 20V, V = 0.6V to 19.5V; Q Q IN OUT ThinSOT and SC70 Packages LT3020 100mA, Low Voltage VLDO Linear V : 0.9V to 10V, V : 0.2V to 5V (Min), V = 0.15V, I = 120µA, Noise: <250µV , IN OUT DO Q RMS Regulator Stable with 2.2µF Ceramic Capacitors, DFN-8, MS8 Packages LTC3025 300mA Micropower VLDO Linear V = 0.9V to 5.5V, Dropout Voltage: 45mV, Low Noise 80µV , Low I : 54µA, 6-Lead IN RMS Q Regulator 2mm × 2mm DFN Package LTC3035 300mA VLDO Linear Regulator with VIN = 1.7V to 5.5V, VOUT: 0.4V to 3.6V, Dropout Voltage: 45mV, IQ: 100µA, 3mm × 2mm DFN-8 Charge Pump Bias Generator LT3080/ 1.1A, Parallelable, Low Noise, 300mV Dropout Voltage (2-Supply Operation), Low Noise: 40µV , V : 1.2V to 36V, RMS IN LT3080-1 Low Dropout Linear Regulator V : 0V to 35.7V, Current-Based Reference with 1-Resistor V Set; Directly Parallelable OUT OUT (No Op Amp Required), Stable with Ceramic Caps, TO-220, SOT-223, MSOP-8 and 3mm × 3mm DFN-8 Packages; LT3080-1 Version Has Integrated Internal Ballast Resistor LT3085 500mA, Parallelable, Low Noise, Low 275mV Dropout Voltage (2-Supply Operation), Low Noise: 40µV , V : 1.2V to 36V, RMS IN Dropout Linear Regulator V : 0V to 35.7V, Current-based Reference with 1-Resistor V Set; Directly Parallelable OUT OUT (No Op Amp Required), Stable with Ceramic Caps, MSOP-8 and 2mm × 3mm DFN-6 Packages Current Sense Amplifiers LT6106 Low Cost, 36V High Side Current 36V (44V Max) Current Sense, Dynamic Range of 2000:1, 106dB of PSRR Sense Amplifier LT6107 High Temperature High Side Current 36V (44V Max) Current Sense, Dynamic Range of 2000:1, 106dB of PSRR, –55 to 150°C Sense Amp in SOT-23 (MP-Grade) ThinSOT is a trademark of Linear Technology Corporation. 3092fc 24 Linear Technology Corporation LT 0217 REV C • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 For more information www.linear.com/LT3092 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com/LT3092  LINEAR TECHNOLOGY CORPORATION 2009

Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: A nalog Devices Inc.: LT3092ITS8#TRPBF LT3092ITS8#PBF LT3092IST#PBF LT3092ETS8#TRMPBF LT3092MPST#TR LT3092EST#PBF LT3092EST#TRPBF LT3092MPST LT3092ETS8#TRPBF LT3092MPST#TRPBF LT3092MPST#PBF LT3092IST#TRPBF LT3092EDD#PBF LT3092IDD#PBF LT3092IDD#TRPBF LT3092ITS8#TRMPBF LT3092ETS8#PBF LT3092EDD#TRPBF