LT3065 Series 45V V , 500mA Low Noise, IN Linear Regulator with Programmable Current Limit and Power Good FeaTures DescripTion n Input Voltage Range: 1.8V to 45V The LT®3065 Series are micropower, low noise, low dropout n Output Current: 500mA voltage (LDO) linear regulators that operate over a 1.8V n Dropout Voltage: 300mV to 45V input voltage range. The devices supply 500mA of n Programmable Precision Current Limit: ±10% output current with a typical dropout voltage of 300mV. A n Power Good Flag single external capacitor provides programmable low noise n Low Noise: 25µV (10Hz to 100kHz) reference performance and output soft-start functionality. RMS n Adjustable Output (V = V = 600mV) REF OUT(MIN) A single external resistor programs the LT3065’s current n Output Tolerance: ±2% Over Line, Load and limit, accurate to ±10% over a wide input voltage and tem- Temperature perature range. A PWRGD flag indicates output regulation. n Stable with Low ESR, Ceramic Output Capacitors (3.3µF Minimum) The LT3065 optimizes stability and transient response n Single Capacitor Soft-Starts Reference and Lowers with low ESR ceramic capacitors, requiring a minimum of Output Noise 3.3µF. Internal protection circuitry includes current limiting n Current Limit Foldback Protection with foldback, thermal limiting, reverse battery protection, n Shutdown Current: <1µA reverse current protection and reverse output protection. n Reverse Battery and Thermal Limit Protection The LT3065 is available in fixed output voltages of 1.2V, n 10-Lead 3mm × 3mm DFN and 12-lead MSOP 1.5V, 1.8V, 2.5V, 3.3V, and 5V, and as an adjustable de- Packages vice with an output voltage range from 0.6V to 40V. The LT3065 is available in the thermally-enhanced 10-lead applicaTions 3mm × 3mm DFN and 12-lead MSOP packages. n Battery-Powered Systems L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and ThinSOT is a trademark of Analog Devices, Inc. All other trademarks are the property of their n Automotive Power Supplies respective owners. n Industrial Power Supplies n Avionic Power Supplies n Portable Instruments Typical applicaTion Precision Current Limit, R = 1.5k IMAX 220 5V Supply with 200mA Precision Current Limit VOUT(NOMINAL) = 5V 216 212 5V 5.6V TO 13V IN OUT OUT A) 208 IN 3.3µF 500k SPWHDRNGDLT3065-5SENASDEJ 1nF 3.3µF 200mA NT LIMIT (m 220040 VIN = 1V0INV = 5.6V E 196 R R REF/BYP IMAX CU 192 10nF GND 1.5k 22nF 188 184 3065 TA01a 180 –75–50–25 0 25 50 75 100125150175 TEMPERATURE (°C) 3065 TA01b 3065fc 1 For more information www.linear.com/LT3065

LT3065 Series absoluTe MaxiMuM raTings (Note 1) IN Pin Voltage .........................................................±50V Output Short-Circuit Duration ..........................Indefinite OUT Pin Voltage ...........................................+40V, –50V Operating Junction Temperature Range (Notes 3, 5, 14) Input-to-Output Differential Voltage (Note 2) ..+50V, –40V E-, I-Grades .......................................–40°C to 125°C ADJ Pin Voltage ......................................................±50V MP-Grade ..........................................–55°C to 150°C SENSE Pin Voltage ..................................................±50V H-Grade .............................................–40°C to 150°C SHDN Pin Voltage ...................................................±50V Storage Temperature Range ..................–65°C to 150°C PWRGD Pin Voltage .......................................–0.3V, 50V Lead Temperature (Soldering, 10 sec) I Pin Voltage ..............................................–0.3V, 7V MSOP Package Only .........................................300°C MAX REF/BYP Pin Voltage ...................................................1V pin conFiguraTion TOP VIEW TOP VIEW IN 1 10 OUT IN 1 12 OUT IN 2 9 OUT IN 2 11 OUT 11 SHDN 3 13 10 ADJ/SENSE* SHDN 3 8 ADJ/SENSE* GND PWRGD 4 GND 9 GND/ADJ* PWRGD 4 7 GND/ADJ* IMAX 5 8 REF/BYP IMAX 5 6 REF/BYP NC 6 7 NC MSE PACKAGE DD PACKAGE 12-LEAD PLASTIC MSOP 10-LEAD (3mm × 3mm) PLASTIC DFN TJMAX = 150°C, θJA = 31°C/W, θJC = 9°C/W EXPOSED TPJAMDAX ( P=I N15 103°)C I, Sθ JGAN =D 2, 8M°UC/SWT ,B θEJ CS O= L6D°CE/RWE D TO PCB EXPOSED PAD (PIN 11) IS GND, MUST BE SOLDERED TO PCB *Pin 7: GND for LT3065, ADJ for LT3065-1.2, LT3065-1.5, LT3065-1.8, LT3065-2.5, *Pin 9: GND for LT3065, ADJ for LT3065-1.2, LT3065-1.5, LT3065-1.8, LT3065-2.5, LT3065-3.3, LT3065-5 LT3065-3.3, LT3065-5 *Pin 8: ADJ for LT3065, SENSE for LT3065-1.2, LT3065-1.5, LT3065-1.8, LT3065-2.5, *Pin 10: ADJ for LT3065, SENSE for LT3065-1.2, LT3065-1.5, LT3065-1.8, LT3065-2.5, LT3065-3.3, LT3065-5 LT3065-3.3, LT3065-5 orDer inForMaTion http://www.linear.com/product/LT3065#orderinfo LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LT3065EDD#PBF LT3065EDD#TRPBF LGKS 10-Lead (3mm x 3mm) Plastic DFN –40°C to 125°C LT3065IDD#PBF LT3065IDD#TRPBF LGKS 10-Lead (3mm x 3mm) Plastic DFN –40°C to 125°C LT3065HDD#PBF LT3065HDD#TRPBF LGKS 10-Lead (3mm x 3mm) Plastic DFN –40°C to 150°C LT3065MPDD#PBF LT3065MPDD#TRPBF LGKS 10-Lead (3mm x 3mm) Plastic DFN –55°c to 150°C LT3065EDD-1.2#PBF LT3065EDD-1.2#TRPBF LGQV 10-Lead (3mm x 3mm) Plastic DFN –40°C to 125°C LT3065IDD-1.2#PBF LT3065IDD-1.2#TRPBF LGQV 10-Lead (3mm x 3mm) Plastic DFN –40°C to 125°C LT3065HDD-1.2#PBF LT3065HDD-1.2#TRPBF LGQV 10-Lead (3mm x 3mm) Plastic DFN –40°C to 150°C LT3065MPDD-1.2#PBF LT3065MPDD-1.2#TRPBF LGQV 10-Lead (3mm x 3mm) Plastic DFN –55°C to 150°C LT3065EDD-1.5#PBF LT3065EDD-1.5#TRPBF LGQW 10-Lead (3mm x 3mm) Plastic DFN –40°C to 125°C LT3065IDD-1.5#PBF LT3065IDD-1.5#TRPBF LGQW 10-Lead (3mm x 3mm) Plastic DFN –40°C to 125°C LT3065HDD-1.5#PBF LT3065HDD-1.5#TRPBF LGQW 10-Lead (3mm x 3mm) Plastic DFN –40°C to 150°C LT3065MPDD-1.5#PBF LT3065MPDD-1.5#TRPBF LGQW 10-Lead (3mm x 3mm) Plastic DFN –55°C to 150°C LT3065EDD-1.8#PBF LT3065EDD-1.8#TRPBF LGQX 10-Lead (3mm x 3mm) Plastic DFN –40°C to 125°C LT3065IDD-1.8#PBF LT3065IDD-1.8#TRPBF LGQX 10-Lead (3mm x 3mm) Plastic DFN –40°C to 125°C LT3065HDD-1.8#PBF LT3065HDD-1.8#TRPBF LGQX 10-Lead (3mm x 3mm) Plastic DFN –40°C to 150°C LT3065MPDD-1.8#PBF LT3065MPDD-1.8#TRPBF LGQX 10-Lead (3mm x 3mm) Plastic DFN –55°C to 150°C LT3065EDD-2.5#PBF LT3065EDD-2.5#TRPBF LGQY 10-Lead (3mm x 3mm) Plastic DFN –40°C to 125°C 3065fc 2 For more information www.linear.com/LT3065

LT3065 Series orDer inForMaTion LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LT3065IDD-2.5#PBF LT3065IDD-2.5#TRPBF LGQY 10-Lead (3mm x 3mm) Plastic DFN –40°C to 125°C LT3065HDD-2.5#PBF LT3065HDD-2.5#TRPBF LGQY 10-Lead (3mm x 3mm) Plastic DFN –40°C to 150°C LT3065MPDD-2.5#PBF LT3065MPDD-2.5#TRPBF LGQY 10-Lead (3mm x 3mm) Plastic DFN –55°C to 150°C LT3065EDD-3.3#PBF LT3065EDD-3.3#TRPBF LGQZ 10-Lead (3mm x 3mm) Plastic DFN –40°C to 125°C LT3065IDD-3.3#PBF LT3065IDD-3.3#TRPBF LGQZ 10-Lead (3mm x 3mm) Plastic DFN –40°C to 125°C LT3065HDD-3.3#PBF LT3065HDD-3.3#TRPBF LGQZ 10-Lead (3mm x 3mm) Plastic DFN –40°C to 150°C LT3065MPDD-3.3#PBF LT3065MPDD-3.3#TRPBF LGQZ 10-Lead (3mm x 3mm) Plastic DFN –55°C to 150°C LT3065EDD-5#PBF LT3065EDD-5#TRPBF LGRB 10-Lead (3mm x 3mm) Plastic DFN –40°C to 125°C LT3065IDD-5#PBF LT3065IDD-5#TRPBF LGRB 10-Lead (3mm x 3mm) Plastic DFN –40°C to 125°C LT3065HDD-5#PBF LT3065HDD-5#TRPBF LGRB 10-Lead (3mm x 3mm) Plastic DFN –40°C to 150°C LT3065MPDD-5#PBF LT3065MPDD-5#TRPBF LGRB 10-Lead (3mm x 3mm) Plastic DFN –55°C to 150°C LT3065EMSE#PBF LT3065EMSE#TRPBF 3065 12-Lead Plastic MSOP –40°C to 125°C LT3065IMSE#PBF LT3065IMSE#TRPBF 3065 12-Lead Plastic MSOP –40°C to 125°C LT3065HMSE#PBF LT3065HMSE#TRPBF 3065 12-Lead Plastic MSOP –40°C to 150°C LT3065MPMSE#PBF LT3065MPMSE#TRPBF 3065 12-Lead Plastic MSOP –55°C to 150°C LT3065EMSE-1.2#PBF LT3065EMSE-1.2#TRPBF 306512 12-Lead Plastic MSOP –40°C to 125°C LT3065IMSE-1.2#PBF LT3065IMSE-1.2#TRPBF 306512 12-Lead Plastic MSOP –40°C to 125°C LT3065HMSE-1.2#PBF LT3065HMSE-1.2#TRPBF 306512 12-Lead Plastic MSOP –40°C to 150°C LT3065MPMSE-1.2#PBF LT3065MPMSE-1.2#TRPBF 306512 12-Lead Plastic MSOP –55°C to 150°C LT3065EMSE-1.5#PBF LT3065EMSE-1.5#TRPBF 306515 12-Lead Plastic MSOP –40°C to 125°C LT3065IMSE-1.5#PBF LT3065IMSE-1.5#TRPBF 306515 12-Lead Plastic MSOP –40°C to 125°C LT3065HMSE-1.5#PBF LT3065HMSE-1.5#TRPBF 306515 12-Lead Plastic MSOP –40°C to 150°C LT3065MPMSE-1.5#PBF LT3065MPMSE-1.5#TRPBF 306515 12-Lead Plastic MSOP –55°C to 150°C LT3065EMSE-1.8#PBF LT3065EMSE-1.8#TRPBF 306518 12-Lead Plastic MSOP –40°C to 125°C LT3065IMSE-1.8#PBF LT3065IMSE-1.8#TRPBF 306518 12-Lead Plastic MSOP –40°C to 125°C LT3065HMSE-1.8#PBF LT3065HMSE-1.8#TRPBF 306518 12-Lead Plastic MSOP –40°C to 150°C LT3065MPMSE-1.8#PBF LT3065MPMSE-1.8#TRPBF 306518 12-Lead Plastic MSOP –55°C to 150°C LT3065EMSE-2.5#PBF LT3065EMSE-2.5#TRPBF 306525 12-Lead Plastic MSOP –40°C to 125°C LT3065IMSE-2.5#PBF LT3065IMSE-2.5#TRPBF 306525 12-Lead Plastic MSOP –40°C to 125°C LT3065HMSE-2.5#PBF LT3065HMSE-2.5#TRPBF 306525 12-Lead Plastic MSOP –40°C to 150°C LT3065MPMSE-2.5#PBF LT3065MPMSE-2.5#TRPBF 306525 12-Lead Plastic MSOP –55°C to 150°C LT3065EMSE-3.3#PBF LT3065EMSE-3.3#TRPBF 306533 12-Lead Plastic MSOP –40°C to 125°C LT3065IMSE-3.3#PBF LT3065IMSE-3.3#TRPBF 306533 12-Lead Plastic MSOP –40°C to 125°C LT3065HMSE-3.3#PBF LT3065HMSE-3.3#TRPBF 306533 12-Lead Plastic MSOP –40°C to 150°C LT3065MPMSE-3.3#PBF LT3065MPMSE-3.3#TRPBF 306533 12-Lead Plastic MSOP –55°C to 150°C LT3065EMSE-5#PBF LT3065EMSE-5#TRPBF 30655 12-Lead Plastic MSOP –40°C to 125°C LT3065IMSE-5#PBF LT3065IMSE-5#TRPBF 30655 12-Lead Plastic MSOP –40°C to 125°C LT3065HMSE-5#PBF LT3065HMSE-5#TRPBF 30655 12-Lead Plastic MSOP –40°C to 150°C LT3065MPMSE-5#PBF LT3065MPMSE-5#TRPBF 30655 12-Lead Plastic MSOP –55°C to 150°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix. 3065fc 3 For more information www.linear.com/LT3065

LT3065 Series elecTrical characTerisTics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T = 25°C (Note 3). A PARAMETER CONDITIONS MIN TYP MAX UNITS Minimum Input Voltage (Notes 4, 9) I = 500mA l 1.8 2.2 V LOAD Regulated Output Voltage LT3065-1.2: V = 2.2V, I = 1mA 1.188 1.2 1.212 V IN LOAD 2.2V < V < 45V, 1mA < I < 500mA l 1.176 1.224 V IN LOAD LT3065-1.5: V = 2.2V, I = 1mA 1.485 1.5 1.515 V IN LOAD 2.2V < V < 45V, 1mA < I < 500mA l 1.470 1.530 V IN LOAD LT3065-1.8: V = 2.4V, I = 1mA 1.782 1.8 1.818 V IN LOAD 2.4V < V < 45V, 1mA < I < 500mA l 1.764 1.836 V IN LOAD LT3065-2.5: V = 3.1V, I = 1mA 2.475 2.5 2.525 V IN LOAD 3.1V < V < 45V, 1mA < I < 500mA l 2.450 2.550 V IN LOAD LT3065-3.3: V = 3.9V, I = 1mA 3.267 3.3 3.333 V IN LOAD 3.9V < V < 45V, 1mA < I < 500mA l 3.234 3.366 V IN LOAD LT3065-5: V = 5.6V, I = 1mA 4.950 5 5.050 V IN LOAD 5.6V < V < 45V, 1mA < I < 500mA l 4.900 5.100 V IN LOAD ADJ Pin Voltage (Notes 4, 5) LT3065: V = 2.2V, I = 1mA 594 600 606 mV IN LOAD 2.2V < V < 45V, 1mA < I < 500mA l 588 612 mV IN LOAD Line Regulation LT3065-1.2: ΔV = 2.2V to 45V l 0.7 7 mV IN I = 1mA LT3065-1.5: ΔV = 2.2V to 45V l 0.9 8.8 mV LOAD IN LT3065-1.8: ΔV = 2.4V to 45V l 1.1 10.5 mV IN LT3065-2.5: ΔV = 3.1V to 45V l 1.6 14.6 mV IN LT3065-3.3: ΔV = 3.9V to 45V l 2.0 19.3 mV IN LT3065-5: ΔV = 5.6V to 45V l 3.1 29.2 mV IN LT3065: ΔV = 2.2V to 45V (Note 4) l 0.1 3 mV IN Load Regulation LT3065-1.2, V = 2.2V l 0.5 8 mV IN ΔI = 1mA to 500mA LT3065-1.5, V = 2.2V l 0.7 10 mV LOAD IN LT3065-1.8, V = 2.4V l 0.9 12 mV IN LT3065-2.5 V = 3.1V l 1.2 16.7 mV IN LT3065-3.3, V = 3.9V l 1.6 11 mV IN LT3065-5, V = 5.6V l 2.4 33.4 mV IN LT3065, V = 2.2V (Note 4) l 0.1 4 mV IN Dropout Voltage, V = V I = 10mA 110 150 mV IN OUT(NOMINAL) LOAD (Notes 6, 7) l 210 mV I = 50mA 145 200 mV LOAD l 310 mV I = 100mA 175 220 mV LOAD l 330 mV I = 500mA 300 350 mV LOAD l 510 mV GND Pin Current, I = 0mA l 55 110 µA LOAD V = V + 0.6V I = 1mA l 100 200 µA IN OUT(NOMINAL) LOAD (Notes 7, 8) I = 10mA l 270 550 µA LOAD I = 100mA l 1.8 4.5 mA LOAD I = 500mA l 11 25 mA LOAD Quiescent Current in Shutdown V = 45V, V = 0V 0.2 1 µA IN SHDN ADJ Pin Bias Current (Notes 4, 10) V = 2.2V l 16 60 nA IN Output Voltage Noise C = 10µF, I = 500mA, V = 600mV, 90 µV OUT LOAD OUT RMS BW = 10Hz to 100kHz C = 10µF, C = 10nF, I = 500mA, 25 µV OUT BYP LOAD RMS V = 600mV, BW = 10Hz to 100kHz OUT Shutdown Threshold V = Off to On l 1. 3 1.42 V OUT V = On to Off l 0.9 1.1 V OUT 3065fc 4 For more information www.linear.com/LT3065

LT3065 Series elecTrical characTerisTics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T = 25°C (Note 3). A SHDN Pin Current (Note 11) V = 0V, V = 45V l ±1 µA SHDN IN V = 45V, V = 45V l 0.5 3 µA SHDN IN Ripple Rejection LT3065-1.2 63 78 dB V – V = 2V, V = 0.5V , LT3065-1.5 63 78 dB IN OUT RIPPLE P-P f = 120Hz, I = 500mA LT3065-1.8 59 74 dB RIPPLE LOAD LT3065-2.5 57 72 dB LT3065-3.3 56 71 dB LT3065-5 55 70 dB LT3065 70 85 dB Input Reverse Leakage Current V = –45V, V = 0 l 300 µA IN OUT Reverse Output Current (Note 12) V = 1.2V, V = V = 0 0 10 µA OUT IN SHDN Internal Current Limit (Note 4) V = 2.2V, V = 0, V = 0 900 mA IN OUT IMAX V = 2.2V, ΔV = –5% l 520 mA IN OUT External Programmed Current Limit 5.6V < V < 10V, V = 95% of V (Nominal), R = 1.5k l 180 200 220 mA IN OUT OUT IMAX (Notes 7, 13) 5.6V < V < 7V, V = 95% of V (Nominal), R = 604Ω l 445 495 545 mA IN OUT OUT IMAX PWRGD Logic Low Voltage Pull-Up Current = 50µA l 0.07 0.25 V PWRGD Leakage Current V = 45V 0.01 1 µA PWRGD PWRGD Trip Point % of Nominal Output Voltage, Output Rising l 86 90 94 % PWRGD Trip Point Hysteresis % of Nominal Output Voltage 1.6 % Note 1: Stresses beyond those listed under Absolute Maximum Ratings Note 6: Dropout voltage is the minimum IN-to-OUT differential voltage may cause permanent damage to the device. Exposure to any Absolute needed to maintain regulation at a specified output current. In dropout, Maximum Rating condition for extended periods may affect device the output voltage equals (V – V ). For some output voltages, IN DROPOUT reliability and lifetime. minimum input voltage requirements limit dropout voltage. Note 2: Absolute maximum input-to-output differential voltage is not Note 7: To satisfy minimum input voltage requirements, the LT3065 is achievable with all combinations of rated IN pin and OUT pin voltages. tested and specified for these conditions with an external resistor divider With IN at 50V, do not pull OUT below 0V. The total differential voltage (60.4k bottom, 442k top) which sets V to 5V. The divider adds 10uA of OUT from IN to OUT must not exceed +50V, –40V. If OUT is pulled above IN output DC load. This external current is not factored into GND pin current. and GND, the OUT to IN differential voltage must not exceed 40V. Note 8: GND pin current is tested with V = V + 0.6V and a IN OUT(NOMINAL) Note 3: The LT3065 regulator is tested and specified under pulse current source load. GND pin current increases in dropout. See GND pin load conditions such that TJ ≅ TA. The LT3065E regulators are 100% current curves in the Typical Performance Characteristics section. tested at TA = 25°C and performance is guaranteed from 0°C to 125°C. Note 9: To satisfy requirements for minimum input voltage, current limit is Performance at –40°C to 125°C is assured by design, characterization and tested at V = V + 1V or V = 2.2V, whichever is greater. IN OUT(NOMINAL) IN correlation with statistical process controls. The LT3065I regulators are Note 10: ADJ pin bias current flows out of the ADJ pin. guaranteed over the full –40°C to 125°C operating junction temperature Note 11: SHDN pin current flows into the SHDN pin. range. The LT3065MP regulators are 100% tested over the –55°C to Note 12: Reverse output current is tested with the IN pin grounded and the 150°C operating junction temperature range. The LT3065H regulators are OUT pin forced to the specified voltage. This current flows into the OUT 100% tested at the 150°C operating junction temperature. High junction pin and out of the GND pin. temperatures degrade operating lifetimes. Operating lifetime is derated at junction temperatures greater than 125°C. Note 13: Current limit varies inversely with the external resistor value tied from the IMAX pin to GND. For detailed information on selecting the IMAX Note 4: The LT3065 adjustable version is tested and specified for these resistor value, see the Operation section. If the externally programmed conditions with the ADJ pin connected to the OUT pin. current limit feature is unused, tie the IMAX pin to GND. The internal Note 5: Maximum junction temperature limits operating conditions. current limit circuitry implements short-circuit protection as specified. Regulated output voltage specifications do not apply for all possible Note 14: This IC includes over temperature protection that protects the combinations of input voltage and output current. If operating at the device during overload conditions. Junction temperature exceeds 125°C maximum input voltage, limit the output current range. If operating at (LT3065E, LT3065I) or 150°C (LT3065MP, LT3065H) when the over the maximum output current, limit the input voltage range. Current limit temperature circuitry is active. Continuous operation above the specified foldback limits the maximum output current as a function of input-to- maximum junction temperature may impair device reliability. output voltage. See Current Limit vs V – V in the Typical Performance IN OUT Characteristics section. 3065fc 5 For more information www.linear.com/LT3065

LT3065 Series Typical perForMance characTerisTics T = 25°C, unless otherwise noted. J Typical Dropout Voltage Guaranteed Dropout Voltage Dropout Voltage 600 700 600 = TEST POINTS 550 650 550 500 600 500 550 mV) 450 mV)500 mV) 450 OLTAGE ( 343005000 TJ = 150°CTJ = 125°C OLTAGE (443055000 TJ = 150°C OLTAGE ( 343005000 IL = 500mA DROPOUT V 221055000 TJ = 25°C DROPOUT V231200550000 TJ = 25°C DROPOUT V 221055000 IL = 50mA IL = 100mA 100 100 100 IL = 10mA 50 50 50 0 0 0 0 50 100150200250300350400450500 0 50 100150200250300350400450500 –75–50–25 0 25 50 75 100125150175 OUTPUT CURRENT (mA) OUTPUT CURRENT (mA) TEMPERATURE (°C) 3065 G01 3065 G02 3065 G03 Quiescent Current LT3065-1.2 Output Voltage LT3065-1.5 Output Voltage 130 1.224 1.530 120 VVIONU =T =V S5HVDN = 12V 1.220 IL = 1mA 1.525 IL = 1mA 110 IL = 10µA 1.216 1.520 ENT (µA) 1098000 GE (V)11..221028 GE (V)11..551150 R A1.204 A1.505 UR 70 LT LT C O1.200 O1.500 ENT 6500 UT V1.196 UT V1.495 C P P ES 40 UT1.192 UT1.490 QUI 30 O1.188 O1.485 20 1.184 1.480 10 VIN = 12V 1.180 1.475 ALL OTHER PINS = 0V 0 1.176 1.470 –75–50–25 0 25 50 75 100125150175 –75–50–25 0 25 50 75 100125150175 –75–50–25 0 25 50 75 100125150175 TEMPERATURE (°C) TEMPERATURE (°C) TEMPERATURE (°C) 3065 G04 3065 G05 3065 G06 LT3065-1.8 Output Voltage LT3065-2.5 Output Voltage LT3065-3.3 Output Voltage 1.836 2.55 3.366 1.830 IL = 1mA 2.54 IL = 1mA 3.355 IL = 1mA 1.824 3.344 2.53 1.818 3.333 V) V) 2.52 V) OLTAGE (111...888001062 OLTAGE ( 22..5501 OLTAGE (333...333120120 V V V UT 1.794 UT 2.49 UT 3.289 P P P OUT11..778828 OUT 2.48 OUT33..227687 2.47 1.776 3.256 1.770 2.46 3.245 1.764 2.45 3.234 –75–50–25 0 25 50 75 100125150175 –75–50–25 0 25 50 75 100125150175 –75–50–25 0 25 50 75 100125150175 TEMPERATURE (°C) TEMPERATURE (°C) TEMPERATURE (°C) 3065 G07 3065 G08 3065 G09 3065fc 6 For more information www.linear.com/LT3065

LT3065 Series Typical perForMance characTerisTics T = 25°C, unless otherwise noted. J LT3065-5 Output Voltage ADJ Pin Voltage LT3065-1.2 Quiescent Current 5.10 612 200 5.08 IL = 1mA 610 IL = 1mA 175 RTJL == 2254°0Ck 5.06 608 VOUT = 1.2V OUTPUT VOLTAGE (V) 55454.....0090924806 ADJ PIN VOLTAGE (mV) 665566500990090468264 UIESCENT CURRENT (µA) 1112570550500 VSHDN = VIN Q 4.94 592 25 4.92 590 VSHDN = 0V 4.90 588 0 –75–50–25 0 25 50 75 100125150175 –75–50–25 0 25 50 75 100125150175 0 1 2 3 4 5 6 7 8 9 10 11 TEMPERATURE (°C) TEMPERATURE (°C) INPUT VOLTAGE (V) 3065 G10 3065 G11 3065 G12 LT3065-1.5 Quiescent Current LT3065-1.8 Quiescent Current LT3065-2.5 Quiescent Current 200 200 200 TJ = 25°C TJ = 25°C TJ = 25°C 175 RL = 300k 175 RL = 360k 175 RL = 500k VOUT = 1.5V VOUT = 1.8V VOUT = 2.5V A) 150 A) 150 A) 150 µ µ µ T ( T ( T ( EN 125 EN 125 EN 125 R R R R R R CU 100 CU 100 CU 100 NT VSHDN = VIN NT VSHDN = VIN NT VSHDN = VIN CE 75 CE 75 CE 75 S S S E E E UI 50 UI 50 UI 50 Q Q Q 25 25 25 VSHDN = 0V VSHDN = 0V VSHDN = 0V 0 0 0 0 1 2 3 4 5 6 7 8 9 10 11 0 1 2 3 4 5 6 7 8 9 10 11 0 1 2 3 4 5 6 7 8 9 10 11 INPUT VOLTAGE (V) INPUT VOLTAGE (V) INPUT VOLTAGE (V) 3065 G13 3065 G14 3065 G15 LT3065-3.3 Quiescent Current LT3065-5 Quiescent Current Quiescent Current 200 200 130 175 RTJL == 2656°0Ck 175 RTJL == 215M°C 120 VTJO U=T 2 =5 °5CV VOUT = 3.3V VOUT = 5V 110 IL = 10µA QUIESCENT CURRENT (µA) 1112570550500 VSHDN = VIN QUIESCENT CURRENT (µA) 1112570550500 VSHDN = VIN QUIESCENT CURRENT (µA)13450789600000000 VSHDN = VIN 25 25 20 VSHDN = 0V VSHDN = 0V 10 VSHDN = 0V 0 0 0 0 1 2 3 4 5 6 7 8 9 10 11 0 1 2 3 4 5 6 7 8 9 10 11 0 5 10 15 20 25 30 35 40 45 INPUT VOLTAGE (V) INPUT VOLTAGE (V) VIN (V) 3065 G16 3065 G17 3065 G18 3065fc 7 For more information www.linear.com/LT3065

LT3065 Series Typical perForMance characTerisTics LT3065-1.2 GND Pin Current LT3065-1.5 GND Pin Current LT3065-1.8 GND Pin Current 24 24 24 TJ = 25°C TJ = 25°C TJ = 25°C 22 *FOR VOUT = 1.2V 22 *FOR VOUT = 1.5V 22 *FOR VOUT = 1.8V 20 VSHDN = VIN 20 VSHDN = VIN 20 VSHDN = VIN T (mA) 1186 IRLL = = 5 20.04mΩA* IRLL = = 1 1020ΩmA* T (mA) 1186 IRLL = = 5 30Ω0mA* IRLL = = 1 1050ΩmA* T (mA) 1186 IRLL = = 1 30.06mΩA* REN 14 RL = 4.8Ω RL = 120Ω REN 14 RL = 6Ω RL = 150Ω REN 14 RL = 18Ω UR 12 IL = 250mA* IL = 10mA* UR 12 IL = 250mA* IL = 10mA* UR 12 IL = 100mA* C C C N 10 N 10 N 10 GND PI 86 GND PI 86 GND PI 86 IRLL = = 2 75.02mΩA* RILL = = 1 108m0AΩ* 4 4 4 2 2 2 0 0 0 0 1 2 3 4 5 6 7 8 9 10 11 12 0 1 2 3 4 5 6 7 8 9 10 11 12 0 1 2 3 4 5 6 7 8 9 10 11 12 INPUT VOLTAGE (V) INPUT VOLTAGE (V) INPUT VOLTAGE (V) 3065 G19 3065 G20 3065 G21 LT3065-2.5 GND Pin Current LT3065-3.3 GND Pin Current LT3065-5 GND Pin Current 24 24 24 22 *TFJ O=R 2 5V°OCUT = 2.5V 22 IRLL = = 5 60.06mΩA* *TFJ O=R 2 5V°OCUT = 3.3V 22 IRLL = = 5 1000ΩmA* *TFJ O=R 2 5V°OCUT = 5V 20 VSHDN = VIN 20 VSHDN = VIN 20 VSHDN = VIN T (mA) 1186 IRLL = = 5 50Ω0mA* T (mA) 1186 T (mA) 1186 IRLL = = 2 2500ΩmA* REN 14 RL = 25Ω REN 14 RL = 33Ω REN 14 RL = 50Ω UR 12 IL = 100mA* UR 12 IL = 100mA* UR 12 IL = 100mA* C C C GND PIN 1086 IRLL = = 2 1500ΩmA* RILL = = 1 205m0AΩ* GND PIN 1086 RILL = = 2 1530.m2ΩA* IRLL = = 1 303m0AΩ* GND PIN 1086 IRLL = = 1 500m0AΩ* 4 4 4 2 2 2 0 0 0 0 1 2 3 4 5 6 7 8 9 10 11 12 0 1 2 3 4 5 6 7 8 9 10 11 12 0 1 2 3 4 5 6 7 8 9 10 11 12 INPUT VOLTAGE (V) INPUT VOLTAGE (V) INPUT VOLTAGE (V) 3065 G22 3065 G23 3065 G24 GND Pin Current vs I SHDN Pin Threshold SHDN Pin Current LOAD 20 1.5 3.0 18 VVIONU =T =5 .56VV 11..43 OFF TO ON SHDN = 45V 2.5 16 1.2 GND PIN CURRENT (mA) 111284046 SHDN PIN THRESHOLD (V) 100000001.........196857430 ON TO OFF SHDN PIN CURRENT (µA) 121...005 0.5 0.2 2 0.1 0 0 0 0 50 100150200250300350400450500 –75–50–25 0 25 50 75 100125150175 –75–50–25 0 25 50 75 100125 150175 ILOAD (mA) TEMPERATURE (°C) TEMPERATURE (°C) 3065 G25 3065 G26 3065 G27 3065fc 8 For more information www.linear.com/LT3065

LT3065 Series Typical perForMance characTerisTics T = 25°C, unless otherwise noted. J SHDN Pin Input Current ADJ Pin Bias Current Internal Current Limit 3.0 50 1.5 1.4 VIN = 6V 45 1.3 VOUT = 0V 2.5 40 1.2 DN PIN CURRENT (µA) 121...005 DJ PIN CURRENT (nA) 3223100555 CURRENT LIMIT (A) 1000001.......1968570 H A 0.4 S 10 0.3 0.5 0.2 5 0.1 0 0 0 0 5 10 15 20 25 30 35 40 45 –75–50–25 0 25 50 75 100125150175 –75–50–25 0 25 50 75 100125150175 SHDN PIN VOLTAGE (V) TEMPERATURE (°C) TEMPERATURE (°C) 3065 G28 3065 G29 3065 G30 Internal Current Limit Reverse Output Current Reverse Output Current 1.2 1.0 180 1.1 125°C 150°C 0.9 VIN = 0 160 VVOINU =T =0 VVADJ = 1.2V 1.0 0.8 140 T LIMIT (A) 0000....7896 –5–54°C0°C URRENT (µA) 000...576 URRENT (µA) 112000 IOUT CURREN 00..45 25°C UTPUT C 00..34 UTPUT C 8600 0.3 O O 0.2 40 0.2 0.1 0.1 20 IADJ 0 0 0 0 5 10 15 20 25 30 35 40 45 0 5 10 15 20 25 30 35 40 –75–50–25 0 25 50 75 100125150175 VIN – VOUT (V) VOUT (V) TEMPERATURE (°C) 3065 G31 3065 G32 3065 G33 Input Ripple Rejection Input Ripple Rejection Input Ripple Rejection 90 90 90 COUT = 10µF 80 CREF/BYP = 10nF 80 COUT = 3.3µF 80 B) 70 CREF/BYP = 1nF B) 70 70 N (d 60 N (d 60 60 O O CTI 50 CTI 50 R 50 REJE 40 CREF/BYP = 0nF REJE 40 PSR 40 PLE 30 CREF/BYP = 100pF PLE 30 30 RIP 20 ILOAD = 500mA RIP 20 ILOAD = 500mA 20 CILROEAFD/B =Y P5 0=0 1m0AnF COUT = 10µF CREF/BYP = 10nF VOUT = 3.3V 10 VOUT = 3.3V 10 VOUT = 3.3V 10 VIN = 4.3V + 50mVRMS RIPPLE VIN = 4.3V + 50mVRMS RIPPLE VIN = 4.3V + 50mVRMS RIPPLE f = 120Hz 0 0 0 10 100 1k 10k 100k 1M 10M 10 100 1k 10k 100k 1M 10M –75–50–25 0 25 50 75 100125150175 FREQUENCY (Hz) FREQUENCY (Hz) TEMPERATURE (°C) 3065 G34 3065 G35 3065 G36 3065fc 9 For more information www.linear.com/LT3065

LT3065 Series Typical perForMance characTerisTics T = 25°C, unless otherwise noted. J Output Noise Spectral Density Minimum Input Voltage Load Regulation CREF/BYP = 0, CFF = 0 22..02 IL = 500mA 34 V∆OILU =T 1=m 0.A6 VTO 500mA V/√Hz) 10 CILO =U T5 0=0 1m0AµF OLTAGE (V) 111...846 ON (mV) 12 VIN = 2.2V DENSITY (µ 1 MINIMUM INPUT V 10001.....08642 LOAD REGULATI ––120 T NOISE SPECTRAL 0.1 VVVOOOUUUTTT === 532V..35VV 0.2 –3 PU VOUT = 1.2V UT VOUT = 0.6V 0 –4 O0.01 –75–50–25 0 25 50 75 100125150175 –75–50–25 0 25 50 75 100125150175 10 100 1k 10k 100k TEMPERATURE (°C) TEMPERATURE (°C) FREQUENCY (Hz) 3065 G37 3065 G38 3065 G39 Output Noise Spectral Density Output Noise Spectral Density RMS Output Noise, vs C , C = 0 vs C , C = 10nF V = 0.6V, C = 0 REF/BYP FF FF REF/BYP OUT FF 10 10 110 ENSITY (µV/√Hz) 1 VOUT = 5V CILO =U T5 0=0 1m0AµF ENSITY (µV/√Hz) 1 VCILOO =UU TT5 0==0 51mV0AµF GE (µV)RMS178900000 fC =O U1T0 H= z1 T0OµF 100kHz CREF/BYP = 0pF CTRAL D VOUT = 0.6V CTRAL D E VOLTA 6500 CREF/BYP = 100pF E E S UTPUT NOISE SP 0.1 CCCRRREEEFFF///BBBYYYPPP === 1110n00FnpFF UTPUT NOISE SP 0.1 CCCCFFFFFFFF ==== 0111p0n0F0FnpFF OUTPUT NOI 21430000 CCRREEFF/B/BYYPP == 110nnFF O0.01 O0.01 0 10 100 1k 10k 100k 10 100 1k 10k 100k 0.01 0.1 1 10 100 1000 FREQUENCY (Hz) FREQUENCY (Hz) LOAD CURRENT (mA) 3065 G40 3065 G41 3065 G42 RMS Output Noise vs Load Current RMS Output Noise, Start-Up Time vs CREF/BYP = 10nF, CFF = 0 vs Feedforward Capacitor (CFF) vs REF/BYP Capacitor 200 120 1000 GE NOISE (µV)RMS111114602800000 fC =OV U1OT0 UH=TV z1 O =T0U Oµ1TF. 51=V0 10.Vk8OHVUzT =V 2O.U5TV = 3.V3OVUT = 5V VOLTAGE (µV)RMS11680791000000 VOUT =V 5OVUT = 3.3VVOUCfCIIT FL=RO BO= EU-A1 DF2TD0/I .BV H=5=YI VzD 1P5 ET0 0=ROµ0 F1= m10 10An00FµkHAz P TIME (ms)11000 CFF = OPEN OLTA 80 OISE 50 RT-U V N 40 A UTPUT 4600 VOUT = 1.2V UTPUT 2300 VOUT = 1.2V ST 1 O O VOUT = 0.6V 20 10 0 VOUT = 0.6V 0 0.1 0.01 0.1 1 10 100 1000 0.01 0.1 1 10 1 10 100 1000 LOAD CURRENT (mA) FEEDFORWARD CAPACITOR, CFF (nF) REF/BYP CAPACITOR (nF) 3065 G43 3065 G44 3065 G45 3065fc 10 For more information www.linear.com/LT3065

LT3065 Series Typical perForMance characTerisTics T = 25°C, unless otherwise noted. J 10Hz to 100kHz Output Noise 10Hz to 100kHz Output Noise 5V Transient Response CREF/BYP = 10nF, CFF = 0 CREF/BYP = 10nF, CFF = 10nF CFF = 0, IOUT = 50mA to 500mA VOUT 100mV/DIV VOUT VOUT 200µV/DIV 200µV/DIV IOUT 500mA/DIV COUT = 10µF 2ms/DIV 3065 G46 COUT = 10µF 2ms/DIV 3065 G47 VIN = 6V 100µs/DIV 3065 G48 ILOAD = 500mA ILOAD = 500mA COUT = 10µF VOUT = 5V VOUT = 5V IFB-DIVIDER = 10µA VOUT = 5V 5V Transient Response C = 10nF, I = 50mA to 500mA Transient Response (Load Dump) FF OUT VOUT 20mV/DIV VOUT 45V 100mV/DIV IOUT 10V/DVIIVN 500mA/DIV 12V VIN = 6V 20µs/DIV 3065 G49 VOUT = 5V 1ms/DIV 3065 G50 COUT = 10µF IOUT = 100mA IFB-DIVIDER = 10µA COUT = 10µF VOUT = 5V SHDN Transient Response SHDN Transient Response C = 0 C = 10nF REF/BYP REF/BYP OUT OUT 5V/DIV 5V/DIV IL = 500mA IL = 500mA REF/BYP REF/BYP 500mV/DIV 500mV/DIV SHDN SHDN 2V/DIV 2V/DIV 2ms/DIV 3065 G51 2ms/DIV 3065 G52 3065fc 11 For more information www.linear.com/LT3065

LT3065 Series Typical perForMance characTerisTics T = 25°C, unless otherwise noted. J Precision Current Limit, Precision Current Limit, R = 1.5k R = 604Ω PWRGD Threshold Voltage IMAX IMAX 220 550 590 VOUT(NOMINAL) = 5V VOUT(NOMINAL) = 5V 216 540 580 212 530 570 MIT (mA) 220048 VIN = 10V MIT (mA) 551200 5.6V AGE (mV) 555600 ADJ PIN RISING THRESHOLD CURRENT LI 121909602 VIN = 5.6V CURRENT LI 454908000 10V 7V DJ PIN VOLT 555342000 ADJ PIN FALLING THRESHOLD A 188 470 510 184 460 500 180 450 490 –75–50–25 0 25 50 75 100125150175 –75–50–25 0 25 50 75 100125150175 –75–50–25 0 25 50 75 100125150175 TEMPERATURE (°C) TEMPERATURE (°C) TEMPERATURE (°C) 3065 G53 3065 G54 3065 G55 pin FuncTions (DFN/MSOP) IN (Pins 1, 2/Pins 1, 2): Input. These pin(s) supply power PWRGD (Pin 4/Pin 4): Power Good. The PWRGD pin is an to the device. The LT3065 requires a local IN bypass open-drain output that actively pulls low if the output is capacitor if it is located more than six inches from the main less than 90% of the nominal output value. The PWRGD input filter capacitor. In general, battery output imped- pin is capable of sinking 50µA. There is no internal pull-up ance rises with frequency, so adding a bypass capacitor resistor; an external pull-up resistor must be used. in battery-powered circuits is advisable. An input bypass I (Pin 5/Pin 5): Precision Current Limit Programming. MAX capacitor in the range of 1µF to 10µF generally suffices. This pin is the collector of a current mirror PNP that is See Input Capacitance and Stability in the Applications 1/500th the size of the output power PNP. This pin is also Information section for more information. the input to the current limit amplifier. The current limit The LT3065 withstands reverse voltages on the IN pin threshold is set by connecting a resistor between the I MAX with respect to its GND and OUT pins. In such case, such pin and GND. as a battery plugged in backwards, the LT3065 behaves For detailed information on how to set the I pin resistor MAX as if a diode is in series with its input. No reverse current value, see the Applications Information section. The I MAX flows into the LT3065 and no reverse voltage appears at pin requires a 22nF de-coupling capacitor to ground. If the load. The device protects itself and the load. not used, tie I to GND. MAX SHDN (Pin 3/Pin 3): Shutdown. Pulling the SHDN pin NC (Pins 6, 7, MSE Package Only): No Connect. These low puts the LT3065 into a low power state and turns pins have no connection to internal circuitry. These pins the output off. Drive the SHDN pin with either logic or an may be floated or connected to GND. open collector/drain with a pull-up resistor. The resistor supplies the pull-up current to the open collector/drain REF/BYP (Pin 6/Pin 8): Bypass/Soft Start. Connecting a logic, normally several microamperes, and the SHDN capacitor from this pin to GND bypasses the LT3065’s ref- pin current, typically less than 2µA. If unused, connect erence noise and soft-starts the reference. A 10nF bypass the SHDN pin to IN. The LT3065 does not function if the capacitor typically reduces output voltage noise to 25µVRMS SHDN pin is not connected. in a 10Hz to 100kHz bandwidth. Soft-start time is directly 3065fc 12 For more information www.linear.com/LT3065

LT3065 Series pin FuncTions (DFN/MSOP) Temperature in the Typical Performance Characteristics proportional to the BYP capacitor value. If the LT3065 section). The ADJ pin voltage is 600mV referenced to GND. is placed in shutdown, BYP is actively pulled low by an internal device to reset soft-start. If low noise or soft-start Connecting a capacitor from OUT to ADJ reduces output performance is not required, this pin must be left floating noise and improves transient response for output voltages (unconnected). Do not drive this pin with any active circuitry. greater than 600mV. See the Applications Information sec- tion for calculating the value of the feedforward capacitor. Because the REF/BYP pin is the reference input to the error amplifier, stray capacitance at this point should be At output voltages above 0.6V, the resistor divider minimized. Special attention should be given to any stray connected to the ADJ pin is used to regulate voltage at capacitances that can couple external signals onto the the load. Parasitic resistances of PCB traces or cables can REF/BYP pin producing undesirable output transients or therefore result in load regulation errors at high output ripple. A minimum capacitance of 100pF from REF/BYP currents. To eliminate these, connect the resistor divider to GND is recommended. directly to the load for a Kelvin sense connection, as shown in Figure 1. OUTPUT (Pins 9,10/Pins 11,12): Output. These pins sup- ply power to the load. Stability requirements demand a Fixed Voltage Version Only minimum 3.3µF ceramic output capacitor with an ESR < 1Ω to prevent oscillations. Applications with output voltages GND (Exposed Pad Pin 11, Exposed Pad Pin 13): Ground. less than 1.2V require a minimum 4.7µF ceramic output The exposed pad of the DFN and MSOP packages is an capacitor. Large load transient applications require larger electrical connection to GND. To ensure proper electrical output capacitors to limit peak voltage transients. See the and thermal performance, solder Pin 11/Pin 13 to the Applications Information section for details on transient PCB ground. response and reverse output characteristics. Permissible SENSE (Pin 8/Pin 10): Sense. This pin is the top of the output voltage range is 600mV to 40V. internal resistor divider network, and should be connected directly to the load, as a Kelvin sense, for optimum load Adjustable Version Only regulation and transient performance. Connecting this GND (Pin 7, Exposed Pad Pin 11/Pin 9, Exposed Pad pin to the output pin at the package, rather than directly Pin 13): Ground. The exposed pad of the DFN and MSOP to the load, can result in load regulation errors due to the packages is an electrical connection to GND. To ensure current across the parasitic resistance of the PCB trace. proper electrical and thermal performance, solder Pin ADJ (Pin 7/Pin 9): Adjust. This pin is the midpoint of the 11/Pin 13 to the PCB GND and tie it directly to Pin 7/Pin internal resistor divider network and the inverting input 9. For the adjustable LT3065, connect the bottom of the to the error amplifier. Connecting a capacitor from the external resistor divider that sets output voltage directly OUT to ADJ reduces output noise and improves transient to GND (Pin 7/Pin 9)for optimum load regulation. response. See the Applications Information section for ADJ (Pin 8/Pin 10): Adjust. This pin is the error ampli- calculating the value of the feedforward capacitor; the fier’s inverting terminal. It’s typical bias current of 16nA internal divider current is 5µA. This pin should not be flows out of the pin (see curve of ADJ Pin Bias Current vs used for any other purpose. 3065fc 13 For more information www.linear.com/LT3065

LT3065 Series pin FuncTions ADJUSTABLE VERSION FIXED VOLTAGE VERSION RP RP IN OUT IN OUT R2 LT3065 LT3065-X + + SHDN ADJ + + SHDN SENSE VIN LOAD VIN LOAD GND R1 GND RP RP 3065 F01 Figure 1. Kelvin Sense Connection block DiagraM Table 2. Fixed Voltage Option Resistor Values V (V) R1 (kΩ) R2 (kΩ) OUT 5 120 880 3.3 120 540 2.5 120 380 1.8 120 240 1.5 120 180 1.2 120 120 IN SENSE* R5 R2* D1 QIMAX 1/500X QPOWER 30k THERMAL/ 1X ADJ R4 – CURRENT LIMIT + Q3 OUT Q2 CURRENT ERROR LIMIT R1* AMPLIFIER AMPLIFIER 100k D2 + R3 IMAX IDEAL DIODE – D3 SHDN + 600mV – REFERENCE PWRGD – QPWRGD + + 540mV – REFERENCE REF/BYP GND 3065 F02 *FIXED VOLTAGE OPTIONS ONLY Figure 2. System Block Diagram 3065fc 14 For more information www.linear.com/LT3065

LT3065 Series applicaTions inForMaTion The LT3065 are micropower, low noise and low drop-out The ADJ pin bias current, 16nA at 25°C, flows from the voltage, 500mA linear regulators with micropower shut- ADJ pin through R1 to GND. Calculate the output voltage down, programmable current limit, and a Power-good flag. using the formula in Figure 3. R1’s value should not be The devices supply up to 500mA at a typical dropout voltage greater than 62k to provide a minimum 10μA load current of 300mV and operates over a 1.8V to 45V input range. so that output voltage errors, caused by the ADJ pin bias current, are minimized. Note that in shutdown, the output A single external capacitor provides low noise reference is turned off and the divider current is zero. Curves of ADJ performance and output soft-start functionality. For ex- Pin Voltage vs Temperature and ADJ Pin Bias Current vs ample, connecting a 10nF capacitor from the REF/BYP Temperature appear in the Typical Performance Charac- pin to GND lowers output noise to 25μV over a 10Hz RMS teristics section. to 100kHz bandwidth. This capacitor also soft starts the reference and prevents output voltage overshoot at turn-on. The LT3065’s quiescent current is merely 55μA but provides fast transient response with a low ESR, minimum value + IN OUT VOUT 3.3μF ceramic output capacitor. In shutdown, quiescent VIN LT3065 R2 current is less than 1μA and the reference soft-start SHDN ADJ capacitor is reset. GND R1 3065 F03 The LT3065 optimizes stability and transient response with low ESR, ceramic output capacitors. The regulator does ⎛ R2⎞ VOUT=0.6V⎜1+ ⎟–(IADJ•R2) not require the addition of ESR as is common with other ⎝ R1⎠ regulators. The LT3065 typically provides better than 0.1% V =0.6V ADJ line regulation and 0.1% load regulation. Internal protec- I =16nA AT 25°C ADJ tion circuitry includes reverse battery protection, reverse output protection, reverse current protection, current limit OUTPUT RANGE = 0.6V TO 40V with foldback and thermal shutdown. Figure 3. Adjustable Operation This “bullet-proof” protection set makes it ideal for use in battery-powered, automotive and industrial systems.In battery backup applications where the output is held up The LT3065 is tested and specified with the ADJ pin tied by a backup battery and the input is pulled to ground, the to the OUT pin, yielding V = 0.6V. Specifications for OUT LT3065 acts like it has a diode in series with its output output voltages greater than 0.6V are proportional to the and prevents reverse current. ratio of the desired output voltage to 0.6V: V /0.6V. For OUT example, load regulation for an output current change of Adjustable Operation 1mA to 500mA is 0.1mV (typical) at V = 0.6V. At V OUT OUT The adjustable LT3065 has an output voltage range of 0.6V = 12V, load regulation is: to 40V. Output voltage is set by the ratio of two external 12V resistors, as shown in Figure 3. The device regulates the •(0.1mV)=2mV output to maintain the ADJ pin voltage at 0.6V referenced 0.6V to ground. The current in R1 equals 0.6V/R1, and R2’s current is R1’s current minus the ADJ pin bias current. 3065fc 15 For more information www.linear.com/LT3065

LT3065 Series applicaTions inForMaTion Table 3 shows 1% resistor divider values for some common onto the LT3065’s output. Power supply ripple rejection output voltages with a resistor divider current of 10μA. must also be considered. The LT3065 regulator does not have unlimited power supply rejection and passes a small Table 3. Output Voltage Resistor Divider Values portion of the input noise through to the output. V (V) R1 (kΩ) R2 (kΩ) OUT Using a feedforward capacitor (C ) connected between 1.2 60.4 60.4 FF V and ADJ has the added benefit of improving transient 1.5 59 88.7 OUT response for output voltages greater than 0.6V. With no 1.8 59 118 feedforward capacitor, the settling time increases as the 2.5 60.4 191 output voltage increases above 0.6V. Use the equation 3 59 237 in Figure 4 to determine the minimum value of C to 3.3 61.9 280 FF achieve a transient response that is similar to the 0.6V 5 59 432 output voltage performance regardless of the chosen output voltage (See Figure 5 and Transient Response in Bypass Capacitance and Output Voltage Noise the Typical Performance Characteristics section). The LT3065 regulator provides low output voltage noise over a 10Hz to 100kHz bandwidth while operating at full load with the addition of a bypass capacitor (CREF/BYP) + IN OUT VOUT from the REF/BYP pin to GND. A high quality low leak- VIN LT3065 R2 CFF COUT age capacitor is recommended. This capacitor bypasses SHDN ADJ R1 the internal reference of the regulator, providing a low GND REF/BYP frequency noise pole for the internal reference. With the CREF/BYP use of 10nF for C , output voltage noise decreases REF/BYP 3065 F04 to as low as 25μVRMS when the output voltage is set for C ≥10nF •(I ) 0.6V. For higher output voltages (generated by using a FF 10µA FB_DIVIDER feedback resistor divider), the output voltage noise gains V I = OUT up proportionately when using C . FB_DIVIDER REF/BYP R1+R2 To lower the higher output voltage noise, connect a Figure 4. Feedforward Capacitor for Fast Transient Response feedforward capacitor (C ) from V to the ADJ pin. A FF OUT high quality, low leakage capacitor is recommended. This capacitor bypasses the error amplifier of the regulator, providing an additional low frequency noise pole. With 0 nstheoeti s tueos ed5 eVoc frb 1ey0a sane F1s f0 otμorA b2 of5etμehVd CbRFaMFc Sak n wrdeh sCeinRs tEotFh/rBe dY oiPvu,i dtopeuurt.tp Iuvfot tlvhtoaegl tceau gires- DFORWARDACITOR, CFF 100pF 100mV/DOUTV EEAP 1nF IV rent in the feedback resistor divider is doubled, C must FC FF 10nF also be doubled to achieve equivalent noise performance. LOAD CURRENT 500mA/DIV Feedforward capacitance can also be used in fixed-voltage VOUT = 5V 100µs/DIV 3065 F05 parts; the feedforward capacitor is connected from OUT COUT = 10µF IFB-DIVIDER = 10µA to ADJ in the same manner. In this case, the current in the internal feedback resistor divider is 5μA. Figure 5. Transient Response vs Feedforward Capacitor Higher values of output voltage noise can occur if care is not exercised with regard to circuit layout and testing. Crosstalk from nearby traces induces unwanted noise 3065fc 16 For more information www.linear.com/LT3065

LT3065 Series applicaTions inForMaTion During start-up, the internal reference soft-starts when as low as 1μF to 2μF for the DC bias voltage applied, and a REF/BYP capacitor is used. Regulator start-up time is over the operating temperature range. The X5R and X7R directly proportional to the size of the bypass capacitor dielectrics yield much more stable characteristics and are (see Start-Up Time vs REF/BYP Capacitor in the Typical more suitable for use as the output capacitor. Performance Characteristics section). The reference The X7R type works over a wider temperature range and bypass capacitor is actively pulled low during shutdown has better temperature stability, while the X5R is less to reset the internal reference. expensive and is available in higher values. Care still must Using a feedforward capacitor also affects start-up time. be exercised when using X5R and X7R capacitors; the X5R Start-up time is directly proportional to the size of the and X7R codes only specify operating temperature range feedforward capacitor and the output voltage, and is and maximum capacitance change over temperature. inversely proportional to the feedback resistor divider cur- Capacitance change due to DC bias with X5R and X7R rent, slowing to 15ms with a 10nF feedforward capacitor capacitors is better than Y5V and Z5U capacitors, but can and a 10μF output capacitor for an output voltage set to still be significant enough to drop capacitor values below 5V by a 10μA feedback resistor divider. appropriate levels. Capacitor DC bias characteristics tend to improve as component case size increases, but expected Output Capacitance and Transient Response capacitance at operating voltage should be verified. The LT3065 regulator is stable with a wide range of output capacitors. The ESR of the output capacitor affects stability, 20 BOTH CAPACITORS ARE 16V, most notably with small capacitors. Use a minimum output 1210 CASE SIZE, 10µF 0 capacitor of 3.3μF with an ESR of 1Ω or less to prevent %) X5R oscillations. For VOUT less than 1.2V, use a minimum COUT E (–20 U of 4.7µF. If a feedforward capacitor is used with output AL V voltages set for greater than 24V, use a minimum output E IN –40 G capacitor of 10μF. The LT3065 is a micropower device N A–60 H and output load transient response is a function of output C Y5V capacitance. Larger values of output capacitance decrease –80 the peak deviations and provide improved transient re- –100 0 2 4 6 8 10 12 14 16 sponse for larger load current changes. Bypass capacitors, DC BIAS VOLTAGE (V) used to decouple individual components powered by the 3065 F06 LT3065, increase the effective output capacitor value. For Figure 6. Ceramic Capacitor DC Bias Characteristics applications with large load current transients, a low ESR ceramic capacitor in parallel with a bulk tantalum capacitor 40 often provides an optimally damped response. 20 Give extra consideration to the use of ceramic capacitors. %) 0 X5R Manufacturers make ceramic capacitors with a variety of E ( U L –20 dielectrics, each with different behavior across tempera- VA N ture and applied voltage. The most common dielectrics E I –40 G Y5V N are specified with EIA temperature characteristic codes A H –60 C of Z5U, Y5V, X5R and X7R. The Z5U and Y5V dielectrics –80 provide high C-V products in a small package at low cost, BOTH CAPACITORS ARE 16V, 1210 CASE SIZE, 10µF but exhibit strong voltage and temperature coefficients, as –100 –50 –25 0 25 50 75 100 125 shown in Figures 6 and 7. When used with a 5V regulator, TEMPERATURE (°C) 3065 F07 a 16V 10μF Y5V capacitor can exhibit an effective value Figure 7. Ceramic Capacitor Temperature Characteristics 3065fc 17 For more information www.linear.com/LT3065

LT3065 Series applicaTions inForMaTion Voltage and temperature coefficients are not the only The self-inductance, or isolated inductance, of a wire is sources of problems. Some ceramic capacitors have a directly proportional to its length. Wire diameter is not a piezoelectric response. A piezoelectric device generates major factor on its self-inductance. For example, the self- voltage across its terminals due to mechanical stress, simi- inductance of a 2-AWG isolated wire (diameter = 0.26") is lar to the way a piezoelectric accelerometer or microphone about half the self-inductance of a 30-AWG wire (diameter works. For a ceramic capacitor, the stress is induced by = 0.01"). One foot of 30-AWG wire has approximately vibrations in the system or thermal transients. The resulting 465nH of self-inductance. voltages produced cause appreciable amounts of noise. Two methods can reduce wire self-inductance. One method A ceramic capacitor produced the trace in Figure 8 in divides the current flowing towards the LT3065 between response to light tapping from a pencil. Similar vibration two parallel conductors. In this case, the farther apart the induced behavior can masquerade as increased output wires are from each other, the more the self-inductance is voltage noise. reduced; up to a 50% reduction when placed a few inches apart. Splitting the wires connects two equal inductors in parallel, but placing them in close proximity creates mutual inductance adding to the self-inductance. The second and most effective way to reduce overall inductance is to place both forward and return current conductors (the input VOUT 1mV/DIV and GND wires) in very close proximity. Two 30-AWG wires separated by only 0.02", used as forward and return current conductors, reduce the overall self-inductance to approximately one-fifth that of a single isolated wire. VOUT = 5V 10ms/DIV 3065 F08 If a battery, mounted in close proximity, powers the LT3065, COUT = 10µF CREF/BYP = 10nF a 10µF input capacitor suffices for stability. However, if a Figure 8. Noise Resulting from Tapping On a Ceramic Capacitor distant supply powers the LT3065, use a larger value input capacitor. Use a rough guideline of 1µF (in addition to the 10µF minimum) per 8 inches of wire length. The minimum Stability and Input Capacitance input capacitance needed to stabilize the application also Low ESR, ceramic input bypass capacitors are acceptable varies with power supply output impedance variations. for applications without long input leads. However, appli- Placing additional capacitance on the LT3065’s output cations connecting a power supply to an LT3065 circuit’s also helps. However, this requires an order of magnitude IN and GND pins with long input wires combined with a more capacitance in comparison with additional LT3065 low ESR, ceramic input capacitors are prone to voltage input bypassing. Series resistance between the supply and spikes, reliability concerns and application-specific board the LT3065 input also helps stabilize the application; as oscillations. little as 0.1Ω to 0.5Ω suffices. This impedance dampens the LC tank circuit at the expense of dropout voltage. A The input wire inductance found in many battery-powered better alternative is to use higher ESR tantalum or elec- applications, combined with the low ESR ceramic input trolytic capacitors at the LT3065 input in place of ceramic capacitor, forms a high Q LC resonant tank circuit. In capacitors. some instances this resonant frequency beats against the output current dependent LDO bandwidth and interferes I Pin Operation with proper operation. Simple circuit modifications/solu- MAX tions are then required. This behavior is not indicative of The I pin is the collector of a PNP that sources a cur- MAX LT3065 instability, but is a common ceramic input bypass rent equal to 1/500th of output load current (see Block capacitor application issue. Diagram). The I pin is also the input to the precision MAX 3065fc 18 For more information www.linear.com/LT3065

LT3065 Series applicaTions inForMaTion current limit amplifier. Connecting a resistor (R ) from the REF/BYP capacitor is significantly larger than the IMAX I to GND sets the current limit threshold. If the output feed-forward capacitor, causing REF/BYP time constant MAX load increases to a level such that the I pin voltage to dominate over the time constant of the resistor divider MAX reaches 0.6V, the current limit amplifier takes control network. and regulates the I voltage to 0.6V, regardless of the MAX output voltage. Calculate the required R value for a Operation in Dropout IMAX given current limit from the following formula: Some degradation of the I current mirror accuracy MAX 0.6V occurs for output currents less than 50mA when operat- R =500• IMAX ing in dropout. I LIMIT Overload Recovery In cases where the IN to OUT differential voltage exceeds 10V, current limit foldback lowers the internal current Like many IC power regulators, the LT3065 has safe oper- limit level, possibly causing it to override the external ating area protection. The safe area protection decreases programmable current limit. See the Internal Current current limit as input-to-output voltage increases, and Limit vs V – V graph in the Typical Performance keeps the power transistor inside a safe operating region IN OUT Characteristics section. for all values of input-to-output voltage. The LT3065 pro- vides some output current at all values of input-to-output The I pin requires a 22nF decoupling capacitor. If the MAX voltage up to the device’s Absolute Maximum Rating. external programmable current limit is not used, connect the I pin directly to GND. LT3065 power dissipation When power is first applied, the input voltage rises and the MAX increases the I threshold at a rate of approximately output follows the input; allowing the regulator to start-up MAX 0.5 percent per watt. into very heavy loads. During start-up, as the input voltage is rising, the input-to-output voltage differential is small, PWRGD Pin Operation allowing the regulator to supply large output currents. With a high input voltage, a problem can occur wherein The PWRGD pin is an open-drain high voltage NMOS digital the removal of an output short will not allow the output output capable of sinking 50µA. The PWRGD pin de-asserts to recover. Other regulators, such as the LT1083/LT1084/ and becomes high impedance if the output rises above LT1085 family and LT1764A also exhibit this phenomenon, 90% of its nominal value. If the output falls below 88.4% so it is not unique to the LT3065. The problem occurs with of its nominal value for more than 25μs, the PWRGD pin a heavy output load when the input voltage is high and the asserts low. The PWRGD comparator has 1.6% hysteresis output voltage is low. Common situations are immediately and 25μs of deglitching. The PWRGD comparator has a after the removal of a short circuit or if the shutdown pin dedicated reference that does not soft-start if a capacitor is pulled high after the input voltage is already turned on. is used on the REF/BYP pin. The load line intersects the output current curve at two The use of a feed-forward capacitor, CFF, as shown in points. If this happens, there are two stable output operat- Figure 4, can result in the ADJ pin being pulled artificially ing points for the regulator. With this double intersection, high during startup transients, which causes the PWRGD the input power supply needs to be cycled down to zero flag to assert early. To avoid this problem, ensure that and back up again to recover the output. 3065fc 19 For more information www.linear.com/LT3065

LT3065 Series applicaTions inForMaTion Thermal Considerations Tables 4 and 5 list thermal resistance as a function of copper area in a fixed board size. All measurements were taken The LT3065’s maximum rated junction temperature of in still air on a 4-layer FR-4 board with 1oz solid internal 125°C (E-, I-grades) or 150°C (MP-, H-grades) limits its planes, and 2oz external trace planes with a total board power handling capability. Two components comprise the thickness of 1.6mm. For further information on thermal power dissipated by the device: resistance and using thermal information, refer to JEDEC 1. Output current multiplied by the input/output voltage standard JESD51, notably JESD51-12. differential: Table 4. MSOP Measured Thermal Resistance I • (V – V ), OUT IN OUT COPPER AREA THERMAL RESISTANCE and TOPSIDE BACKSIDE BOARD AREA (JUNCTION-TO-AMBIENT) 2500 sq mm 2500 sq mm 2500 sq mm 28°C/W 2. GND pin current multiplied by the input voltage: 1000 sq mm 2500 sq mm 2500 sq mm 31°C/W I • V GND IN 225 sq mm 2500 sq mm 2500 sq mm 32°C/W GND pin current is determined using the GND Pin Current 100 sq mm 2500 sq mm 2500 sq mm 33°C/W curves in the Typical Performance Characteristics section. Table 5. DFN Measured Thermal Resistance Power dissipation equals the sum of the two components COPPER AREA THERMAL RESISTANCE listed above. TOPSIDE BOARD AREA (JUNCTION-TO-AMBIENT) The LT3065 regulator has internal thermal limiting 2500 sq mm 2500 sq mm 31°C/W that protects the device during overload conditions. 1000 sq mm 2500 sq mm 32°C/W For continuous normal conditions, do not exceed the 225 sq mm 2500 sq mm 34°C/W maximum junction temperature of 125°C (E-, I-grades) 100 sq mm 2500 sq mm 35°C/W or 150°C (MP-, H-grades). Carefully consider all sources of thermal resistance from junction-to-ambient including Calculating Junction Temperature other heat sources mounted in proximity to the LT3065. Example: Given an output voltage of 5V, an input voltage The undersides of the LT3065 DFN and MSE packages have range of 12V ±5%, a maximum output current range of exposed metal from the lead frame to the die attachment. 75mA and a maximum ambient temperature of 85°C, what These packages allow heat to directly transfer from the is the maximum junction temperature? die junction to the printed circuit board metal to control The power dissipated by the device equals: maximum operating junction temperature. The dual-inline I • (V – V ) + I • V pin arrangement allows metal to extend beyond the ends OUT(MAX) IN(MAX) OUT GND IN(MAX) of the package on the topside (component side) of a PCB. where: Connect this metal to GND on the PCB. The multiple IN I = 75mA and OUT pins of the LT3065 also assist in spreading heat OUT(MAX) to the PCB. V = 12.6V IN(MAX) For surface mount devices, heat sinking is accomplished I at (I = 75mA, V = 12V) = 3.5mA GND OUT IN by using the heat spreading capabilities of the PC board So: and its copper traces. Copper board stiffeners and plated through-holes also can spread the heat generated by P = 75mA • (12.6V – 5V) + 3.5mA • 12.6V = 0.614W power devices. 3065fc 20 For more information www.linear.com/LT3065

LT3065 Series applicaTions inForMaTion Using a DFN package, the thermal resistance ranges from The LT3065 incurs no damage if its output is pulled be- 31°C/W to 35°C/W depending on the copper area. So the low ground. If the input is left open circuit or grounded, junction temperature rise above ambient approximately the output can be pulled below ground by 50V. No cur- equals: rent flows through the pass transistor from the output. However, current flows in (but is limited by) the feedback 0.614W • 35°C/W = 21.5°C resistor divider that sets the output voltage. Current flows The maximum junction temperature equals the maxi- from the bottom resistor in the divider and from the ADJ mum ambient temperature plus the maximum junction pin’s internal clamp through the top resistor in the divider temperature rise above ambient or: to the external circuitry pulling OUT below ground. If a voltage source powers the input, the output sources cur- T = 85°C + 21.5°C = 106.5°C JMAX rent equal to its current limit capability and the LT3065 Protection Features protects itself by thermal limiting. In this case, grounding the SHDN pin turns off the device and stops the output The LT3065 incorporates several protection features that from sourcing current. make it ideal for use in battery-powered circuits. In ad- dition to the normal protection features associated with 1.0 monolithic regulators, such as current limiting and thermal VIN = 0 0.9 limiting, the device also protects against reverse input 0.8 voltages, reverse output voltages and reverse output-to- µA) 0.7 input voltages. NT ( 0.6 E R Current limit protection and thermal overload protection CUR 0.5 T 0.4 U protect the device against current overload conditions P UT 0.3 at the LT3065’s output. The typical thermal shutdown O 0.2 temperature is 165°C with about 7°C of hysteresis. For 0.1 normal operation, do not exceed a junction temperature 0 of 125°C (E-, I-grades) or 150°C (MP-, H-grades). 0 5 10 15 20 25 30 35 40 VOUT (V) 3055 F09 The LT3065 IN pin withstands reverse voltages of 50V. The Figure 9. Reverse Output Current device limits current flow to less than 1μA (typically less than 25nA) and no negative voltage appears at OUT. The device protects both itself and the load against batteries that are plugged in backwards. 3065fc 21 For more information www.linear.com/LT3065

LT3065 Series Typical applicaTions Programming Undervoltage Lockout VIN > VUVLO IN IN R1 LT3065 SHDN R2 3065 TA02 R1+R2 V = •1.1V UVLO R2 Power Supply Sequencing Using PWRGD IN IN 500k IN LT3065 LT3065 SHDN PWRGD SHDN 3065 TA03 3065fc 22 For more information www.linear.com/LT3065

LT3065 Series Typical applicaTions Current Monitor ⎛ ⎞ 600mV R =⎜ ⎟•500 IMAX ⎜I ⎟ LT3065 ⎝OUT(MAX)⎠ I V = OUT •R LIM IMAX IMAX 500 TO ADC RIMAX 3065 TA04 LED Driver/Current Source 5V IN OUT IN 100k LT3065 LED 10µF ADJ I = 100mA OPEN-LED INDICATOR PWRGD 6Ω SHDN SHDN GND IMAX REF/BYP ILIM = 150mA 22nF 2k 10nF 3065 TA05 3065fc 23 For more information www.linear.com/LT3065

LT3065 Series Typical applicaTions Paralleling Regulators for Higher Output Current 2.5V VIN > 3V IN OUT 1A 10µF 19.1k 10µF 500k LT3065 1% PWRGD PWRGD ADJ 6.04k 1% SHDN SHDN GND IMAX REF/BYP 10nF 49.9Ω IN OUT 10µF 10µF 21k LT3065 1% PWRGD ADJ 6.04k 1% SHDN GND IMAX REF/BYP 10nF 49.9Ω 0.1µF 1k + 10k LT1637 1k – 33nF 6.8k 3065 TA06 3065fc 24 For more information www.linear.com/LT3065

LT3065 Series package DescripTion Please refer to http://www.linear.com/product/LT3065#packaging for the most recent package drawings. DD PackDaDge Package 10-Lead1 0P-lLaestaicd DPFlaNs t(i3cm DmF N× 3(3mmmm) × 3mm) (Referen(cRee LfTeCre DncWeG L T# C0 5D-W08G-1 #6 6095 -R0e8v- 1C6)99 Rev C) 0.70 ±0.05 3.55 ±0.05 1.65 ±0.05 2.15 ±0.05 (2 SIDES) PACKAGE OUTLINE 0.25 ±0.05 0.50 BSC 2.38 ±0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS R = 0.125 0.40 ±0.10 TYP 6 10 3.00 ±0.10 1.65 ±0.10 (4 SIDES) (2 SIDES) PIN 1 NOTCH PIN 1 R = 0.20 OR TOP MARK 0.35 × 45° (SEE NOTE 6) CHAMFER (DD) DFN REV C 0310 5 1 0.200 REF 0.75 ±0.05 0.25 ±0.05 0.50 BSC 2.38 ±0.10 (2 SIDES) 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2). CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 3065fc 25 For more information www.linear.com/LT3065

LT3065 Series package DescripTion Please refer to http://www.linear.com/product/LT3065#packaging for the most recent package drawings. MSE Package 12-Lead PlasMtiSc EM PSaOcP,k aEgxpeosed Die Pad 12-(LReeafedre Pnclae sLtTiCc DMWSGO #P 0, 5E-x0p8-o1s6e6d6 RDeive GP)ad (Reference LTC DWG # 05-08-1666 Rev G) BOTTOM VIEW OF EXPOSED PAD OPTION 2.845 ±0.102 2.845 ±0.102 (.112 ±.004) (.112 ±.004) 0.889 ±0.127 (.035 ±.005) 1 6 0.35 REF 5.10 1.651 ±0.102 (.201) 1.651 ±0.102 3.20 – 3.45 (.065 ±.004) 0.12 REF MIN (.065 ±.004) (.126 – .136) DETAIL “B” CORNER TAIL IS PART OF DETAIL “B” THE LEADFRAME FEATURE. FOR REFERENCE ONLY 12 7 NO MEASUREMENT PURPOSE 0.42 ±0.038 0.65 4.039 ±0.102 (.0165 ±.0015) (.0256) (.159 ±.004) TYP BSC (NOTE 3) 0.406 ±0.076 RECOMMENDED SOLDER PAD LAYOUT 121110 9 87 (.016 ±.003) REF DETAIL “A” 0.254 (.010) 3.00 ±0.102 0° – 6° TYP 4.90 ±0.152 (.118 ±.004) (.193 ±.006) GAUGE PLANE (NOTE 4) 0.53 ±0.152 (.021 ±.006) 1 2 3 4 5 6 DETAIL “A” 1.10 0.86 0.18 (.043) (.034) (.007) MAX REF SEATING PLANE 0.22 – 0.38 0.1016 ±0.0508 (.009 – .015) (.004 ±.002) TYP 0.650 NOTE: (.0256) MSOP (MSE12) 0213 REV G 1. DIMENSIONS IN MILLIMETER/(INCH) BSC 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL NOT EXCEED 0.254mm (.010") PER SIDE. 3065fc 26 For more information www.linear.com/LT3065

LT3065 Series revision hisTory REV DATE DESCRIPTION PAGE NUMBER A 7/14 Added fixed voltage options and related specs, curves, pin functions, text Throughout Modified pinouts to accommodate new fixed voltage options 2 Added specification for Absolute Maximum SENSE pin voltage 2 Modified Bypass Capacitance section 10 B 11/14 Fixed pin function description 13 C 05/17 Corrected Input Ripple Rejection graph; changed 100nF to 100pF 9 Added bypass capacitor to LED Driver Application circuit 23 3065fc Information furnished by Linear Technology Corporation is believed to be accurate and reliable. 27 However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconnecFtoiorn m ofo itrse c iirncfuoitrsm asa dtieosnc rwibewdw h.elrineiena wr.icllo nmot /iLnTfr3in0g6e 5on existing patent rights.

LT3065 Series Typical applicaTion Adjustable High Efficiency Regulator CMDSH-4E 4.5V TO 25V VIN BOOST 1µF 100k LT3493 0.1µF 10µF 10µH 0.6V TO SHDN SW IN OUT 10VOUT 0.1µF 4×72µF 255k 4.7µF LT3065 1M 10µF 200mA MBRM140 SHDN ADJ 10nF 61.9k GND FB TP0610L 100k 1% 10k PWRGD REF/BYP IMAX * DIFFERENTIAL VOLTAGE ON LT3065 10nF GND 1.2k 22nF ≈ 1.4V SET BY THE TP0610L P-CHANNEL THRESHOLD. 3065 TA07 relaTeD parTs PART NUMBER DESCRIPTION COMMENTS LT1761 100mA, Low Noise LDO 300mV Dropout Voltage, Low Noise: 20μV , V = 1.8V to 20V, ThinSOT™ Package RMS IN LT1762 150mA, Low Noise LDO 300mV Dropout Voltage, Low Noise: 20μV , V = 1.8V to 20V, MS8 Package RMS IN LT1763 500mA, Low Noise LDO 300mV Dropout Voltage, Low Noise: 20μV , V = 1.8V to 20V, SO-8 and 3mm × 4mm DFN RMS IN Packages LT1962 300mA, Low Noise LDO 270mV Dropout Voltage, Low Noise: 20μV , V = 1.8V to 20V, MS8 Package RMS IN LT1964 200mA, Low Noise Negative LDO V = –2.2V to –20V, V = –1.21V, V = 0.34V, I = 30μA, I = 3μA, Low Noise IN OUT(MIN) DO Q SD <30μV , Stable with Ceramic Capacitors, ThinSOT and 3mm × 3mm DFN Packages RMS LT1965 1.1A, Low Noise LDO 290mV Dropout Voltage, Low Noise: 40μV , V = 1.8V to 20V, V = 1.2V to 19.5V, RMS IN OUT Stable with Ceramic Capacitors, TO-220, DD-Pak, MSOP and 3mm × 3mm DFN Packages LT3050 100mA LDO with Diagnostics and 340mV Dropout Voltage, Low Noise: 30μV , V = 1.8V to 45V, 3mm × 2mm DFN and RMS IN Precision Current Limit MSOP Packages LT3055 500mA LDO with Diagnostics and 350mV Dropout Voltage, Low Noise: 25μV , V = 1.8V to 45V, 4mm × 3mm DFN and RMS IN Precision Current Limit MSOP Packages LT3060 100mA Low Noise LDO with Soft-Start 300mV Dropout Voltage, Low Noise: 30μV , V = 1.8V to 45V, 2mm × 2mm DFN and RMS IN ThinSOT Packages LT3080/ 1.1A, Parallelable, Low Noise LDO 300mV Dropout Voltage (2-Supply Operation), Low Noise 40µV , V = 1.2V to 36V, RMS IN LT3080-1 V = 0V to 35.7V, Current-Based Reference with 1-Resistor V Set, Directly Parallelable, OUT OUT Stable with Ceramic Capacitors, TO-220, SOT-223, MSOP and 3mm × 3mm DFN LT3082 200mA, Parallelable, Low Noise LDO Outputs may be Paralleled for Higher Output Current or Heat Spreading, Wide Input Voltage Range: 1.2V to 40V, Low Value Input/Output Capacitors Required: 2.2µF, Single Resistor Sets Output Voltage, 8-Lead SOT-23, 3-Lead SOT-223 and 8-Lead 3mm × 3mm DFN Packages LT3085 500mA, Parallelable, Low Noise LDO 275mV Dropout Voltage (2-Supply Operation), Low Noise 40µV , V = 1.2V to 36V, RMS IN V = 0V to 35.7V, Current-Based Reference with 1-Resistor V Set, Directly Parallelable, OUT OUT Stable with Ceramic Capacitors, MS8E and 2mm × 3mm DFN-6 Packages 3065fc 28 LT 0517 REV C • PRINTED IN USA www.linear.com/LT3065 For more information www.linear.com/LT3065  LINEAR TECHNOLOGY CORPORATION 2014

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