LT1950 Single Switch PWM Controller with Auxiliary Boost Converter FEATURES DESCRIPTIOU ■ Wide Input Range: 3V to 25V The LT®1950 is a wide input range, forward, boost, flyback ■ Programmable Volt-Second Clamp and SEPIC controller that drives an N-channel power ■ Output Power Levels from 25W to 500W MOSFET with few external components required. ■ Auxiliary Boost Converter Provides 10V Gate Drive A resistor programmable duty cycle clamp can be used to from V as Low as 3V IN generate a volt-second clamp for forward converter appli- ■ Programmable Operating Frequency (100kHz to cations. An internal boost switcher is available for creating 500kHz) with One External Resistor a separate supply for the output gate driver, allowing 10V ■ Programmable Slope Compensation gate drive from input voltages as low as 3V. The LT1950’s ■ Programmable Leading Edge Blanking operating frequency can be set with an external resistor ■ ±2% Internal 1.23V Reference over a 100kHz to 500kHz range and a SYNC pin allows the ■ Accurate Shutdown Pin Threshold with part to be synchronized to an external clock. Additional Programmable Hysteresis programmability exists for leading edge blanking and ■ 60ns Current Sense Delay slope compensation. ■ 2.5V Auxiliary Reference Output ■ Synchronizable to an External Clock up to 1.5 • f A fast current sense comparator achieves 60ns current OSC ■ Current Mode Control sense delay and the error amplifier is a true voltage mode ■ Small 16-Pin SSOP Package error amplifier, allowing a wide range of compensation networks. An accurate shutdown pin with programmable APPLICATIOU S hysteresis is available for undervoltage lockout and shut- ■ Telecom Power Supplies down. The LT1950 is available in a small 16-Pin SSOP ■ Automotive Power Supplies package. ■ Portable Electronic Equipment ■ Isolated and Nonisolated DC/DC Converters , LTC and LT are registered trademarks of Linear Technology Corporation. TYPICAL APPLICATIOU 36V to 72V DC to 26V/5A (Single Switch) Forward Converter Efficiency vs Load Current 10VBIAS VIN 95 MBRB20200 47µH VOUT VIN = 36V 26V 2.5V SLOPE VIN 470k 47µF 5A 90 VIN = 48V VREF VIN2 0.1µF BOOST VSEC PA0581 Y (%) 85 VIN = 72V 249k ROSCLT1950SHDN 1µF 18k FICIENC 80 F BLANK GATE Si7450 E SYNC ISENSE 75 GND PGND 0.015Ω FB COMP 70 4.99k 4.7k 0.5 1.5 2.5 3.5 4.5 5.5 0.022µF 100k LOAD CURRENT (A) 1950 TA01a 1950 TA01b1950fa 1

LT1950 ABSOLUTE WAXIWUW RATIUGS PACKAGE/ORDER IUFORWATIOU (Note 1) ORDER PART BOOST.......................................................–0.3V to 35V TOP VIEW NUMBER V , V , SHDN.........................................–0.3V to 25V IN IN2 COMP 1 16 VSEC FB, SYNC, VSEC........................................... –0.3V to 6V FB 2 15 VIN LT1950EGN COMP, BLANK..........................................–0.3V to 3.5V ROSC 3 14 BOOST LT1950IGN SYNC 4 13 PGND SLOPE ......................................................–0.3V to 2.5V SLOPE 5 12 GATE ISENSE ......................................................... –0.3V to 1V VREF 6 11 VIN2 ROSC ....................................................................–50µA SHDN 7 10 ISENSE GN PART MARKING V .................................................................... –10mA GND 8 9 BLANK REF Operating Junction Temperature Range GN PACKAGE 1950E 16-LEAD NARROW PLASTIC SSOP 1950I LT1950EGN/LT1950IGN (Notes 2, 5) ... –40°C to 125°C TJMAX = 125°C, θJA = 110°C/W, θJC (PIN 8) = 30°C/W Storage Temperature Range..................–65°C to 150°C Lead Temperature (Soldering, 10 sec)..................300°C Consult LTC Marketing for parts specified with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. COMP = open, FB = 1.4V, ROSC = 249k, SYNC = 0V, SLOPE = open, VREF = 0.1µF, SHDN = VIN, BLANK = 0V, ISENSE = 0V, VIN2 = 15V, GATE = 1nF, BOOST = open, VIN = 15V, VSEC = 0V, unless otherwise specified. PARAMETER CONDITIONS MIN TYP MAX UNITS PWM Controller Operating Input Voltage IVREF = 0µA ● 3.0 25 V Minimum Start-Up Voltage IVREF = 0µA ● 2.6 3.0 V VIN Quiescent Current IVREF = 0µA, FB = 1V, ISENSE = 0.2V 2.3 3.0 mA VIN Shutdown Current SHDN = 0V 5 20 µA Shutdown Threshold 3V < V < 25V ● 1.261 1.32 1.379 V IN Shutdown Pin Current SHDN = 70mV Above Threshold –7 –10 –13 µA Shutdown Pin Current Hysteresis SHDN = 100mV Below Threshold 4 7 10 µA VIN2 Quiescent Current I(VREF) = 0µA, FB = 1V, ISENSE = 0.2V 1.7 2.5 mA VIN2 Shutdown Current SHDN = 0V, VIN2 = 2.7V (Boost Diode from VIN = 3V) 500 700 µA V (External Output) REF Output Voltage IVREF = 0µA ● 2.425 2.500 2.575 V Line Regulation IVREF = 0µA, 3V < VIN < 25V 1 5 mV Load Regulation 0µA < IVREF < 2.5mA 1 5 mV Oscillator Frequency: f R = 249k, FB = 1V ● 170 200 230 kHz OSC OSC Minimum Programmable f R = 499k 85 100 115 kHz OSC OSC Maximum Programmable f R = 90.9k 440 500 560 kHz OSC OSC SYNC Input Resistance 20 kΩ SYNC Switching Threshold 1.5 2.2 V SYNC Frequency/f (R = 249k, f =200kHz), FB = 1V (Note 7) 1.25 1.5 OSC OSC OSC f Line Reg 3V < V < 25V 0.05 0.15 %/V OSC IN 9.5V < V < 25V 0.05 0.25 %/V IN2 V 1 V ROSC 1950fa 2

LT1950 ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. COMP = open, FB = 1.4V, ROSC = 249k, SYNC = 0V, SLOPE = open, VREF = 0.1µF, SHDN = VIN, BLANK = 0V, ISENSE = 0V, VIN2 = 15V, GATE = 1nF, BOOST = open, VIN = 15V, VSEC = 0V, unless otherwise specified. PARAMETER CONDITIONS MIN TYP MAX UNITS Error Amplifier FB Reference Voltage 3V < V < 25V, V + 0.2V < COMP < V – 0.2 ● 1.205 1.230 1.254 V IN OL OH FB Input Bias Current FB = FB Reference Voltage –75 –200 nA Open Loop Voltage Gain V + 0.2V < COMP < V – 0.2 65 85 dB OL OH Unity Gain Bandwidth (Note 6) 3 MHz COMP Source Current FB = 1V, COMP = 1.6V ● –0.3 –1.1 –1.8 mA COMP Sink Current FB = 1.4V, COMP = 1.6V 8 13 mA COMP High Level: VOH FB = 1V, ICOMP = – 250µA 2.5 V COMP Active Threshold Start of GATE Switching (Duty Cycle > 0%) 1.0 V COMP Low Level: VOL FB = 1.4V, ICOMP = 250µA 0.15 V Current Sense I Maximum Threshold Duty Cycle < 10%, COMP = V 90 100 110 mV SENSE OH ISENSE Input Bias Current COMP = 2.5V, ISENSE = ISENSE Max Threshold –125 –170 –250 µA Default Blanking Time FB = 1V, COMP = 2V, I = 75mV 110 ns SENSE Adjustable Blanking Time FB = 1V, COMP = 2V, I = 75mV 290 ns SENSE BLANK = 75k to Ground Blanking Override Voltage– BLANK = Open, COMP = 2.5V (Note 4) 15 25 40 mV I Maximum Threshold SENSE Turn-Off Delay to Gate COMP = 2V 60 ns Slope Compensation(Note 4) I Max Threshold (DC < 10%) – (DC = 80%) (Note 4) SENSE Default, RSLOPE = ∞ 14 mV 2x Default, R = 8k 28 mV SLOPE 3x Default, R = 3.3k 42 mV SLOPE Internal Switcher Boost Switch I V = 8V, 3V < V < 10V 70 125 180 mA LIMIT IN2 IN Boost Switch Off Time V = 8V, 3V < V < 10V 250 500 1000 ns IN2 IN V : Boost Disable 3V < V < 10V ● 9.5 11.0 11.75 V IN2 IN V : Boost Disable Hysteresis 3V < V < 10V –1.0 V IN2 IN V : Gate Enable 3V < V < 10V, FB = 1V (Note 4) ● 7.0 8.2 9.27 V IN2 IN V : Gate Enable Hysteresis 3V < V < 10V, FB = 1V (Note 4) –0.6 V IN2 IN GATE Driver Output GATE Rise Time FB = 1V, V = 12V, C = 1nF (Notes 3, 6) 50 ns IN2 L GATE Fall Time FB = 1V, V = 12V, C = 1nF (Notes 3, 6) 30 ns IN2 L GATE Clamp Voltage IGATE = 0µA, COMP = 2.5V, FB = 6V 11.5 13 14.5 V GATE Low Level I = 20mA 0.25 0.4 V GATE I = 200mA 1.2 1.75 V GATE GATE High Level I = –20mA, V = 12V, COMP = 2.5V, FB = 6V 10 V GATE IN2 I = –200mA, V = 12V, COMP = 2.5V, FB = 6V 9.75 V GATE IN2 Maximum Duty Cycle FB = 1V, f = 200kHz 90 95 97 % OSC 1950fa 3

LT1950 ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. COMP = open, FB = 1.4V, ROSC = 249k, SYNC = 0V, SLOPE = open, VREF = 0.1µF, SHDN = VIN, BLANK = 0V, ISENSE = 0V, VIN2 = 15V, GATE = 1nF, BOOST = open, VIN = 15V, VSEC = 0V, unless otherwise specified. PARAMETER CONDITIONS MIN TYP MAX UNITS Maximum Duty Cycle Clamp V = 1.4V, FB = 1V, COMP = V 63 75 87 % SEC OH VSEC Input Bias Current 0V < VSEC < 2.8V –0.3 –1.0 µA Note 1: Absolute Maximum Ratings are those values beyond which the life Note 4: Guaranteed by correlation to static test. of a device may be impaired. Note 5: This IC includes overtemperature protection that is intended to Note 2: The LT1950EGN is guaranteed to meet performance specifications protect the device during momentary overload conditions. Junction from 0°C to 125°C operating junction temperature. Specifications over the temperature will exceed 125°C when overtemperature protection is active. –40°C to 125°C operating junction temperature range are assured by Continuous operation above the specified maximum operating junction design, characterization and correlation with statistical process controls. temperature may impair device reliability. The LT1950IGN is guaranteed over the full –40°C to 125°C operating Note 6: Guaranteed but not tested. junction temperature range. Note 7: Maximum recommended SYNC frequency = 500kHz. Note 3: Rise and Fall times are between 10% and 90% levels. TYPICAL PERFORW AU CE CHARACTERISTICS Switching Frequency vs FB Voltage vs Temperature Temperature V Shutdown I vs Temperature IN Q 1.26 240 16 SHDN = 0V 230 14 1.25 220 A) 12 TAGE (V)11..2243 NCY (kHz) 221000 OWN I (µQ 108 L E D O U T V Q U FB 1.22 FRE 190 SHN 6 180 VI 4 1.21 170 2 1.20 160 0 –50 –25 0 25 50 75 100 125 –50 –25 0 25 50 75 100 125 –50 –25 0 25 50 75 100 125 TEMPERATURE (°C) TEMPERATURE (°C) TEMPERATURE (°C) 1950 G01 1950 • G02 1950 • G03 Shutdown Threshold vs Maximum ISENSE Threshold vs ISENSE Pin Current vs Temperature Temperature Temperature 1.45 125 270 V)120 250 OLD (V)1.40 HOLD (m111150 A)µ223100 SHUTDOWN THRESH111...332505 XIMUM I THRESSENSE110099850505 I CURRENT (SENSE111197530000 A M 80 110 1.20 75 90 –50 –25 0 25 50 75 100 125 –50 –25 0 25 50 75 100 125 –50 –25 0 25 50 75 100 125 TEMPERATURE (°C) TEMPERATURE (°C) TEMPERATURE (°C) 1950 • G04 1950 G05 1950 G06 1950fa 4

LT1950 TYPICAL PERFORW AU CE CHARACTERISTICS BLANK Override Threshold – ISENSE Maximum Threshold vs Minimum VIN Start-Up Voltage vs Temperature Temperature (VIN2 Boosted) VIN IQ vs Temperature 40 3.00 3.1 OVERRIDE THRESHOLD AXIMUM THRESHOLD (mV)33225050 V START-UP VOLTAGE (V)IN22..7550 V I (mA)INQ 22222.....97531 K M M LAN NSE MU2.25 1.9 B–ISE15 MINI 1.7 10 2.00 1.5 –50 –25 0 25 50 75 100 125 –50 –25 0 25 50 75 100 125 –50 –25 0 25 50 75 100 125 TEMPERATURE (°C) TEMPERATURE (°C) TEMPERATURE (°C) 1950 G07 1950 G08 1950 G09 SHDN Input Current *(–1) vs SHDN Current Hysteresis vs GATE Rise/Fall Time vs Temperature Temperature GATE Capacitance 14 11 125 TA = 25°C RRENT*(–1) (A)µ 11208 SHDN = SHDN THRESHOLD + 70mV HYSTERESIS (A)µ 10987 ALL TIME (ns) 10705 ttfr SHDN INPUT CU 642 SHDN = SHDN THRESHOLD – 100mV SHDN CURRENT 654 GATE RISE/F 5205 0 3 0 –50 –25 0 25 50 75 100 125 –50 –25 0 25 50 75 100 125 0 1000 2000 3000 4000 5000 TEMPERATURE (°C) TEMPERATURE (°C) GATE CAPACITANCE (pF) 1950 G10 1950 G11 1950 G12 VIN2: GATE Enable VIN2: BOOST Disable BOOST Switch ILIMIT vs vs Temperature vs Temperature Temperature 9.2 13.0 250 12.5 LE (V) 8.7 BLE (V)1121..05 (mA)MIT200 GATE ENAB 8.2 GATE ENABLE OOST DISA1110..05 BOHOYSSTT EDRIESSAIBSLE SWITCH ILI150 VIN2 7.7 HYSTERESIS V BIN210.0 OOST 100 B BOOST RE-ENABLE GATE DISABLE 9.5 7.2 9.0 50 –50 –25 0 25 50 75 100 125 –50 –25 0 25 50 75 100 125 –50 –25 0 25 50 75 100 125 TEMPERATURE (°C) TEMPERATURE (°C) TEMPERATURE (°C) 1950 G13 1950 G14 1950 G15 1950fa 5

LT1950 TYPICAL PERFORW AU CE CHARACTERISTICS BOOST Switch Off Time vs Maximum Duty Cycle vs GATE Clamp Voltage vs Temperature VSEC Voltage Temperature 700 100 16 MAX DUTY CYCLE = (105/VSEC)% 90 1.25V < VSEC < 2.8V OFF TIME (ns) 600 Y CYCLE (%) 8700 TA = 25°C OLTAGE (V) 1154 WITCH 500 M DUT 60 AMP V 13 OST S 400 AXIMU 50 ATE CL 12 O M G B 40 11 300 30 10 –50 –25 0 25 50 75 100 125 0.8 1.2 1.6 2.0 2.4 2.8 3.2 –50 –25 0 25 50 75 100 125 TEMPERATURE (°C) VSEC VOLTAGE (V) TEMPERATURE (°C) 1950 G16 1950 G17 1950 G18 PIU FUU CTIOU S COMP (Pin 1): The COMP pin is the output of the error SLOPE (Pin 5): The SLOPE pin is used to adjust the amplifier. The error amplifier is a true op amp which allows amount of slope compensation. Leaving the pin open the use of an RC network to be connected between the circuit results in a default level of slope compensation. The Comp and FB pins to compensate the feedback loop for amount of slope compensation can be adjusted above this optimum transient response. The peak switch current in default level by connecting a resistor from the SLOPE pin the external MOSFET will be proportional to the voltage on to the V pin. REF the COMP pin. Typical operating voltage range for this pin V (Pin 6): The V pin is the output of an internal 2.5V REF REF is 1V to 2.5V. reference. This pin is capable of sourcing up to 2.5mA for FB (Pin 2): The FB pin is the inverting input to the error external use. It is recommended that the V pin is REF amplifier. The output voltage is set with a resistor divider. bypassed to ground with a 0.1µF ceramic capacitor. The error amplifier adjusts the peak switch current to SHDN (Pin 7): The SHDN pin is used to put the device into maintain the FB pin voltage at the value of the internal a low power shutdown state. In shutdown the V supply IN reference voltage of 1.23V. current drops to 5µA. The SHDN pin has an accurate R (Pin 3): A resistor from the R pin to ground threshold of 1.32V which can be used to program an OSC OSC programs the operating frequency of the LT1950. Operat- undervoltage lockout threshold. Input current levels on ing frequency range is 100kHz to 500kHz. Nominal voltage the SHDN pin can be used to program hysteresis into the on the R pin is 1V. undervoltage lockout levels. OSC SYNC (Pin 4): The SYNC pin is used to synchronize the GND (Pin 8): The GND pin is the analog ground for the internal oscillator to an external clock signal. The pin is internal circuitry of the LT1950. Sensitive circuitry such as directly logic compatible and can be driven with any signal the feedback divider, frequency setting resistor, reference with a duty cycle of 10% to 90%. If the SYNC function is bypass capacitor should be tied directly to this pin. See the not used the pin can be left open circuit or connected to Applications Information section for recommendations ground. on ground connections. 1950fa 6

LT1950 PIU FUU CTIOU S BLANK (Pin 9): The BLANK pin is used to adjust the BOOST (Pin 14): The BOOST pin is the NPN collector leading edge blanking period of the current sense amplifier output of the internal boost converter which can be used during FET turn-on. Shorting the BLANK pin to ground to generate an 11V supply for the MOSFET gate driver provides a default blanking period of approximately 110ns. circuit. The boost converter runs with a fixed off-time of A resistor from the BLANK pin to ground increases the 0.5µs and a current limit of 125mA. The converter runs blanking period up to 290ns for R = 75k. until the V voltage exceeds 11V and then turns off until BLANK IN2 the V voltage drops below 10V. If the V voltage is I (Pin 10): The I pin is the current sense input IN2 IN2 SENSE SENSE supplied externally, the BOOST pin should be shorted to for the control loop. Connect this pin to the sense resistor ground or left open. in the source of the external power MOSFET. V (Pin 15): The V pin is the main supply pin for the V (Pin 11): The V pin is the supply pin for the IN IN IN2 IN2 LT1950. This pin must be closely bypassed to ground. If MOSFET gate drive circuit. Power can be supplied to this V is generated using the BOOST pin then the LT1950 pin by an external supply such as V , and must exceed 8V IN2 IN will be fully functional, internal V will be active and the (the undervoltage lockout threshold for the gate driver REF gate output will be enabled with a V voltage as low as 3V. supply). For low V supply voltages an internal boost IN IN An internal undervoltage lockout threshold exists at ap- regulator can be used to generate as much as 11V at the proximately 2.6V on the V pin. Undervoltage lockout V pin. This allows the LT1950 to run with V supply IN IN2 IN voltages greater than 3V can be programmed using a voltages down to 3V while still supplying enough gate voltage divider on the SHDN pin. drive for standard level MOSFETs. V (Pin 16): The V pin is used to program the GATE (PIN 12): The GATE pin is the output of a high current SEC SEC maximum duty cycle of the gate driver circuit. The maxi- gate drive circuit used to drive an external MOSFET. The mum duty cycle will be equal to (105/V )% for V output is actively clamped to a max voltage of 13V if V SEC SEC IN2 between 1.4V and 2.8V. This is a useful function to limit the is supplied by a high voltage. flyback voltage in a forward converter. If the maximum PGND (Pin 13): This is the ground connection for the high duty cycle function is not used then the V pin should be SEC current gate driver stage. See the Applications Informa- tied to ground. tion section for recommendations on ground connec- tions. 1950fa 7

LT1950 BLOCK DIAGRAW VIN VREF VSEC BOOST VIN2 15 6 16 14 11 VIN2 VREF = IENXTTEERRNNAALL + SWITCHING PREREGULATOR + SUPPLY FIXED OFF TIME 11V 2.5V (125mA CURRENT LIMIT) DISABLE – (SOURCE 2.5mA EXTERNALLY) PGND (VIN) (2.6V) (VIN2) (8V) + U/V LOCKOUT U/V LOCKOUT 8V 1.23V – (105/VSEC)% – + – MAX DC ENABLE CLAMP 1.32V + 3µA (TYPICAL 200kHz) – SHDN 7 OSC S Q DR±1IVAER 12 GATE SYNC 4 (100-500)khz RAMP SLOPE COMP R + 13 PGND ROSC 3 SLOPE 5 13V ERROR AMPLIFIER BLANKING 1.23V VOLTAGE GAIN = 85dB + CURRENT BLANKING SENSE OVERRIDE – CMP CMP – + – + 0mV – >100mV 10 ISENSE 125mV 2 1 8 9 1950 BD FB COMP GND BLANK Figure 1. LT1950 Block Diagram OPERATIOU The LT1950 is a constant frequency, current mode con- 11V supply at V using a small surface mount external IN2 troller for DC/DC forward, boost, flyback and SEPIC con- inductor, diode and capacitor. Since V supplies the IN2 verter applications. The Block Diagram in Figure 1 shows output driver of the IC, this architecture achieves high all of the key functions of the IC. GATE drive for an external N-channel power MOSFET even though V voltage is very low. High GATE drive capability In normal operation, a V voltage as low as 3V allows an IN IN reduces MOSFET R for improved efficiency, internal switcher at the BOOST pin to generate a separate DS(ON) 1950fa 8

LT1950 OPERATIOU increases the range of MOSFETs that can be selected and compensation. A default level of slope compensation is allows applications requiring high gate drive with a large achieved with the SLOPE pin open. Increased slope com- swing in V voltage. When V exceeds 8V, the GATE pensation can be programmed by reducing the value of IN IN2 output driver is enabled. The GATE switches between 0V resistance inserted between the SLOPE pin and V pin. REF and V at a constant frequency set by a resistor from the IN2 A SYNC pin allows the LT1950 main oscillator to be R pin to ground. When V reaches 11V, the internal OSC IN2 synchronized to an external clock . To avoid loss of slope switcher at the BOOST pin is disabled to save power and compensation during synchronization, the free running only re-enabled when V drops below 10V. The internal IN2 main oscillator frequency should be programmed to ap- boost switcher runs in burst mode operation, asynchro- proximately 80% of the external clock frequency. nous to the main oscillator. If low V operation with high IN GATE drive is not required, the BOOST pin is left open and The LT1950 can be placed into shutdown mode when the the V pin shorted to V . With V shorted to V the SHDN pin drops below an accurate 1.32V threshold. This IN2 IN IN2 IN minimum operational V voltage will increase from 3V to threshold can be used to program undervoltage lockout IN 8V (required at VIN2 to enable the GATE output driver). For (UVLO) at VIN for current limited or high source resistance GATE turn on, a PWM latch is set at the start of each main supplies. SHDN pin current hysteresis also exists to allow oscillator cycle. For GATE turn off, the PWM latch is reset external programming of UVLO voltage hysteresis. When when either the current sense comparator is tripped, the VIN and VIN2 exceed internally set UVLO thresholds of 2.6V maximum duty cycle is reached, or the BLANK override and 6.8V, the VREF output becomes active. The VREF output threshold is exceeded. is a 2.5V reference supplying the majority of LT1950 control circuitry and capable of sourcing up to 2.5mA for A resistor divider from the application’s output voltage external use. generates a voltage at the FB pin that is compared to the internal 1.23V reference by the error amplifier. The error To prevent noise in the system causing premature turn off amplifier output (COMP) defines the input threshold of the external MOSFET the LT1950 has leading edge (I ) of the current sense comparator. Maximum I blanking. This means the current sense comparator out- SENSE SENSE voltage is clamped to 100mV. By connecting I to a put is ignored during MOSFET turn on and for an extended SENSE sense resistor in series with the source of the external period after turn on. The extended blanking period is MOSFET, the peak switch current is controlled by COMP. adjusted by inserting a resistor from the BLANK pin to An increase in output load current causing the output ground. A short to ground defines a minimum default voltage to fall, will cause COMP to rise, increasing I blanking period. Increased resistance from the BLANK pin SENSE threshold, increasing the current delivered to the output. to ground will increase blanking duration. Fault conditions causing I to exceed 125mV will override blanking SENSE This current mode technique means that the error ampli- and reduce the I to GATE delay to 60ns. SENSE fier commands current to be delivered to the output rather than voltage. This makes frequency compensation easier For applications requiring maximum duty cycle clamping, and provides faster loop response to output load tran- the VSEC pin reduces duty cycle for increased voltage on sients. the pin. The VSEC pin provides a volt-second clamp critical in forward converter applications. The current mode architecture requires slope compensa- tion to be added to the current sensing loop to prevent Maximum duty cycle follows (105/VSEC)% for VSEC volt- subharmonic oscillations which can occur for duty cycles ages between 1.4V to 2.8V. If unused, the VSEC pin should above 50%. Unlike most current mode converters which be shorted to ground, leaving the natural maximum duty have a slope compensation ramp that is fixed internally, cycle of the part to be typically 95% for 200kHz operation. placing a constraint on inductor value and operating frequency, the LT1950 has externally adjustable slope 1950fa 9

LT1950 APPLICATIOUS IUFORWATIOU LT1950 Input Supplies, V Output and GATE Enable V = V Operation REF IN IN2 V is the main input supply for the LT1950. V is the If low V operation is not required below approximately IN IN2 IN input supply for the LT1950 output driver. V can be 8V on V the LT1950 can be configured to run without the IN2 IN provided by shorting the V pin to the V pin or by use of the BOOST pin by shorting the V pin to the V IN2 IN IN2 IN generating V using the BOOST pin. Waveforms of V , pin. Figure 3 shows that both V and V must now IN2 IN IN IN2 V , V and GATE switching are shown in Figures 2 and exceed 6.8V to activate the 2.5V V output and must IN2 REF REF 3. Figure 2 represents low V operation with V gener- exceed approximately 8V to enable the output driver IN IN2 ated using the B00ST pin. Figure 3 represents V = V (GATE pin). IN IN2 operation with the BOOST pin open circuit or shorted to ground. 12 8 VIN2 Low V Operation MIN IN 4 GATE 3V The LT1950 can be configured to provide a minimum of 0 L1 10V GATE drive for an external N-channel MOSFET from VIN D1 V voltages as low as 3V, if the BOOST pin is used to BBOOOOSSTT IN 4 LT1950 generate a second supply at the VIN2 pin (see Figure 2 and 3 VIN VVIINN22 Applications Information “ Generating V Supply Using C1 IN2 2 VREF BOOSTPin”). The advantage of this configuration is that a 1 lower R is achieved for the external N-channel DS(ON) 0 MOSFET, improving efficiency, versus a controller run- 50µs/DIV 1950 F02 ning at 3V input without boosted gate drive. In addition, Figure 2. Low V Operation IN typical controllers running at low input voltages have the limitation of only being able to use logic level MOSFETs. The LT1950 allows a greater range of usable MOSFETs. 10.2 This versatility allows optimization of the overall power 8.5 VIN = VIN2 6.8 TYPICAL START-UP INPUT supply performance and allows applications which would 5.1 >8.2V 3.4 otherwise not be possible without a more complex topol- ogy. Figure 2 shows that for V above 2V, the internal 5.0 IN VREF VIN switcher at the BOOST pin is enabled. This switch gener- 2.5 BBOOOOSSTT * ates the V supply. As V ramps up above the LT1950 IN2 IN2 0 undervoltage lockout threshold of 6.8V the 2.5V reference VVIINN22 C1 10 V becomes active and powers up internal control GATE REF *BOOST PIN CAN BE circuitry. When VIN2 exceeds approximately 8V, the gate 5 LEFT OPEN OR SHORTED TO GROUND driver is enabled. V is regulated between 10V and 11V, 0 IN2 10µs/DIV providing a supply to the LT1950 output driver to ensure 1950 F03 a minimum of 10V drive at the GATE pin. Figure 3. VIN = VIN2 Operation 1950fa 10

LT1950 APPLICATIOUS IUFORWATIOU Shutdown and Undervoltage Lockout Example: switching should not start until the input is above 11V and is to stop if the input falls below 9V. Figure 4 shows how to program undervoltage lockout (UVLO) for the V supply. Typically, UVLO is used in V = 11V IN H situations where the input supply is current limited, or has V = 9V L a relatively high source resistance. A switching regulator draws constant power from the source, hence source 11V–9V current increases as source voltage drops. This looks like R1= =286k 7µA a negative load resistance to the source and can cause the 1.32V source to current limit or latch low under low source R2= =36k voltage conditions. An internally set undervoltage lockout (11V–1.32V) +3µA (UVLO) threshold prevents the regulator from operating at 286k source voltages where these problems might occur. An internal comparator will force the part into shutdown Keep the connections from the resistors to the SHDN pin below the minimum VIN of 2.6V. This feature can be used short and make sure that the interplane or surface capaci- to prevent excessive discharge of battery-operated sys- tance to the switching nodes are minimized. If high resis- tems. Alternatively, UVLO threshold is adjustable. The tance values are used, the SHDN pin should be bypassed shutdown threshold voltage of the SHDN pin is 1.32V. with a 1nF capacitor to prevent coupling problems from Forcing the SHDN pin below this 1.32V threshold causes the switch node. V to be disabled and stops switching at the GATE pin. REF If the SHDN pin is left open circuit, a permanent 3µA flows out of the pin to ensure that the pin defaults high to allow LT1950 normal operation. Voltages above the 1.32V threshold VIN 1.32V cause an extra 7µA to be sourced out of the pin, providing R1 3µA 7µA VREF + current hysteresis. This can be used to set voltage hyster- esis of the UVLO threshold using the following equations: C1 R2 GND V –V R1= H L 1950 F04 7µA Figure 4. Undervoltage Lockout 1.32V R2= Generating V Supply Using BOOST Pin (V –1.32V) IN2 H +3µA R1 The LT1950’s BOOST pin is used to provide a “boosted” 11V supply at the V pin for V voltages as low as 3V. IN2 IN V = Turn on threshold Since V supplies the output driver for the GATE pin of H IN2 V = Turn off threshold the IC, it is advantageous to generate a boosted V . This L IN2 architecture achieves high GATE drive for an external 1950fa 11

LT1950 APPLICATIOUS IUFORWATIOU N-channel power MOSFET even though V voltage is very 11V. This hysteretic (burst mode) operation for the inter- IN low. High GATE drive voltage reduces MOSFET R , nal switcher minimizes power dissipation from V . DS(ON) IN improves efficiency and increases the range of MOSFETs The V output is a 2.5V reference supplying most of the REF that can be selected. A small switching regulator at the LT1950 control circuitry. It is available for external use BOOST pin, with fixed current limit and fixed off time, with maximum current capability of 2.5mA. The pin should generates the V supply. With an external inductor IN2 be bypassed to ground using a 0.1µF capacitor. Internal connected between the BOOST pin and V (see Figure 5), IN undervoltage lockout thresholds for V and V of ap- IN IN2 the BOOST pin will draw current until approximately proximately 2.6V and 6.8V respectively must be exceeded 125mA is reached, turn off for 0.5µs and then turn back on. before V becomes active. REF The cycle is repeated for as long as the switcher is enabled. By using a diode connected from BOOST to VIN2 and a Programming Oscillator Frequency capacitor from V to ground, energy from the external IN2 The oscillator frequency of the LT1950 is programmed inductor is transferred to the V capacitor during the off- IN2 using an external resistor connected between the R pin time of the internal switcher. An auxiliary boost converter OSC and ground. Figure 6 shows typical f vs R resistor is realized providing a supply to the V pin. The typical OSC OSC IN2 values. The LT1950 is programmable for a free-running inductor current, V voltage and BOOST pin voltage IN2 oscillator frequency in the range of 100kHz to 500kHz. waveforms are shown in Figure 5. When V reaches 11V, IN2 the internal switcher is disabled. Since VIN2 supplies the Stray capacitance and potential noise pickup on the ROSC output driver of the LT1950, switching at the GATE pin will pin should be minimized by placing the ROSC resistor as eventually discharge the VIN2 capacitor until VIN2 reaches close as possible to the ROSC pin and keeping the area of a lower level of approximately 10V. At this level the internal the ROSC node as small as possible. The ground side of the switcher is re-enabled and switches until VIN2 returns to ROSC resistor should be returned directly to the GND (analog ground) pin. 12 500 (V) 450 10 VIN2 MIN 3V 400 0.25 (A) ID1 L1 kHz) 350 0 VIN D1 NCY ( 300 BBOOOOSSTT E 0.25 U IL1 LT1950 EQ 250 (A) VVIINN22 FR 0 C1 200 15 BOOST 150 (V) 100 0 50 100 150 200 250 300350 400 450 500 5µs/DIV 1950 F05 ROSC (kΩ) 1950 F06 Figure 5. VIN2 Generation Using the BOOST Pin Figure 6. Oscillator Frequency (fOSC) vs ROSC 1950fa 12

LT1950 APPLICATIOUS IUFORWATIOU Synchronizing Electrical Characteristics for 1X, 2X and 3X default slope compensation vs R . The SYNC pin is used to synchronize the LT1950 main SLOPE oscillator to an external clock. The SYNC pin can be driven Requirement in Current Mode Converters/Advantage directly from a logic level output, requiring less of Adjustability than 0.8V for a logic level low and greater than 2.2V for a logic level high. Duty cycle must be between 10% and The LT1950 uses a current mode architecture to provide 90%. When synchronizing the part, slope compensation fast response to load transients and to ease frequency will be reduced by approximately SYNC f/f . If the compensation requirements. Current mode switching regu- OSC reduction of slope compensation affects performance, lators which operate with duty cycles above 50% and have R can be reduced to increase slope compensation continuous inductor current, must add slope compensa- SLOPE and reestablish correct operation. If unused, the pin is left tion to their current sensing loop to prevent subharmonic open or shorted to ground. If left open, be aware that the oscillations. (For more information on slope compensa- internal pin resistance is 20k and board layout should be tion see Application Note 19). Typical current mode switch- checked to avoid noise coupling to the pin. ing regulators have a fixed internal slope compensation. This can place constraints on the value of the inductor. If too large an inductor is used, the fixed internal slope SLOPE COMPENSATION compensation will be greater than needed, causing opera- tion to approach voltage mode. If too small an inductor is Programmability used, the fixed internal slope compensation will be too The LT1950 allows its default level of slope compensation small, resulting in subharmonic oscillations. The LT1950 to be easily increased by use of a single resistor connected increases the range of usable inductor values by allowing between the SLOPE pin and the V pin. The ability to slope compensation to be adjusted externally. REF adjust slope compensation allows the designer to tailor his application for a wider inductor value range as well as to 100 optimize the loop bandwidth. A resistor, R , con- SLOPE RSLOPE = OPEN 90 nected between the SLOPE pin and V increases the REF V) LT1950 slope compensation from its default level to as D (m 80 RSLOPE = 8k L high as 3X of default. The curves in Figure 7 show the HO 70 S typical ISENSE maximum threshold vs duty cycle for vari- HRE 60 RSLOPE = 3.3k ous values of RSLOPE. It can be seen that slope compensa- MAX T 50 tion subtracts from the maximum ISENSE threshold as duty SE N 40 cycle increases from 0%. For example, with RSLOPE open, ISE I max threshold is 100mV at low duty cycle, but falls 30 SENSE to approximately 86mV at 80% duty cycle. This must be 20 0 20 40 60 80 100 accounted for when designing a converter to operate up to DUTY CYCLE (%) a maximum load current and over a given duty cycle range. 1950 F07 The application and inductor value will define the minimum amount of slope compensation. Refer to the Figure 7. ISENSE Maximum Threshold vs Duty Cycle 1950fa 13

LT1950 APPLICATIOUS IUFORWATIOU Programming Leading Edge Blank Time Programming Volt-Second Clamp For PWM controllers driving external MOSFETs, noise can The V pin is used to provide an adaptive maximum duty SEC be generated during GATE rise time due to various para- cycle clamp for sophisticated control of the simplest sitic effects. This noise can disturb the input to the current forward converter topology (single primary-side switch). sense comparator (ISENSE) and cause premature turn-off This adaptive maximum duty cycle clamp allows the use of of the external MOSFET. The LT1950 provides program- the smallest transformers, MOSFETs and output rectifiers mable leading edge blanking of the current sense com- by addressing the biggest concern in single switch for- parator to avoid this effect. ward converter topologies - transformer reset. The sec- Blanking is provided in 2 phases: The first phase is during tion “Application Circuits-Forward Converter Applications” GATE rise time. GATE rise times vary depending on covers transformer reset requirements and highlights the MOSFET type. For this reason the LT1950 automatically advantages of the LT1950 adaptive maximum duty cycle blanks the current comparator output until the “leading clamp. The programmable maximum duty cycle clamp is edge” of the GATE is detected. This occurs when the GATE controlled by the voltage on the V pin. As voltage on the SEC voltage has risen within 0.5V of the output driver supply V pin increases within a specified range, maximum SEC (V ) or has reached its clamp level of 13V. The second duty cycle decreases. By deriving V pin voltage from IN2 SEC phase of blanking starts immediately after “leading edge” the system input supply, a volt-second clamp is realized. has been detected. This phase is programmable using a Maximum GATE output duty cycle follows a 1/X relation- resistor (R ) from the BLANK pin to ground. Typical ship given by (105/V )%. (see Maximum Duty Cycle vs BLANK SEC values for this portion of the blanking period are 110ns at V Voltage graph in the Typical Performance Character- SEC RBLANK = 0Ω up to 290ns at RBLANK = 75k. Figure 8 shows istics section). For example, if the minimum input supply blanking vs RBLANK. Blanking duration can be approxi- for a forward converter application is 36V, the VSEC pin can mated as: be programmed with a maximum duty cycle of 75% at 1.4V. A movement of input voltage to 72V will lift the V ⎛ R ⎞ SEC BLANK BLANKING (EXTENDED)=110+ 60• ns pin to 2.8V, resulting in a maximum duty cycle of 37.5%. ⎜ ⎟ ⎝ 25k ⎠ As the section on Forward Converter Applications will show, transformer reset requirements are met with the (AUTOMATIC)(DEFAULT) (PROGRAMMABLE) LEADING CURRENT EDGE EXTENDED EXTENDED SENSE BLANKING BLANKING BLANKING DELAY GATE RBLANK = 0Ω 0Ω < RBLANK < = 75k 60ns BLANKING 0 Xns (X + 110)ns [X + 110 + (60 • RBLANK/25k)]ns 1950 F04 Figure 8. Blanking Timing Diagram 1950fa 14

LT1950 APPLICATIOUS IUFORWATIOU ability of the V pin to follow input voltage and control 94% Efficient 3.3V, 20A Synchronous Forward SEC maximum switch duty cycle. Converter The synchronous forward converter in Figure 11 is based Forward Converter Applications on the LT1950 and uses MOSFETs as synchronous output The LT1950 provides sophisticated control of the simplest rectifiers to provide an efficient 3.3V, 20A isolated output forward converter topology (single primary switch, see Q1 from 48V input. The output rectifiers are driven by the Figure 11). A significant problem in a single switch for- LTC1698 which also serves as an error amplifier and ward converter topology is transformer reset. Optimum optocoupler driver. Efficiency and transient response transformer utilization requires maximum duty cycles. are shown in Figures 9 and 10. Peak efficiencies of 94% Unfortunately as duty cycles increase the transformer and ultra-fast transient response are superior to presently reset time decreases and reset voltages increase. This available power modules. In addition, the circuit inFigure11 increases the voltage requirements and stress on both is an all-ceramic capacitor solution providing low output transformer and switch. The LT1950 incorporates an ripple voltage and improved reliability. The LT1950-based adaptive maximum duty cycle clamp which controls maxi- converter can be used to replace power module converters mum switch duty cycle based on system input voltage. at a much lower cost. The LT1950 solution benefits from The adaptive clamp allows the converter to operate at up thermal conduction of the system board resulting in to 75% duty cycle, allowing 25% of the switching period higher efficiencies and lower rise in component tempera- for resetting the transformer. This results in greater tures. The 7mm height allows dense packaging and the utilization of MOSFET, transformer and output rectifier circuit can be easily adjusted to provide an output voltage components. The V pin can be programmed from from 1.23V to 15V. In addition, higher currents are achiev- SEC system input to adaptively control maximum duty cycle able by simple scaling of power components. The LT1950- (see Applications Information “Programming Volt-Sec- based solution in Figure 11 is a powerful topology for ond Clamp” and the Maximum Duty Cycle vs VSEC Voltage replacement of a wide range of power modules. graph in the Typical Performance Characteristics section). 100 95 LT1950 VOUT (100mV/DIV) %) 90 Y ( C N 85 E POWER FICI MODULE EF 80 VOUT (100mV/DIV) 75 VIN = 48V VOUT = 3.3V fOSC = 235kHz 70 0 5 10 15 20 500µs/DIV 1950 F10 LOAD CURRENT (A) 1950 F09 Figure 10. Output Voltage Transient Response Figure 9. LT1950-Based Synchronous Forward to Load Steps (0A to 3.3A) LT1950 (Trace1) Converter Efficiency vs Load Current vs Power Module (Trace 2) 1950fa 15

LT1950 APPLICATIOU S IU FORW ATIOU +VIN CIN 36V 2.2µF TO 72V 100V INPUT X5R T1 L1 STG-0313W C.PI-1365-1R2 +V01 –VIN 3.3V COMP +VIN 10VBIAS 10VBIAS 20A R5 U2A C01 4R.71k 1 LT1950 14670k 1R86k 25R57Ω 1 8 LTC17693-1 Q1 Q2 Q3 1X050RµF COMP VSEC Si4490 FG Si7380 CG Si7380 4× 2 15 D1 2 2×(cid:31) 2×(cid:31) R17, 210k 3 FRBOSC BOOVSINT 14UV C1µUF1 BAS516 BAT7D620 47Ω 4 13 SYNC PGND C4 RS 0.C11µF 56 SLOPE GATE 1121 C3 1000pF CS 0.015Ω 7VBIAS LTC1698 7 VREF VIN2 10 10nF 10VBIAS 1 VDD FG 16 FG R4, 18k 8 SGHNDDN BISLEANNSKE 9 6 ULT2CB1693-1 X15µRF CG 23 CG SYNC 1154 SYNC 47R09k R271k8 3 4 5220pF T2 56S0YΩNC 2R7103Ω 45 PGGNNDD ICVOAMUXP 1132 0.1µF +VIN CS C9, 33nF 6 OPTO +ISNS 11 R2 U4 VCOMP –ISNS 10VBIAS 4.7k 6HCPL-M453 1 1R.124k 78 MARG PWTOK 190 R3 VFB=1.233V OVP 100k Q4 100k 4.7k BC847BF 5 2 +V01 R15 UV 4.7Cµ6F BADT3760 0.1µF 4 3 4.7k R2.186k COMP Figure 11. 36V to 72V Input to 3.3V at 20A Synchronous Forward Converter 1950fa 16

LT1950 APPLICATIOU S IU FORW ATIOU High Efficiency, Isolated 26V 5A Output, 94 Nonsynchronous Forward Converter 93 92 Figure 13 illustrates a nonsynchronous forward converter 91 based on the LT1950 to provide a highly efficient, 26V 5A %) isolated output from 48V input. The LT1950-based con- NCY ( 9809 E verter using a single switch topology and utilizing the FICI 88 F LT1950s adaptive maximum duty cycle clamp is a simple E 87 and highly optimized solution. Peak efficiencies of 92.8% 86 VIN = 48V (Figure 12) are achievable. Transformer and inductor are 85 VOUT = 26V fOSC = 235kHz standard components. The quarter brick sized DC/DC 84 1 2 3 4 5 converter (2.3" by 1.45") delivers over 125W and is only LOAD CURRENT (A) 0.4" high. The 26V converter can be used as a “front line” 1950 F12 (isolating) converter in telecom systems with multiple Figure 12. LT1950-Based Nonsynchronous outputs. Forward Converter Efficiency vs Load Current (Figure 13 Circuit) +VIN CIN 36V 2.2µF TO 72V 100V INPUT X5R PAT01581 MBR20200CT –VIN 47µH +VOUT 10V 232k BIAS+VIN 47µF LT1950 6.8k 5 15 24.9k SLOPE VIN 6 11 VREF VIN2 470k 0.1µF VSEC 16 470pF 18k 3 7 ROSC SHDN 18k 22170kk 942 BSLYANNCK ISGEANTSEE 11820 Si7450 330R 1 52 –+ 43 ULT3179747k FMMT625 FB GND 0.015 22k 1 13 OC1 1µF 1µF COMP PGND 8.2V U2 1950 F13 LT1009 Figure 13. 36V to 72V Input to 26V at 5A Nonsynchronous Forward Converter 1950fa 17

LT1950 APPLICATIOU S IU FORW ATIOU +VOUT 3.3V BIAS VIN 10.R51k 22C010pF 1R83k 1 COMPLT1950VSEC 16 C41.637VµF L1 C1500INµVF 4V TO 36V 2 15 4.7µH TDK C5 FB VIN L2* 10µF D1 R4 R5 34 RSYONSCC BPOGONSDT 1143 D2 50V MBRD660CT +1V2VO,U 1T.5A 133k 16.2k BAS516 5 12 Q1 R2 SLOPE GATE Si7456 1.21k 6 11 COUT C2 7 VREF VIN2 10 R9, 47Ω L3* 4X75µRF, ,T 1D6KV 0.1µF 8 SHDN ISENSE 9 C6 C4 R10 ×4 GND BLANK 0.01µF 4.7µF 0.010Ω 16V R6 R7 35.7k 71.5k R8 *L2, L3 (COUPLED INDUCTORS) VIN 47k VP5-0155 Figure 14. 4V to 36V Input, 12V/1.5A Automotive SEPIC Converter 1950fa 18

LT1950 PACKAGE DESCRIPTIOU GN Package 16-Lead Plastic SSOP (Narrow .150 Inch) (Reference LTC DWG # 05-08-1641) .189 – .196* .045 ±.005 (4.801 – 4.978) .009 (0.229) 16 15 14 13 12 11 109 REF .254 MIN .150 – .165 .229 – .244 .150 – .157** (5.817 – 6.198) (3.810 – 3.988) .0165 ±.0015 .0250 TYP RECOMMENDED SOLDER PAD LAYOUT 1 2 3 4 5 6 7 8 .015 ± .004 × 45°(cid:31) .053 – .068 .004 – .0098 (0.38 ± 0.10) (1.351 – 1.727) (0.102 – 0.249) .007 – .0098 0° – 8° TYP (0.178 – 0.249) .016 – .050 .008 – .012 .0250 (0.406 – 1.270) (0.203 – 0.305) (0.635) NOTE: BSC 1. CONTROLLING DIMENSION: INCHES INCHES 2. DIMENSIONS ARE IN (MILLIMETERS) 3. DRAWING NOT TO SCALE GN16 (SSOP) 0502 *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE 1950fa Information furnished by Linear Technology Corporation is believed to be accurate and reliable. 19 However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.

LT1950 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LT1534 Ultralow Noise 2A Switching Regulator Reduces Conducted and Radiated EMI, Low Switching Harmonics, 20kHz to 250kHz Switching Frequency LT1619 Low Voltage Current Mode Controller 1.9V ≤ VIN ≤ 18V, 300kHz Operation, Boost, Flyback, SEPIC LT1681/LT3781 Dual Transistor Synchronous Forward Controller Operation Up to 72V Maximum LTC1693 High Speed MOSFET Driver 1.5A Peak Output Current, 16ns Rise/Fall Time at V = 12V, C = 1nF CC L LTC1698 Secondary Synchronous Rectifier Controller Use with the LT1950 or LT1681, Isolated Power Supplies, Contains Voltage Margining, Optocoupler Driver, Synchronization Circuit with the Primary Side LT1725 General Purpose Isolated Flyback Controller No Optoisolator Required, Accurate Regulation Without User Trims, 50kHz to 250kHz Switching Frequency, SSOP-16 Package LTC1871 Wide Input Range, No R TM Controller Operation as Low as 2.5V Input, Boost, Flyback, SEPIC SENSE LT1910 Protected High Side MOSFET Driver 8V to 48V Supply Range, Protected –15V to 60V Supply Transient LTC3440 Micropower Buck-Boost DC/DC Converter Synchronous, Single Inductor, No Schottky Diode Required LTC3704 Positive-to-Negative DC/DC Controller 2.5V ≤ VIN ≤ 36V, No RSENSE Current Mode Operation, Excellent Transient Response No RSENSE is a trademark of Linear Technology Corporation. 1950fa 20 Linear Technology Corporation LT/TP 0504 1K REV A • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com © LINEAR TECHNOLOGY CORPORATION 2003