LT1809/LT1810 Single/Dual 180MHz, 350V/µs Rail-to-Rail Input and Output Low Distortion Op Amps FEATURES DESCRIPTION n –3dB Bandwidth: 320MHz, A = 1 The LT®1809/LT1810 are single/dual low distortion rail-to- V n Gain-Bandwidth Product: 180MHz, A ≥ 10 rail input and output op amps with a 350V/μs slew rate. V n Slew Rate: 350V/μs These amplifi ers have a –3dB bandwidth of 320MHz at n Wide Supply Range: 2.5V to 12.6V unity-gain, a gain-bandwidth product of 180MHz (A ≥ 10) V n Large Output Current: 85mA and an 85mA output current to fi t the needs of low voltage, n Low Distortion, 5MHz: –90dBc high performance signal conditioning systems. n Input Common Mode Range Includes Both Rails The LT1809/LT1810 have an input range that includes n Output Swings Rail-to-Rail both supply rails and an output that swings within 20mV n Input Offset Voltage, Rail-to-Rail: 2.5mV Max of either supply rail to maximize the signal dynamic range n Common Mode Rejection: 89dB Typ in low supply applications. n Power Supply Rejection: 87dB Typ n Open-Loop Gain: 100V/mV Typ The LT1809/LT1810 have very low distortion (–90dBc) up n Shutdown Pin: LT1809 to 5MHz that allows them to be used in high performance n Single in 8-Pin SO and 6-Pin SOT-23 Packages data acquisition systems. n Dual in 8-Pin SO and MSOP Packages The LT1809/LT1810 maintain their performance for supplies n Operating Temperature Range: –40°C to 85°C from 2.5V to 12.6V and are specifi ed at 3V, 5V and ±5V n Low Profi le (1mm) SOT-23 (ThinSOT™) Package supplies. The inputs can be driven beyond the supplies without damage or phase reversal of the output. APPLICATIONS The LT1809 is available in the 8-pin SO package with the n Driving A/D Converters standard op amp pinout and the 6-pin SOT-23 package. n Low Voltage Signal Processing The LT1810 features the standard dual op amp pinout and n Active Filters is available in 8-pin SO and MSOP packages. These devices n Rail-to-Rail Buffer Amplifi ers can be used as a plug-in replacement for many op amps n Video Line Driver to improve input/output range and performance. L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. TYPICAL APPLICATION Distortion vs Frequency –40 High Speed ADC Driver AV = +1 5V –50 VVISN = = ± 25VVP-P 5V –60 VIN + R3 dB) 1VP-P –LT1809 49.9Ω C4710pF+A–INAINPRGELAFT C =G® A21.I40N24 =08 V1 ••• 1102M BsITpSs STORTION ( ––8700 RL = 100Ω, 2ND –5V R2 DI –90 1k –5V 1809 TA01a RL = 100Ω, 3RD RL = 1k, 3RD –100 R1 1k RL = 1k, 2ND –110 0.3 1 10 30 FREQUENCY (MHz) 1809 TA01b 180910fa 1

LT1809/LT1810 ABSOLUTE MAXIMUM RATINGS (Note 1) Total Supply Voltage (V+ to V–) .............................12.6V Specifi ed Temperature Range (Note 5) ....–40°C to 85°C Input Voltage (Note 2) ...............................................±V Junction Temperature ...........................................150°C S Input Current (Note 2) .........................................±10mA Storage Temperature Range ..................–65°C to 150°C Output Short-Circuit Duration (Note 3) ............Indefi nite Lead Temperature (Soldering, 10 sec)...................300°C Operating Temperature Range (Note 4) ...–40°C to 85°C PIN CONFIGURATION TOP VIEW TOP VIEW SHDN 1 8 NC OUT 1 6 V+ V– 2 5SHDN –IN 2 – 7 V+ + +IN 3 6 OUT +IN 3 4 –IN V– 4 5 NC S6 PACKAGE 6-LEAD PLASTIC TSOT-23 S8 PACKAGE TJMAX = 150°C, θJA = 145°C/W (Note 9) 8-LEAD PLASTIC SO TJMAX = 150°C, θJA = 100°C/W (Note 9) TOP VIEW TOP VIEW OUT A 1 8 V+ OUT A 1 8V+ –IN A 2 7OUT B –IN A 2 7 OUT B A +IN A 3 6–IN B V– 4 5+IN B +IN A 3 B 6 –IN B V– 4 5 +IN B MS8 PACKAGE 8-LEAD PLASTIC MSOP S8 PACKAGE TJMAX = 150°C, θJA = 130°C/W (Note 9) 8-LEAD PLASTIC SO TJMAX = 150°C, θJA = 100°C/W (Note 9) ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION SPECIFIED TEMPERATURE RANGE LT1809CS6#PBF LT1809CS6#TRPBF LTKY 6-Lead Plastic TSOT-23 0°C to 70°C LT1809IS6#PBF LT1809IS6#TRPBF LTUF 6-Lead Plastic TSOT-23 –40°C to 85°C LT1809CS8#PBF LT1809CS8#TRPBF 1809 8-Lead Plastic SO 0°C to 70°C LT1809IS8#PBF LT1809IS8#TRPBF 1809I 8-Lead Plastic SO –40°C to 85°C LT1810CMS8#PBF LT1810CMS8#TRPBF LTRF 8-Lead Plastic MSOP 0°C to 70°C LT1810IMS8#PBF LT1810IMS8#TRPBF LTTQ 8-Lead Plastic MSOP –40°C to 85°C LT1810CS8#PBF LT1810CS8#TRPBF 1810 8-Lead Plastic SO 0°C to 70°C LT1810IS8#PBF LT1810IS8#TRPBF 1810I 8-Lead Plastic SO –40°C to 85°C Consult LTC Marketing for parts specifi ed with wider operating temperature ranges. Consult LTC Marketing for information on non-standard lead based fi nish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifi cations, go to: http://www.linear.com/tapeandreel/ 180910fa 2

LT1809/LT1810 ELECTRICAL CHARACTERISTICS T = 25°C. V = 5V, 0V; V = 3V, 0V; V = open; V = V = half supply, A S S SHDN CM OUT unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V Input Offset Voltage V = V+ LT1809 SO-8 0.6 2.5 mV OS CM V = V– LT1809 SO-8 0.6 2.5 mV CM V = V+ 0.6 3.0 mV CM V = V– 0.6 3.0 mV CM ΔVOS Input Offset Shift VCM = V– to V+ LT1809 SO-8 0.3 2.0 mV V = V– to V+ 0.3 2.5 mV CM Input Offset Voltage Match (Channel-to-Channel) 0.7 6 mV (Note 10) I Input Bias Current V = V+ 1.8 8 μA B CM V = V– + 0.2V –27.5 –13 μA CM ΔIB Input Bias Current Shift VCM = V– + 0.2V to V+ 14.8 35.5 μA Input Bias Current Match (Channel-to-Channel) V = V+ 0.1 4 μA CM (Note 10) V = V– + 0.2V 0.2 8 μA CM I Input Offset Current V = V+ 0.05 1.2 μA OS CM V = V– + 0.2V 0.2 4 μA CM ΔIOS Input Offset Current Shift VCM = V– + 0.2V to V+ 0.25 5.2 μA e Input Noise Voltage Density f = 10kHz 16 nV/√Hz n i Input Noise Current Density f = 10kHz 5 pA/√Hz n C Input Capacitance 2 pF IN A Large-Signal Voltage Gain V = 5V, V = 0.5V to 4.5V, R = 1k to V /2 25 80 V/mV VOL S O L S V = 5V, V = 1V to 4V, R = 100Ω to V /2 4 10 V/mV S O L S V = 3V, V = 0.5V to 2.5V, R = 1k to V /2 15 42 V/mV S O L S CMRR Common Mode Rejection Ratio V = 5V, V = V– to V+ 66 82 dB S CM V = 3V, V = V– to V+ 61 78 dB S CM CMRR Match (Channel-to-Channel) (Note 10) V = 5V, V = V– to V+ 60 82 dB S CM V = 3V, V = V– to V+ 55 78 dB S CM Input Common Mode Range V– V+ V PSRR Power Supply Rejection Ratio V = 2.5V to 10V, V = 0V 71 87 dB S CM PSRR Match (Channel-to-Channel) (Note 10) V = 2.5V to 10V, V = 0V 65 87 dB S CM Minimum Supply Voltage (Note 6) 2.3 2.5 V V Output Voltage Swing LOW (Note 7) No Load 12 50 mV OL I = 5mA 50 120 mV SINK I = 25mA 180 375 mV SINK V Output Voltage Swing HIGH (Note 7) No Load 20 80 mV OH I = 5mA 80 180 mV SOURCE I = 25mA 330 650 mV SOURCE I Short-Circuit Current V = 5V ±45 ±85 mA SC S V = 3V ±35 ±70 mA S I Supply Current per Amplifi er 12.5 17 mA S Supply Current, Shutdown V = 5V, V = 0.3V 0.55 1.25 mA S SHDN V = 3V, V = 0.3V 0.31 0.90 mA S SHDN I SHDN Pin Current V = 5V, V = 0.3V 420 750 μA SHDN S SHDN V = 3V, V = 0.3V 220 500 μA S SHDN Output Leakage Current, Shutdown V = 0.3V 0.1 75 μA SHDN V SHDN Pin Input Voltage Low 0.3 V L V SHDN Pin Input Voltage High V – 0.5 V H S t Turn-On Time V = 0.3V to 4.5V, R = 100 80 ns ON SHDN L 180910fa 3

LT1809/LT1810 ELECTRICAL CHARACTERISTICS T = 25°C. V = 5V, 0V; V = 3V, 0V; V = open; V = V = half supply, A S S SHDN CM OUT unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS t Turn-Off Time V = 4.5V to 0.3V, R = 100 50 ns OFF SHDN L GBW Gain-Bandwidth Product Frequency = 2MHz 160 MHz SR Slew Rate V = 5V, A = –1, R = 1k, V = 4V 300 V/μs S V L O P-P FPBW Full Power Bandwidth V = 5V, V = 4V 23.5 MHz S OUT P-P THD Total Harmonic Distortion V = 5V, A = 1, R = 1k, V = 2V , f = 5MHz –86 dB S V L O P-P C t Settling Time 0.1%, V = 5V, V = 2V, A = –1, R = 500Ω 27 ns S S STEP V L ΔG Differential Gain (NTSC) VS = 5V, AV = 2, RL = 150Ω 0.015 % Δθ Differential Phase (NTSC) V = 5V, A = 2, R = 150Ω 0.05 Deg S V L The l denotes the specifi cations which apply over the 0°C ≤ T ≤ 70°C temperature range. V = 5V, 0V; V = 3V, 0V; V = open; A S S SHDN V = V = half supply, unless otherwise noted. CM OUT SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V Input Offset Voltage V = V+ LT1809 SO-8 l 1 3.0 mV OS CM V = V– LT1809 SO-8 l 1 3.0 mV CM V = V+ l 1 3.5 mV CM V = V– l 1 3.5 mV CM V TC Input Offset Voltage Drift (Note 8) V = V+ l 9 25 μV/°C OS CM V = V– l 9 25 μV/°C CM ΔVOS Input Offset Voltage Shift VCM = V– to V+ LT1809 SO-8 l 0.5 2.5 mV V = V–to V+ l 0.5 3.0 mV CM Input Offset Voltage Match (Channel-to-Channel) V = V–, V = V+ l 1.2 6.5 mV CM CM (Note 10) I Input Bias Current V = V+ – 0.2V l 2 10 μA B CM V = V–+ 0.4V l –30 –14 μA CM ΔIB Input Bias Current Shift VCM = V– + 0.4V to V+ – 0.2V l 16 40 μA Input Bias Current Match (Channel-to-Channel) V = V+ – 0.2V l 0.1 5 μA CM (Note 10) V = V–+ 0.4V 0.5 10 μA CM I Input Offset Current V = V+ – 0.2V l 0.05 1.5 μA OS CM V = V–+ 0.4V l 0.40 4.5 μA CM ΔIOS Input Offset Current Shift VCM = V– + 0.4V to V+ – 0.2V l 0.45 6 μA A Large-Signal Voltage Gain V = 5V, V = 0.5V to 4.5V, R = 1k to V /2 l 20 75 V/mV VOL S O L S V = 5V, V = 1V to 4V, R = 100Ω to V /2 l 3.5 8.5 V/mV S O L S V = 3V, V = 0.5V to 2.5V, R = 1k to V /2 l 12 40 V/mV S O L S CMRR Common Mode Rejection Ratio V = 5V, V = V–to V+ l 64 80 dB S CM V = 3V, V = V–to V+ l 60 75 dB S CM CMRR Match (Channel-to-Channel) (Note 10) V = 5V, V = V–, V = V+ l 58 80 dB S CM CM V = 3V, V = V –, V = V+ 54 75 dB S CM CM Input Common Mode Range l V– V+ V PSRR Power Supply Rejection Ratio V = 2.5V to 10V, V = 0V l 70 83 dB S CM PSRR Match (Channel-to-Channel) (Note 10) V = 2.5V to 10V, V = 0V l 64 83 dB S CM Minimum Supply Voltage (Note 6) l 2.3 2.5 V V Output Voltage Swing LOW (Note 7) No Load l 12 60 mV OL I = 5mA l 55 140 mV SINK I = 25mA l 200 400 mV SINK 180910fa 4

LT1809/LT1810 ELECTRICAL CHARACTERISTICS The l denotes the specifi cations which apply over the 0°C ≤ T ≤ 70°C A temperature range. V = 5V, 0V; V = 3V, 0V; V = open; V = V = half supply, unless otherwise noted. S S SHDN CM OUT SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V Output Voltage Swing HIGH (Note 7) No Load l 50 120 mV OH I = 5mA l 110 220 mV SOURCE I = 25mA l 370 700 mV SOURCE I Short-Circuit Current V = 5V l ±40 ±75 mA SC S V = 3V l ±30 ±65 mA S I Supply Current per Amplifi er l 15 20 mA S Supply Current, Shutdown V = 5V, V = 0.3V l 0.58 1.4 mA S SHDN V = 3V, V = 0.3V l 0.35 1.1 mA S SHDN I SHDN Pin Current V = 5V, V = 0.3V l 420 850 μA SHDN S SHDN V = 3V, V = 0.3V l 220 550 μA S SHDN Output Leakage Current, Shutdown V = 0.3V l 2 μA SHDN V SHDN Pin Input Voltage Low l 0.3 V L V SHDN Pin Input Voltage High l V – 0.5 V H S t Turn-On Time V = 0.3V to 4.5V, R = 100 l 80 ns ON SHDN L t Turn-Off Time V = 4.5V to 0.3V, R = 100 l 50 ns OFF SHDN L GBW Gain-Bandwidth Product Frequency = 2MHz l 145 MHz SR Slew Rate V = 5V, A = –1, R = 1k, V = 4V l 250 V/μs S V L O P-P FPBW Full Power Bandwidth V = 5V, V = 4V l 20 MHz S OUT P-P The l denotes the specifi cations which apply over the –40°C ≤ T ≤ 85°C temperature range. V = 5V, 0V; V = 3V, 0V; V = open; A S S SHDN V = V = half supply, unless otherwise noted. (Note 5) CM OUT SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V Input Offset Voltage V = V+ LT1809 SO-8 l 1 3.5 mV OS CM V = V– LT1809 SO-8 l 1 3.5 mV CM V = V+ l 1 4.0 mV CM V = V– l 1 4.0 mV CM V TC Input Offset Voltage Drift (Note 8) V = V+ l 9 25 μV/°C OS CM V = V– l 9 25 μV/°C CM ΔVOS Input Offset Voltage Shift VCM = V– to V+ LT1809 SO-8 l 0.5 3.0 mV V = V– l 0.5 3.5 mV CM Input Offset Voltage Match (Channel-to-Channel) V = V+, V = V– l 1.2 7 mV CM CM (Note 10) I Input Bias Current V = V+ – 0.2V l 2 12 μA B CM V = V– + 0.4V l –35 –17 μA CM ΔIB Input Bias Current Shift VCM = V– + 0.4V to V+ – 0.2V l 19 47 μA Input Bias Current Match (Channel-to-Channel) V = V+ – 0.2V l 0.2 6 μA CM (Note 10) V = V– + 0.4V l 0.6 12 μA CM I Input Offset Current V = V+ – 0.2V l 0.08 2 μA OS CM V = V– + 0.4V l 0.5 6 μA CM ΔIOS Input Offset Current Shift VCM = V– + 0.4V to V+ – 0.2V l 0.58 7.5 μA A Large-Signal Voltage Gain V = 5V, V = 0.5V to 4.5V, R = 1k to V /2 l 17 60 V/mV VOL S O L S V = 5V, V = 1V to 4V, R = 100Ω to V /2 l 2.5 7 V/mV S O L S V = 3V, V = 0.5V to 2.5V, R = 1k to V /2 l 10 35 V/mV S O L S 180910fa 5

LT1809/LT1810 ELECTRICAL CHARACTERISTICS The l denotes the specifi cations which apply over the –40°C ≤ T ≤ 85°C A temperature range. V = 5V, 0V; V = 3V, 0V; V = open; V = V = half supply, unless otherwise noted. (Note 5) S S SHDN CM OUT SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS CMRR Common Mode Rejection Ratio V = 5V, V = V– to V+ l 63 80 dB S CM V = 3V, V = V– to V+ l 58 75 dB S CM CMRR Match (Channel-to-Channel) (Note 10) V = 5V, V = V– to V+ l 57 78 dB S CM V = 3V, V = V– to V+ l 52 72 dB S CM Input Common Mode Range l V– V+ V PSRR Power Supply Rejection Ratio V = 2.5V to 10V, V = 0V l 69 83 dB S CM PSRR Match (Channel-to-Channel) (Note 10) V = 2.5V to 10V, V = 0V l 63 83 dB S CM Minimum Supply Voltage (Note 6) l 2.3 2.5 V V Output Voltage Swing LOW (Note 7) No Load l 18 70 mV OL I = 5mA l 60 150 mV SINK I = 25mA l 210 450 mV SINK V Output Voltage Swing HIGH (Note 7) No Load l 55 130 mV OH I = 5mA l 120 240 mV SOURCE I = 25mA l 375 750 mV SOURCE I Short-Circuit Current V = 5V l ±30 ±70 mA SC S V = 3V l ±25 ±60 mA S I Supply Current per Amplifi er l 15 21 mA S Supply Current, Shutdown V = 5V, V = 0.3V l 0.58 1.5 mA S SHDN V = 3V, V = 0.3V l 0.35 1.2 mA S SHDN I SHDN Pin Current V = 5V, V = 0.3V ● 420 900 μA SHDN S SHDN V = 3V, V = 0.3V ● 220 600 μA S SHDN Output Leakage Current, Shutdown V = 0.3V ● 3 μA SHDN V SHDN Pin Input Voltage Low ● 0.3 V L V SHDN Pin Input Voltage High ● V – 0.5 V H S t Turn-On Time V = 0.3V to 4.5V, R = 100 ● 80 ns ON SHDN L t Turn-Off Time V = 4.5V to 0.3V, R = 100 ● 50 ns OFF SHDN L GBW Gain-Bandwidth Product Frequency = 2MHz ● 140 MHz SR Slew Rate V = 5V, A = -1, R = 1k, V = 4V ● 180 V/μs S V L O P-P FPBW Full Power Bandwidth V = 5V, V = 4V ● 14 MHz S OUT P-P T = 25°C. V = ±5V, V = open, V = 0V, V = 0V, unless otherwise noted. A S SHDN CM OUT SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V Input Offset Voltage V = V+ LT1809 SO-8 0.8 3.0 mV OS CM V = V– LT1809 SO-8 0.8 3.0 mV CM V = V+ 0.8 3.5 mV CM V = V– 0.8 3.5 mV CM ΔVOS Input Offset Voltage Shift VCM = V– to V+ LT1809 SO-8 0.35 2.5 mV V = V– to V+ 0.35 3.0 mV CM Input Offset Voltage Match (Channel-to-Channel) V = V+, V = V– 1 6 mV CM CM (Note 10) I Input Bias Current V = V+ 2 10 μA B CM V = V– + 0.2V –30 –12.5 μA CM 180910fa 6

LT1809/LT1810 ELECTRICAL CHARACTERISTICS T = 25°C. V = ±5V, V = open, V = 0V, V = 0V, unless otherwise noted. A S SHDN CM OUT SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS ΔIB Input Bias Current Shift VCM = V– + 0.2V to V+ 14.5 40 μA Input Bias Current Match (Channel-to-Channel) V = V+ 0.1 5 μA CM (Note 10) V = V– + 0.2V 0.4 10 μA CM I Input Offset Current V = V+ 0.05 2 μA OS CM V = V– + 0.2V 0.40 5 μA CM ΔIOS Input Offset Current Shift VCM = V– + 0.2V to V+ 0.45 7 μA e Input Noise Voltage Density f = 10kHz 16 nV/√Hz n i Input Noise Current Density f = 10kHz 5 pA/√Hz n C Input Capacitance f = 100kHz 2 pF IN A Large-Signal Voltage Gain V = –4V to 4V, R = 1k 30 100 V/mV VOL O L V = –2.5V to 2.5V, R = 100Ω 4.5 12 V/mV O L CMRR Common Mode Rejection Ratio V = V– to V+ 70 89 dB CM CMRR Match (Channel-to-Channel) (Note 10) V = V– to V+ 64 89 dB CM Input Common Mode Range V– V+ V PSRR Power Supply Rejection Ratio V+= 2.5V to 10V, V– = 0V 71 87 dB PSRR Match (Channel-to-Channel) (Note 10) V+= 2.5V to 10V, V– = 0V 65 90 dB V Output Voltage Swing LOW (Note 7) No Load 12 60 mV OL I = 5mA 50 140 mV SINK I = 25mA 180 425 mV SINK V Output Voltage Swing HIGH (Note 7) No Load 35 100 mV OH I = 5mA 90 200 mV SOURCE I = 25mA 310 700 mV SOURCE I Short-Circuit Current ±55 ±85 mA SC I Supply Current per Amplifi er 15 20 mA S Supply Current, Shutdown V = 0.3V 0.6 1.3 mA SHDN I SHDN Pin Current V = 0.3V 420 750 μA SHDN SHDN Output Leakage Current, Shutdown V = 0.3V 0.1 75 μA SHDN V SHDN Pin Input Voltage Low 0.3 V L V SHDN Pin Input Voltage High V+ – 0.5 V H t Turn-On Time V = 0.3V to 4.5V, R = 100 80 ns ON SHDN L t Turn-Off Time V = 4.5V to 0.3V, R = 100 50 ns OFF SHDN L GBW Gain-Bandwidth Product Frequency = 2MHz 110 180 MHz SR Slew Rate A = –1, R = 1k, V = ±4V, 175 350 V/μs V L O Measured at V = ±3V O FPBW Full Power Bandwidth V = 8V 14 MHz OUT P-P THD Total Harmonic Distortion A = 1, R = 1k, V = 2V , f = 5MHz –90 dB V L O P-P C t Settling Time 0.1%, V = 8V, A = –1, R = 500Ω 34 ns S STEP V L ΔG Differential Gain (NTSC) AV = 2, RL = 150Ω 0.01 % Δθ Differential Phase (NTSC) A = 2, R = 150Ω 0.01 Deg V L 180910fa 7

LT1809/LT1810 ELECTRICAL CHARACTERISTICS The ● denotes the specifi cations which apply over the 0°C ≤ T ≤ 70°C A temperature range. V = ±5V, V = open, V = 0V, V = 0V, unless otherwise noted. S SHDN CM OUT SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V Input Offset Voltage V = V+ LT1809 SO-8 l 1 3.25 mV OS CM V = V– LT1809 SO-8 l 1 3.25 mV CM V = V+ l 1 3.75 mV CM VCM = V– l 1 3.75 mV V TC Input Offset Voltage Drift (Note 8) V = V+ l 10 25 μV/°C OS CM V = V– l 10 25 μV/°C CM ΔVOS Input Offset Voltage Shift VCM = V– to V+ LT1809 SO-8 l 0.5 2.75 mV V = V– to V+ l 0.5 3.25 mV CM Input Offset Voltage Match (Channel-to-Channel) V = V– to V+ l 1.2 6.5 mV CM (Note 10) I Input Bias Current V = V+ – 0.2V l 2.5 12.5 μA B CM V = V– + 0.4V l –37.5 –15 μA CM ΔI Input Bias Current Shift V = V– + 0.4V to V+ – 0.2V l 17.5 50 μA B CM Input Bias Current Match (Channel-to-Channel) V = V+ – 0.2V l 0.1 6 μA CM (Note 10) V = V– + 0.4V l 0.5 12 μA CM I Input Offset Current V = V+ – 0.2V l 0.06 2.25 μA OS CM V = V– + 0.4V l 0.5 6 μA CM ΔIOS Input Offset Current Shift VCM = V– + 0.4V to V+ – 0.2V l 0.56 8.25 μA A Large-Signal Voltage Gain V = –4V to 4V, R = 1k l 27 80 V/mV VOL O L V = –2.5V to 2.5V, R = 100Ω l 3.5 10 V/mV O L CMRR Common Mode Rejection Ratio V = V– to V+ l 69 86 dB CM CMRR Match (Channel-to-Channel) (Note 10) V = V– to V+ l 63 86 dB CM Input Common Mode Range l V– V+ V PSRR Power Supply Rejection Ratio V+= 2.5V to 10V, V– = 0V l 70 83 dB PSRR Match (Channel-to-Channel) (Note 10) V+= 2.5V to 10V, V– = 0V l 64 83 dB V Output Voltage Swing LOW (Note 7) No Load l 20 80 mV OL I = 5mA l 50 160 mV SINK I = 25mA l 210 475 mV SINK V Output Voltage Swing HIGH (Note 7) No Load l 60 140 mV OH I = 5mA l 120 240 mV SOURCE I = 25mA l 370 750 mV SOURCE I Short-Circuit Current l ±45 ±75 mA SC I Supply Current per Amplifi er l 17.5 25 mA S Supply Current, Shutdown V = 0.3V l 0.6 1.5 mA SHDN I SHDN Pin Current V = 0.3V l 420 850 μA SHDN SHDN Output Leakage Current, Shutdown V = 0.3V l 3 μA SHDN V SHDN Pin Input Voltage Low l 0.3 V L V SHDN Pin Input Voltage High l V+ – 0.5 V H t Turn-On Time V = 0.3V to 4.5V, R = 100 l 80 ns ON SHDN L t Turn-Off Time V = 4.5V to 0.3V, R = 100 l 50 ns OFF SHDN L GBW Gain-Bandwidth Product Frequency = 2MHz l 85 170 MHz SR Slew Rate A = –1, R = 1k, V = ±4V, l 140 300 V/μs V L O Measured at V = ±3V O FPBW Full Power Bandwidth V = 8V l 12 MHz OUT P-P 180910fa 8

LT1809/LT1810 ELECTRICAL CHARACTERISTICS The ● denotes the specifi cations which apply over the –40°C ≤ T ≤ 85°C A temperature range. V = ±5V, V = open, V = 0V, V = 0V, unless otherwise noted. (Note 5) S SHDN CM OUT SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V Input Offset Voltage V = V+ LT1809 SO-8 l 1 3.75 mV OS CM V = V– LT1809 SO-8 l 1 3.75 mV CM V = V+ l 1 4.25 mV CM V = V–v l 1 4.25 mV CM V TC Input Offset Voltage Drift (Note 8) V = V+ l 10 25 μV/°C OS CM V = V– l 10 25 μV/°C CM ΔVOS Input Offset Voltage Shift VCM = V– to V+ LT1809 SO-8 l 0.5 3.00 mV V = V– to V+ l 0.5 3.75 mV CM Input Offset Voltage Match (Channel-to-Channel) V = V– to V+ l 1.2 7.5 mV CM (Note 10) I Input Bias Current V = V+ – 0.2V l 2.8 14 μA B CM V = V– + 0.4V l –45 –17 μA CM ΔIB Input Bias Current Shift VCM = V– + 0.4V to V+ – 0.2V l 19.8 59 μA Input Bias Current Match (Channel-to-Channel) V = V+ – 0.2V l 0.1 7 μA CM (Note 10) V = V– + 0.4V l 0.6 14 μA CM I Input Offset Current V = V+ – 0.2V l 0.08 2.5 μA OS CM V = V– + 0.4V l 0.6 8 μA CM ΔIOS Input Offset Current Shift VCM = V– + 0.4V to V+ – 0.2V l 0.68 10.5 μA A Large-Signal Voltage Gain V = –4V to 4V, R = 1k l 22 70 V/mV VOL O L V = –2.5V to 2.5V, R = 100Ω l 3 10 V/mV O L CMRR Common Mode Rejection Ratio V = V– to V+ l 68 86 dB CM CMRR Match (Channel-to-Channel) (Note 10) V = V– to V+ l 62 86 dB CM Input Common Mode Range l V– V+ V PSRR Power Supply Rejection Ratio V+= 2.5V to 10V, V– = 0V l 69 83 dB PSRR Match (Channel-to-Channel) (Note 10) V+= 2.5V to 10V, V– = 0V l 63 83 dB V Output Voltage Swing LOW (Note 7) No Load l 23 100 mV OL I = 5mA l 60 170 mV SINK I = 25mA l 220 525 mV SINK V Output Voltage Swing HIGH (Note 7) No Load l 75 160 mV OH I = 5mA l 130 260 mV SOURCE I = 25mA l 375 775 mV SOURCE I Short-Circuit Current l ±30 ±75 mA SC I Supply Current per Amplifi er l 19 25 mA S Supply Current, Shutdown V = 0.3V l 0.65 1.6 mA SHDN I SHDN Pin Current V = 0.3V l 420 900 μA SHDN SHDN Output Leakage Current, Shutdown V = 0.3V l 4 μA SHDN V SHDN Pin Input Voltage Low l 0.3 V L V SHDN Pin Input Voltage High l V+ – 0.5 V H t Turn-On Time V = 0.3V to 4.5V, R = 100 l 80 ns ON SHDN L t Turn-Off Time V = 4.5V to 0.3V, R = 100 l 50 ns OFF SHDN L GBW Gain-Bandwidth Product Frequency = 2MHz l 80 160 MHz SR Slew Rate A = –1, R = 1k, V = ±4V, l 110 220 V/μs V L O Measured at V = ±3V l O FPBW Full Power Bandwidth V = 8V l 8.5 MHz OUT P-P 180910fa 9

LT1809/LT1810 ELECTRICAL CHARACTERISTICS Note 1: Stresses beyond those listed under Absolute Maximum Ratings Note 6: Minimum supply voltage is guaranteed by power supply rejection may cause permanent damage to the device. Exposure to any Absolute ratio test. Maximum Rating condition for extended periods may affect device Note 7: Output voltage swings are measured between the output and reliability and lifetime. power supply rails. Note 2: The inputs are protected by back-to-back diodes. If the differential Note 8: This parameter is not 100% tested. input voltage exceeds 1.4V, the input current should be limited to less than Note 9: Thermal resistance varies depending upon the amount of PC board 10mA. metal attached to the V– pin of the device. θ is specifi ed for a certain JA Note 3: A heat sink may be required to keep the junction temperature amount of 2oz of copper metal trace connecting to the V– pin as described below the absolute maximum rating when the output is shorted in the thermal resistance tables in the Applications Information section. indefi nitely. Note 10: Matching parameters are the difference between the two Note 4: The LT1809C/LT1809I and LT1810C/LT1810I are guaranteed amplifi ers of the LT1810. functional over the operating temperature range of –40°C and 85°C. Note 5: The LT1809C/LT1810C are guaranteed to meet specifi ed performance from 0°C to 70°C. The LT1809C/LT1810C are designed, characterized and expected to meet specifi ed performance from –40°C to 85°C but are not tested or QA sampled at these temperatures. The LT1809I/LT1810I are guaranteed to meet specifi ed performance from –40°C to 85°C. 180910fa 10

LT1809/LT1810 TYPICAL PERFORMANCE CHARACTERISTICS V Distribution, V = 0V V Distribution, V = 5V OS CM OS CM (PNP Stage) (NPN Stage) ΔV Shift for V = 0V to 5V OS CM 50 50 25 VS = 5V, 0V VS = 5V, 0V VS = 5V, 0V 40 40 20 %) %) %) S ( S ( S ( NIT 30 NIT 30 NIT 15 U U U OF OF OF CENT 20 CENT 20 CENT 10 R R R PE PE PE 10 10 5 0 0 0 –3 –2 –1 0 1 2 3 –3 –2 –1 0 1 2 3 –1 –0.75–0.5–0.25 0 0.25 0.5 0.75 1 INPUT OFFSET VOLTAGE (mV) INPUT OFFSET VOLTAGE (mV) INPUT OFFSET VOLTAGE (mV) 1809 G01 1809 G02 1809 G03 Offset Voltage Input Bias Current Supply Current vs Supply Voltage vs Input Common Mode vs Common Mode Voltage 25 2.0 10 VS = 5V, 0V VS = 5V, 0V TYPICAL PART ENT (mA) 2105 TA = 125°CTA = 25°C AGE (mV) 011...505 TA = 125°C RRENT (μA) –505 TA = 125T°AC = 25°TCA = –55°C SUPPLY CURR 150 TA = –55°C OFFSET VOLT–0.05 TTAA == –2555°°CC INPUT BIAS CU –––121005 TAT AT= A =1 =2– 552°55C°°CC –1.0 –25 0 –1.5 –30 0 1 2 3 4 5 6 7 8 9 10 0 1 2 3 4 5 –1 0 1 2 3 4 5 6 TOTAL SUPPLY VOLTAGE (V) INPUT COMMON MODE VOLTAGE (V) COMMON MODE VOLTAGE (V) 1809 G04 1809 G05 1809 G06 Output Saturation Voltage Output Saturation Voltage Input Bias Current vs Temperature vs Load Current (Output Low) vs Load Current (Output High) 5 10 10 INPUT BIAS CURRENT (μA)–––––1–97511133 VS = 5V, 0V VVCCMM == 50VV PUT LOW SATURATION VOLTAGE (V)00.0.111 VST A= =5 V1,2 05V°C TA = 25°C PUT HIGH SATURATION VOLTAGE (V)00.0.111 VTTATSA A === = –51 52V255,5 °°0°CCCV –13 UT TA = –55°C UT O O –15 0.001 0.001 –50–35 –20 –5 10 25 40 55 70 85 0.01 0.1 1 10 100 0.01 0.1 1 10 100 TEMPERATURE (°C) LOAD CURRENT (mA) LOAD CURRENT (mA) 1809 G07 1809 G08 1809 G09 180910fa 11

LT1809/LT1810 TYPICAL PERFORMANCE CHARACTERISTICS Output Short-Circuit Current Supply Current Minimum Supply Voltage vs Power Supply Voltage vs SHDN Pin Voltage 1.0 120 18 0.8 VCM = V– + 0.5V A)100 TA = –55°C TA = 25°C VS = 5V, 0V ANGE IN OFFSET VOLTAGE (mV)–––000000......4204662 TA = –5T5A°T C=A =2 51°2C5°C UT SHORT-CIRCUIT CURRENT (m–––248466200000000 TTAA == –15255°°CC“S“SOIUNRKCINTINAG G”=” 125°C SUPPLY CURRENT (mA) 11118024664 TA T=A 2 =5 °1C25°C CH TP TA = –55°C –0.8 U–80 2 O TA = 25°C –1.0 –100 0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 0 1 2 3 4 5 TOTAL SUPPLY VOLTAGE (V) POWER SUPPLY VOLTAGE (±V) SHDN PIN VOLTAGE (V) 1809 G10 1809 G11 1809 G12 SHDN Pin Current vs SHDN Pin Voltage Open-Loop Gain Open-Loop Gain 50 2.5 2.5 VS = 5V, 0V VS = 3V, 0V VS = 5V, 0V 0 2.0 2.0 –50 1.5 1.5 RRENT (μA)––115000 TA = –55T°AC = 125°C TA = 25°C AGE (mV) 01..50 RL = 1k AGE (mV) 01..50 RL = 1k PIN CU––225000 T VOLT–0.50 T VOLT–0.50 SHDN –300 INPU–1.0 RL = 100Ω INPU–1.0 RL = 100Ω –350 –1.5 –1.5 –400 –2.0 –2.0 –450 –2.5 –2.5 0 1 2 3 4 5 0 0.5 1.0 1.5 2.0 2.5 3.0 0 1 2 3 4 5 SHDN PIN VOLTAGE (V) OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) 1809 G13 1809 G14 1809 G15 Warm-Up Drift vs Time Open-Loop Gain Offset Voltage vs Output Current (LT1809S8) 2.5 15 180 VS = ±5V VS = ±5V TA = 25°C 2.0 160 INPUT VOLTAGE (mV)–––010111......5555000 RLR L= =1 010kΩ OFFSET VOLTAGE (mV)––1155000 TA =T 1A2 =5 °–CT5A5 °=C 25°C HANGE IN OFFSET VOLTAGE (μV) 111024864000000 VVVSSS == = 53 ±VV5,,V 00VV C –2.0 20 –2.5 –15 0 –5 –4 –3 –2 –1 0 1 2 3 4 5 –100–80–60 –40–20 0 20 40 60 80 100 0 20 40 60 80 100 120 140 160 OUTPUT VOLTAGE (V) OUTPUT CURRENT (mA) TIME AFTER POWER UP (SEC) 1809 G16 1809 G17 1809 G18 180910fa 12

LT1809/LT1810 TYPICAL PERFORMANCE CHARACTERISTICS 0.1Hz to 10Hz Input Noise Voltage vs Frequency Input Noise Current vs Frequency Output Voltage Noise 100 20 10 VS = 5V, 0V VS = 5V, 0V 90 8 AGE (nV/√Hz) 67850000 OISE (pA/√Hz) 1126 TAGE (μV/DIV) 2604 NOISE VOLT 243000 PVNCPM A =C T2I.5VVENVCPMN =A C4T.5IVVE CURRENT N 84 PVNCMP =A C2T.5IVVE OUTPUT VOL –––264 NPN ACTIVE 10 –8 VCM = 4.5V 0 0 –10 0.1 1 10 100 0.1 1 10 100 TIME (2s/DIV) FREQUENCY (kHz) FREQUENCY (kHz) 1809 G19 1809 G20 1809 G21 Gain Bandwidth and Phase Gain Bandwidth and Phase Margin vs Supply Voltage Margin vs Temperature Slew Rate vs Temperature 55 55 450 TA = 25°C RL = 1k 50 VS = ±5V 50 400 PHASE MARGIN 45 45 VS = ±5V GAIN BANDWIDTH (MHz)111119878700055 GAIN BANDWIPDHTAHSE MARGIN 3450PHASE MARGIN (DEG) GAIN BANDWIDTH (MHz)112189070000 VS = 3V, 0VVVS S= =3 V±5, V0V 343005PHASE MARGIN (DEG) SLEW RATE (V/μs) 213325550000000 VARSVF = == 5 R1VG, 0=V 1k RL = 1k 165 160 GAIN BANDWIDTH 100 RISING AND FALLING SLEW RATE 160 150 50 0 2 4 6 8 10 –55 –25 0 25 50 75 100 125 –55 –25 0 25 50 75 100 125 TOTAL SUPPLY VOLTAGE (V) TEMPERATURE (°C) TEMPERATURE (°C) 1809 G22 1809 G23 1809 G24 Gain and Phase vs Frequency Closed-Loop Gain vs Frequency Closed-Loop Gain vs Frequency 60 100 15 15 PHASE 12 AV = +1 12 AV = +2 50 80 VS = 3V, 0V VS = ±5V 9 9 40 60 6 6 GAIN (dB)231000 VS = 3V, 0VVS = ±5V 24000PHASE (DEG GAIN (dB) –033 VSV S= =3 V±5V GAIN (dB) –033 VS V=S ± =5 V3V ) GAIN –6 –6 0 –20 –9 –9 –10 CL = 5pF –40 –12 –12 RL = 1k –20 –60 –15 –15 100k 1M 10M 100M 1G 100k 1M 10M 100M 500M 100k 1M 10M 100M 500M FREQUENCY (Hz) FREQUENCY (Hz) FREQUENCY (Hz) 1809 G25 1809 G26 1809 G27 180910fa 13

LT1809/LT1810 TYPICAL PERFORMANCE CHARACTERISTICS Common Mode Rejection Ratio Power Supply Rejection Ratio Output Impedance vs Frequency vs Frequency vs Frequency 600 110 100 VS = 5V, 0V dB) 100 VS = 5V, 0V dB) 90 VTAS == 255V°, C0V CE (Ω)11000 ON RATIO ( 8900 ON RATIO ( 7800 PSOUSPIPTLIVYE MPEDAN AV = 10 REJECTI 7600 REJECTI 6500 NESGUAPTPILVYE OUTPUT I 0.11 AV = 2 AV = 1 MON MODE 354000 ER SUPPLY 243000 M W O 20 O 10 C P 0.01 10 0 100k 1M 10M 100M 500M 10k 100k 1M 10M 100M 500M 1k 10k 100k 1M 10M 100M FREQUENCY (Hz) FREQUENCY (Hz) FREQUENCY (Hz) 1809 G28 1809 G29 1809 G30 Series Output Resistor Series Output Resistor vs Capacitive Load vs Capacitive Load 0.01% Settling Time 40 50 VS = 5V, 0V VS = 5V, 0V INPUT SIGNAL 35 AV = +1 45 AV = +2 GENERATION (2V/DIV) 40 HOOT (%) 232005 RRSL == ∞10Ω, HOOT (%) 332505 RRSL == ∞20Ω RRSL == ∞10Ω RES(S2OEmOLTUVUTT/LTDPIINOIUVGNT) VERS 15 RS = 20Ω, RL = ∞ VERS 20 O O 15 10 RL = RS = 50Ω 10 5 RL = RS = 50Ω 5 VS = ±5V 20ns/DIV) 1809 G33 0 0 VOUT = ±4V 10 100 1000 10 100 1000 AV = –1 CAPACITIVE LOAD (pF) CAPACITIVE LOAD (pF) RL = 500Ω tS = 110ns (SETTLING TIME) 1809 G31 1809 G32 Distortion vs Frequency Distortion vs Frequency Distortion vs Frequency –40 –40 –40 AV = +1 AV = +1 AV = +2 –50 VVOS == ±25VVP-P –50 VVOS == 52VVP-P –50 VVOS == ±25VVP-P –60 –60 –60 N (dB) –70 N (dB) –70 RL = 1k, 2ND N (dB) –70 RL = 100Ω, 2ND ORTIO –80 RL = 100Ω, 2ND ORTIO –80 RL = 100Ω, 2ND ORTIO –80 DIST –90 DIST –90 DIST –90 RL = 1k, 2ND –100 RL = 100Ω, 3RD RL = 1k, 3RD –100 RL = 100Ω, 3RD RL = 1k, 3RD –100 RL = 100Ω, 3RD RL = 1k, 3RD RL = 1k, 2ND –110 –110 –110 0.3 1 10 30 0.3 1 10 30 0.3 1 10 30 FREQUENCY (MHz) FREQUENCY (MHz) FREQUENCY (MHz) 1809 G34 1809 G35 1809 G36 180910fa 14

LT1809/LT1810 TYPICAL PERFORMANCE CHARACTERISTICS Maximum Undistorted Output Distortion vs Frequency Signal vs Frequency –40 4.6 AV = +2 VS = 5V –50 VVOS == 52VVP-P )P-P 4.5 AV = –1 V N (dB) ––7600 RL = 100Ω, 2ND SWING ( 44..34 DISTORTIO ––8900 RL = 1k, 2ND RL R=L 1 =0 01Ωk,, 33RRDD UT VOLTAGE 44..21 AV = +2 P T U –100 O 4.0 –110 3.9 0.3 1 10 30 0.1 1 10 100 FREQUENCY (MHz) FREQUENCY (MHz) 1809 G37 1809 G38 ±5V Large-Signal Response ±5V Small-Signal Response 5V Large-Signal Response 10ns/DIV) 1809 G39 10ns/DIV) 1809 G40 10ns/DIV) 1809 G41 VS = ±5V VS = ±5V VS = ±5V AV = +1 AV = +1 AV = +1 RL = 1k RL = 1k RL = 1k 5V Small-Signal Response Output Overdriven Recovery Shutdown Response VIN (1V/DIV) VSHDN 0V) 0V) VOUT VOUT (2V/DIV) 0V) 0V) 10ns/DIV) 1809 G42 10ns/DIV) 1809 G43 100ns/DIV) 1809 G44 VS = ±5V VS = 5V, 0V VS = 5V, 0V AV = +1 AV = +2 AV = +2 RL = 1k RL = 100Ω 180910fa 15

LT1809/LT1810 APPLICATIONS INFORMATION Rail-to-Rail Characteristics Power Dissipation The LT1809/LT1810 have an input and output signal range The LT1809/LT1810 amplifi ers combine high speed with that includes both negative and positive power supply. large output current in a small package, so there is a need Figure 1 depicts a simplifi ed schematic of the amplifi er. to ensure that the die’s junction temperature does not The input stage is comprised of two differential amplifi ers, exceed 150°C. The LT1809 is housed in an SO-8 package a PNP stage Q1/Q2 and a NPN stage Q3/Q4 that are active or a 6-lead SOT-23 package and the LT1810 is in an SO-8 over different ranges of common mode input voltage. The or 8-lead MSOP package. All packages have the V– sup- PNP differential pair is active for common mode voltages ply pin fused to the lead frame to enhance the thermal between the negative supply to approximately 1.5V below conductance when connecting to a ground plane or a large the positive supply. As the input voltage moves closer metal trace. Metal trace and plated through-holes can be toward the positive supply, the transistor Q5 will steer used to spread the heat generated by the device to the the tail current I to the current mirror Q6/Q7, activating backside of the PC board. For example, on a 3/32" FR-4 1 the NPN differential pair and causing the PNP pair to board with 2oz copper, a total of 660 square millimeters become inactive for the rest of the input common mode connected to Pin 4 of LT1810 in an SO-8 package (330 range up to the positive supply. square millimeters on each side of the PC board) will bring the thermal resistance, θ , to about 85°C/W. Without A pair of complementary common emitter stages JA extra metal trace connected to the V– pin to provide a heat Q14/Q15 form the output stage, enabling the output to sink, the thermal resistance will be around 105°C/W. More swing from rail-to-rail. The capacitors C1 and C2 form information on thermal resistance for all packages with the local feedback loops that lower the output impedance various metal areas connecting to the V– pin is provided at high frequency. These devices are fabricated on Linear in Tables 1, 2 and 3 for thermal consideration. Technology’s proprietary high speed complementary bipolar process. V+ R6 R3 R4 R5 10k Q16 Q17 V+ V+ V– ESDDD95 R7 ESDD1 ESDD2 D1 I1 Q11 Q12 Q13 Q15 100k C2 SHDN +IN ESDD6 D6 D8 D2 Q5 VBIAS I2 OUT V– D5 D7 CC V– –IN Q4 Q3 Q1 Q2 D3 ESDD4 ESDD3 BUFFER AND OUTPUT BIAS V– V+ D4 Q10 Q9 Q8 BIAS C1 GENERATION Q7 Q6 Q14 R1 R2 V– 1809 F01 Figure 1. LT1809 Simplifi ed Schematic Diagram 180910fa 16

LT1809/LT1810 APPLICATIONS INFORMATION Table 1. LT1809 6-Lead SOT-23 Package Example: An LT1810 in SO-8 mounted on a 2500mm2 area COPPER AREA BOARD AREA THERMAL RESISTANCE of PC board without any extra heat spreading plane con- TOPSIDE (mm2) (mm2) (JUNCTION-TO-AMBIENT) nected to its V– pin has a thermal resistance of 105°C/W, 270 2500 135°C/W θ . Operating on ±5V supplies with both amplifi ers JA 100 2500 145°C/W simultaneously driving 50Ω loads, the worst-case power 20 2500 160°C/W dissipation is given by: 0 2500 200°C/W P = 2 • (10 • 25mA) + 2 • (2.5)2/50 D(MAX) Device is mounted on topside. = 0.5 + 0.250 = 0.750W Table 2. LT1809/LT1810 SO-8 Package The maximum ambient temperature that the part is al- COPPER AREA lowed to operate is: TOPSIDE BACKSIDE BOARD AREA THERMAL RESISTANCE (mm2) (mm2) (mm2) (JUNCTION-TO-AMBIENT) T = T – (P • 105°C/W) A J D(MAX) 1100 1100 2500 65°C/W = 150°C – (0.750W • 105°C/W) = 71°C 330 330 2500 85°C/W 35 35 2500 95°C/W To operate the device at higher ambient temperature, con- 35 0 2500 100°C/W nect more metal area to the V– pin to reduce the thermal 0 0 2500 105°C/W resistance of the package as indicated in Table 2. Device is mounted on topside. Input Offset Voltage Table 3. LT1810 8-Lead MSOP Package The offset voltage will change depending upon which COPPER AREA input stage is active and the maximum offset voltage is TOPSIDE BACKSIDE BOARD AREA THERMAL RESISTANCE guaranteed to be less than 3mV. The change of V over (mm2) (mm2) (mm2) (JUNCTION-TO-AMBIENT) OS the entire input common mode range (CMRR) is less than 540 540 2500 110°C/W 2.5mV on a single 5V and 3V supply. 100 100 2500 120°C/W 100 0 2500 130°C/W Input Bias Current 30 0 2500 135°C/W The input bias current polarity depends upon a given input 0 0 2500 140°C/W common voltage at whichever input stage is operating. Device is mounted on topside. When the PNP input stage is active, the input bias cur- rents fl ow out of the input pins and fl ow into the input pins Junction temperature T is calculated from the ambient J when the NPN input stage is activated. Because the input temperature T and power dissipation P as follows: A D offset current is less than the input bias current, matching T = T + (P • θ ) the source resistances at the input pin will reduce total J A D JA offset error. The power dissipation in the IC is the function of the supply voltage, output voltage and the load resistance. Output For a given supply voltage, the worst-case power dis- The LT1809/LT1810 can deliver a large output current, sipation P occurs at the maximum supply current D(MAX) so the short-circuit current limit is set around 90mA to with the output voltage at half of either supply voltage (or prevent damage to the device. Attention must be paid to the maximum swing is less than 1/2 the supply voltage). keep the junction temperature of the IC below the absolute P is given by: D(MAX) maximum rating of 150°C (refer to the Power Dissipation P = (V • I ) + (V /2)2/R D(MAX) S S(MAX) S L section) when the output is continuously short-circuited. 180910fa 17

LT1809/LT1810 APPLICATIONS INFORMATION The output of the amplifi er has reverse-biased diodes of 10Ω to 50Ω should be connected between the output connected to each supply. If the output is forced beyond and the capacitive load to avoid ringing or oscillation. The either supply, unlimited current will fl ow through these feedback should still be taken from the output so that the diodes. If the current is transient and limited to several resistor will isolate the capacitive load to ensure stability. hundred milliamps, no damage to the device will occur. Graphs on capacitive loads indicate the transient response of the amplifi er when driving capacitive load with a speci- Overdrive Protection fi ed series resistor. When the input voltage exceeds the power supplies, two Feedback Components pairs of crossing diodes, D1 to D4, will prevent the out- put from reversing polarity. If the input voltage exceeds When feedback resistors are used to set up gain, care must either power supply by 700mV, diodes D1/D2 or D3/D4 be taken to ensure that the pole formed by the feedback will turn on, keeping the output at the proper polarity. resistors and the total capacitance at the inverting input For the phase reversal protection to perform properly, does not degrade stability. For instance, the LT1809 in a the input current must be limited to less than 5mA. If noninverting gain of 2, set up with two 1k resistors and a the amplifi er is severely overdriven, an external resistor capacitance of 3pF (device plus PC board), will probably should be used to limit the overdrive current. ring in transient response. The pole that is formed at 106MHz will reduce phase margin by 34 degrees when the The LT1809/LT1810’s input stages are also protected crossover frequency of the amplifi er is around 70MHz. A against differential input voltages of 1.4V or higher by capacitor of 3pF or higher connected across the feedback back-to-back diodes, D5/D8, that prevent the emitter- resistor will eliminate any ringing or oscillation. base breakdown of the input transistors. The current in these diodes should be limited to less than 10mA when SHDN Pin they are active. The worst-case differential input voltage usually occurs when the input is driven while the output The LT1809 has a SHDN pin to reduce the supply current is shorted to ground in a unity-gain confi guration. In ad- to less than 1.25mA. When the SHDN pin is pulled low, dition, the amplifi er is protected against ESD strikes up it will generate a signal to power down the device. If the to 3kV on all pins by a pair of protection diodes on each pin is left unconnected, an internal pull-up resistor of 10k pin that are connected to the power supplies as shown will keep the part fully operating as shown in Figure 1. The in Figure 1. output will be high impedance during shutdown, and the turn-on and turn-off time is less than 100ns. Because the Capacitive Load inputs are protected by a pair of back-to-back diodes, the input signal will feed through to the output during shut- The LT1809/LT1810 is optimized for high bandwidth and down mode if the amplitude of signal between the inputs low distortion applications. It can drive a capacitive load is larger than 1.4V. about 20pF in a unity-gain confi guration and more with higher gain. When driving a larger capacitive load, a resistor 180910fa 18

LT1809/LT1810 TYPICAL APPLICATIONS Driving A/D Converters and resistors, an NPO chip capacitor and metal-fi lm surface mount resistors, should be used since these components The LT1809/LT1810 have a 27ns settling time to 0.1% of can add to distortion. The voltage glitch of the converter, a 2V step signal and 20Ω output impedance at 100MHz due to its sampling nature, is buffered by the LT1809 and making it ideal for driving high speed A/D converters. With the ability of the amplifi er to settle it quickly will affect the the rail-to-rail input and output and low supply voltage spurious-free dynamic range of the system. Figure 2 to operation, the LT1809 is also desirable for single supply Figure 7 depict the LT1809 driving the LTC1420 at different applications. As shown in Figure 2, the LT1809 drives a confi gurations and voltage supplies. The FFT responses 10Msps, 12-bit ADC, the LTC1420. The lowpass fi lter, R3 show better than 90dB of SFDR for a ±5V supply, and 80dB and C1, reduces the noise and distortion products that on a 5V single supply for the 1.394MHz signal. might come from the input signal. High quality capacitors 0 VS = ±5V AV = +2 –20 fSAMPLE = 10Msps 5V fSINFD =R 1 =.3 9904dMBHz 5V B)–40 d VIN + R3 DE ( 1VP-P –LT1809 49.9Ω C1 +A–INAINPRGELAFT =GC 1A24.I0N24 0=8 V1 ••• 1120 MBsITpSs AMPLITU––8600 470pF –5V R1k2 1809 F02 –100 –5V R1 –120 1k 0 1 2 3 4 5 FREQUENCY (MHz) 1809 F03 Figure 2. Noninverting A/D Driver Figure 3. 4096 Point FFT Response 0 VS = ±5V AV = –1 1k –20 fSAMPLE = 10Msps 5V fIN = 1.394MHz 5V SFDR = 90dB B)–40 1k d VIN – E ( 2VP-P 49.9Ω LTC1420 12 BITS UD–60 LT1809 +AIN PGA GAIN = 1 •• 10Msps LIT + 470pF –AIN REF = 2.048V • AMP–80 –5V 1809 F04 –100 –5V –120 0 1 2 3 4 5 FREQUENCY (MHz) 1809 F05 Figure 4. Inverting A/D Driver Figure 5. 4096 Point FFT Response 180910fa 19

LT1809/LT1810 TYPICAL APPLICATIONS 0 VS = 5V AV = +2 –20 fSAMPLE = 10Msps 5V fIN = 1.394MHz SFDR = 80dB 5V B)–40 ON 2.51VV VPDI-CNP 3 + 7 6 49.9Ω 1 LTC1420 12 BITS TUDE (d–60 LT1809 +AIN PGA GAIN = 2 •• 10Msps PLI 2 – 4 1 470pF 2 –AINVRCEMF = 4.096V • AM–80 1k 3 1809 F06 –100 1μF 1k –120 0 1 2 3 4 5 0.15μF FREQUENCY (MHz) 1809 F07 Figure 6. Single Supply A/D Driver Figure 7. 4096 Point FFT Response 5 5V VS = 5V 4 C1 R1 3 VIN RT33μ+F 5Rk2 3 +LT18079 6 10C030μF 7R55Ω COA7X5 CΩABLE VOUT GAIN (dB) 021 75Ω 5k 2 – + RLOAD AGE –1 4 75Ω T R4 L 1k VO –2 1809 F08 –3 R3 C4 1k 3pF –4 + C2 –5 150μF 0.2 1 10 100 FREQUENCY (MHz) 1809 F09 Figure 8. 5V Single Supply Video Line Driver Figure 9. Video Line Driver Frequency Response Single Supply Video Line Driver The LT1809 is a wideband rail-to-rail op amp with a large resistor, R5. The back termination will eliminate any re- output current that allows it to drive video signals in low fl ection of the signal that comes from the load. The input supply applications. Figure 8 depicts a single supply termination resistor, R, is optional—it is used only if T video line driver with AC coupling to minimize the qui- matching of the incoming line is necessary. The values of escent power dissipation. Resistors R1 and R2 are used C1, C2 and C3 are selected to minimize the droop of the to level-shift the input and output to provide the largest luminance signal. In some less stringent requirements, the signal swing. A gain of 2 is set up with R3 and R4 to re- value of capacitors could be reduced. The –3dB bandwidth store the signal at V , which is attenuated by 6dB due of the driver is about 95MHz on 5V supply and the amount OUT to the matching of the 75Ω line with the back-terminated of peaking will vary upon the value of capacitor C4. 180910fa 20

LT1809/LT1810 PACKAGE DESCRIPTION MS8 Package 8-Lead Plastic MSOP (Reference LTC DWG # 05-08-1660 Rev F) 0.889 ± 0.127 (.035 ± .005) 5.23 3.20 – 3.45 (.206) (.126 – .136) MIN 3.00 ± 0.102 0.42 ± 0.038 0.65 (.118 ± .004) 0.52 (.0165 ± .0015) (.0256) (NOTE 3) 8 7 6 5 (.0205) TYP BSC REF RECOMMENDED SOLDER PAD LAYOUT 4.90 ± 0.152 3.00 ± 0.102 0.254 DETAIL “A” (.193 ± .006) (.118 ± .004) (NOTE 4) (.010) 0° – 6° TYP GAUGE PLANE 1 2 3 4 0.53 ± 0.152 (.021 ± .006) 1.10 0.86 (.043) (.034) DETAIL “A” MAX REF 0.18 (.007) SEATING PLANE 0.22 – 0.38 0.1016 ± 0.0508 (.009 – .015) (.004 ± .002) TYP 0.65 MSOP (MS8) 0307 REV F (.0256) NOTE: BSC 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 180910fa 21

LT1809/LT1810 PACKAGE DESCRIPTION S6 Package 6-Lead Plastic TSOT-23 (Reference LTC DWG # 05-08-1636 Rev B) 2.90 BSC 0.62 0.95 (NOTE 4) MAX REF 1.22 REF 1.50 – 1.75 3.85 MAX 2.62 REF 1.4 MIN 2.80 BSC (NOTE 4) PIN ONE ID RECOMMENDED SOLDER PAD LAYOUT 0.30 – 0.45 0.95 BSC PER IPC CALCULATOR 6 PLCS (NOTE 3) 0.80 – 0.90 0.20 BSC 0.01 – 0.10 1.00 MAX DATUM ‘A’ 0.30 – 0.50 REF 1.90 BSC 0.09 – 0.20 (NOTE 3) S6 TSOT-23 0302 REV B NOTE: 1. DIMENSIONS ARE IN MILLIMETERS 2. DRAWING NOT TO SCALE 3. DIMENSIONS ARE INCLUSIVE OF PLATING 4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR 5. MOLD FLASH SHALL NOT EXCEED 0.254mm 6. JEDEC PACKAGE REFERENCE IS MO-193 180910fa 22

LT1809/LT1810 PACKAGE DESCRIPTION S8 Package 8-Lead Plastic Small Outline (Narrow .150 Inch) (Reference LTC DWG # 05-08-1610) .189 – .197 .045 ±.005 (4.801 – 5.004) .050 BSC NOTE 3 8 7 6 5 .245 MIN .160 ±.005 .150 – .157 .228 – .244 (3.810 – 3.988) (5.791 – 6.197) NOTE 3 .030 ±.005 TYP 1 2 3 4 RECOMMENDED SOLDER PAD LAYOUT .010 – .020 × 45° .053 – .069 (0.254 – 0.508) (1.346 – 1.752) .004 – .010 .008 – .010 (0.203 – 0.254) 0°– 8° TYP (0.101 – 0.254) .016 – .050 .014 – .019 .050 (0.406 – 1.270) (0.355 – 0.483) (1.270) NOTE: INCHES TYP BSC 1. DIMENSIONS IN (MILLIMETERS) 2. DRAWING NOT TO SCALE 3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm) SO8 0303 180910fa Information furnished by Linear Technology Corporation is believed to be accurate and reliable. 23 However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

LT1809/LT1810 TYPICAL APPLICATION Single 3V Supply, 4MHz, 4th Order Butterworth Filter Benefi ting from a low voltage supply operation, low dis- in Figure 10. On a 3V supply, the fi lter has a passband of tortion and rail-to-rail output of LT1809, a low distortion 4MHz with 2.5V signal and a stopband that is greater P-P fi lter that is suitable for antialiasing can be built as shown than 70dB to frequency of 100MHz. 232Ω 274Ω 47pF 22pF 232Ω 665Ω VIN – 274Ω 562Ω 220pF 1/2 LT1810 – + 470pF 1/2 LT1810 VOUT + VS 2 1809 F10 Figure 10. Single 3V Supply, 4MHz, 4th Order Butterworth Filter 10 0 –10 –20 B) –30 d N ( –40 AI G –50 –60 –70 –80 VS = 3V, 0V VIN = 2.5VP-P –90 10k 100k 1M 10M 100M FREQUENCY (Hz) 1809 F11 Figure 11. Filter Frequency Response RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LT1395 400MHz Current Feedback Amplifi er 800V/μs Slew Rate, Shutdown LT1632/LT1633 Dual/Quad 45MHz, 45V/μs Rail-to-Rail Input and Output Op Amps High DC Accuracy, 1.35mV V , 70mA Output Current, OS(MAX) Max Supply Current 5.2mA per Amplifi er LT1630/LT1631 Dual/Quad 30MHz, 10V/μs Rail-to-Rail Input and Output Op Amps High DC Accuracy, 525μV V , 70mA Output Current, OS(MAX) Max Supply Current 4.4mA per Amplifi er LT1806/LT1807 Single/Dual 325MHz, 140V/μs Rail-to-Rail Input and Output Op Amps High DC Accuracy, 550μV V , Low Noise 3.5nV/√Hz, OS(MAX) Low Distortion –80dBc at 5MHz 180910fa 24 Linear Technology Corporation LT 0709 REV A • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com © LINEAR TECHNOLOGY CORPORATION 2000