ICGOO在线商城 > 集成电路(IC) > PMIC - 稳压器 - 线性 > LT1764ET#PBF
数量阶梯 | 香港交货 | 国内含税 |
+xxxx | $xxxx | ¥xxxx |
查看当月历史价格
查看今年历史价格
LT1764ET#PBF产品简介:
ICGOO电子元器件商城为您提供LT1764ET#PBF由LINEAR TECHNOLOGY设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 LT1764ET#PBF价格参考。LINEAR TECHNOLOGYLT1764ET#PBF封装/规格:PMIC - 稳压器 - 线性, Linear Voltage Regulator IC Positive Adjustable 1 Output 1.21 V ~ 20 V 3A TO-220-5。您可以下载LT1764ET#PBF参考资料、Datasheet数据手册功能说明书,资料中有LT1764ET#PBF 详细功能的应用电路图电压和使用方法及教程。
参数 | 数值 |
产品目录 | 集成电路 (IC) |
描述 | IC REG LDO ADJ 3A TO220-5 |
产品分类 | |
品牌 | Linear Technology |
数据手册 | http://www.linear.com/docs/3538 |
产品图片 | |
产品型号 | LT1764ET#PBF |
rohs | 无铅 / 符合限制有害物质指令(RoHS)规范要求 |
产品系列 | - |
产品培训模块 | http://www.digikey.cn/PTM/IndividualPTM.page?site=cn&lang=zhs&ptm=20573 |
供应商器件封装 | TO-220-5 |
其它名称 | LT1764ETPBF |
包装 | 管件 |
安装类型 | 通孔 |
封装/外壳 | TO-220-5 成形引线 |
工作温度 | -40°C ~ 125°C |
标准包装 | 50 |
电压-跌落(典型值) | 0.34V @ 3A |
电压-输入 | 2.7 V ~ 20 V |
电压-输出 | 1.21 V ~ 20 V |
电流-输出 | 3A |
电流-限制(最小值) | 3.1A |
稳压器拓扑 | 正,可调式 |
稳压器数 | 1 |
LT1764 Series 3A, Fast Transient Response, Low Noise, LDO Regulators FEATURES DESCRIPTIOU ■ Optimized for Fast Transient Response The LT®1764 is a low dropout regulator optimized for fast ■ Output Current: 3A transient response. The device is capable of supplying 3A ■ Dropout Voltage: 340mV at 3A of output current with a dropout voltage of 340mV. Oper- ■ Low Noise: 40µVRMS (10Hz to 100kHz) ating quiescent current is 1mA, dropping to <1µA in ■ 1mA Quiescent Current shutdown. Quiescent current is well controlled; it does not ■ Wide Input Voltage Range: 2.7V to 20V rise in dropout as it does with many other regulators. In ■ No Protection Diodes Needed addition to fast transient response, the LT1764 has very ■ Controlled Quiescent Current in Dropout low output voltage noise which makes the device ideal for ■ Fixed Output Voltages: 1.5V, 1.8V, 2.5V, 3.3V sensitive RF supply applications. ■ Adjustable Output from 1.21V to 20V Output voltage range is from 1.21V to 20V. The LT1764 ■ <1µA Quiescent Current in Shutdown regulators are stable with output capacitors as low as 10µF. ■ Stable with 10µF Output Capacitor Internal protection circuitry includes reverse battery pro- ■ Reverse Battery Protection tection, current limiting, thermal limiting and reverse cur- ■ No Reverse Current rent protection. The device is available in fixed output ■ Thermal Limiting voltages of 1.5V, 1.8V, 2.5V, 3.3V and as an adjustable ■ Available in 5-Lead TO-220, DD and 16-Lead device with a 1.21V reference voltage. The LT1764 regu- TSSOP Packages lators are available in 5-lead TO-220, DD and Exposed Pad APPLICATIOU S 16-lead TSSOP packages. , LTC and LT are registered trademarks of Linear Technology Corporation. ■ 3.3V to 2.5V Logic Power Supply All other trademarks are the property of their respective owners. Protected by U.S. Patents, including 6144250, 6118263. ■ Post Regulator for Switching Supplies TYPICAL APPLICATIOU Dropout Voltage 400 3.3VIN to 2.5VOUT Regulator 350 V)300 m + IN OUT + 23.A5V AGE (250 T VIN > 3V 10µF 10µF OL200 LT1764-2.5 V T OU150 SHDN SENSE OP GND DR100 1764 TA01 50 0 0 0.5 1.0 1.5 2.0 2.5 3.0 LOAD CURRENT (A) 1764 TA02 1764fb 1
LT1764 Series ABSOLUTE WMAXIWMUWM RATINUGS (Note 1) IN Pin Voltage........................................................±20V SHDN Pin Voltage................................................. ±20V OUT Pin Voltage ....................................................±20V Output Short-Circuit Duration......................... Indefinite Input to Output Differential Voltage (Note 12) .......±20V Operating Junction Temperature Range –40°C to 125°C SENSE Pin Voltage ............................................... ±20V Storage Temperature Range................. –65°C to 150°C ADJ Pin Voltage...................................................... ±7V Lead Temperature (Soldering, 10 sec)..................300°C PACKAGE/ORDER IUNFORWMATIOUN TOP VIEW GND 1 16 GND FRONT VIEW FRONT VIEW SENSE/ NC 2 15 NC 5 SENSE/ADJ* 5 ADJ* OUT 3 14 IN 4 OUT 4 OUT OUT 4 13 IN TAB IS 3 GND 3 GND 17 GND OUT 5 12 IN 2 IN 2 IN SENSE/ADJ* 6 11 NC 1 SHDN 1 SHDN GND 7 10 SHDN Q PACKAGE TAB IS T PACKAGE 5-LEAD PLASTIC DD GND 5-LEAD PLASTIC TO-220 GND 8 9 GND *PIN 5= SENSE FOR LT1764-1.5/LT1764-1.8/ *PIN 5= SENSE FOR LT1764-1.5/LT1764-1.8/ 16-LEAFDE PPLAACSKTAIGCE TSSOP LT1764-2.5/LT1764-3.3 LT1764-2.5/LT1764-3.3 EXPOSED PAD (PIN 17) IS GND. MUST BE = ADJ FOR LT1764 = ADJ FOR LT1764 SOLDERED TO THE PCB. *PIN 6= SENSE FOR LT1764-1.5/ TJMAX = 150°C, θJA = 30°C/W TJMAX = 150°C, θJA = 50°C/W LT1764-1.8/LT1764-2.5/ LT1764-3.3 = ADJ FOR LT1764 TJMAX = 150°C, θJA = 38°C/W ORDER PART NUMBER ORDER PART NUMBER ORDER PART FE PART NUMBER MARKING LT1764EQ LT1764ET LT1764EFE 1764EFE LT1764EQ-1.5 LT1764ET-1.5 LT1764EFE-1.5 1764EFE15 LT1764EQ-1.8 LT1764ET-1.8 LT1764EFE-1.8 1764EFE18 LT1764EQ-2.5 LT1764ET-2.5 LT1764EFE-2.5 1764EFE25 LT1764EQ-3.3 LT1764ET-3.3 LT1764EFE-3.3 1764EFE33 Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/ Consult LTC Marketing for parts specified with wider operating temperature ranges. 1764fb 2
LT1764 Series ELECTRICAL CHARACTERISTICS The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25°C. (Note 2) PARAMETER CONDITIONS MIN TYP MAX UNITS Minimum Input Voltage I = 0.5A 1.7 V LOAD (Notes 3, 11) I = 1.5A 1.9 V LOAD ILOAD = 2.7A, 110°C < TJ ≤ 125°C 2.3 2.7 V ILOAD = 3A, –40°C ≤ TJ ≤ 110°C 2.3 2.7 V Regulated Output Voltage LT1764-1.5 V = 2.21V, I = 1mA 1.477 1.500 1.523 V IN LOAD (Note 4) 2.7V < VIN < 20V, 1mA < ILOAD < 3A, –40°C ≤ TJ ≤ 110°C 1.447 1.500 1.545 V 2.7V < VIN < 20V, 1mA < ILOAD < 2.7A, 110°C < TJ ≤ 125°C 1.447 1.500 1.545 V LT1764-1.8 V = 2.3V, I = 1mA 1.773 1.800 1.827 V IN LOAD 2.8V < VIN < 20V, 1mA < ILOAD < 3A, –40°C ≤ TJ ≤ 110°C 1.737 1.800 1.854 V 2.8V < VIN < 20V, 1mA < ILOAD < 2.7A, 110°C < TJ ≤ 125°C 1.737 1.800 1.854 V LT1764-2.5 V = 3V, I = 1mA 2.462 2.500 2.538 V IN LOAD 3.5V < VIN < 20V, 1mA < ILOAD < 3A, –40°C ≤ TJ ≤ 110°C 2.412 2.500 2.575 V 3.5V < VIN < 20V, 1mA < ILOAD < 2.7A, 110°C < TJ ≤ 125°C 2.412 2.500 2.575 V LT1764-3.3 V = 3.8V, I = 1mA 3.250 3.300 3.350 V IN LOAD 4.3V < VIN < 20V, 1mA < ILOAD < 3A, –40°C ≤ TJ ≤ 110°C 3.183 3.300 3.400 V 4.3V < VIN < 20V, 1mA < ILOAD < 2.7A, 110°C < TJ ≤ 125°C 3.183 3.300 3.400 V ADJ Pin Voltage LT1764 V = 2.21V, I = 1mA 1.192 1.210 1.228 V IN LOAD (Notes 3, 4) 2.7V < VIN < 20V, 1mA < ILOAD < 3A, –40°C ≤ TJ ≤ 110°C 1.168 1.210 1.246 V 2.7V < VIN < 20V, 1mA < ILOAD < 2.7A, 110°C < TJ ≤ 125°C 1.168 1.210 1.246 V Line Regulation LT1764-1.5 ∆VIN = 2.21V to 20V, ILOAD = 1mA ● 2.5 10 mV LT1764-1.8 ∆VIN = 2.3V to 20V, ILOAD = 1mA ● 3 10 mV LT1764-2.5 ∆VIN = 3V to 20V, ILOAD = 1mA ● 4 10 mV LT1764-3.3 ∆VIN = 3.8V to 20V, ILOAD = 1mA ● 4.5 10 mV LT1764 (Note 3) ∆VIN = 2.21V to 20V, ILOAD = 1mA ● 2 10 mV Load Regulation LT1764-1.5 VIN = 2.7V, ∆ILOAD = 1mA to 3A 3 7 mV VIN = 2.7V, ∆ILOAD = 1mA to 3A, –40°C ≤ TJ ≤ 110°C 23 mV VIN = 2.7V, ∆ILOAD = 1mA to 2.7A, 110°C < TJ ≤ 125°C 23 mV LT1764-1.8 VIN = 2.8V, ∆ILOAD = 1mA to 3A 4 8 mV VIN = 2.8V, ∆ILOAD = 1mA to 3A, –40°C ≤ TJ ≤ 110°C 25 mV VIN = 2.8V, ∆ILOAD = 1mA to 2.7A, 110°C < TJ ≤ 125°C 25 mV LT1764-2.5 VIN = 3.5V, ∆ILOAD = 1mA to 3A 4 10 mV VIN = 3.5V, ∆ILOAD = 1mA to 3A, –40°C ≤ TJ ≤ 110°C 30 mV VIN = 3.5V, ∆ILOAD = 1mA to 2.7A, 110°C < TJ ≤ 125°C 30 mV LT1764-3.3 VIN = 4.3V, ∆ILOAD = 1mA to 3A 4 12 mV VIN = 4.3V, ∆ILOAD = 1mA to 3A, –40°C ≤ TJ ≤ 110°C 40 mV VIN = 4.3V, ∆ILOAD = 1mA to 2.7A, 110°C < TJ ≤ 125°C 40 mV LT1764 (Note 3) VIN = 2.7V, ∆ILOAD = 1mA to 3A 2 5 mV VIN = 2.7V, ∆ILOAD = 1mA to 3A, –40°C ≤ TJ ≤ 110°C 20 mV VIN = 2.7V, ∆ILOAD = 1mA to 2.7A, 110°C < TJ ≤ 125°C 20 mV Dropout Voltage I = 1mA 0.02 0.05 V LOAD V = V I = 1mA ● 0.10 V IN OUT(NOMINAL) LOAD (Notes 5, 6, 11) I = 100mA 0.07 0.13 V LOAD I = 100mA ● 0.18 V LOAD I = 500mA 0.14 0.20 V LOAD I = 500mA ● 0.27 V LOAD I = 1.5A 0.25 0.33 V LOAD I = 1.5A ● 0.40 V LOAD ILOAD = 2.7A, 110°C < TJ ≤ 125°C 0.66 V I = 3A 0.34 0.45 V LOAD ILOAD = 3A, –40°C ≤ TJ ≤ 110°C 0.66 V 1764fb 3
LT1764 Series ELECTRICAL CHARACTERISTICS The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25°C. (Note 2) PARAMETER CONDITIONS MIN TYP MAX UNITS GND Pin Current I = 0mA ● 1 1.5 mA LOAD V = V + 1V I = 1mA ● 1.1 1.6 mA IN OUT(NOMINAL) LOAD (Notes 5, 7) I = 100mA ● 3.5 5 mA LOAD I = 500mA ● 11 18 mA LOAD I = 1.5A ● 40 75 mA LOAD ILOAD = 2.7A, 110°C < TJ ≤ 125°C 120 200 mA ILOAD = 3A, –40°C ≤ TJ ≤ 110°C 120 200 mA Output Voltage Noise COUT = 10µF, ILOAD = 3A, BW = 10Hz to 100kHz 40 µVRMS ADJ Pin Bias Current (Notes 3, 8) 3 10 µA Shutdown Threshold V = Off to On ● 0.9 2 V OUT V = On to Off ● 0.25 0.75 V OUT SHDN Pin Current VSHDN = 0V 0.01 1 µA (Note 9) VSHDN = 20V 7 30 µA Quiescent Current in Shutdown VIN = 6V, VSHDN = 0V 0.01 1 µA Ripple Rejection V – V = 1.5V (Avg), V = 0.5V , 55 63 dB IN OUT RIPPLE P-P f = 120Hz, I = 1.5A RIPPLE LOAD Current Limit V = 7V, V = 0V 4 A IN OUT LT1764-1.8, LT1764-2.5, LT1764-3.3 VIN = VOUT(NOMINAL) + 1V, ∆VOUT = –0.1V, –40°C ≤ TJ ≤ 110°C 3.1 A VIN = VOUT(NOMINAL) + 1V, ∆VOUT = –0.1V, 110°C < TJ ≤ 125°C 2.8 A LT1764, LT1764-1.5 VIN = 2.7V, ∆VOUT = –0.1V, –40°C ≤ TJ ≤ 110°C 3.1 A VIN = 2.7V, ∆VOUT = –0.1V, 110°C < TJ ≤ 125°C 2.8 A Input Reverse Leakage Current V = –20V, V = 0V ● 1 mA IN OUT Reverse Output Current (Note 10) LT1764-1.5 VOUT = 1.5V, VIN < 1.5V 600 1200 µA LT1764-1.8 VOUT = 1.8V, VIN < 1.8V 600 1200 µA LT1764-2.5 VOUT = 2.5V, VIN < 2.5V 600 1200 µA LT1764-3.3 VOUT = 3.3V, VIN < 3.3V 600 1200 µA LT1764 (Note 3) VOUT = 1.21V, VIN < 1.21V 300 600 µA Note 1: Stresses beyond those listed under Absolute Maximum Ratings Note 6: Dropout voltage is the minimum input to output voltage differential may cause permanent damage to the device. Exposure to any Absolute needed to maintain regulation at a specified output current. In dropout, the Maximum Rating condition for extended periods may affect device output voltage will be equal to: V – V . IN DROPOUT reliability and lifetime. Note 7: GND pin current is tested with V = V + 1V or IN OUT(NOMINAL) Note 2: The LT1764 regulators are tested and specified under pulse load V = 2.7V (whichever is greater) and a current source load. The GND pin IN conditions such that TJ ≈ TA. The LT1764 is 100% tested at TA = 25°C. current will decrease at higher input voltages. Performance at –40°C and 125°C is assured by design, characterization Note 8: ADJ pin bias current flows into the ADJ pin. and correlation with statistical process controls. Note 9: SHDN pin current flows into the SHDN pin. Note 3: The LT1764 (adjustable version) is tested and specified for these Note 10: Reverse output current is tested with the IN pin grounded and the conditions with the ADJ pin connected to the OUT pin. OUT pin forced to the rated output voltage. This current flows into the OUT Note 4. Operating conditions are limited by maximum junction pin and out the GND pin. temperature. The regulated output voltage specification will not apply for Note 11. For the LT1764, LT1764-1.5 and LT1764-1.8 dropout voltage will all possible combinations of input voltage and output current. When be limited by the minimum input voltage specification under some output operating at maximum input voltage, the output current range must be voltage/load conditions. limited. When operating at maximum output current, the input voltage Note 12. All combinations of absolute maximum input voltage and range must be limited. absolute maximum output voltage cannot be achieved. The absolute Note 5: To satisfy requirements for minimum input voltage, the LT1764 maximum differential from input to output is ±20V. For example, with (adjustable version) is tested and specified for these conditions with an V = 20V, V cannot be pulled below ground. IN OUT external resistor divider (two 4.12k resistors) for an output voltage of 2.42V. The external resistor divider will add a 300µA DC load on the output. 1764fb 4
LT1764 Series TYPICAL PERFORW AU CE CHARACTERISTICS Typical Dropout Voltage Guaranteed Dropout Voltage Dropout Voltage 600 700 600 = TEST POINTS V) 500 E (m 600 500 mV) TAG 500 mV) UT VOLTAGE ( 340000 TJ = 125°C DROPOUT VOL 430000 TJ ≤ 125°C UT VOLTAGE ( 340000 IL = 3AIL = 1.5A DROPO 200 TJ = 25°C NTEED 200 TJ ≤ 25°C DROPO 200 IL = 0.5A A 100 AR 100 100 IL = 100mA U G IL = 1mA 0 0 0 0 0.5 1.0 1.5 2.0 2.5 3.0 0 0.5 1.0 1.5 2.0 2.5 3.0 –50 –25 0 25 50 75 100 125 OUTPUT CURRENT (A) OUTPUT CURRENT (A) TEMPERATURE (°C) 1764 G01 1764 G02 1764 G03 Quiescent Current LT1764-1.8 Output Voltage LT1764-2.5 Output Voltage 1.4 1.84 2.58 IL = 1mA IL = 1mA 1.2 LT1764-1.8/2.5/3.3 1.83 2.56 URRENT (mA) 01..80 LT1764 OLTAGE (V)111...888210 OLTAGE (V)222...555420 QUIESCENT C 00..64 VIN = 6V OUTPUT V11..7798 OUTPUT V22..4486 0.2 RL = ∞ IL = 0 1.77 2.44 VSHDN = VIN 0 1.76 2.42 –50 –25 0 25 50 75 100 125 –50 –25 0 25 50 75 100 125 –50 –25 0 25 50 75 100 125 TEMPERATURE (°C) TEMPERATURE (°C) TEMPERATURE (°C) 1764 G04 1756 G05 1756 G06 LT1764-3.3 Output Voltage LT1764 ADJ Pin Voltage LT1764-1.8 Quiescent Current 3.38 1.230 40 IL = 1mA IL = 1mA TJ = 25°C 3.36 1.225 35 RL = ∞ VSHDN = VIN OUTPUT VOLTAGE (V)33333.....3332242086 ADJ PIN VOLTAGE (V)11111.....222222110005050 UIESCENT CURRENT (mA) 3221105050 Q 3.24 1.195 5 3.22 1.190 0 –50 –25 0 25 50 75 100 125 –50 –25 0 25 50 75 100 125 0 1 2 3 4 5 6 7 8 9 10 TEMPERATURE (°C) TEMPERATURE (°C) INPUT VOLTAGE (V) 1756 G07 1756 G08 1764 G09 1764fb 5
LT1764 Series TYPICAL PERFORW AU CE CHARACTERISTICS LT1764-2.5 Quiescent Current LT1764-3.3 Quiescent Current LT1764 Quiescent Current 40 40 1.6 TJ = 25°C TJ = 25°C TJ = 25°C 35 RL = ∞ 35 RL = ∞ 1.4 RL = 4.3k VSHDN = VIN VSHDN = VIN VSHDN = VIN A) 30 A) 30 A) 1.2 m m m T ( T ( T ( N 25 N 25 N 1.0 E E E R R R R R R U 20 U 20 U 0.8 C C C T T T N N N E 15 E 15 E 0.6 C C C S S S E E E UI 10 UI 10 UI 0.4 Q Q Q 5 5 0.2 0 0 0 0 1 2 3 4 5 6 7 8 9 10 0 1 2 3 4 5 6 7 8 9 10 0 2 4 6 8 10 12 14 16 18 20 INPUT VOLTAGE (V) INPUT VOLTAGE (V) INPUT VOLTAGE (V) 1764 G10 1764 G11 1764 G12 LT1764-1.8 GND Pin Current LT1764-2.5 GND Pin Current LT1764-3.3 GND Pin Current 20.0 40 80 TJ = 25°C TJ = 25°C TJ = 25°C 17.5 VSHDN = VIN 35 VSHDN = VIN 70 VSHDN = VIN *FOR VOUT = 1.8V *FOR VOUT = 2.5V *FOR VOUT = 3.3V A)15.0 A) 30 A) 60 m m m RENT (12.5 ILR =L 5=0 30.m6ΩA* RILL = = 3 60Ω0mA* RENT ( 25 RILL = = 5 50Ω0mA* RENT ( 50 RL = 6.6Ω UR10.0 UR 20 UR 40 IL = 500mA* D PIN C 7.5 D PIN C 15 RILL = = 1 2050ΩmA* RILL = = 3 80.03m3ΩA* D PIN C 30 IRLL = = 3 1010ΩmA* GN 5.0 GN 10 GN 20 RILL = = 1 3030ΩmA* 2.5 RL = 18Ω 5 10 IL = 100mA* 0 0 0 0 1 2 3 4 5 6 7 8 9 10 0 1 2 3 4 5 6 7 8 9 10 0 1 2 3 4 5 6 7 8 9 10 INPUT VOLTAGE (V) INPUT VOLTAGE (V) INPUT VOLTAGE (V) 1764 G13 1764 G14 1764 G15 LT1764 GND Pin Current LT1764-1.8 GND Pin Current LT1764-2.5 GND Pin Current 15 150 200 TJ = 25°C TJ = 25°C TJ = 25°C VSHDN = VIN VSHDN = VIN VSHDN = VIN 12 *FOR VOUT = 1.21V 120 *FOR VOUT = 1.8V 160 *FOR VOUT = 2.5V NT (mA) 9 IRL L= =5 020.4m2AΩ* NT (mA) 90 RILL == 03.A6*Ω NT (mA) 120 RLIL = = 0 3.8A3*Ω E E E RR RL = 4.33Ω RR RR CU IL = 300mA* CU CU N 6 N 60 N 80 GND PI IRL L= =1 0102m.1AΩ* GND PI RILL = = 1 1.5.2AΩ* RILL = = 0 2.7.5A7*Ω GND PI RILL == 11..56A6*Ω RILL = = 0 3.7.5A7*Ω 3 30 40 0 0 0 0 1 2 3 4 5 6 7 8 9 10 0 1 2 3 4 5 6 7 8 9 10 0 1 2 3 4 5 6 7 8 9 10 INPUT VOLTAGE (V) INPUT VOLTAGE (V) INPUT VOLTAGE (V) 1764 G16 1764 G17 1764 G18 1764fb 6
LT1764 Series TYPICAL PERFORW AU CE CHARACTERISTICS LT1764-3.3 GND Pin Current LT1764 GND Pin Current GND Pin Current vs I LOAD 200 150 160 TJ = 25°C TJ = 25°C VIN = VOUT(NOM) + 1V VSHDN = VIN VSHDN = VIN 140 160 *FOR VOUT = 3.3V 120 *FOR VOUT = 1.21V mA) mA) RL = 0.4Ω mA) 120 NT ( 120 RILL == 13.A1*Ω NT ( 90 IL = 3A* NT ( 100 E E E R R R UR UR UR 80 GND PIN C 80 RILL = = 1 2.5.2AΩ* RILL = = 0 4.7.7A1*Ω GND PIN C 60 RILL == 10..58A1*Ω RILL = = 0 1.7.7A3*Ω GND PIN C 4600 40 30 20 0 0 0 0 1 2 3 4 5 6 7 8 9 10 0 1 2 3 4 5 6 7 8 9 10 0 0.5 1.0 1.5 2.0 2.5 3.0 INPUT VOLTAGE (V) INPUT VOLTAGE (V) OUTPUT CURRENT (A) 1764 G19 1764 G20 1764 G21 SHDN Pin Threshold SHDN Pin Threshold (On-to-Off) (Off-to-On) SHDN Pin Input Current 1.0 1.0 10 IL = 1mA 0.9 0.9 9 SHDN PIN THRESHOLD (V) 0000000.......3457286 SHDN PIN THRESHOLD (V) 0000000.......3457286 ILIL = = 1 3mAA HDN PIN INPUT CURRENT (A)µ 6842573 S 0.1 0.1 1 0 0 0 –50 –25 0 25 50 75 100 125 –50 –25 0 25 50 75 100 125 0 2 4 6 8 10 12 14 16 18 20 TEMPERATURE (°C) TEMPERATURE (°C) SHDN PIN VOLTAGE (V) 1764 G22 1764 G23 1764 G24 SHDN Pin Input Current ADJ Pin Bias Current Current Limit 10 4.0 6 VSHDN = 20V 9 3.5 URRENT (A)µ 786 RRENT (A)µ 32..05 MIT (A) 45 TJ = –50°C SHDN PIN INPUT C 3452 ADJ PIN BIAS CU 211...050 CURRENT LI 213 TJ =T 1J2 =5 °2C5°C 1 0.5 0 0 0 –50 –25 0 25 50 75 100 125 –50 –25 0 25 50 75 100 125 0 2 4 6 8 10 12 14 16 18 20 TEMPERATURE (°C) TEMPERATURE (°C) INPUT/OUTPUT DIFFERENTIAL (V) 1764 G25 1756 G26 1764 G27 1764fb 7
LT1764 Series TYPICAL PERFORW AU CE CHARACTERISTICS Current Limit Reverse Output Current 6 5.0 VIN = 7V VOUT = 0V 4.5 5 A) LT1764 m 4.0 T ( LT1764-1.8 T LIMIT (A) 34 UT CURREN 323...055 LLTT11776644--32.3.5 N P RE UT 2.0 TJ = 25°C CUR 2 SE O 1.5 CURRENTV FINL O=W 0VS ER INTO OUTPUT PIN 1 REV 1.0 VOUT = VADJ (LT1764) 0.5 VOUT = VFB (LT1764-1.8/-2.5/-3.3) 0 0 –50 –25 0 25 50 75 100 125 0 1 2 3 4 5 6 7 8 9 10 TEMPERATURE (°C) OUTPUT VOLTAGE (V) 1764 G28 1764 G29 Reverse Output Current Ripple Rejection 1.0 80 VIN = 0V 0.9 VOUT = 1.21V (LT1764) 70 mA) 0.8 VOUT = 1.8V (LT1764-1.8) NT ( 0.7 VVOOUUTT == 23..53VV ((LLTT11776644--23..53)) dB) 60 UTPUT CURRE 000...456 LT1764-1.8/-2.5/-3.3 E REJECTION ( 354000 CTOAC1UNE0TTR ×A=A L11MU0µIM0FCµ +F O L EVERSE 00..32 LT1764 RIPP 20 IL = 1.5A CTOAUNTT =A L1U0µMF R 0.1 10 VIN = VOUT(NOM) + 1V + 50mVRMS RIPPLE 0 0 –50 –25 0 25 50 75 100 125 10 100 1k 10k 100k 1M TEMPERATURE (°C) FREQUENCY (Hz) 1764 G30 1764 G31 Ripple Rejection LT1764 Minimum Input Voltage 75 3.0 IL = 1.5A VIN = VOUT(NOM) + 1V ON (dB) 6750 +A T0 .f5 =V P1-2P0 RHIzPPLE OLTAGE (V) 22..50 IILL == 31A.5A ECTI UT V 1.5 E REJ 60 M INP IL = 500mA IL = 100mA PL U 1.0 P M RI NI 55 MI 0.5 50 0 –50 –25 0 25 50 75 100 125 –50 –25 0 25 50 75 100 125 TEMPERATURE (°C) TEMPERATURE (°C) 1764 G32 1764 G33 1764fb 8
LT1764 Series TYPICAL PERFORW AU CE CHARACTERISTICS Load Regulation Output Noise Spectral Density 10 1 Hz) COUT = 10µF 5 V/√ ILOAD = 3A ON (mV) –05 LT1764 DENSITY (µ TI LT1764-1.8 L LT1764-3.3 LT1764-2.5 LA –10 RA 0.1 U T G LT1764-2.5 C E E R –15 P LOAD –20 ∆IL = 1mA TO 3A LT1764-3.3 NOISE S LT1764 LT1764-1.8 VIN = 2.7V (LT1764) T –25 VIN = VOUT(NOM) + 1V PU (LT1764-1.8/-2.5/-3.3) UT –30 O0.01 –50 –25 0 25 50 75 100 125 10 100 1k 10k 100k TEMPERATURE (°C) FREQUENCY (Hz) 1764 G34 1764 G35 RMS Output Noise vs Load Current LT1764-3.3 10Hz to 100kHz (10Hz to 100kHz) Output Noise 40 COUT = 10µF LT1764-3.3 35 )S 30 LT1764-2.5 M OISE (VµR 2250 LT1764-1.8 10V0DOµUVIVT/ N UT 15 LT1764 P T U O 10 5 COUT = 10µF 1ms/DIV 1764 G37 IL = 3A 0 0.0001 0.001 0.01 0.1 1 10 LOAD CURRENT (A) 1764 G36 LT1764-3.3 Transient Response LT1764-3.3 Transient Response 0.2 0.2 E E LTAGN (V) 0.1 LTAGN (V) 0.1 OO OO OUTPUT VDEVIATI––00..120 CVCIIONNU ==T =43 ..1330µVµF FT TAANNTTAALLUUMM OUTPUT VDEVIATI––00..120 VCCIIONNU ==T =43 .313µ0VF0µF TANTALUM A) 1.00 + 10 × 1µF CERAMIC D CURRENT ( 000...572055 CURRENT (A) 231 LOA 00 2 4 6 8 10 12 14 16 18 20 LOAD 00 2 4 6 8 10 12 14 16 18 20 TIME (µs) TIME (µs) 1764 G38 1764 G39 1764fb 9
LT1764 Series PIU FUU CTIOU S (DD and TO-220/TSSOP) SHDN (Pin 1/Pin 10): Shutdown. The SHDN pin is used to OUT (Pin 4/Pins 3, 4, 5): Output. The output supplies put the LT1764 regulators into a low power shutdown power to the load. A minimum output capacitor of 10µF is state. The output will be off when the SHDN pin is pulled required to prevent oscillations. Larger output capacitors low. The SHDN pin can be driven either by 5V logic or will be required for applications with large transient loads open-collector logic with a pull-up resistor. The pull-up to limit peak voltage transients. See the Applications resistor is required to supply the pull-up current of the Information section for more information on output ca- open-collector gate, normally several microamperes, and pacitance and reverse output characteristics. the SHDN pin current, typically 7µA. If unused, the SHDN SENSE (Pin 5/Pin 6): Sense. For fixed voltage versions of pin must be connected to V . The device will be in the low IN the LT1764 (LT1764-1.8/LT1764-2.5/LT1764-3.3), the power shutdown state if the SHDN pin is not connected. SENSE pin is the input to the error amplifier. Optimum IN (Pin 2/Pins 12, 13, 14): Input. Power is supplied to the regulation will be obtained at the point where the SENSE device through the IN pin. A bypass capacitor is required pin is connected to the OUT pin of the regulator. In critical on this pin if the device is more than six inches away from applications, small voltage drops are caused by the resis- the main input filter capacitor. In general, the output tance (R ) of PC traces between the regulator and the load. P impedance of a battery rises with frequency, so it is These may be eliminated by connecting the SENSE pin to advisable to include a bypass capacitor in battery-pow- the output at the load as shown in Figure 1 (Kelvin Sense ered circuits. A bypass capacitor in the range of 1µF to Connection). Note that the voltage drop across the exter- 10µF is sufficient. The LT1764 regulators are designed to nal PC traces will add to the dropout voltage of the withstand reverse voltages on the IN pin with respect to regulator. The SENSE pin bias current is 600µA at the ground and the OUT pin. In the case of a reverse input, nominal rated output voltage. The SENSE pin can be pulled which can happen if a battery is plugged in backwards, the below ground (as in a dual supply system where the device will act as if there is a diode in series with its input. regulator load is returned to a negative supply) and still There will be no reverse current flow into the regulator and allow the device to start and operate. no reverse voltage will appear at the load. The device will ADJ (Pin 5/Pin 6): Adjust. For the adjustable LT1764, this protect both itself and the load. is the input to the error amplifier. This pin is internally GND (Pin 3/Pins 1, 7, 8, 9, 16, 17): Ground. The exposed clamped to ±7V. It has a bias current of 3µA which flows pad (FE Package) is ground and must be soldered to the into the pin. The ADJ pin voltage is 1.21V referenced to PCB for rated thermal performance. ground and the output voltage range is 1.21V to 20V. 2 4 RP IN OUT LT1764 + 1 5 + VIN SHDN SENSE LOAD GND 3 RP 1764 F01 Figure 1. Kelvin Sense Connection 1764fb 10
LT1764 Series APPLICATIOU S IU FORW ATIOU The LT1764 series are 3A low dropout regulators opti- be proportional to the ratio of the desired output voltage to mized for fast transient response. The devices are capable 1.21V: V /1.21V. For example, load regulation for an OUT of supplying 3A at a dropout voltage of 340mV. The low output current change of 1mA to 3A is –3mV typical at operating quiescent current (1mA) drops to less than 1µA VOUT = 1.21V. At VOUT = 5V, load regulation is: in shutdown. In addition to the low quiescent current, the (5V/1.21V)(–3mV) = –12.4mV LT1764 regulators incorporate several protection features which make them ideal for use in battery-powered sys- Output Capacitance and Transient Response tems. The devices are protected against both reverse input The LT1764 regulators are designed to be stable with a and reverse output voltages. In battery backup applica- wide range of output capacitors. The ESR of the output tions where the output can be held up by a backup battery capacitor affects stability, most notably with small capaci- when the input is pulled to ground, the LT1764-X acts like tors. A minimum output capacitor of 10µF with an ESR in it has a diode in series with its output and prevents reverse the range of 50mΩ to 3Ω is recommended to prevent current flow. Additionally, in dual supply applications oscillations. Larger values of output capacitance can de- where the regulator load is returned to a negative supply, crease the peak deviations and provide improved transi- the output can be pulled below ground by as much as 20V ent response for larger load current changes. Bypass and still allow the device to start and operate. capacitors, used to decouple individual components pow- ered by the LT1764-X, will increase the effective output Adjustable Operation capacitor value. The adjustable version of the LT1764 has an output Extra consideration must be given to the use of ceramic voltage range of 1.21V to 20V. The output voltage is set by capacitors. Ceramic capacitors are manufactured with a the ratio of two external resistors as shown in Figure 2. The variety of dielectrics, each with different behavior across device servos the output to maintain the voltage at the ADJ temperature and applied voltage. The most common di- pin at 1.21V referenced to ground. The current in R1 is electrics used are specified with EIA temperature charac- then equal to 1.21V/R1 and the current in R2 is the current teristic codes of Z5U, Y5V, X5R and X7R. The Z5U and Y5V in R1 plus the ADJ pin bias current. The ADJ pin bias dielectrics are good for providing high capacitances in a current, 3µA at 25°C, flows through R2 into the ADJ pin. small package, but they tend to have strong voltage and The output voltage can be calculated using the formula in temperature coefficients as shown in Figures 3 and 4. Figure 2. The value of R1 should be less than 4.17k to When used with a 5V regulator, a 16V 10µF Y5V capacitor minimize errors in the output voltage caused by the ADJ can exhibit an effective value as low as 1µF to 2µF for the pin bias current. Note that in shutdown the output is turned DC bias voltage applied and over the operating tempera- off and the divider current will be zero. ture range. The X5R and X7R dielectrics result in more The adjustable device is tested and specified with the ADJ stable characteristics and are more suitable for use as the pin tied to the OUT pin for an output voltage of 1.21V. output capacitor. The X7R type has better stability across Specifications for output voltages greater than 1.21V will temperature, while the X5R is less expensive and is available in higher values. Care still must be exercised when using X5R and X7R capacitors; the X5R and X7R IN OUT VOUT codes only specify operating temperature range and maxi- + VIN LT1764 R2 VOUT=1.21V⎛⎜1+R2⎞⎟+(IADJ)(R2) mchuamng cea dpuacei ttaon DceC c bhiaansg we iothv eXr 5teRm apnedr aXtu7rRe .c Caappaaccitiotarsn cise ADJ ⎝ R1⎠ GND R1 VADJ=1.21V better than Y5V and Z5U capacitors, but can still be IADJ=3µA AT 25°C significant enough to drop capacitor values below appro- 1764 F02 OUTPUT RANGE = 1.21V TO 20V priate levels. Capacitor DC bias characteristics tend to improve as component case size increases, but expected Figure 2. Adjustable Operation capacitance at operating voltage should be verified. 1764fb 11
LT1764 Series APPLICATIOU S IU FORW ATIOU 20 The protection is designed to provide some output current BOTH CAPACITORS ARE 16V, 1210 CASE SIZE, 10µF at all values of input-to-output voltage up to the device 0 breakdown. %) X5R E (–20 When power is first turned on, as the input voltage rises, U L VA the output follows the input, allowing the regulator to start N –40 E I up into very heavy loads. During the start-up, as the input G N HA–60 voltage is rising, the input-to-output voltage differential is C Y5V small, allowing the regulator to supply large output cur- –80 rents. With a high input voltage, a problem can occur –100 wherein removal of an output short will not allow the 0 2 4 6 8 10 12 14 16 DC BIAS VOLTAGE (V) output voltage to recover. Other regulators, such as the 1764 F03 LT1085, also exhibit this phenomenon, so it is not unique Figure 3. Ceramic Capacitor DC Bias Characteristics to the LT1764 series. The problem occurs with a heavy output load when the 40 input voltage is high and the output voltage is low. Com- mon situations are immediately after the removal of a 20 short circuit or when the SHDN pin is pulled high after the %) 0 X5R input voltage has already been turned on. The load line for E ( U L –20 such a load may intersect the output current curve at two A V N points. If this happens, there are two stable output oper- NGE I –40 Y5V ating points for the regulator. With this double intersec- A H –60 C tion, the input power supply may need to be cycled down –80 BOTH CAPACITORS ARE 16V, to zero and brought up again to make the output recover. 1210 CASE SIZE, 10µF –100 –50 –25 0 25 50 75 100 125 Output Voltage Noise TEMPERATURE (°C) The LT1764 regulators have been designed to provide low 1764 F04 output voltage noise over the 10Hz to 100kHz bandwidth Figure 4. Ceramic Capacitor Temperature Characteristics while operating at full load. Output voltage noise is typi- cally 50nV√Hz over this frequency bandwidth for the Voltage and temperature coefficients are not the only LT1764 (adjustable version). For higher output voltages sources of problems. Some ceramic capacitors have a (generated by using a resistor divider), the output voltage piezoelectric response. A piezoelectric device generates noise will be gained up accordingly. This results in RMS voltage across its terminals due to mechanical stress, noise over the 10Hz to 100kHz bandwidth of 15µV for similar to the way a piezoelectric accelerometer or micro- RMS the LT1764 increasing to 37µV for the LT1764-3.3. phone works. For a ceramic capacitor the stress can be RMS induced by vibrations in the system or thermal transients. Higher values of output voltage noise may be measured when care is not exercised with regards to circuit layout Overload Recovery and testing. Crosstalk from nearby traces can induce Like many IC power regulators, the LT1764-X has safe unwanted noise onto the output of the LT1764-X. Power operating area protection. The safe area protection de- supply ripple rejection must also be considered; the LT1764 creases the current limit as input-to-output voltage in- regulators do not have unlimited power supply rejection creases and keeps the power transistor inside a safe and will pass a small portion of the input noise through to operating region for all values of input-to-output voltage. the output. 1764fb 12
LT1764 Series APPLICATIOUNS INUFORWMATIOUN Thermal Considerations Table 2. FE Package, 16-Lead TSSOP COPPER AREA THERMAL RESISTANCE The power handling capability of the device is limited TOPSIDE* BACKSIDE BOARD AREA (JUNCTION-TO-AMBIENT) by the maximum rated junction temperature (125°C). 2500mm2 2500mm2 2500mm2 38°C/W The power dissipated by the device is made up of two 1000mm2 2500mm2 2500mm2 43°C/W components: 225mm2 2500mm2 2500mm2 48°C/W 1. Output current multiplied by the input/output voltage 100mm2 2500mm2 2500mm2 60°C/W differential: (I )(V – V ), and OUT IN OUT * Device is mounted on topside 2. GND pin current multiplied by the input voltage: T Package, 5-Lead TO-220 (IGND)(VIN). Thermal Resistance (Junction-to-Case) = 2.5°C/W The GND pin current can be found using the GND Pin Calculating Junction Temperature Current curves in the Typical Performance Characteris- tics. Power dissipation will be equal to the sum of the two Example: Given an output voltage of 3.3V, an input voltage components listed above. range of 4V to 6V, an output current range of 0mA to 500mA and a maximum ambient temperature of 50°C, The LT1764 series regulators have internal thermal limit- what will the maximum junction temperature be? ing designed to protect the device during overload condi- tions. For continuous normal conditions, the maximum The power dissipated by the device will be equal to: junction temperature rating of 125°C must not be I (V – V ) + I (V ) OUT(MAX) IN(MAX) OUT GND IN(MAX) exceeded. It is important to give careful consideration to all sources of thermal resistance from junction to ambient. where, Additional heat sources mounted nearby must also be I = 500mA OUT(MAX) considered. V = 6V IN(MAX) For surface mount devices, heat sinking is accomplished IGND at (IOUT = 500mA, VIN = 6V) = 10mA by using the heat spreading capabilities of the PC board So, and its copper traces. Surface mount heatsinks and plated P = 500mA(6V – 3.3V) + 10mA(6V) = 1.41W through-holes can also be used to spread the heat gener- Using a DD package, the thermal resistance will be in the ated by power devices. range of 23°C/W to 33°C/W depending on the copper The following tables list thermal resistance for several area. So the junction temperature rise above ambient will different board sizes and copper areas. All measurements be approximately equal to: were taken in still air on 1/16" FR-4 board with one ounce copper. 1.41W(28°C/W) = 39.5°C The maximum junction temperature will then be equal to Table 1. Q Package, 5-Lead DD the maximum junction temperature rise above ambient COPPER AREA THERMAL RESISTANCE plus the maximum ambient temperature or: TOPSIDE* BACKSIDE BOARD AREA (JUNCTION-TO-AMBIENT) 2500mm2 2500mm2 2500mm2 23°C/W TJMAX = 50°C + 39.5°C = 89.5°C 1000mm2 2500mm2 2500mm2 25°C/W 125mm2 2500mm2 2500mm2 33°C/W * Device is mounted on topside 1764fb 13
LT1764 Series APPLICATIOUNS INUFORWMATIOUN Protection Features The ADJ pin of the adjustable device can be pulled above or below ground by as much as 7V without damaging the The LT1764 regulators incorporate several protection device. If the input is left open circuit or grounded, the ADJ features which make them ideal for use in battery-powered pin will act like an open circuit when pulled below ground circuits. In addition to the normal protection features and like a large resistor (typically 5k) in series with a diode associated with monolithic regulators, such as current when pulled above ground. limiting and thermal limiting, the devices are protected against reverse input voltages, reverse output voltages In situations where the ADJ pin is connected to a resistor and reverse voltages from output to input. divider that would pull the ADJ pin above its 7V clamp voltage if the output is pulled high, the ADJ pin input Current limit protection and thermal overload protection current must be limited to less than 5mA. For example, a are intended to protect the device against current overload resistor divider is used to provide a regulated 1.5V output conditions at the output of the device. For normal opera- from the 1.21V reference when the output is forced to 20V. tion, the junction temperature should not exceed 125°C. The top resistor of the resistor divider must be chosen to The input of the device will withstand reverse voltages of limit the current into the ADJ pin to less than 5mA when the 20V. Current flow into the device will be limited to less than ADJ pin is at 7V. The 13V difference between OUT and ADJ 1mA and no negative voltage will appear at the output. The pins divided by the 5mA maximum current into the ADJ pin device will protect both itself and the load. This provides yields a minimum top resistor value of 2.6k. protection against batteries which can be plugged in In circuits where a backup battery is required, several backward. different input/output conditions can occur. The output The output of the LT1764-X can be pulled below ground voltage may be held up while the input is either pulled to without damaging the device. If the input is left open circuit ground, pulled to some intermediate voltage, or is left or grounded, the output can be pulled below ground by open circuit. Current flow back into the output will follow 20V. For fixed voltage versions, the output will act like a the curve shown in Figure 5. large resistor, typically 5k or higher, limiting current flow When the IN pin of the LT1764-X is forced below the OUT to typically less than 600µA. For adjustable versions, the pin or the OUT pin is pulled above the IN pin, input current output will act like an open circuit; no current will flow out will typically drop to less than 2µA. This can happen if the of the pin. If the input is powered by a voltage source, the input of the device is connected to a discharged (low output will source the short-circuit current of the device voltage) battery and the output is held up by either a and will protect itself by thermal limiting. In this case, backup battery or a second regulator circuit. The state of grounding the SHDN pin will turn off the device and stop the SHDN pin will have no effect on the reverse output the output from sourcing the short-circuit current. current when the output is pulled above the input. 5.0 4.5 TJ = 25°C A) LT1764 VIN = OV m 4.0 CURRENT FLOWS INTO T ( OUTPUT PIN N 3.5 RE LT1764-1.8 VOUT = VADJ (LT1764) UR 3.0 VOUT = VFB (LT1764-1.8, UT C 2.5 LT1764-2.5, LT1764-3.3) P UT 2.0 O LT1764-2.5 SE 1.5 R E V 1.0 RE LT1764-3.3 0.5 0 0 1 2 3 4 5 6 7 8 9 10 OUTPUT VOLTAGE (V) 1764 F05 Figure 5. Reverse Output Current 1764fb 14
LT1764 Series TYPICAL APPLICATIOU S SCR Preregulator Provides Efficiency Over Line Variations L1 L2 NTE5437 500µH INLT1764-3O.3UT V3.O3UVT 10V AC 1N4148 + SHDN FB + 3A AT 115VIN 10000µF GND 22µF 90V AC 1k TO 140V AC 34k* 10V AC AT 115VIN 12.1k* NTE5437 1N4002 1N4002 “SYNC” V+ 1N4002 2.4k TO ALL “V+” + 1N4148 200k POINTS + C1A 22µF 750Ω 1/2 LT1018 – 0.1µF V+ V+ 0.033µF 750Ω + C1B + 1/2 LT1018 1N4148 A1 – LT1006 10k 10k L1: COILTRONICS CTX500-2-52 – V+ 10k L2: STANCOR P-8560 1µF *1% FILM RESISTOR V+ LT1004 1.2V 1764 TA03 1764fb 15
LT1764 Series TYPICAL APPLICATIOU S Adjustable Current Source R5 0.01Ω IN OUT + R1 LT1764-1.8 VIN > 2.7V C101µF LT1004-1.2 R12k R4 R6 SHDNGND FB R8 LOAD 40.2k 2.2k 2.2k 100k R3 2k C3 R7 1µF 470Ω ADJUST R1 FOR 0A TO 3A CONSTANT CURRENT 2 – 8 1 1/2 LT1366 3 + 4 C2 3.3µF 1764 TA04 1764fb 16
LT1764 Series PACKAGE DESCRIPTIOUN Q Package 5-Lead Plastic DD Pak (LTC DWG # 05-08-1461) .060 (1.524) .390 – .415 .256 .060 TYP (9.906 – 10.541) .165 – .180 (6.502) (1.524) (4.191 – 4.572) .045 – .055 (1.143 – 1.397) 15° TYP +.008 .004 .060 .183 .330 – .370 .059 –.004 (1.524) (4.648) (1.499) ( +0.203) (8.382 – 9.398) 0.102 TYP –0.102 .095 – .115 (2.413 – 2.921) .075 (1.905) (7.3.60200) .143+–..001220 (1.B0.7S60C72) (0..031330 –– .00.25384) (1..025700 ±± .00.13205) ( +0.305) .028 – .038 BOTTOM VIEW OF DD PAK 3.632–0.508 (0.711 – 0.965) Q(DD5) 0502 HATCHED AREA IS SOLDER PLATED TYP COPPER HEAT SINK .420 .080 .420 .276 .350 .325 .205 .565 .565 .320 .090 .090 .067 .042 .067 .042 RECOMMENDED SOLDER PAD LAYOUT RECOMMENDED SOLDER PAD LAYOUT FOR THICKER SOLDER PASTE APPLICATIONS NOTE: 1. DIMENSIONS IN INCH/(MILLIMETER) 2. DRAWING NOT TO SCALE 1764fb 17
LT1764 Series PACKAGE DESCRIPTIOUN T Package 5-Lead Plastic TO-220 (Standard) (LTC DWG # 05-08-1421) 0.147 – 0.155 0.165 – 0.180 0.390 – 0.415 (3.734 – 3.937) (4.191 – 4.572) 0.045 – 0.055 (9.906 – 10.541) DIA (1.143 – 1.397) 0.230 – 0.270 (5.842 – 6.858) 0.570 – 0.620 0.620 0.460 – 0.500 (14.478 – 15.748) (15.75) (11.684 – 12.700) 0.330 – 0.370 TYP 0.700 – 0.728 (8.382 – 9.398) (17.78 – 18.491) 0.095 – 0.115 SEATING PLANE (2.413 – 2.921) 0.152 – 0.202 0.260 – 0.320 (3.861 – 5.131) 0.155 – 0.195* (3.937 – 4.953) (6.60 – 8.13) 0.013 – 0.023 (0.330 – 0.584) 0.067 BSC 0.028 – 0.038 0.135 – 0.165 (1.70) (0.711 – 0.965) (3.429 – 4.191) * MEASURED AT THE SEATING PLANE T5 (TO-220) 0399 1764fb 18
LT1764 Series PACKAGE DESCRIPTIOUN FE Package 16-Lead Plastic TSSOP (4.4mm) (Reference LTC DWG # 05-08-1663) Exposed Pad Variation BB 4.90 – 5.10* 3.58 (.193 – .201) (.141) 3.58 (.141) 16 151413121110 9 6.60 ±0.10 2.94 4.50 ±0.10 (.116) SEE NOTE 4 2.94 6.40 (.116) (.252) 0.45 ±0.05 BSC 1.05 ±0.10 0.65 BSC RECOMMENDED SOLDER PAD LAYOUT 1 2 3 4 5 6 7 8 1.10 4.30 – 4.50* (.0433) (.169 – .177) 0.25 MAX REF 0° – 8° 0.65 0.09 – 0.20 0.50 – 0.75 (.0256) 0.05 – 0.15 (.0035 – .0079) (.020 – .030) BSC (.002 – .006) 0.195 – 0.30 (.0077 – .0118) FE16 (BB) TSSOP 0204 TYP NOTE: 1. CONTROLLING DIMENSION: MILLIMETERS 4. RECOMMENDED MINIMUM PCB METAL SIZE MILLIMETERS FOR EXPOSED PAD ATTACHMENT 2. DIMENSIONS ARE IN (INCHES) *DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH 3. DRAWING NOT TO SCALE SHALL NOT EXCEED 0.150mm (.006") PER SIDE 1764fb Information furnished by Linear Technology Corporation is believed to be accurate and reliable. 19 However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
LT1764 Series TYPICAL APPLICATIOU Paralleling of Regulators for Higher Output Current R1 0.01Ω 3.3V IN OUT + + 6A C1 LT1764-3.3 C2 VIN > 3.7V 100µF SHDN FB 22µF GND R2 0.01Ω IN OUT R6 LT1764 6.65k SHDN SHDN ADJ GND R7 4.12k R3 R4 2.2k 2.2k 3 + 8 R5 1 1k 1/2 LT1366 2 – 4 C3 0.01µF 1764 TA05 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LT1120 125mA Low Dropout Regulator with 20µA IQ Includes 2.5V Reference and Comparator LT1121 150mA Micropower Low Dropout Regulator 30µA IQ, SOT-223 Package LT1129 700mA Micropower Low Dropout Regulator 50µA Quiescent Current LT1175 500mA Negative Low Dropout Micropower Regulator 45µA IQ, 0.26V Dropout Voltage, SOT-223 Package LT1374 4.5A, 500kHz Step-Down Converter 4.5A, 0.07Ω Internal Switch, SO-8 Package LT1521 300mA Low Dropout Micropower Regulator with Shutdown 15µA IQ, Reverse Battery Protection LT1529 3A Low Dropout Regulator with 50µA IQ 500mV Dropout Voltage LT1573 UltraFastTM Transient Response Low Dropout Regulator Drives External PNP LT1575 UltraFast Transient Response Low Dropout Regulator Drives External N-Channel MOSFET LT1735 Synchronous Step-Down Converter High Efficiency, OPTI-LOOP® Compensation LT1761 Series 100mA, Low Noise, Low Dropout Micropower Regulators in SOT-23 20µA Quiescent Current, 20µVRMS Noise, SOT-23 Package LT1762 Series 150mA, Low Noise, LDO Micropower Regulators 25µA Quiescent Current, 20µVRMS Noise, MSOP Package LT1763 Series 500mA, Low Noise, LDO Micropower Regulators 30µA Quiescent Current, 20µVRMS Noise, SO-8 Package LT1962 300mA, Low Noise, LDO Micropower Regulator 20µVRMS Noise, MSOP Package LT1963 1.5A, Low Noise, Fast Transient Response LDO 40µVRMS Noise, SOT-223 Package UltraFast is a trademark of Linear Technology Corporation. OPTI-LOOP is a registered trademark of Linear Technology Corporation. 1764fb 20 Linear Technology Corporation LT 1205 REV B • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com © LINEAR TECHNOLOGY CORPORATION 2005