Product Sample & Technical Tools & Support & Folder Buy Documents Software Community LP5951 SNVS345G–JUNE2006–REVISEDDECEMBER2014 LP5951 Micropower, 150-mA Low-Dropout CMOS Voltage Regulator 1 Features 3 Description • InputVoltageRange:1.8Vto5.5V The LP5951 regulator is designed to meet the 1 requirements of portable battery-powered systems • OutputVoltageRange:1.3Vto3.7V providing a regulated output voltage and low • ExcellentLineTransientResponse:±2mV quiescent current. When switched to shutdown mode (typical) via a logic signal at the Enable (EN) pin, the power • ExcellentPSRR: –60dBat1kHztypical consumptionisreducedtovirtuallyzero. • LowQuiescentCurrentof29µAtypical The LP5951 is designed to be stable with small 1-µF ceramic capacitors. The device also features internal • SmallSC70-5andSOT-23-5Packages protection against short-circuit currents and over- • FastTurnonTimeof30 µstyp. temperatureconditions. • Typical< 1nAQuiescentCurrentinShutdown Performance is specified for a –40°C to 125°C • Ensured150-mAOutputCurrent temperaturerange. • LogicControlledEnable0.4V/0.9V The device is available in fixed output voltages in the • GoodLoadTransientResponseof50mVpp range of 1.3 V to 3.7 V. For availability, please (typical) contactyourlocalTIsalesoffice. • ThermalOverloadandShort-CircuitProtection DeviceInformation(1) • -40°Cto125°CJunctionTemperatureRange PARTNUMBER PACKAGE BODYSIZE(NOM) 2 Applications SOT-23(5) 2.90mmx1.60mm LP5951 GeneralPurpose SC70(5) 2.00mmx1.25mm (1) For all available packages, see the orderable addendum at theendofthedatasheet. SimplifiedSchematic LP5951 1 VIN IN 5 OUT 1 PF 1 PF Load 4 Enable Control, 3 NC EN active high GND 2 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA.

LP5951 SNVS345G–JUNE2006–REVISEDDECEMBER2014 www.ti.com Table of Contents 1 Features.................................................................. 1 7.3 FeatureDescription...................................................8 2 Applications........................................................... 1 7.4 DeviceFunctionalModes..........................................9 3 Description............................................................. 1 8 ApplicationandImplementation........................ 10 4 RevisionHistory..................................................... 2 8.1 ApplicationInformation............................................10 8.2 TypicalApplication .................................................10 5 PinConfigurationandFunctions......................... 3 9 PowerSupplyRecommendations...................... 13 6 Specifications......................................................... 4 9.1 OutputCurrentDerating.........................................13 6.1 AbsoluteMaximumRatings......................................4 10 Layout................................................................... 14 6.2 ESDRatings..............................................................4 6.3 RecommendedOperatingConditions.......................4 10.1 LayoutGuidelines.................................................14 6.4 ThermalInformation..................................................4 10.2 LayoutExample....................................................14 6.5 ElectricalCharacteristics...........................................5 11 DeviceandDocumentationSupport................. 15 6.6 EnableControlCharacteristics.................................5 11.1 DeviceSupport ....................................................15 6.7 TransientCharacteristics..........................................5 11.2 DocumentationSupport .......................................15 6.8 OutputCapacitor,RecommendedSpecification.......6 11.3 Trademarks...........................................................15 6.9 TypicalCharacteristics..............................................6 11.4 ElectrostaticDischargeCaution............................15 7 DetailedDescription.............................................. 8 11.5 Glossary................................................................15 7.1 Overview...................................................................8 12 Mechanical,Packaging,andOrderable Information........................................................... 15 7.2 FunctionalBlockDiagram.........................................8 4 Revision History NOTE:Pagenumbersforpreviousrevisionsmaydifferfrompagenumbersinthecurrentversion. ChangesfromRevisionF(May2013)toRevisionG Page • AddedDeviceInformationandESDRatingtables,FeatureDescription,DeviceFunctionalModes,Applicationand Implementation,PowerSupplyRecommendations,Layout,DeviceandDocumentationSupport,andMechanical, Packaging,andOrderableInformationsections;updatedpinnames;addednewthermalinformation;movedsome curvestoApplicationCurvessection...................................................................................................................................... 1 • Changedwordingoffootnote2 ............................................................................................................................................. 5 • ChangedvaluesofRθJAand"454mW"to"511mW"forSOT-23-5package................................................................... 10 ChangesfromRevisionE(April2013)toRevisionF Page • ChangedlayoutofNationalDataSheettoTIformat........................................................................................................... 12 2 SubmitDocumentationFeedback Copyright©2006–2014,TexasInstrumentsIncorporated ProductFolderLinks:LP5951

LP5951 www.ti.com SNVS345G–JUNE2006–REVISEDDECEMBER2014 5 Pin Configuration and Functions SOT-23(DBV) 5Pins TopView OUT NC 5 4 1 2 3 IN GND EN SC70(DCK) 5Pins TopView OUT NC 5 4 1 2 3 IN GND EN PinFunctions PIN TYPE DESCRIPTION NUMBER NAME 1 IN I Inputvoltage1.8Vto5.5V 2 GND — Ground 3 EN I Enablepinlogicinput:Low=shutdown,High=normaloperation.Thispinshouldnot beleftfloating. 4 NC — Nointernalconnection 5 OUT O Regulatedoutputvoltage Copyright©2006–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:LP5951

LP5951 SNVS345G–JUNE2006–REVISEDDECEMBER2014 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings overoperatingfree-airtemperature(unlessotherwisenoted)(1) MIN MAX UNIT INpin:VoltagetoGND –0.3 6.5 V ENpin:VoltagetoGND –0.3to(V +0.3V)(2) 6.5 IN Continuouspowerdissipation(3) Internallylimited Junctiontemperature(T ) 150 J-MAX Packagepeakreflowtemperature(10-20s) 240 °C Packagepeakreflowtemperature(Pb-free,10-20s) 260 Storagetemperature,T –65 150 °C stg (1) StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thesearestressratings only,whichdonotimplyfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderRecommended OperatingConditions.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. (2) ThelowerofV +0.3or6.5V. IN (3) Internalthermalshutdowncircuitryprotectsthedevicefrompermanentdamage.ThermalshutdownengagesatT =160°C(typ.)and J disengagesatT =140°C(typ.). J 6.2 ESD Ratings VALUE UNIT V Electrostaticdischarge Human-bodymodel(HBM),perANSI/ESDA/JEDECJS-001(1) ±2000 V (ESD) (1) JEDECdocumentJEP155statesthat500-VHBMallowssafemanufacturingwithastandardESDcontrolprocess. 6.3 Recommended Operating Conditions overoperatingfree-airtemperaturerange(unlessotherwisenoted)(1)(2) MIN NOM MAX UNIT V Inputvoltage 1.8 5.5 V IN V Enableinputvoltage 0 (V +0.3) V EN IN T Junctiontemperature –40 125 °C J T Ambienttemperature SeePowerDissipationAndDeviceOperation A (1) StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thesearestressratings only,whichdonotimplyfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderRecommended OperatingConditions.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. (2) AllvoltagesarewithrespecttothepotentialattheGNDpin. 6.4 Thermal Information LP5951 THERMALMETRIC(1) SOT-23(DBV) SC70(DCK) UNIT 5PINS 5PINS R Junction-to-ambientthermalresistance 195.6 276.7 θJA R Junction-to-case(top)thermalresistance 108.3 86.3 θJC(top) R Junction-to-boardthermalresistance 52.1 56.9 °C/W θJB ψ Junction-to-topcharacterizationparameter 11.0 1.3 JT ψ Junction-to-boardcharacterizationparameter 51.6 56.1 JB (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheICPackageThermalMetricsapplicationreport,SPRA953. 4 SubmitDocumentationFeedback Copyright©2006–2014,TexasInstrumentsIncorporated ProductFolderLinks:LP5951

LP5951 www.ti.com SNVS345G–JUNE2006–REVISEDDECEMBER2014 6.5 Electrical Characteristics Alltypical(TYP)valuesandlimitsareforT =T =25°C,andminimum(MIN)andmaximum(MAX)limitsapplyoverthe A J operatingjunctiontemperaturerange(T )of–40°Cto125°CunlessotherwisespecifiedintheTestConditions.Unless J otherwisenoted,V =V +1V,C =1µF,C =1µF,V =0.9V. (1) (2) IN OUT(NOM) IN OUT EN PARAMETER TESTCONDITIONS MIN TYP MAX UNIT V Inputvoltage V ≥V +V 1.8 5.5 V IN IN OUT(NOM) DO I =1mA OUT –2% 2% T =25°C J Outputvoltagetolerance I =1mA OUT –3.5% 3.5% –30°C≤T ≤+125°C ΔV J OUT Lineregulationerror V =V +1Vto5.5V 0.1 %/V IN OUT(NOM) I =1mA OUT Loadregulationerror I =1mAto150mA –0.01 %/mA OUT V Outputvoltagedropout(3) I =150mA,V ≥2.5V 250 DO OUT OUT mV I =150mA,V <2.5V 200 350 OUT OUT I Quiescentcurrent V =0.9V,I =0 29 55 µA Q EN LOAD V =0.9V,I =150mA 33 70 EN LOAD V =0V,T =25°C 0.005 1 EN J I Outputcurrent(shortcircuit) V =V +1V 150 400 mA SC IN OUT(NOM) SinemodulatedV ,ƒ=100Hz 60 IN PSRR Powersupplyrejectionratio SinemodulatedV ,ƒ=1kHz 60 dB IN SinemodulatedV ,ƒ=10kHz 50 IN E Outputnoise BW=10Hz-100kHz 125 µV N RMS TSD Thermalshutdown 160 °C Temperaturehysteresis 20 (1) AllvoltagesarewithrespecttothepotentialattheGNDpin. (2) MinimumandMaximumlimitsareensuredthroughtest,design,orstatisticalcorrelationovertheoperatingjunctiontemperaturerange (T )of–40°Cto125°C,unlessotherwisestated.TypicalvaluesrepresentthemostlikelyparametricnormatT =25°C,andare J J providedforreferencepurposesonly. (3) Dropoutvoltageisdefinedastheinputtooutputvoltagedifferentialatwhichtheoutputvoltagefallsto100mVbelowthenominaloutput voltage.Thisspecificationdoesnotapplyforoutputvoltagesbelow1.8V. 6.6 Enable Control Characteristics PARAMETER TESTCONDITIONS MIN TYP MAX UNIT I Maximuminputcurrentat 0V≤V ≤V ,V =5.5V –1 1 µA EN EN IN IN ENinput –40°C≤T ≤125°C J Lowinputthreshold V =1.8Vto5.5V V IN 0.4 IL (shutdown) –40°C≤T ≤125°C J V V Highinputthreshold V =1.8Vto5.5V 0.9 IH IN (enable) –40°C≤T ≤125°C J 6.7 Transient Characteristics PARAMETER TESTCONDITIONS MIN TYP MAX UNIT ΔV Dynamiclinetransient V =V +1Vto ±2 mV OUT IN OUT(NOM) V +1V+0.6Vin30µs,noload OUT(NOM) I =0mAto150mAin10µs -30 mV OUT I =150mAto0mAin10µs 20 mV ΔV Dynamicloadtransient OUT OUT I =1mAto150mAin1µs -50 mV OUT I =150mAto1mAin1µs 40 mV OUT ΔV Overshootonstart-up Nominalconditions 10 mV OUT T Turnontime I =1mA 30 µs ON OUT Copyright©2006–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:LP5951

LP5951 SNVS345G–JUNE2006–REVISEDDECEMBER2014 www.ti.com 6.8 Output Capacitor, Recommended Specification PARAMETER TESTCONDITIONS MIN(1) TYP MAX(1) UNIT Capacitance(2) 0.7 1 47 µF COUT Outputcapacitance IOUT=150mA,VIN=5V ESR 0.003 0.300 Ω (1) MinandMaxlimitsareensuredbydesign. (2) Thecapacitortoleranceshouldbe30%orbetterovertemperature.Thefulloperatingconditionsfortheapplicationshouldbeconsidered whenselectingasuitablecapacitortoensurethattheminimumvalueofcapacitanceisalwaysmet.Recommendedcapacitortypeis X7R.However,dependentonapplication,X5R,Y5V,andZ5Ucanalsobeused.Theshownminimumlimitrepresentsrealminimum capacitance,includingalltolerancesandmustbemaintainedovertemperatureanddcbiasvoltage(seeExternalCapacitorsin ApplicationandImplementationsection). 6.9 Typical Characteristics Unlessotherwisespecified,C =1µFceramic,C =1µFceramic,V =V +1V,T =25°C;ENpinistiedtoV . IN OUT IN OUT(NOM) A IN A) A) NT (m LP5951-1.3 CIN, COUT = 1.0 µF NT (m LP5951-3.3 CCIONU =T 1=. 01 .µ5F µF E 150 E 150 R R R R U U C C D 0 D 0 A A O O L L V) V) T DI T DI OU V/ OU V/ V m V m  0  0 2 2 ( ( TIME (50 µs/DIV) TIME (50 µs/DIV) Figure1.LoadTransientResponse Figure2.LoadTransientResponse LP5951-1.3 CIN, COUT = 1.0 µF LP5951-3.3 CIN = 1.0 µF N V/DIV) 2.9 IL = 150 mA VINV/DIV) 44..39 COUT = 1.5 µF VI 00 m 2.3 (1 IL = 150 mA 5 ( V) UTDI V) VOmV/ VOUT mV/DI  (2  2 ( TIME (100 µs/DIV) TIME (100 µs/DIV) Figure4.LineTransientResponse Figure3.LineTransientResponse 6 SubmitDocumentationFeedback Copyright©2006–2014,TexasInstrumentsIncorporated ProductFolderLinks:LP5951

LP5951 www.ti.com SNVS345G–JUNE2006–REVISEDDECEMBER2014 Typical Characteristics (continued) Unlessotherwisespecified,C =1µFceramic,C =1µFceramic,V =V +1V,T =25°C;ENpinistiedtoV . IN OUT IN OUT(NOM) A IN LP5951-1.3 IL = 150 mA LP5951-3.3 IL = 150 mA V) V) DI DI NV/ N V/ VEm VE m 0 0 0 0 5 5 ( ( V) VOUT0 mV/DI VOUT 1V/DIV) 50 ( ( TIME (10 µs/DIV) TIME (10 µs/DIV) Figure5.EnableStart-UpTime Figure6.EnableStart-UpTime 1.0 40.0 LP5951-1.3 IL = 1 mA 38.0 LP5951-1.3 IL = 1 mA 0.8 36.0 )% 0.6 34.0 TA = 125oC ( E 32.0 GN 0.4 A)P 30.0 AHC T 0.2 I (GND 2268..00 TA = 25oC U O V 0.0 24.0 22.0 -0.2 20.0 TA = -40oC 18.0 -0.4 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 -40 -20 0 20 40 60 80 100 120 TEMPERATURE (oC) VIN (V) Figure7.OutputVoltageChangevsTemperature Figure8.GroundCurrentvsV IN 0 LP5951-3.3 VIN = 3.8V, -20 IL = 1 mA )B d ( N OIT -40 VIN = 5.5V, C IL = 1 mA E J E R -60 E L P PIR -80 VIN = 5.5V, VIN = 3.8V, IL = 0 mA IL = 0 mA 10 100 1k 10k 100k 1M FREQUENCY (Hz) Figure9.PowerSupplyRejectionRatio Copyright©2006–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:LP5951

LP5951 SNVS345G–JUNE2006–REVISEDDECEMBER2014 www.ti.com 7 Detailed Description 7.1 Overview The LP5951 regulator is designed to meet the requirements of portable battery-powered systems providing a regulated output voltage and low quiescent current. When switched to shutdown mode via a logic signal at the ENpin,thepowerconsumptionisreducedtovirtuallyzero. 7.2 Functional Block Diagram IN LDO Core Bias Generator and OUT Reference Enable EN Controller Over Current and Thermal Protection GND 7.3 Feature Description 7.3.1 No-LoadStability The LP5951 will remain stable and in regulation with no external load. This is an important consideration in some circuits,forexampleCMOSRAMkeep-aliveapplications. 7.3.2 EnableOperation The LP5951 may be switched ON or OFF by a logic input at the Enable pin, EN. A logic high at this pin will turn thedeviceon.WhentheENpinislow,theregulatoroutputisoffandthedevicetypicallyconsumes5nA. If the application does not require the enable switching feature, the EN pin should be tied to V to keep the IN regulatoroutputpermanentlyon. To ensure proper operation, the signal source used to drive the V input must be able to swing above and EN belowthespecifiedturn-on/offvoltagethresholdslistedintheEnableControlCharacteristics table,V andV . IL IH 7.3.3 FastTurnOffAndOn The controlled switch-off feature of the device provides a fast turn off by discharging the output capacitor via an internalFETdevice.ThisdischargeiscurrentlimitedbytheRDSonofthisswitch. Fast turnon is ensured by an optimized architecture allowing a very fast ramp of the output voltage to reach the targetvoltage. 7.3.4 Short-CircuitProtection The LP5951 is short circuit protected and in the event of a peak over-current condition, the output current throughthePMOSwillbelimited. If the over-current condition exists for a longer time, the average power dissipation will increase depending on theinputtooutputvoltagedifferenceuntilthethermalshutdowncircuitrywillturnoffthePMOS. PleaserefertotheThermalInformationsectionforpowerdissipationcalculations. 8 SubmitDocumentationFeedback Copyright©2006–2014,TexasInstrumentsIncorporated ProductFolderLinks:LP5951

LP5951 www.ti.com SNVS345G–JUNE2006–REVISEDDECEMBER2014 Feature Description (continued) 7.3.5 Thermal-OverloadProtection Thermal-Overload Protection limits the total power dissipation in the LP5951. When the junction temperature exceeds T = 160°C typ., the shutdown logic is triggered and the PMOS is turned off, allowing the device to cool J down. After the junction temperature dropped by 20°C (temperature hysteresis), the PMOS is activated again. Thisresultsinapulsedoutputvoltageduringcontinuousthermal-overloadconditions. The Thermal-Overload Protection is designed to protect the LP5951 in the event of a fault condition. For normal, continuous operation, do not exceed the absolute maximum junction temperature rating of T = 150°C (see J AbsoluteMaximumRatings). 7.3.6 ReverseCurrentPath The internal PFET pass device in LP5951 has an inherent parasitic body diode. During normal operation, the input voltage is higher than the output voltage and the parasitic diode is reverse biased. However, if the output is pulledabovetheinputinanapplication,thencurrentflowsfromtheoutputtotheinputastheparasiticdiodegets forwardbiased.Theoutputcanbepulledabovetheinputaslongasthecurrentintheparasiticdiodeislimitedto 50mA. For currents above this limit an external Schottky diode must be connected from V to V (cathode on V , OUT IN IN anodeonV ). OUT 7.4 Device Functional Modes 7.4.1 Enable(EN) The EN pin voltage must be higher than the VIH threshold to ensure that the device is fully enabled under all operating conditions. The EN pin voltage must be lower than the VIL threshold to ensure that the device is fully disabled. However if the application does not require the shutdown feature, the VEN pin can be tied to VIN to keeptheregulatoroutputpermanentlyon. 7.4.2 MinimumOperatingInputVoltage(V ) IN The LP5951 internal circuitry is not fully functional until V is at least 1.8 V. The output voltage is not regulated IN untilV ≥(V +V ),or1.8V,whicheverishigher. IN OUT DO Copyright©2006–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:LP5951

LP5951 SNVS345G–JUNE2006–REVISEDDECEMBER2014 www.ti.com 8 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validateandtesttheirdesignimplementationtoconfirmsystemfunctionality. 8.1 Application Information The LP5951 is a linear voltage regulator for digital applications designed to be stable with space-saving ceramic capacitors as small as 1 µF. Performance is specified for a -40°C to 125°C temperature range for bot the SOT- 23andSC70packages. 8.2 Typical Application LP5951 1 VIN IN 5 1 PF OUT 1 PF Load 4 Enable Control, 3 NC EN active high GND 2 Figure10. LP5951TypicalApplication 8.2.1 DesignRequirements Table1.DesignParameters DESIGNPARAMETER DESIGNREQUIREMENT Inputvoltagerange 1.8Vto5.5V Outputvoltage 1.3V Outputcurrent 150mA Outputcapacitorrange 1µF Input/outputcapacitorESRrange 3mΩto300mΩ 8.2.2 DetailedDesignProcedure 8.2.2.1 PowerDissipationAndDeviceOperation The permissible power dissipation for any package is a measure of the capability of the device to pass heat from the power source, the junctions of the IC, to the ultimate heat sink, the ambient environment. Thus, the power dissipation is dependent on the ambient temperature and the thermal resistance across the various interfaces betweenthedieandambientair. In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be derated. Maximum ambient temperature (T ) is dependent on the A-MAX maximum operating junction temperature (T = 125°C), the maximum power dissipation of the device in J-MAX-OP the application (P ), and the junction-to ambient thermal resistance of the part/package in the application D-MAX (R ),asgivenbythefollowingequation:T =T –(R ×P ). θJA A-MAX J-MAX-OP θJA D-MAX Theallowablepowerdissipationforthedeviceinagivenpackagecanbecalculatedusingtheequation: P =(T –T )/R (1) D J(MAX) A θJA With an R = 195.6°C/W, the device in the SOT-23-5 package returns a value of 511 mW with a maximum θJA junctiontemperatureof125°CatT of25°C. A 10 SubmitDocumentationFeedback Copyright©2006–2014,TexasInstrumentsIncorporated ProductFolderLinks:LP5951

LP5951 www.ti.com SNVS345G–JUNE2006–REVISEDDECEMBER2014 Theactualpowerdissipationacrossthedevicecanbeestimatedbythefollowingequation: P ≈(V –V )×I (2) D IN OUT OUT Thisestablishestherelationshipbetweenthepowerdissipationallowedduetothermalconsideration,thevoltage drop across the device, and the continuous current capability of the device. These two equations should be used todeterminetheoptimumoperatingconditionsforthedeviceintheapplication. 8.2.2.2 ExternalCapacitors As is common with most regulators, the LP5951 requires external capacitors to ensure stable operation. The LP5951 is specifically designed for portable applications requiring minimum board space and the smallest size components.Thesecapacitorsmustbecorrectlyselectedforgoodperformance. 8.2.2.3 InputCapacitor An input capacitor is required for stability. It is recommended that a 1-µF capacitor be connected between the LP5951INpinandground(thiscapacitancevaluemaybeincreasedwithoutlimit). This capacitor must be located a distance of not more than 1 cm from the input pin and returned to a clean analogueground.Anygoodqualityceramic,tantalum,orfilmcapacitormaybeusedattheinput. Important: Tantalum capacitors can suffer catastrophic failures due to surge current when connected to a low- impedance source of power (like a battery or a very large capacitor). If a tantalum capacitor is used at the input, itmustbeensuredbythemanufacturertohaveasurgecurrentratingsufficientfortheapplication. There are no requirements for the ESR (Equivalent Series Resistance) on the input capacitor, but tolerance and temperature coefficient must be considered when selecting the capacitor to ensure the capacitance will remain ≥ 0.7 µFovertheentireoperatingtemperaturerange. 8.2.2.4 OutputCapacitor The LP5951 is designed specifically to work with very small ceramic output capacitors. A ceramic capacitor (dielectric types X7R, Z5U, or Y5V) in the 1-µF range (up to 47 µF) and with ESR between 3 mΩ to 500 mΩ is suitableintheLP5951applicationcircuit. This capacitor must be located a distance of not more than 1 cm from the OUT pin and returned to a clean analogueground. It is also possible to use tantalum or film capacitors at the device output, V , but these are not as attractive for OUT reasonsofsizeandcost(seeCapacitorCharacteristics). 8.2.2.5 CapacitorCharacteristics The LP5951 is designed to work with ceramic capacitors on the output to take advantage of the benefits they offer. For capacitance values in the range of 1 µF to 4.7 µF, ceramic capacitors are the smallest, least expensive and have the lowest ESR values, thus making them best for eliminating high frequency noise. The ESR of a typical 1-µF ceramic capacitor is in the range of 3 mΩ to 40 mΩ, which easily meets the ESR requirement for stabilityfortheLP5951. For both input and output capacitors, careful interpretation of the capacitor specification is required to ensure correct device operation. The capacitor value can change greatly, depending on the operating conditions and capacitortype. Inparticular,theoutputcapacitorselectionshouldtakeaccountofallthecapacitorparameters,toensurethatthe specification is met within the application. The capacitance can vary with DC bias conditions as well as temperature and frequency of operation. Capacitor values will also show some decrease over time due to aging. The capacitor parameters are also dependant on the particular case size, with smaller sizes giving poorer performance figures in general. As an example, Figure 11 shows a typical graph comparing different capacitor casesizesinaCapacitancevs.DCBiasplot.Asshowninthegraph,increasingtheDCBiasconditioncanresult in the capacitance value falling below the minimum value given in the recommended capacitor specifications table (0.7 µF in this case). Note that the graph shows the capacitance out of spec for the 0402 case size capacitorathigherbiasvoltages.Itisthereforerecommendedthatthecapacitormanufacturers’specificationsfor the nominal value capacitor are consulted for all conditions, as some capacitor sizes (such as 0402) may not be suitableintheactualapplication. Copyright©2006–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:LP5951

LP5951 SNVS345G–JUNE2006–REVISEDDECEMBER2014 www.ti.com F) 100% 0603, 10V, X5R P 1 m. o N 80% of % UE ( 60% L A V P 0402, 6.3V, X5R A 40% C 20% 0 1.0 2.0 3.0 4.0 5.0 DC BIAS (V) Figure11. TypicalVariationinCapacitancevsDCBias The ceramic capacitor’s capacitance can vary with temperature. The capacitor type X7R, which operates over a temperature range of –55°C to 125°C, will only vary the capacitance to within ±15%. The capacitor type X5R has a similar tolerance over a reduced temperature range of –55°C to 85°C. Many large value ceramic capacitors, larger than 1 µF are manufactured with Z5U or Y5V temperature characteristics. Their capacitance can drop by more than 50% as the temperature varies from 25°C to 85°C. Therefore X7R is recommended over Z5U and Y5Vinapplicationswheretheambienttemperaturewillchangesignificantlyaboveorbelow25°C. Tantalum capacitors are less desirable than ceramic for use as output capacitors because they are more expensivewhencomparingequivalentcapacitanceandvoltageratingsinthe1-µFto4.7-µFrange. Another important consideration is that tantalum capacitors have higher ESR values than equivalent size ceramics. This means that while it may be possible to find a tantalum capacitor with an ESR value within the stable range, it would have to be larger in capacitance (which means bigger and more costly) than a ceramic capacitor with the same ESR value. It should also be noted that the ESR of a typical tantalum will increase about 2:1asthetemperaturegoesfrom25°Cdownto-40°C,sosomeguardbandmustbeallowed. Table2.SuggestedCapacitorsandTheirSuppliers CAPACITANCE/µF MODEL VENDOR TYPE CASESIZE/INCH(mm) 1 C1608X5R1A105K TDK Ceramic,X5R 0603(1608) 1 C1005X5R1A105K TDK Ceramic,X5R 0402(1005) 12 SubmitDocumentationFeedback Copyright©2006–2014,TexasInstrumentsIncorporated ProductFolderLinks:LP5951

LP5951 www.ti.com SNVS345G–JUNE2006–REVISEDDECEMBER2014 8.2.3 ApplicationCurves T (mA) LP5951-1.3 CIN, COUT = 1.0 µF V) LP5951-1.3 IL = 150 mA EN 150 DI R NV/ CUR VE00 m AD 0 (5 O L V) VOUT mV/DIV) VOUT00 mV/DI Â (20 (5 TIME (50 µs/DIV) TIME (10 µs/DIV) Figure12.LoadTransientResponse Figure13.EnableStart-UpTime 9 Power Supply Recommendations This device is designed to operate from an input supply voltage range of 1.8 V to 5.5 V. The input supply should be well regulated and free of spurious noise. To ensure that the LP5951 output voltage is well regulated, the input supply should be at least V + 0.5 V, or 1.8 V, whichever is higher. A minimum capacitor value of 1-μF is OUT requiredtobewithin1cmoftheINpin. 9.1 Output Current Derating 0.15 SOT23-5 SC70-5 0.1 A / X A M D A O L I 0.05 0 0 1 2 3 4 V - V / V IN OUT D001 Figure14. MaximumLoadCurrentvsV –V , IN OUT T =85°C,V =1.5V A OUT Copyright©2006–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:LP5951

LP5951 SNVS345G–JUNE2006–REVISEDDECEMBER2014 www.ti.com 10 Layout 10.1 Layout Guidelines The dynamic performance of the LP5951 is dependent on the layout of the PCB. PCB layout practices that are adequate for typical LDOs may degrade the load regulation, PSRR, noise, or transient performance of the LP5951. Best performance is achieved by placing C and C on the same side of the PCB as the LP5951, IN OUT and as close as is practical to the package. The ground connections for C and C should be back to the IN OUT LP5951groundpinusingaswide,andasshort,ofacoppertraceasispractical. Connections using long trace lengths, narrow trace widths, and/or connections through vias should be avoided. Thesewilladdparasiticinductancesandresistancethatresultsininferiorperformanceespeciallyduringtransient conditions. A Ground Plane, either on the opposite side of a two-layer PCB, or embedded in a multi-layer PCB, is strongly recommended.ThisGroundPlaneservesasacircuitreferenceplanetoassureaccuracy. 10.2 Layout Example VIN VOUT CIN 1 IN OUT 5 COUT GND 2 GND GND Enable 3 EN N/C 4 Figure15. LP5951Layout 14 SubmitDocumentationFeedback Copyright©2006–2014,TexasInstrumentsIncorporated ProductFolderLinks:LP5951

LP5951 www.ti.com SNVS345G–JUNE2006–REVISEDDECEMBER2014 11 Device and Documentation Support 11.1 Device Support 11.1.1 Third-PartyProductsDisclaimer TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER ALONEORINCOMBINATIONWITHANYTIPRODUCTORSERVICE. 11.2 Documentation Support 11.2.1 RelatedDocumentation For the availability of evaluation boards, see the LP5951 product folder. For information regarding evaluation boards,seetheTIAN-1486ApplicationReport LP5951EvaluationBoard(SNVA169). 11.3 Trademarks Alltrademarksarethepropertyoftheirrespectiveowners. 11.4 Electrostatic Discharge Caution Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. 11.5 Glossary SLYZ022—TIGlossary. Thisglossarylistsandexplainsterms,acronyms,anddefinitions. 12 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of thisdocument.Forbrowser-basedversionsofthisdatasheet,refertotheleft-handnavigation. Copyright©2006–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:LP5951

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) LP5951MF-1.3/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 LKRB & no Sb/Br) LP5951MF-1.5/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 LKAB & no Sb/Br) LP5951MF-1.8/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 LKBB & no Sb/Br) LP5951MF-2.0/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 LKCB & no Sb/Br) LP5951MF-2.5/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 LKEB & no Sb/Br) LP5951MF-2.8/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 LKFB & no Sb/Br) LP5951MF-3.0/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 LKGB & no Sb/Br) LP5951MF-3.3 NRND SOT-23 DBV 5 1000 TBD Call TI Call TI -40 to 125 LKHB LP5951MF-3.3/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 LKHB & no Sb/Br) LP5951MFX-1.3/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 LKRB & no Sb/Br) LP5951MFX-1.5/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 LKAB & no Sb/Br) LP5951MFX-1.8/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 LKBB & no Sb/Br) LP5951MFX-2.0/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 LKCB & no Sb/Br) LP5951MFX-2.5/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 LKEB & no Sb/Br) LP5951MFX-3.0/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 LKGB & no Sb/Br) LP5951MFX-3.3/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 LKHB & no Sb/Br) LP5951MG-1.3/NOPB ACTIVE SC70 DCK 5 1000 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 L23 & no Sb/Br) Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) LP5951MG-1.5/NOPB ACTIVE SC70 DCK 5 1000 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 L2B & no Sb/Br) LP5951MG-1.8/NOPB ACTIVE SC70 DCK 5 1000 Green (RoHS SN Level-1-260C-UNLIM L3B & no Sb/Br) LP5951MG-2.0/NOPB ACTIVE SC70 DCK 5 1000 Green (RoHS SN Level-1-260C-UNLIM L4B & no Sb/Br) LP5951MG-2.5/NOPB ACTIVE SC70 DCK 5 1000 Green (RoHS SN Level-1-260C-UNLIM L5B & no Sb/Br) LP5951MG-2.8/NOPB ACTIVE SC70 DCK 5 1000 Green (RoHS SN Level-1-260C-UNLIM L6B & no Sb/Br) LP5951MG-3.0/NOPB ACTIVE SC70 DCK 5 1000 Green (RoHS SN Level-1-260C-UNLIM L7B & no Sb/Br) LP5951MG-3.3/NOPB ACTIVE SC70 DCK 5 1000 Green (RoHS SN Level-1-260C-UNLIM LAB & no Sb/Br) LP5951MGX-1.3/NOPB ACTIVE SC70 DCK 5 3000 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 L23 & no Sb/Br) LP5951MGX-1.5/NOPB ACTIVE SC70 DCK 5 3000 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 L2B & no Sb/Br) LP5951MGX-1.8/NOPB ACTIVE SC70 DCK 5 3000 Green (RoHS SN Level-1-260C-UNLIM L3B & no Sb/Br) LP5951MGX-2.5/NOPB ACTIVE SC70 DCK 5 3000 Green (RoHS SN Level-1-260C-UNLIM L5B & no Sb/Br) LP5951MGX-2.8/NOPB ACTIVE SC70 DCK 5 3000 Green (RoHS SN Level-1-260C-UNLIM L6B & no Sb/Br) LP5951MGX-3.0/NOPB ACTIVE SC70 DCK 5 3000 Green (RoHS SN Level-1-260C-UNLIM L7B & no Sb/Br) LP5951MGX-3.3/NOPB ACTIVE SC70 DCK 5 3000 Green (RoHS SN Level-1-260C-UNLIM LAB & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. Addendum-Page 2

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 3

PACKAGE MATERIALS INFORMATION www.ti.com 29-Sep-2019 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) LP5951MF-1.3/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP5951MF-1.5/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP5951MF-1.8/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP5951MF-2.0/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP5951MF-2.5/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP5951MF-2.8/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP5951MF-3.0/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP5951MF-3.3 SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP5951MF-3.3/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP5951MFX-1.3/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP5951MFX-1.5/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP5951MFX-1.8/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP5951MFX-2.0/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP5951MFX-2.5/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP5951MFX-3.0/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP5951MFX-3.3/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP5951MG-1.3/NOPB SC70 DCK 5 1000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LP5951MG-1.5/NOPB SC70 DCK 5 1000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 29-Sep-2019 Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) LP5951MG-1.8/NOPB SC70 DCK 5 1000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LP5951MG-2.0/NOPB SC70 DCK 5 1000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LP5951MG-2.5/NOPB SC70 DCK 5 1000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LP5951MG-2.8/NOPB SC70 DCK 5 1000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LP5951MG-3.0/NOPB SC70 DCK 5 1000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LP5951MG-3.3/NOPB SC70 DCK 5 1000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LP5951MGX-1.3/NOPB SC70 DCK 5 3000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LP5951MGX-1.5/NOPB SC70 DCK 5 3000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LP5951MGX-1.8/NOPB SC70 DCK 5 3000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LP5951MGX-2.5/NOPB SC70 DCK 5 3000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LP5951MGX-2.8/NOPB SC70 DCK 5 3000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LP5951MGX-3.0/NOPB SC70 DCK 5 3000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LP5951MGX-3.3/NOPB SC70 DCK 5 3000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) LP5951MF-1.3/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LP5951MF-1.5/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LP5951MF-1.8/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LP5951MF-2.0/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 PackMaterials-Page2

PACKAGE MATERIALS INFORMATION www.ti.com 29-Sep-2019 Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) LP5951MF-2.5/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LP5951MF-2.8/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LP5951MF-3.0/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LP5951MF-3.3 SOT-23 DBV 5 1000 210.0 185.0 35.0 LP5951MF-3.3/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LP5951MFX-1.3/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 LP5951MFX-1.5/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 LP5951MFX-1.8/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 LP5951MFX-2.0/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 LP5951MFX-2.5/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 LP5951MFX-3.0/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 LP5951MFX-3.3/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 LP5951MG-1.3/NOPB SC70 DCK 5 1000 210.0 185.0 35.0 LP5951MG-1.5/NOPB SC70 DCK 5 1000 210.0 185.0 35.0 LP5951MG-1.8/NOPB SC70 DCK 5 1000 210.0 185.0 35.0 LP5951MG-2.0/NOPB SC70 DCK 5 1000 210.0 185.0 35.0 LP5951MG-2.5/NOPB SC70 DCK 5 1000 210.0 185.0 35.0 LP5951MG-2.8/NOPB SC70 DCK 5 1000 210.0 185.0 35.0 LP5951MG-3.0/NOPB SC70 DCK 5 1000 210.0 185.0 35.0 LP5951MG-3.3/NOPB SC70 DCK 5 1000 210.0 185.0 35.0 LP5951MGX-1.3/NOPB SC70 DCK 5 3000 210.0 185.0 35.0 LP5951MGX-1.5/NOPB SC70 DCK 5 3000 210.0 185.0 35.0 LP5951MGX-1.8/NOPB SC70 DCK 5 3000 210.0 185.0 35.0 LP5951MGX-2.5/NOPB SC70 DCK 5 3000 210.0 185.0 35.0 LP5951MGX-2.8/NOPB SC70 DCK 5 3000 210.0 185.0 35.0 LP5951MGX-3.0/NOPB SC70 DCK 5 3000 210.0 185.0 35.0 LP5951MGX-3.3/NOPB SC70 DCK 5 3000 210.0 185.0 35.0 PackMaterials-Page3

PACKAGE OUTLINE DBV0005A SOT-23 - 1.45 mm max height SCALE 4.000 SMALL OUTLINE TRANSISTOR C 3.0 2.6 0.1 C 1.75 1.45 1.45 B A 0.90 PIN 1 INDEX AREA 1 5 2X 0.95 3.05 2.75 1.9 1.9 2 4 3 0.5 5X 0.3 0.15 0.2 C A B (1.1) TYP 0.00 0.25 GAGE PLANE 0.22 TYP 0.08 8 TYP 0.6 0 0.3 TYP SEATING PLANE 4214839/E 09/2019 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Refernce JEDEC MO-178. 4. Body dimensions do not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. www.ti.com

EXAMPLE BOARD LAYOUT DBV0005A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 5X (1.1) 1 5 5X (0.6) SYMM (1.9) 2 2X (0.95) 3 4 (R0.05) TYP (2.6) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:15X SOLDER MASK SOLDER MASK METAL UNDER METAL OPENING OPENING SOLDER MASK EXPOSED METAL EXPOSED METAL 0.07 MAX 0.07 MIN ARROUND ARROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED (PREFERRED) SOLDER MASK DETAILS 4214839/E 09/2019 NOTES: (continued) 5. Publication IPC-7351 may have alternate designs. 6. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN DBV0005A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 5X (1.1) 1 5 5X (0.6) SYMM 2 (1.9) 2X(0.95) 3 4 (R0.05) TYP (2.6) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:15X 4214839/E 09/2019 NOTES: (continued) 7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 8. Board assembly site may have different recommendations for stencil design. www.ti.com

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