LP3962, LP3965 www.ti.com SNVS066H–MAY2000–REVISEDAPRIL2013 LP3962/LP3965 1.5A Fast Ultra Low Dropout Linear Regulators CheckforSamples:LP3962,LP3965 FEATURES DESCRIPTION 1 • UltraLowDropoutVoltage The LP3962/LP3965 series of fast ultra low-dropout 2 linear regulators operate from a +2.5V to +7.0V input • LowGroundPinCurrent supply. Wide range of preset output voltage options • LoadRegulationof0.04% are available. These ultra low dropout linear • 15µAQuiescentCurrentinShutdownMode regulators respond very fast to step changes in load which makes them suitable for low voltage • SpecifiedOutputCurrentof1.5ADC microprocessor applications. The LP3962/LP3965 are • AvailableinSOT-223,SFM/TO-263andTO-220 developed on a CMOS process which allows low Packages quiescent current operation independent of output • OutputVoltageAccuracy±1.5% load current. This CMOS process also allows the LP3962/LP3965 to operate under extremely low • ErrorFlagIndicatesOutputStatus(LP3962) dropoutconditions. • SenseOptionImprovesBetterLoad Dropout Voltage: Ultra low dropout voltage; typically Regulation(LP3965) 38mVat150mAloadcurrentand380mVat1.5Aload • ExtremelyLowOutputCapacitor current. Requirements Ground Pin Current: Typically 5mA at 1.5A load • Overtemperature/OvercurrentProtection current. • −40°Cto+125°CJunctionTemperatureRange Shutdown Mode: Typically 15µA quiescent current whentheshutdownpinispulledlow. APPLICATIONS Error Flag: Error flag goes low when the output • MicroprocessorPowerSupplies voltagedrops10%belownominalvalue(forLP3962). • GTL,GTL+,BTL,andSSTLBusTerminators SENSE: Sense pin improves regulation at remote • PowerSuppliesforDSPs loads.(ForLP3965) • SCSITerminator Precision Output Voltage: Multiple output voltage • PostRegulators options are available ranging from 1.2V to 5.0V and • HighEfficiencyLinearRegulators adjustable (LP3965), with a specified accuracy of • BatteryChargers ±1.5% at room temperature, and ±3.0% over all conditions(varyingline,load,andtemperature). • OtherBatteryPoweredApplications Typical Application Circuits *SDandERRORpinsmustbepulledhighthrougha10kΩpull-upresistor.ConnecttheERRORpintogroundifthis functionisnotused.SeeApplicationHintssectionformoreinformation. 1 Pleasebeawarethatanimportantnoticeconcerningavailability,standardwarranty,anduseincriticalapplicationsof TexasInstrumentssemiconductorproductsanddisclaimerstheretoappearsattheendofthisdatasheet. Alltrademarksarethepropertyoftheirrespectiveowners. 2 PRODUCTIONDATAinformationiscurrentasofpublicationdate. Copyright©2000–2013,TexasInstrumentsIncorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarilyincludetestingofallparameters.

LP3962, LP3965 SNVS066H–MAY2000–REVISEDAPRIL2013 www.ti.com *SDandERRORpinsmustbepulledhighthrougha10kΩpull-upresistor.ConnecttheERRORpintogroundifthis functionisnotused.SeeApplicationHintssectionformoreinformation. Block Diagram LP3962 2 SubmitDocumentationFeedback Copyright©2000–2013,TexasInstrumentsIncorporated ProductFolderLinks:LP3962 LP3965

LP3962, LP3965 www.ti.com SNVS066H–MAY2000–REVISEDAPRIL2013 Block Diagram LP3965 Block Diagram LP3965-ADJ Connection Diagram Figure1.TopView Figure2.TopView Figure3.TopView SOT-223-5Package TO-220-5Package SFM/TO-263-5Package Bent,StaggeredLeads Copyright©2000–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:LP3962 LP3965

LP3962, LP3965 SNVS066H–MAY2000–REVISEDAPRIL2013 www.ti.com PinDescriptionsforSOT-223-5Package LP3962 LP3965 Pin# Name Function Name Function 1 SD Shutdown SD Shutdown 2 V InputSupply V InputSupply IN IN 3 V OutputVoltage V OutputVoltage OUT OUT 4 ERROR ERRORFlag SENSE/ADJ RemoteSensePinorOutput AdjustPin 5 GND Ground GND Ground PinDescriptionsforTO-220-5andSFM/TO-263-5Packages LP3962 LP3965 Pin# Name Function Name Function 1 SD Shutdown SD Shutdown 2 V InputSupply V InputSupply IN IN 3 GND Ground GND Ground 4 V OutputVoltage V OutputVoltage OUT OUT 5 ERROR ERRORFlag SENSE/ADJ RemoteSensePinorOutput AdjustPin Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. Absolute Maximum Ratings (1)(2) StorageTemperatureRange −65°Cto+150°C LeadTemperature(Soldering,5sec.) 260°C ESDRating (3) 2kV PowerDissipation (4) InternallyLimited InputSupplyVoltage(Survival) −0.3Vto+7.5V ShutdownInputVoltage(Survival) −0.3VtoV +0.3V IN OutputVoltage(Survival), (5), (6) −0.3Vto+7.5V I (Survival) ShortCircuitProtected OUT MaximumVoltageforERRORPin V +0.3V IN MaximumVoltageforSENSEPin V +0.3V OUT (1) Absolutemaximumratingsindicatelimitsbeyondwhichdamagetothedevicemayoccur.Operatingratingsindicateconditionsforwhich thedeviceisintendedtobefunctional,butdoesnotensurespecificperformancelimits.Forensuredspecificationsandtestconditions, seeElectricalCharacteristics.Theensuredspecificationsapplyonlyforthetestconditionslisted.Someperformancecharacteristicsmay degradewhenthedeviceisnotoperatedunderthelistedtestconditions. (2) IfMilitary/Aerospacespecifieddevicesarerequired,pleasecontacttheTISalesOffice/Distributorsforavailabilityandspecifications. (3) Thehumanbodymodelisa100pFcapacitordischargedthrougha1.5kΩresistorintoeachpin. (4) Atelevatedtemperatures,devicesmustbederatedbasedonpackagethermalresistance.ThedevicesinTO-220packagemustbe deratedatθ =50°C/W(with0.5in2,1oz.copperarea),junction-to-ambient(withnoheatsink).ThedevicesintheSFM/TO-263 jA surface-mountpackagemustbederatedatθ =60°C/W(with0.5in2,1oz.copperarea),junction-to-ambient.ThedevicesinSOT-223 jA packagemustbederatedatθ =90°C/W(with0.5in2,1oz.copperarea),junction-to-ambient. jA (5) Ifusedinadual-supplysystemwheretheregulatorloadisreturnedtoanegativesupply,theLP396Xoutputmustbediode-clampedto ground. (6) TheoutputPMOSstructurecontainsadiodebetweentheV andV terminals.Thisdiodeisnormallyreversebiased.Thisdiodewill IN OUT getforwardbiasedifthevoltageattheoutputterminalisforcedtobehigherthanthevoltageattheinputterminal.Thisdiodecan typicallywithstand200mAofDCcurrentand1Ampofpeakcurrent. 4 SubmitDocumentationFeedback Copyright©2000–2013,TexasInstrumentsIncorporated ProductFolderLinks:LP3962 LP3965

LP3962, LP3965 www.ti.com SNVS066H–MAY2000–REVISEDAPRIL2013 Operating Ratings InputSupplyVoltage(Operating), (1) 2.5Vto7.0V ShutdownInputVoltage(Operating) −0.3VtoV +0.3V IN MaximumOperatingCurrent(DC) 1.5A OperatingJunctionTemp.Range −40°Cto+125°C (1) TheminimumoperatingvalueforV isequaltoeither[V +V ]or2.5V,whicheverisgreater. IN OUT(NOM) DROPOUT Electrical Characteristics LP3962/LP3965 LimitsinstandardtypefaceareforT =25°C,andlimitsinboldfacetypeapplyoverthefulloperatingtemperaturerange. J Unlessotherwisespecified:V =V +1V,I =10mA,C =33µF,V =V -0.3V. IN O(NOM) L OUT SD IN Symbol Parameter Conditions Typ (1) LP3962/5 (2) Units Min Max V OutputVoltageTolerance(3) 10mA≤I ≤1.5A -1.5 +1.5 O L 0 % V +1≤V ≤7.0V -3.0 +3.0 OUT IN V AdjustPinVoltage(ADJversion) 10mA≤I ≤1.5A 1.198 1.234 ADJ L 1.216 V V +1.5V≤V ≤7.0V 1.180 1.253 OUT IN ΔV OutputVoltageLineRegulation V +1V<V <7.0V, 0.02 % OL OUT IN (3) 0.06 ΔV /ΔI OutputVoltageLoad 10mA<I <1.5A 0.04 % O OUT L Regulation(3) 0.09 V -V I =150mA 38 45 IN OUT L 55 DropoutVoltage(4) mV I =1.5A 380 450 L 550 I =150mA 4 9 L GroundPinCurrentInNormal 10 I mA GND OperationMode I =1.5A 5 14 L 15 I GroundPinCurrentInShutdown V ≤0.2V 15 25 µA GND SD Mode(5) 75 I PeakOutputCurrent See (6) 2.5 2.0 A O(PK) 1.7 SHORTCIRCUITPROTECTION I ShortCircuitCurrent 4.5 A SC OVERTEMPERATUREPROTECTION Tsh(t) ShutdownThreshold 165 °C Tsh(h) ThermalShutdownHysteresis 10 °C SHUTDOWNINPUT Output=High V V –0.3 IN IN V ShutdownThreshold V SDT Output=Low 0 0.2 T Turn-offdelay I =1.5A 20 µs dOFF L (1) Typicalnumbersareat25°Candrepresentthemostlikelyparametricnorm. (2) Limitsare100%productiontestedat25°C.Limitsovertheoperatingtemperaturerangearespecifiedthroughcorrelationusing StatisticalQualityControl(SQC)methods.ThelimitsareusedtocalculateTI'sAverageOutgoingQualityLevel(AOQL). (3) Outputvoltagelineregulationisdefinedasthechangeinoutputvoltagefromthenominalvalueduetochangeintheinputlinevoltage. Outputvoltageloadregulationisdefinedasthechangeinoutputvoltagefromthenominalvalueduetochangeinloadcurrent.Theline andloadregulationspecificationcontainsonlythetypicalnumber.However,thelimitsforlineandloadregulationareincludedinthe outputvoltagetolerancespecification. (4) Dropoutvoltageisdefinedastheminimuminputtooutputdifferentialvoltageatwhichtheoutputdrops2%belowthenominalvalue. Dropoutvoltagespecificationappliesonlytooutputvoltagesof2.5Vandabove.Foroutputvoltagesbelow2.5V,thedrop-outvoltageis nothingbuttheinputtooutputdifferential,sincetheminimuminputvoltageis2.5V. (5) Thisspecificationhasbeentestedfor−40°C≤T ≤85°Csincethetemperatureriseofthedeviceisnegligibleundershutdown J conditions. (6) Atelevatedtemperatures,devicesmustbederatedbasedonpackagethermalresistance.ThedevicesinTO-220packagemustbe deratedatθ =50°C/W(with0.5in2,1oz.copperarea),junction-to-ambient(withnoheatsink).ThedevicesintheSFM/TO-263 jA surface-mountpackagemustbederatedatθ =60°C/W(with0.5in2,1oz.copperarea),junction-to-ambient.ThedevicesinSOT-223 jA packagemustbederatedatθ =90°C/W(with0.5in2,1oz.copperarea),junction-to-ambient. jA Copyright©2000–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:LP3962 LP3965

LP3962, LP3965 SNVS066H–MAY2000–REVISEDAPRIL2013 www.ti.com Electrical Characteristics LP3962/LP3965 (continued) LimitsinstandardtypefaceareforT =25°C,andlimitsinboldfacetypeapplyoverthefulloperatingtemperaturerange. J Unlessotherwisespecified:V =V +1V,I =10mA,C =33µF,V =V -0.3V. IN O(NOM) L OUT SD IN Symbol Parameter Conditions Typ (1) LP3962/5 (2) Units Min Max T Turn-ondelay I =1.5A 25 µs dON L I SDInputCurrent V =V 1 nA SD SD IN ERRORFLAGCOMPARATOR V Threshold See (7) 10 5 16 % T V ThresholdHysteresis See (7) 5 2 8 % TH V ErrorFlagSaturation I =100µA 0.02 0.1 V EF(Sat) sink Td FlagResetDelay 1 µs I ErrorFlagPinLeakageCurrent 1 nA lk I ErrorFlagPinSinkCurrent V =0.5V(overtemp.) 1 mA max Error ACPARAMETERS V =V +1.5V 60 IN OUT C =100uF OUT V =3.3V OUT PSRR RippleRejection dB V =V +0.3V 40 IN OUT C =100uF OUT V =3.3V OUT ρ OutputNoiseDensity f=120Hz 0.8 µV n(l/f BW=10Hz–100kHz 150 e OutputNoiseVoltage(rms) µV(rms) n BW=300Hz–300kHz 100 (7) ErrorFlagthresholdandhysteresisarespecifiedaspercentageofregulatedoutputvoltage. 6 SubmitDocumentationFeedback Copyright©2000–2013,TexasInstrumentsIncorporated ProductFolderLinks:LP3962 LP3965

LP3962, LP3965 www.ti.com SNVS066H–MAY2000–REVISEDAPRIL2013 Typical Performance Characteristics Unlessotherwisespecified,V =V +1V,V =2.5V,C =33µF,I =10mA,C =68µF,V =V ,andT =25°C. IN O(NOM) OUT OUT OUT IN SD IN A Drop-OutVoltage Drop-OutVoltage vs vs TemperatureforDifferentLoadCurrents TemperatureforDifferentOutputVoltages(I =800mA OUT Figure4. Figure5. GroundPinCurrent GroundPinCurrent vs vs InputVoltage(V =V ) InputVoltage(V =100mV) SD IN SD Figure6. Figure7. GroundCurrent GroundCurrent vs vs Temperature(V =V ) Temperature(V =0V SD IN SD Figure8. Figure9. Copyright©2000–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:LP3962 LP3965

LP3962, LP3965 SNVS066H–MAY2000–REVISEDAPRIL2013 www.ti.com Typical Performance Characteristics (continued) Unlessotherwisespecified,V =V +1V,V =2.5V,C =33µF,I =10mA,C =68µF,V =V ,andT =25°C. IN O(NOM) OUT OUT OUT IN SD IN A GroundPinCurrent InputVoltage vs vs ShutdownPinVoltage OutputVoltage Figure10. Figure11. OutputNoiseDensity,V =2.5V OutputNoiseDensity,V =5V OUT OUT Figure12. Figure13. RippleRejection vs LoadTransientResponse Frequency Figure14. Figure15. 8 SubmitDocumentationFeedback Copyright©2000–2013,TexasInstrumentsIncorporated ProductFolderLinks:LP3962 LP3965

LP3962, LP3965 www.ti.com SNVS066H–MAY2000–REVISEDAPRIL2013 Typical Performance Characteristics (continued) Unlessotherwisespecified,V =V +1V,V =2.5V,C =33µF,I =10mA,C =68µF,V =V ,andT =25°C. IN O(NOM) OUT OUT OUT IN SD IN A δV OUT vs Temperature NoiseDensityV =3.5V,V =2.5V,I =10mA IN OUT L Figure16. Figure17. LineTransientResponse LineTransientResponse Figure18. Figure19. LineTransientResponse(I =1.5A) LineTransientResponse(I =1.5A) OUT OUT Figure20. Figure21. Copyright©2000–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:LP3962 LP3965

LP3962, LP3965 SNVS066H–MAY2000–REVISEDAPRIL2013 www.ti.com APPLICATIONS INFORMATION EXTERNAL CAPACITORS Like any low-dropout regulator, external capacitors are required to assure stability. these capacitors must be correctlyselectedforproperperformance. INPUT CAPACITOR: The LP3962/5 requires a low source impedance to maintain regulator stability because the internal bias circuitry is connected directly to V . The input capacitor must be located less than 1 cm from the IN LP3962/5 device and connected directly to the input and ground pins using traces which have no other currents flowingthroughthem(seePCBLAYOUT). The minimum allowable input capacitance for a given application depends on the type of the capacitor and ESR (equivalent series resistance). A lower ESR capacitor allows the use of less capacitance, while higher ESR types (likealuminumelectrolytics)requiremorecapacitance. The lowest value of input capacitance that can be used for stable full-load operation is 68 µF (assuming it is a ceramicorlow-ESRTantalumwithESRlessthan100mΩ). TodeterminetheminimuminputcapacitanceamountandESRvalue,anapproximationwhichshouldbeusedis: C ESR(mΩ)/C (µF)≤1.5 IN IN This shows that input capacitors with higher ESR values can be used if sufficient total capacitance is provided. Capacitor types (aluminum, ceramic, and tantalum) can be mixed in parallel, but the total equivalent input capacitance/ESRmustbedefinedasabovetoassurestableoperation. IMPORTANT: The input capacitor must maintain its ESR and capacitance in the "stable range" over the entire temperaturerangeoftheapplicationtoassurestability(seeCAPACITORCHARACTERISTICS). OUTPUT CAPACITOR: An output capacitor is also required for loop stability. It must be located less than 1 cm fromtheLP3962/5deviceandconnecteddirectlytotheoutputandgroundpinsusingtraceswhichhavenoother currentsflowingthroughthem(seePCBLAYOUT). The minimum value of the output capacitance that can be used for stable full-load operation is 33 µF, but it may be increased without limit. The output capacitor's ESR is critical because it forms a zero to provide phase lead whichisrequiredforloopstability.TheESRmustfallwithinthespecifiedrange: 0.2Ω≤C ESR≤5Ω OUT The lower limit of 200 mΩ means that ceramic capacitors are not suitable for use as LP3962/5 output capacitors (but can be used on the input). Some ceramic capacitance can be used on the output if the total equivalent ESR is in the stable range: when using a 100 µF Tantalum as the output capacitor, approximately 3 µF of ceramic capacitancecanbeappliedbeforestabilitybecomesmarginal. IMPORTANT: The output capacitor must meet the requirements for minimum amount of capacitance and also have an appropriate ESR value over the full temperature range of the application to assure stability (see CAPACITORCHARACTERISTICS). SELECTING A CAPACITOR It is important to note that capacitance tolerance and variation with temperature must be taken into consideration when selecting a capacitor so that the minimum required amount of capacitance is provided over the full operating temperature range. In general, a good Tantalum capacitor will show very little capacitance variation with temperature, but a ceramic may not be as good (depending on dielectric type). Aluminum electrolytics also typicallyhavelargetemperaturevariationofcapacitancevalue. Equally important to consider is a capacitor's ESR change with temperature: this is not an issue with ceramics, as their ESR is extremely low. However, it is very important in Tantalum and aluminum electrolytic capacitors. Both show increasing ESR at colder temperatures, but the increase in aluminum electrolytic capacitors is so severetheymaynotbefeasibleforsomeapplications(seeCAPACITORCHARACTERISTICS). 10 SubmitDocumentationFeedback Copyright©2000–2013,TexasInstrumentsIncorporated ProductFolderLinks:LP3962 LP3965

LP3962, LP3965 www.ti.com SNVS066H–MAY2000–REVISEDAPRIL2013 CAPACITOR CHARACTERISTICS CERAMIC: For values of capacitance in the 10 to 100 µF range, ceramics are usually larger and more costly than tantalums but give superior AC performance for bypassing high frequency noise because of very low ESR (typically less than 10 mΩ). However, some dielectric types do not have good capacitance characteristics as a functionofvoltageandtemperature. Z5U and Y5V dielectric ceramics have capacitance that drops severely with applied voltage. A typical Z5U or Y5Vcapacitorcanlose60%ofitsratedcapacitancewithhalfoftheratedvoltageappliedtoit.TheZ5UandY5V also exhibit a severe temperature effect, losing more than 50% of nominal capacitance at high and low limits of thetemperaturerange. X7R and X5R dielectric ceramic capacitors are strongly recommended if ceramics are used, as they typically maintain a capacitance range within ±20% of nominal over full operating ratings of temperature and voltage. Of course,theyaretypicallylargerandmorecostlythanZ5U/Y5Utypesforagivenvoltageandcapacitance. TANTALUM: Solid Tantalum capacitors are recommended for use on the output because their typical ESR is very close to the ideal value required for loop compensation. They also work well as input capacitors if selected tomeettheESRrequirementspreviouslylisted. Tantalums also have good temperature stability: a good quality Tantalum will typically show a capacitance value that varies less than 10-15% across the full temperature range of 125°C to −40°C. ESR will vary only about 2X goingfromthehightolowtemperaturelimits. The increasing ESR at lower temperatures can cause oscillations when marginal quality capacitors are used (if theESRofthecapacitorisneartheupperlimitofthestabilityrangeatroomtemperature). ALUMINUM:Thiscapacitortypeoffersthemostcapacitanceforthemoney.Thedisadvantagesarethattheyare larger in physical size, not widely available in surface mount, and have poor AC performance (especially at higherfrequencies)duetohigherESRandESL. Compared by size, the ESR of an aluminum electrolytic is higher than either Tantalum or ceramic, and it also varies greatly with temperature. A typical aluminum electrolytic can exhibit an ESR increase of as much as 50X whengoingfrom25°Cdownto −40°C. It should also be noted that many aluminum electrolytics only specify impedance at a frequency of 120 Hz, which indicates they have poor high frequency performance. Only aluminum electrolytics that have an impedance specifiedatahigherfrequency(between20kHzand100kHz)shouldbeusedfortheLP396X.Deratingmustbe appliedtothemanufacturer'sESRspecification,sinceitistypicallyonlyvalidatroomtemperature. Any applications using aluminum electrolytics should be thoroughly tested at the lowest ambient operating temperaturewhereESRismaximum. PCB LAYOUT GoodPClayoutpracticesmustbeusedorinstabilitycanbeinducedbecauseofgroundloopsandvoltagedrops. The input and output capacitors must be directly connected to the input, output, and ground pins of the LP3962/5 usingtraceswhichdonothaveothercurrentsflowinginthemKelvinconnect). The best way to do this is to lay out C and C near the device with short traces to the V , V , and ground IN OUT IN OUT pins. The regulator ground pin should be connected to the external circuit ground so that the regulator and its capacitorshavea"singlepointground". Itshouldbenotedthatstabilityproblemshavebeenseeninapplicationswhere"vias"toaninternalgroundplane were used at the ground points of the LP3962/5 IC and the input and output capacitors. This was caused by varying ground potentials at these nodes resulting from current flowing through the ground plane. Using a single pointgroundtechniquefortheregulatorandit'scapacitorsfixedtheproblem. Since high current flows through the traces going into V and coming from V , Kelvin connect the capacitor IN OUT leadstothesepinssothereisnovoltagedropinserieswiththeinputandoutputcapacitors. Copyright©2000–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:LP3962 LP3965

LP3962, LP3965 SNVS066H–MAY2000–REVISEDAPRIL2013 www.ti.com RFI/EMI SUSCEPTIBILITY RFI (radio frequency interference) and EMI (electromagnetic interference) can degrade any integrated circuit's performance because of the small dimensions of the geometries inside the device. In applications where circuit sources are present which generate signals with significant high frequency energy content (> 1 MHz), care must betakentoensurethatthisdoesnotaffecttheICregulator. If RFI/EMI noise is present on the input side of the LP396X regulator (such as applications where the input source comes from the output of a switching regulator), good ceramic bypass capacitors must be used at the inputpinoftheLP396X. If a load is connected to the LP396X output which switches at high speed (such as a clock), the high-frequency current pulses required by the load must be supplied by the capacitors on the LP396X output. Since the bandwidth of the regulator loop is less than 100 kHz, the control circuitry cannot respond to load changes above that frequency. The means the effective output impedance of the LP396X at frequencies above 100 kHz is determinedonlybytheoutputcapacitor(s). In applications where the load is switching at high speed, the output of the LP396X may need RF isolation from the load. It is recommended that some inductance be placed between the LP396X output capacitor and the load, andgoodRFbypasscapacitorsbeplaceddirectlyacrosstheload. PCB layout is also critical in high noise environments, since RFI/EMI is easily radiated directly into PC traces. Noisy circuitry should be isolated from "clean" circuits where possible, and grounded through a separate path. At MHz frequencies, ground planes begin to look inductive and RFI/EMI can cause ground bounce across the groundplane. In multi-layer PCB applications, care should be taken in layout so that noisy power and ground planes do not radiatedirectlyintoadjacentlayerswhichcarryanalogpowerandground. OUTPUT ADJUSTMENT An adjustable output device has output voltage range of 1.216V to 5.1V. To obtain a desired output voltage, can beusedwithR1alwaysa10kΩresistor. Foroutputstability,C mustbebetween68pFand100pF. F TURN-ON CHARACTERISTICS FOR OUTPUT VOLTAGES PROGRAMMED TO 2.0V OR BELOW As Vin increases during start-up, the regulator output will track the input until Vin reaches the minimum operating voltage (typically about 2.2V). For output voltages programmed to 2.0V or below, the regulator output may momentarily exceed its programmed output voltage during start up. Outputs programmed to voltages above 2.0V arenotaffectedbythisbehavior. OUTPUT NOISE Noiseisspecifiedintwoways- Spot Noise or Output noise density is the RMS sum of all noise sources, measured at the regulator output, at a specific frequency (measured with a 1Hz bandwidth). This type of noise is usually plotted on a curve as a functionoffrequency. Total output Noise or Broad-band noise is the RMS sum of spot noise over a specified bandwidth, usually severaldecadesoffrequencies. Attention should be paid to the units of measurement. Spot noise is measured in units µV/√Hz or nV/√Hz and totaloutputnoiseismeasuredinµV(rms). 12 SubmitDocumentationFeedback Copyright©2000–2013,TexasInstrumentsIncorporated ProductFolderLinks:LP3962 LP3965

LP3962, LP3965 www.ti.com SNVS066H–MAY2000–REVISEDAPRIL2013 The primary source of noise in low-dropout regulators is the internal reference. In CMOS regulators, noise has a low frequency component and a high frequency component, which depend strongly on the silicon area and quiescent current. Noise can be reduced in two ways: by increasing the transistor area or by increasing the current drawn by the internal reference. Increasing the area will decrease the chance of fitting the die into a smaller package. Increasing the current drawn by the internal reference increases the total supply current (ground pin current). Using an optimized trade-off of ground pin current and die size, LP3962/LP3965 achieves lownoiseperformanceandlowquiescentcurrentoperation. The total output noise specification for LP3962/LP3965 is presented in the Electrical Characteristics table. The Outputnoisedensityatdifferentfrequenciesisrepresentedbyacurveundertypicalperformancecharacteristics. SHORT-CIRCUIT PROTECTION The LP3962and LP3965 is short circuit protected and in the event of a peak over-current condition, the short- circuit control loop will rapidly drive the output PMOS pass element off. Once the power pass element shuts down, the control loop will rapidly cycle the output on and off until the average power dissipation causes the thermal shutdown circuit to respond to servo the on/off cycling to a lower frequency. Please refer to the section onthermalinformationforpowerdissipationcalculations. ERROR FLAG OPERATION The LP3962/LP3965 produces a logic low signal at the Error Flag pin when the output drops out of regulation due to low input voltage, current limiting, or thermal limiting. This flag has a built in hysteresis. The timing diagram in Figure 22 shows the relationship between the ERROR and the output voltage. In this example, the inputvoltageischangedtodemonstratethefunctionalityoftheErrorFlag. The internal Error flag comparator has an open drain output stage. Hence, the ERROR pin should be pulled high through a pull up resistor. Although the ERROR pin can sink current of 1mA, this current is energy drain from the input supply. Hence, the value of the pull up resistor should be in the range of 10kΩ to 1MΩ. The ERROR pin mustbeconnectedtogroundifthisfunctionisnotused.Itshouldalsobenotedthatwhentheshutdownpin ispulledlow,theERRORpinisforcedtobeinvalidforreasonsofsavingpowerinshutdownmode. Figure22. ErrorFlagOperation Copyright©2000–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:LP3962 LP3965

LP3962, LP3965 SNVS066H–MAY2000–REVISEDAPRIL2013 www.ti.com SENSE PIN In applications where the regulator output is not very close to the load, LP3965 can provide better remote load regulation using the SENSE pin. Figure 23 depicts the advantage of the SENSE option. LP3962 regulates the voltage at the output pin. Hence, the voltage at the remote load will be the regulator output voltage minus the drop across the trace resistance. For example, in the case of a 3.3V output, if the trace resistance is 100mΩ, the voltageattheremoteloadwillbe3.15Vwith1.5Aofloadcurrent,I .TheLP3965regulatesthevoltageatthe LOAD sense pin. Connecting the sense pin to the remote load will provide regulation at the remote load, as shown in Figure23.Ifthesenseoptionpinisnotrequired,thesensepinmustbeconnectedtotheV pin. OUT Figure23. ImprovingremoteloadregulationusingLP3965 SHUTDOWN OPERATION A CMOS Logic level signal at the shutdown ( SD) pin will turn-off the regulator. Pin SD must be actively terminated through a 10kΩ pull-up resistor for a proper operation. If this pin is driven from a source that actively pulls high and low (such as a CMOS rail to rail comparator), the pull-up resistor is not required. This pin must be tiedtoVinifnotused. DROPOUT VOLTAGE The dropout voltage of a regulator is defined as the minimum input-to-output differential required to stay within 2% of the output voltage. The LP3962/LP3965 use an internal MOSFET with an Rds(on) of 240mΩ (typically). ForCMOSLDOs,thedropoutvoltageistheproductoftheloadcurrentandtheRds(on)oftheinternalMOSFET. REVERSE CURRENT PATH The internal MOSFET in LP3962and LP3965 has an inherent parasitic diode. During normal operation, the input voltage is higher than the output voltage and the parasitic diode is reverse biased. However, if the output is pulledabovetheinputinanapplication,thencurrentflowsfromtheoutputtotheinputastheparasiticdiodegets forwardbiased.Theoutputcanbepulledabovetheinputaslongasthecurrentintheparasiticdiodeislimitedto 200mAcontinuousand1Apeak. MAXIMUM OUTPUT CURRENT CAPABILITY LP3962 and LP3965 can deliver a continuous current of 1.5 A over the full operating temperature range. A heatsink may be required depending on the maximum power dissipation and maximum ambient temperature of the application. Under all possible conditions, the junction temperature must be within the range specified under operatingconditions.Thetotalpowerdissipationofthedeviceisgivenby: P =(V −V )I +(V )I D IN OUT OUT IN GND 14 SubmitDocumentationFeedback Copyright©2000–2013,TexasInstrumentsIncorporated ProductFolderLinks:LP3962 LP3965

LP3962, LP3965 www.ti.com SNVS066H–MAY2000–REVISEDAPRIL2013 whereI istheoperatinggroundcurrentofthedevice(specifiedunderElectricalCharacteristics). GND The maximum allowable temperature rise (T ) depends on the maximum ambient temperature (T ) of the Rmax Amax application,andthemaximumallowablejunctiontemperature(T ): Jmax T =T −T Rmax Jmax Amax The maximum allowable value for junction to ambient Thermal Resistance, θ , can be calculated using the JA formula: θ =T /P JA Rmax D LP3962 and LP3965 are available in TO-220, SFM/TO-263, and SOT-223 packages. The thermal resistance depends on amount of copper area or heat sink, and on air flow. If the maximum allowable value of θ JA calculated above is ≥ 60 °C/W for TO-220 package, ≥60 °C/W for SFM/TO-263 package, and ≥ 140 °C/W for SOT-223 package, no heatsink is needed since the package can dissipate enough heat to satisfy these requirements.Ifthevalueforallowableθ fallsbelowtheselimits,aheatsinkisrequired. JA HEATSINKING TO-220 PACKAGES The thermal resistance of a TO-220 package can be reduced by attaching it to a heat sink or a copper plane on aPCboard.Ifacopperplaneistobeused,thevaluesofθ willbesameasshowninnextsectionforSFM/TO- JA 263package. Theheatsinktobeusedintheapplicationshouldhaveaheatsinktoambientthermalresistance, θ ≤θ −θ −θ . HA JA CH JC In this equation, θ is the thermal resistance from the junction to the surface of the heat sink and θ is the CH JC thermal resistance from the junction to the surface of the case. θ is about 3°C/W for a TO-220 package. The JC value for θ depends on method of attachment, insulator, etc. θ varies between 1.5°C/W to 2.5°C/W. If the CH CH exactvalueisunknown,2°C/Wcanbeassumed. HEATSINKING SFM/TO-263 AND SOT-223 PACKAGES The SFM/TO-263 and SOT-223 packages use the copper plane on the PCB as a heatsink. The tab of these packages are soldered to the copper plane for heat sinking. Figure 24 shows a curve for the θ of SFM/TO-263 JA package for different copper area sizes, using a typical PCB with 1 ounce copper and no solder mask over the copperareaforheatsinking. Figure24. θ vsCopper(1Ounce)AreaforSFM/TO-263package JA As shown in the figure, increasing the copper area beyond 1 square inch produces very little improvement. The minimumvalueforθ fortheSFM/TO-263packagmountedtoaPCBis32°C/W. JA Figure 25 shows the maximum allowable power dissipation for SFM/TO-263 packages for different ambient temperatures,assumingθ is35°C/Wandthemaximumjunctiontemperatureis125°C. JA Copyright©2000–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:LP3962 LP3965

LP3962, LP3965 SNVS066H–MAY2000–REVISEDAPRIL2013 www.ti.com Figure25. MaximumpowerdissipationvsambienttemperatureforSFM/TO-263package Figure26showsacurvefortheθ ofSOT-223packagefordifferentcopperareasizes,usingatypicalPCBwith JA 1ouncecopperandnosoldermaskoverthecopperareaforheatsinking. Figure26. θ vsCopper(1Ounce)AreaforSOT-223package JA Figure27throughFigure35 showdifferentlayoutscenariosforSOT-223package. Figure27. SCENARIOA,θ =148°C/W JA Figure28. SCENARIOB,θ =125°C/W JA 16 SubmitDocumentationFeedback Copyright©2000–2013,TexasInstrumentsIncorporated ProductFolderLinks:LP3962 LP3965

LP3962, LP3965 www.ti.com SNVS066H–MAY2000–REVISEDAPRIL2013 Figure29. SCENARIOC,θ =92°C/W JA Figure30. SCENARIOD,θ =83°C/W JA Copyright©2000–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 17 ProductFolderLinks:LP3962 LP3965

LP3962, LP3965 SNVS066H–MAY2000–REVISEDAPRIL2013 www.ti.com Figure31. SCENARIOE,θ =77°C/W JA Figure32. SCENARIOF,θ =75°C/W JA 18 SubmitDocumentationFeedback Copyright©2000–2013,TexasInstrumentsIncorporated ProductFolderLinks:LP3962 LP3965

LP3962, LP3965 www.ti.com SNVS066H–MAY2000–REVISEDAPRIL2013 Figure33. SCENARIOG,θ =113°C/W JA Figure34. SCENARIOH,θ =79°C/W JA Copyright©2000–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 19 ProductFolderLinks:LP3962 LP3965

LP3962, LP3965 SNVS066H–MAY2000–REVISEDAPRIL2013 www.ti.com Figure35. SCENARIOI,θ =78.5°C/W JA 20 SubmitDocumentationFeedback Copyright©2000–2013,TexasInstrumentsIncorporated ProductFolderLinks:LP3962 LP3965

LP3962, LP3965 www.ti.com SNVS066H–MAY2000–REVISEDAPRIL2013 REVISION HISTORY ChangesfromRevisionG(April2013)toRevisionH Page • ChangedlayoutofNationalDataSheettoTIformat.......................................................................................................... 20 Copyright©2000–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 21 ProductFolderLinks:LP3962 LP3965

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) LP3962EMP-1.8 NRND SOT-223 NDC 5 1000 TBD Call TI Call TI -40 to 125 LBCB LP3962EMP-1.8/NOPB ACTIVE SOT-223 NDC 5 1000 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 LBCB & no Sb/Br) LP3962EMP-2.5 NRND SOT-223 NDC 5 1000 TBD Call TI Call TI -40 to 125 LBDB LP3962EMP-2.5/NOPB ACTIVE SOT-223 NDC 5 1000 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 LBDB & no Sb/Br) LP3962EMP-3.3 NRND SOT-223 NDC 5 1000 TBD Call TI Call TI -40 to 125 LBEB LP3962EMP-3.3/NOPB ACTIVE SOT-223 NDC 5 1000 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 LBEB & no Sb/Br) LP3962ES-1.8/NOPB ACTIVE DDPAK/ KTT 5 45 Pb-Free (RoHS SN Level-3-245C-168 HR -40 to 125 LP3962ES TO-263 Exempt) -1.8 LP3962ES-2.5 NRND DDPAK/ KTT 5 45 TBD Call TI Call TI -40 to 125 LP3962ES TO-263 -2.5 LP3962ES-2.5/NOPB ACTIVE DDPAK/ KTT 5 45 Pb-Free (RoHS SN Level-3-245C-168 HR -40 to 125 LP3962ES TO-263 Exempt) -2.5 LP3962ES-3.3 NRND DDPAK/ KTT 5 45 TBD Call TI Call TI -40 to 125 LP3962ES TO-263 -3.3 LP3962ES-3.3/NOPB ACTIVE DDPAK/ KTT 5 45 Pb-Free (RoHS SN Level-3-245C-168 HR -40 to 125 LP3962ES TO-263 Exempt) -3.3 LP3962ESX-1.8/NOPB ACTIVE DDPAK/ KTT 5 500 Pb-Free (RoHS SN Level-3-245C-168 HR -40 to 125 LP3962ES TO-263 Exempt) -1.8 LP3962ESX-2.5/NOPB ACTIVE DDPAK/ KTT 5 500 Pb-Free (RoHS SN Level-3-245C-168 HR -40 to 125 LP3962ES TO-263 Exempt) -2.5 LP3962ESX-3.3/NOPB ACTIVE DDPAK/ KTT 5 500 Pb-Free (RoHS SN Level-3-245C-168 HR -40 to 125 LP3962ES TO-263 Exempt) -3.3 LP3962ESX-5.0/NOPB ACTIVE DDPAK/ KTT 5 500 Pb-Free (RoHS SN Level-3-245C-168 HR -40 to 125 LP3962ES TO-263 Exempt) -5.0 LP3962ET-3.3/LB05 ACTIVE TO-220 NEB 5 45 TBD Call TI Call TI LP3962ET -3.3 LP3962ET-3.3/NOPB ACTIVE TO-220 NDH 5 45 Green (RoHS SN Level-1-NA-UNLIM -40 to 125 LP3962ET & no Sb/Br) -3.3 LP3965EMP-1.8/NOPB ACTIVE SOT-223 NDC 5 1000 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 LBKB & no Sb/Br) Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) LP3965EMP-2.5/NOPB ACTIVE SOT-223 NDC 5 1000 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 LBLB & no Sb/Br) LP3965EMP-3.3 NRND SOT-223 NDC 5 1000 TBD Call TI Call TI -40 to 125 LBNB LP3965EMP-3.3/NOPB ACTIVE SOT-223 NDC 5 1000 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 LBNB & no Sb/Br) LP3965EMP-ADJ NRND SOT-223 NDC 5 1000 TBD Call TI Call TI -40 to 125 LBRB LP3965EMP-ADJ/NOPB ACTIVE SOT-223 NDC 5 1000 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 LBRB & no Sb/Br) LP3965EMPX-ADJ/NOPB ACTIVE SOT-223 NDC 5 2000 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 LBRB & no Sb/Br) LP3965ES-1.8 NRND DDPAK/ KTT 5 45 TBD Call TI Call TI -40 to 125 LP3965ES TO-263 -1.8 LP3965ES-1.8/NOPB ACTIVE DDPAK/ KTT 5 45 Pb-Free (RoHS SN Level-3-245C-168 HR -40 to 125 LP3965ES TO-263 Exempt) -1.8 LP3965ES-2.5 NRND DDPAK/ KTT 5 45 TBD Call TI Call TI -40 to 125 LP3965ES TO-263 -2.5 LP3965ES-2.5/NOPB ACTIVE DDPAK/ KTT 5 45 Pb-Free (RoHS SN Level-3-245C-168 HR -40 to 125 LP3965ES TO-263 Exempt) -2.5 LP3965ES-3.3 NRND DDPAK/ KTT 5 45 TBD Call TI Call TI -40 to 125 LP3965ES TO-263 -3.3 LP3965ES-3.3/NOPB ACTIVE DDPAK/ KTT 5 45 Pb-Free (RoHS SN Level-3-245C-168 HR -40 to 125 LP3965ES TO-263 Exempt) -3.3 LP3965ES-ADJ NRND DDPAK/ KTT 5 45 TBD Call TI Call TI -40 to 125 LP3965ES TO-263 -ADJ LP3965ES-ADJ/NOPB ACTIVE DDPAK/ KTT 5 45 Pb-Free (RoHS SN Level-3-245C-168 HR -40 to 125 LP3965ES TO-263 Exempt) -ADJ LP3965ESX-1.8/NOPB ACTIVE DDPAK/ KTT 5 500 Pb-Free (RoHS SN Level-3-245C-168 HR -40 to 125 LP3965ES TO-263 Exempt) -1.8 LP3965ESX-2.5/NOPB ACTIVE DDPAK/ KTT 5 500 Pb-Free (RoHS SN Level-3-245C-168 HR -40 to 125 LP3965ES TO-263 Exempt) -2.5 LP3965ESX-3.3 NRND DDPAK/ KTT 5 500 TBD Call TI Call TI -40 to 125 LP3965ES TO-263 -3.3 LP3965ESX-3.3/NOPB ACTIVE DDPAK/ KTT 5 500 Pb-Free (RoHS SN Level-3-245C-168 HR -40 to 125 LP3965ES TO-263 Exempt) -3.3 LP3965ESX-ADJ/NOPB ACTIVE DDPAK/ KTT 5 500 Pb-Free (RoHS SN Level-3-245C-168 HR -40 to 125 LP3965ES TO-263 Exempt) -ADJ Addendum-Page 2

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) LP3965ET-1.8/NOPB ACTIVE TO-220 NDH 5 45 Green (RoHS SN Level-1-NA-UNLIM -40 to 125 LP3965ET & no Sb/Br) -1.8 LP3965ET-3.3/NOPB ACTIVE TO-220 NDH 5 45 Green (RoHS SN Level-1-NA-UNLIM -40 to 125 LP3965ET & no Sb/Br) -3.3 LP3965ET-ADJ/NOPB ACTIVE TO-220 NDH 5 45 Green (RoHS SN Level-1-NA-UNLIM -40 to 125 LP3965ET & no Sb/Br) -ADJ (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 3

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Addendum-Page 4

PACKAGE MATERIALS INFORMATION www.ti.com 29-Sep-2019 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) LP3962EMP-1.8 SOT-223 NDC 5 1000 330.0 16.4 7.0 7.5 2.2 12.0 16.0 Q3 LP3962EMP-1.8/NOPB SOT-223 NDC 5 1000 330.0 16.4 7.0 7.5 2.2 12.0 16.0 Q3 LP3962EMP-2.5 SOT-223 NDC 5 1000 330.0 16.4 7.0 7.5 2.2 12.0 16.0 Q3 LP3962EMP-2.5/NOPB SOT-223 NDC 5 1000 330.0 16.4 7.0 7.5 2.2 12.0 16.0 Q3 LP3962EMP-3.3 SOT-223 NDC 5 1000 330.0 16.4 7.0 7.5 2.2 12.0 16.0 Q3 LP3962EMP-3.3/NOPB SOT-223 NDC 5 1000 330.0 16.4 7.0 7.5 2.2 12.0 16.0 Q3 LP3962ESX-1.8/NOPB DDPAK/ KTT 5 500 330.0 24.4 10.75 14.85 5.0 16.0 24.0 Q2 TO-263 LP3962ESX-2.5/NOPB DDPAK/ KTT 5 500 330.0 24.4 10.75 14.85 5.0 16.0 24.0 Q2 TO-263 LP3962ESX-3.3/NOPB DDPAK/ KTT 5 500 330.0 24.4 10.75 14.85 5.0 16.0 24.0 Q2 TO-263 LP3962ESX-5.0/NOPB DDPAK/ KTT 5 500 330.0 24.4 10.75 14.85 5.0 16.0 24.0 Q2 TO-263 LP3965EMP-1.8/NOPB SOT-223 NDC 5 1000 330.0 16.4 7.0 7.5 2.2 12.0 16.0 Q3 LP3965EMP-2.5/NOPB SOT-223 NDC 5 1000 330.0 16.4 7.0 7.5 2.2 12.0 16.0 Q3 LP3965EMP-3.3 SOT-223 NDC 5 1000 330.0 16.4 7.0 7.5 2.2 12.0 16.0 Q3 LP3965EMP-3.3/NOPB SOT-223 NDC 5 1000 330.0 16.4 7.0 7.5 2.2 12.0 16.0 Q3 LP3965EMP-ADJ SOT-223 NDC 5 1000 330.0 16.4 7.0 7.5 2.2 12.0 16.0 Q3 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 29-Sep-2019 Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) LP3965EMP-ADJ/NOPB SOT-223 NDC 5 1000 330.0 16.4 7.0 7.5 2.2 12.0 16.0 Q3 LP3965EMPX-ADJ/NOPB SOT-223 NDC 5 2000 330.0 16.4 7.0 7.5 2.2 12.0 16.0 Q3 LP3965ESX-1.8/NOPB DDPAK/ KTT 5 500 330.0 24.4 10.75 14.85 5.0 16.0 24.0 Q2 TO-263 LP3965ESX-2.5/NOPB DDPAK/ KTT 5 500 330.0 24.4 10.75 14.85 5.0 16.0 24.0 Q2 TO-263 LP3965ESX-3.3 DDPAK/ KTT 5 500 330.0 24.4 10.75 14.85 5.0 16.0 24.0 Q2 TO-263 LP3965ESX-3.3/NOPB DDPAK/ KTT 5 500 330.0 24.4 10.75 14.85 5.0 16.0 24.0 Q2 TO-263 LP3965ESX-ADJ/NOPB DDPAK/ KTT 5 500 330.0 24.4 10.75 14.85 5.0 16.0 24.0 Q2 TO-263 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) LP3962EMP-1.8 SOT-223 NDC 5 1000 367.0 367.0 35.0 LP3962EMP-1.8/NOPB SOT-223 NDC 5 1000 367.0 367.0 35.0 LP3962EMP-2.5 SOT-223 NDC 5 1000 367.0 367.0 35.0 LP3962EMP-2.5/NOPB SOT-223 NDC 5 1000 367.0 367.0 35.0 LP3962EMP-3.3 SOT-223 NDC 5 1000 367.0 367.0 35.0 LP3962EMP-3.3/NOPB SOT-223 NDC 5 1000 367.0 367.0 35.0 PackMaterials-Page2

PACKAGE MATERIALS INFORMATION www.ti.com 29-Sep-2019 Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) LP3962ESX-1.8/NOPB DDPAK/TO-263 KTT 5 500 367.0 367.0 45.0 LP3962ESX-2.5/NOPB DDPAK/TO-263 KTT 5 500 367.0 367.0 45.0 LP3962ESX-3.3/NOPB DDPAK/TO-263 KTT 5 500 367.0 367.0 45.0 LP3962ESX-5.0/NOPB DDPAK/TO-263 KTT 5 500 367.0 367.0 45.0 LP3965EMP-1.8/NOPB SOT-223 NDC 5 1000 367.0 367.0 35.0 LP3965EMP-2.5/NOPB SOT-223 NDC 5 1000 367.0 367.0 35.0 LP3965EMP-3.3 SOT-223 NDC 5 1000 367.0 367.0 35.0 LP3965EMP-3.3/NOPB SOT-223 NDC 5 1000 367.0 367.0 35.0 LP3965EMP-ADJ SOT-223 NDC 5 1000 367.0 367.0 35.0 LP3965EMP-ADJ/NOPB SOT-223 NDC 5 1000 367.0 367.0 35.0 LP3965EMPX-ADJ/NOPB SOT-223 NDC 5 2000 367.0 367.0 35.0 LP3965ESX-1.8/NOPB DDPAK/TO-263 KTT 5 500 367.0 367.0 45.0 LP3965ESX-2.5/NOPB DDPAK/TO-263 KTT 5 500 367.0 367.0 45.0 LP3965ESX-3.3 DDPAK/TO-263 KTT 5 500 367.0 367.0 45.0 LP3965ESX-3.3/NOPB DDPAK/TO-263 KTT 5 500 367.0 367.0 45.0 LP3965ESX-ADJ/NOPB DDPAK/TO-263 KTT 5 500 367.0 367.0 45.0 PackMaterials-Page3

MECHANICAL DATA NEB0005B www.ti.com

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MECHANICAL DATA KTT0005B TS5B (Rev D) BOTTOM SIDE OF PACKAGE www.ti.com

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