Product Sample & Technical Tools & Support & Reference Folder Buy Documents Software Community Design LP38691,LP38693,LP38691-Q1,LP38693-Q1 SNVS321O–JANUARY2005–REVISEDDECEMBER2015 LP3869x/-Q1 500-mA Low-Dropout CMOS Linear Regulators Stable With Ceramic Output Capacitors 1 Features 3 Description • WideInputVoltageRange(2.7Vto10V) The LP3869x low-dropout CMOS linear regulators 1 provide tight output tolerance (2% typical), extremely • AllWSONOptionsareAvailableasAEC-Q100 low dropout voltage (250 mV at 500-mA load current, Grade1 V = 5 V), and excellent AC performance using OUT • 2%OutputAccuracy(25°C) ultralow equivalent series resistance (ESR) ceramic • LowDropoutVoltage:250mVat500mA(Typical, outputcapacitors. 5VOut) The low thermal resistance of the WSON, SOT-223, • Precision(Trimmed)BandgapReference and TO-252 packages allow use of the full operating current even in high ambient temperature • EnsuredSpecificationsfor –40°Cto125°C environments. • 1-µAOff-StateQuiescentCurrent The use of a PMOS power transistor means that no • ThermalOverloadProtection DC base-drive current is required to bias it, thus • FoldbackCurrentLimiting allowing ground pin current to remain below 100 µA • GroundPinCurrent:55µA(typical)atfullload regardless of load current, input voltage, or operating temperature. • EnablePin(LP38693) DeviceInformation(1) 2 Applications PARTNUMBER PACKAGE BODYSIZE(NOM) • HardDiskDrives TO-252(3) 6.58mm×6.10mm • NotebookComputers LP38691 WSON(6) 3.00mm×3.00mm • Battery-PoweredDevices SOT-223(5) 6.50mm×3.56mm LP38693 • PortableInstrumentation WSON(6) 3.00mm×3.00mm LP38691-Q1 WSON(6) 3.00mm×3.00mm LP38693-Q1 (1) For all available packages, see the orderable addendum at theendofthedatasheet. 4 Typical Application Circuits VIN VOUT IN OUT VIN VOUT IN OUT LP38691 ** SNS EN LP38693 1 µF * GND 1 µF * VEN SNS** 1 µF * GND 1 µF * *Minimumvaluerequiredforstability *Minimumvaluerequiredforstability **WSONpackagedevicesonly **WSONpackagedevicesonly 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA.

LP38691,LP38693,LP38691-Q1,LP38693-Q1 SNVS321O–JANUARY2005–REVISEDDECEMBER2015 www.ti.com Table of Contents 1 Features.................................................................. 1 8.4 DeviceFunctionalModes........................................13 2 Applications........................................................... 1 9 ApplicationandImplementation........................ 14 3 Description............................................................. 1 9.1 ApplicationInformation............................................14 4 TypicalApplicationCircuits................................. 1 9.2 TypicalApplication .................................................14 5 RevisionHistory..................................................... 2 10 PowerSupplyRecommendations..................... 19 6 PinConfigurationandFunctions......................... 3 11 Layout................................................................... 19 11.1 LayoutGuidelines.................................................19 7 Specifications......................................................... 4 11.2 LayoutExample....................................................19 7.1 AbsoluteMaximumRatings......................................4 11.3 WSONMounting...................................................20 7.2 ESDRatings:LP38691andLP38693.......................4 12 DeviceandDocumentationSupport................. 21 7.3 ESDRatings:LP38691-Q1andLP38693-Q1...........4 7.4 RecommendedOperatingConditions.......................4 12.1 DocumentationSupport........................................21 7.5 ThermalInformation..................................................5 12.2 RelatedLinks........................................................21 7.6 ElectricalCharacteristics...........................................5 12.3 CommunityResources..........................................21 7.7 TypicalCharacteristics..............................................7 12.4 Trademarks...........................................................21 12.5 ElectrostaticDischargeCaution............................21 8 DetailedDescription............................................ 11 12.6 Glossary................................................................21 8.1 Overview.................................................................11 13 Mechanical,Packaging,andOrderable 8.2 FunctionalBlockDiagrams.....................................11 Information........................................................... 21 8.3 FeatureDescription.................................................13 5 Revision History NOTE:Pagenumbersforpreviousrevisionsmaydifferfrompagenumbersinthecurrentversion. ChangesfromRevisionN(March2015)toRevisionO Page • AddedtopnavigatoriconforTIDesigns ............................................................................................................................... 1 • AddedCautionnotetoFoldbackCurrentLimitingsubsection ............................................................................................ 13 ChangesfromRevisionM(February2015)toRevisionN Page • Added"Cout=xxpF"to"Cout=µF"forFigures4through6inTypicalCharacteristics...................................................... 1 ChangesfromRevisionL(December2014)toRevisionM Page • ChangedwordingofDescriptionandaddedoneitemtoFeatures;updateVin,VoutandVenpinnamestoIN,OUT, andENintextandgraphics .................................................................................................................................................. 1 • AddedtopnavigatoriconforTIDesigns ............................................................................................................................... 1 • Changed"PFM"to'TO-252".................................................................................................................................................. 4 • ChangedHandlingRatingstoESDRatingsformat............................................................................................................... 4 ChangesfromRevisionK(April2013)toRevisionL Page • AddedHandlingRatingtable,FeatureDescriptionsection,DeviceFunctionalModes,Applicationand Implementationsection,PowerSupplyRecommendationssection,Layoutsection,DeviceandDocumentation Supportsection,andMechanical,Packaging,andOrderableInformationsection;updatethermalvalues..........................1 ChangesfromRevisionJ(April2013)toRevisionK Page • ChangedlayoutofNationalDataSheettoTIformat........................................................................................................... 18 2 SubmitDocumentationFeedback Copyright©2005–2015,TexasInstrumentsIncorporated ProductFolderLinks:LP38691 LP38693 LP38691-Q1 LP38693-Q1

LP38691,LP38693,LP38691-Q1,LP38693-Q1 www.ti.com SNVS321O–JANUARY2005–REVISEDDECEMBER2015 6 Pin Configuration and Functions NDPPackage 3-PinTO-252 TopView NDCPackage 5-PinSOT-223 TopView EN 1 N/C 2 5 GND OUT 3 IN 4 NC-Nointernalconnection NGGPackage 6-PinWSONWithExposedThermalPad LP38691SDTopView IN 1 6 IN ExposedPad GND 2 onBottom 5 SNS (DAP) N/C 3 4 OUT NC-Nointernalconnection NGGPackage 6-PinWSONWithExposedThermalPad LP38693SDTopView IN 1 6 IN ExposedPad GND 2 onBottom 5 SNS (DAP) EN 3 4 OUT Copyright©2005–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:LP38691 LP38693 LP38691-Q1 LP38693-Q1

LP38691,LP38693,LP38691-Q1,LP38693-Q1 SNVS321O–JANUARY2005–REVISEDDECEMBER2015 www.ti.com PinFunctions PIN TO- SOT- I/O DESCRIPTION NAME WSON 252 223 WSONOnly-TheDAP(ExposedPad)functionsasathermalconnectionwhen DAP — √ √ — — solderedtoacopperplane.SeeWSONMountingsectionformoreinformation. TheENpinallowstheparttobeturnedONandOFFbypullingthispinhighor EN — — 3 1 I low. Circuitgroundfortheregulator.FortheTO-252andSOT-223packagesthisis GND TAB 2 2 5 — thermallyconnectedtothedieandfunctionsasaheatsinkwhenthesoldered downtoalargecopperplane. Thisistheinputsupplyvoltagetotheregulator.ForWSONdevices,bothIN IN 3 1,6 1,6 4 I pinsmustbetiedtogetherforfullcurrentoperation(250mAmaximumperpin). OUT 1 4 4 3 O Regulatedoutputvoltage WSONOnly-OutputSNSpinallowsremotesensingattheloadwhicheliminate SNS — 5 5 — I theerrorinoutputvoltageduetovoltagedropscausedbytheresistanceinthe tracesbetweentheregulatorandtheload.ThispinmustbetiedtoOUT. 7 Specifications 7.1 Absolute Maximum Ratings(1)(2) MIN MAX UNIT Leadtemp.(Soldering,5seconds) 260 °C Powerdissipation(3) InternallyLimited V V(max)Allpins(withrespecttoGND) –0.3 12 V I (4) InternallyLimited V OUT Junctiontemperature –40 150 °C Storagetemperature,T −65 150 stg (1) Absolutemaximumratingsindicatelimitsbeyondwhichdamagetothecomponentmayoccur.Operatingratingsindicateconditionsfor whichthedeviceisintendedtobefunctional,butdonotensurespecificperformancelimits.Forensuredspecifications,seeElectrical Characteristics.Specificationsdonotapplywhenoperatingthedeviceoutsideofitsratedoperatingconditions. (2) IfMilitary/Aerospacespecifieddevicesarerequired,contacttheTexasInstrumentsSalesOffice/Distributorsforavailabilityand specifications. (3) Atelevatedtemperatures,devicepowerdissipationmustbederatedbasedonpackagethermalresistanceandheatsinkvalues(ifa heatsinkisused).WhenusingtheWSONpackage,refertoAN-1187LeadlessLeadframePackage(LLP),SNOA401,andtheWSON Mountingsectioninthisdatasheet.Ifpowerdissipationcausesthejunctiontemperaturetoexceedspecifiedlimits,thedevicegoesinto thermalshutdown. (4) Ifusedinadual-supplysystemwheretheregulatorloadisreturnedtoanegativesupply,theoutputpinmustbediodeclampedto ground. 7.2 ESD Ratings: LP38691 and LP38693 VALUE UNIT V Electrostaticdischarge Human-bodymodel(HBM),perANSI/ESDA/JEDECJS-001(1) ±2000 V (ESD) (1) JEDECdocumentJEP155statesthat500-VHBMallowssafemanufacturingwithastandardESDcontrolprocess. 7.3 ESD Ratings: LP38691-Q1 and LP38693-Q1 VALUE UNIT V Electrostaticdischarge Human-bodymodel(HBM),perAECQ100-002(1) ±2000 V (ESD) (1) AECQ100-002indicatesthatHBMstressingshallbeinaccordancewiththeANSI/ESDA/JEDECJS-001specification. 7.4 Recommended Operating Conditions MIN NOM MAX UNIT V supplyvoltage 2.7 10 V IN Operatingjunctiontemperature −40 125 °C 4 SubmitDocumentationFeedback Copyright©2005–2015,TexasInstrumentsIncorporated ProductFolderLinks:LP38691 LP38693 LP38691-Q1 LP38693-Q1

LP38691,LP38693,LP38691-Q1,LP38693-Q1 www.ti.com SNVS321O–JANUARY2005–REVISEDDECEMBER2015 7.5 Thermal Information LP38691 LP38693 LP3869x THERMALMETRIC(1) TO-252 WSON SOT-223 UNIT 3PINS 6PINS 5PINS R (2) Junction-to-ambientthermalresistance 50.5 50.6 68.5 °C/W θJA R Junction-to-case(top)thermalresistance 52.6 44.4 52.2 °C/W θJC(top) R Junction-to-boardthermalresistance 29.7 24.9 13.0 °C/W θJB ψ Junction-to-topcharacterizationparameter 4.8 0.4 5.5 °C/W JT ψ Junction-to-boardcharacterizationparameter 29.3 25.1 12.8 °C/W JB R Junction-to-case(bottom)thermalresistance 1.5 5.4 n/a °C/W θJC(bot) (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheSemiconductorandICPackageThermalMetricsapplication report,SPRA953. (2) Junction-to-ambientthermalresistance,High-K. 7.6 Electrical Characteristics Unlessotherwisespecified,limitsapplyforT =25°C,V =V +1V,C =C =10µF,I =10mA.Minimumand J IN OUT IN OUT LOAD maximumlimitsarespecifiedthroughtesting,statisticalcorrelation,ordesign. PARAMETER TESTCONDITIONS MIN TYP(1) MAX UNIT –2 2 VO Outputvoltagetolerance 100µA<IL<0.5A %VOUT V +1V≤V ≤10V –4 4 O IN Fulloperatingtemperaturerange V +0.5V≤V ≤10V O IN 0.03 I =25mA L Outputvoltageline ΔVO/ΔVIN regulation(2) VO+0.5V≤VIN≤10V %/V I =25mA 0.1 L Fulloperatingtemperaturerange 1mA<I <0.5A L 1.8 V =V +1V IN O Outputvoltageload ΔVO/ΔIL regulation(3) 1mA<IL<0.5A %/A V =V +1V 5 IN O Fulloperatingtemperaturerange I =0.1A 80 L (V =2.5V) O I =0.5A 430 L (V =2.5V) I =0.1A 145 O L Fulloperatingtemperature range IL=0.5A 725 I =0.1A 65 L (V =3.3V) O I =0.5A 330 L V –V Dropoutvoltage(4) mV IN OUT (V =3.3V) I =0.1A 110 O L Fulloperatingtemperature range IL=0.5A 550 I =0.1A 45 L (V =5V) O I =0.5A 250 L (V =5V) I =0.1A 100 O L Fulloperatingtemperature range IL=0.5A 450 (1) Typicalnumbersrepresentthemostlikelyparametricnormfor25°Coperation. (2) Outputvoltagelineregulationisdefinedasthechangeinoutputvoltagefromnominalvalueresultingfromachangeininputvoltage. (3) Outputvoltageloadregulationisdefinedasthechangeinoutputvoltagefromnominalvalueastheloadcurrentincreasesfrom1mAto fullload. (4) Dropoutvoltageisdefinedastheminimuminputtooutputdifferentialrequiredtomaintaintheoutputwithin100mVofnominalvalue. Copyright©2005–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:LP38691 LP38693 LP38691-Q1 LP38693-Q1

LP38691,LP38693,LP38691-Q1,LP38693-Q1 SNVS321O–JANUARY2005–REVISEDDECEMBER2015 www.ti.com Electrical Characteristics (continued) Unlessotherwisespecified,limitsapplyforT =25°C,V =V +1V,C =C =10µF,I =10mA.Minimumand J IN OUT IN OUT LOAD maximumlimitsarespecifiedthroughtesting,statisticalcorrelation,ordesign. PARAMETER TESTCONDITIONS MIN TYP(1) MAX UNIT V ≤10V,I =100µA-0.5A 55 IN L V ≤10V,I =100µA-0.5A I Quiescentcurrent IN L 100 Q Fulloperatingtemperaturerange µA V ≤0.4V,(LP38693Only) 0.001 1 EN V –V ≤4V I (MIN) Minimumloadcurrent IN O 100 L Fulloperatingtemperaturerange V –V >5V 350 IN O I Foldbackcurrentlimit mA FB V –V <4V 850 IN O PSRR Ripplerejection V =V +2V(DC),with1V(p-p)/120-HzRipple 55 dB IN O Thermalshutdownactivation T 160 SD (junctiontemp) °C T Thermalshutdownhysteresis SD 10 (HYST) (junctiontemp) BW=10Hzto10kHz e Outputnoise 0.7 µV/√Hz n V =3.3V O V (LEAK) Outputleakagecurrent V =V (NOM)+1Vat10V 0.5 12 µA O O O IN Output=OFF 0.4 Fulloperatingtemperaturerange Output=ON,V =4V IN 1.8 Enablevoltage(LP38693 Fulloperatingtemperaturerange V V EN Only) Output=ON,V =6V IN 3 Fulloperatingtemperaturerange Output=ON,V =10V IN 4 Fulloperatingtemperaturerange Enablepinleakage V =0Vor10V,V =10V I EN IN –1 0.001 1 µA EN (lLP38693only) 6 SubmitDocumentationFeedback Copyright©2005–2015,TexasInstrumentsIncorporated ProductFolderLinks:LP38691 LP38693 LP38691-Q1 LP38693-Q1

LP38691,LP38693,LP38691-Q1,LP38693-Q1 www.ti.com SNVS321O–JANUARY2005–REVISEDDECEMBER2015 7.7 Typical Characteristics Unlessotherwisespecified:T =25°C,C =C =10µF,ENpinistiedtoIN(LP38693only),V =1.8V,V =V 1V, J IN OUT OUT IN OUT I =10mA. L Figure1.NoisevsFrequency Figure2.NoisevsFrequency 60 50 B) d 40 N ( O TI EC 30 EJ R E PL 20 COUT = 10 PF P RI VIN(DC) = 5.3V 10 VIN(AC) = 1V(p-p) VOUT = 3.3V 0 10 100 1k 10k 100k FREQUENCY (Hz) Figure3.NoisevsFrequency Figure4.RippleRejection 60 60 50 50 B) B) N (d 40 N (d 40 O O CTI CTI E 30 E 30 EJ EJ RIPPLE R 1200 CVVIIONNU((DATC C=)) 1==0 150V. 3P(VFp-p) RIPPLE R 1200 CVVVIIOONNUU((DATT C C==)) 3 1==. 3 P15VFV.3(Vp-p) VOUT = 3.3V 0 0 10 100 1k 10k 100k 10 100 1k 10k 100k FREQUENCY (Hz) FREQUENCY (Hz) Figure5.RippleRejection Figure6.RippleRejection Copyright©2005–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:LP38691 LP38693 LP38691-Q1 LP38693-Q1

LP38691,LP38693,LP38691-Q1,LP38693-Q1 SNVS321O–JANUARY2005–REVISEDDECEMBER2015 www.ti.com Typical Characteristics (continued) Unlessotherwisespecified:T =25°C,C =C =10µF,ENpinistiedtoIN(LP38693only),V =1.8V,V =V 1V, J IN OUT OUT IN OUT I =10mA. L VOUT = 3.3V 20 COUT = 100 PF V) 10 VOUT m (T 0 U O V’ -10 -20 5 VIN V) 4 (N VI 3 200 P s/DIV Figure7.LineTransientResponse Figure8.LineTransientResponse Figure9.LineTransientResponse Figure10.LoadTransientResponse Figure11.LoadTransientResponse Figure12.VOUTvsTemperature(5.0V) 8 SubmitDocumentationFeedback Copyright©2005–2015,TexasInstrumentsIncorporated ProductFolderLinks:LP38691 LP38693 LP38691-Q1 LP38693-Q1

LP38691,LP38693,LP38691-Q1,LP38693-Q1 www.ti.com SNVS321O–JANUARY2005–REVISEDDECEMBER2015 Typical Characteristics (continued) Unlessotherwisespecified:T =25°C,C =C =10µF,ENpinistiedtoIN(LP38693only),V =1.8V,V =V 1V, J IN OUT OUT IN OUT I =10mA. L Figure13.VOUTvsTemperature(3.3V) Figure14.VOUTvsTemperature(2.5V) Figure15.VOUTvsTemperature(1.8V) Figure16.VOUTvsVIN(1.8V) Figure17.V vsV ,Power-Up Figure18.EnableVoltagevsTemperature OUT IN Copyright©2005–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:LP38691 LP38693 LP38691-Q1 LP38693-Q1

LP38691,LP38693,LP38691-Q1,LP38693-Q1 SNVS321O–JANUARY2005–REVISEDDECEMBER2015 www.ti.com Typical Characteristics (continued) Unlessotherwisespecified:T =25°C,C =C =10µF,ENpinistiedtoIN(LP38693only),V =1.8V,V =V 1V, J IN OUT OUT IN OUT I =10mA. L Figure19.LoadRegulationvsTemperature Figure20.LineRegulationvsTemperature 2.7 900 800 2.6 700 2.5 )V 600 -40°C )V( 2.4 m(T 500 N U VI -40°C O N 2.3 PO 400 IM RD 125°C V 300 2.2 25°C 125°C 200 2.1 25°C 100 2 0 0 100 200 300 400 500 0 100 200 300 400 500 IOUT(mA) IOUT(mA) Figure22.DropoutVoltagevsI Figure21.MINV vsI OUT IN OUT 10 SubmitDocumentationFeedback Copyright©2005–2015,TexasInstrumentsIncorporated ProductFolderLinks:LP38691 LP38693 LP38691-Q1 LP38693-Q1

LP38691,LP38693,LP38691-Q1,LP38693-Q1 www.ti.com SNVS321O–JANUARY2005–REVISEDDECEMBER2015 8 Detailed Description 8.1 Overview The LP38691 and LP38693 are designed to meet the requirements of portable, battery-powered digital systems providing an accurate output voltage with fast start-up. When disabled via a low logic signal at the enable pin (EN),thepowerconsumptionisreducedtovirtuallyzero(LP38693only). The LP38691 and LP38693 perform well with a single 1-μF input capacitor and a single 1-μF ceramic output capacitor. 8.2 Functional Block Diagrams IN P-FET - P-FET MOSFET DRIVER + ENABLE N/C LOGIC FOLDBACK CURRENT OUT LIMITING SNS THERMAL 1.25-V SHUTDOWN REFERENCE R1 R2 GND Figure23. LP38691FunctionalDiagram(WSON) IN P-FET - P-FET MOSFET DRIVER + ENABLE LOGIC FOLDBACK CURRENT OUT LIMITING THERMAL 1.25-V SHUTDOWN REFERENCE R1 R2 GND Figure24. LP38691FunctionalDiagram(TO-252) Copyright©2005–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:LP38691 LP38693 LP38691-Q1 LP38693-Q1

LP38691,LP38693,LP38691-Q1,LP38693-Q1 SNVS321O–JANUARY2005–REVISEDDECEMBER2015 www.ti.com Functional Block Diagrams (continued) IN P-FET - P-FET MOSFET DRIVER + ENABLE EN LOGIC FOLDBACK CURRENT OUT LIMITING SNS THERMAL 1.25-V SHUTDOWN REFERENCE R1 R2 GND Figure25. LP38693FunctionalDiagram(WSON) IN P-FET - P-FET MOSFET DRIVER + ENABLE EN LOGIC FOLDBACK CURRENT OUT LIMITING THERMAL 1.25-V SHUTDOWN REFERENCE R1 R2 GND Figure26. LP38693FunctionalDiagram(SOT-223) 12 SubmitDocumentationFeedback Copyright©2005–2015,TexasInstrumentsIncorporated ProductFolderLinks:LP38691 LP38693 LP38691-Q1 LP38693-Q1

LP38691,LP38693,LP38691-Q1,LP38693-Q1 www.ti.com SNVS321O–JANUARY2005–REVISEDDECEMBER2015 8.3 Feature Description 8.3.1 Enable(EN) The LP38693 has an Enable pin (EN) which allows an external control signal to turn the regulator output On and Off. The Enable On/Off threshold has no hysteresis. The voltage signal must rise and fall cleanly, and promptly, through the ON and OFF voltage thresholds. The EN pin voltage must be higher than the V threshold to EN(MIN) ensure that the device is fully enabled under all operating conditions. The EN pin voltage must be lower than the V threshold to ensure that the device is fully disabled. The EN pin has no internal pullup or pulldown to EN(MAX) establish a default condition and, as a result, this pin must be terminated either actively or passively. If the EN pin is driven from a source that actively pulls high and low, the drive voltage must not be allowed to go below ground potential or higher than V . If the application does not require the Enable function, the pin must be IN connecteddirectlytotheINpin. 8.3.2 ThermalOverloadProtection(T ) SD Thermal Shutdown disables the output when the junction temperature rises to approximately 160°C which allows thedevicetocool.Whenthejunctiontemperaturecoolstoapproximately150°C,theoutputcircuitryenables. Based on power dissipation, thermal resistance, and ambient temperature, the thermal protection circuit may cycle on and off. This thermal cycling limits the dissipation of the regulator and protects it from damage as a result of overheating. The Thermal Shutdown circuitry of the LP38693 has been designed to protect against temporarythermaloverloadconditions. The Thermal Shutdown circuitry was not intended to replace proper heat-sinking. Continuously running the LP38693deviceintothermalshutdowndegradesdevicereliability. 8.3.3 FoldbackCurrentLimiting Foldback current limiting is built into the LP38691 and LP38693 devices which reduces the amount of output current the part can deliver as the output voltage is reduced. The amount of load current is dependent on the differential voltage between the IN and OUT pins. Typically, when this differential voltage exceeds 5 V, the load current limits at about 350 mA. When the V – V differential is reduced below 4 V, load current is limited to IN OUT about850mA. CAUTION When toggling the LP38693 Enable (EN) after the input voltage (V ) is applied, the IN foldback current limit circuitry is functional the first time that the EN pin is taken high. The foldback current limit circuitry is non-functional the second, and subsequent, times that the EN pin is taken high. Depending on the input and output capacitance values the input inrush current may be higher than expected which can cause the input voltagetodroop. If the EN pin is connected to the IN pin, the foldback current limit circuitry is functional whenV isappliedifV startsfromlessthan0.4V. IN IN 8.4 Device Functional Modes 8.4.1 Enable(EN) The EN pin voltage must be higher than the V threshold to ensure that the device is fully enabled under all EN(MIN) operatingconditions. 8.4.2 MinimumOperatingInputVoltage(V ) IN The LP38691 and LP38693 do not include any dedicated UVLO circuitry. Neither device internal circuitry is fully functional until V is at least 2.7 V. The output voltage is not regulated until V ≥ (V + V ), or 2.7 V, IN IN OUT DO whicheverishigher. Copyright©2005–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:LP38691 LP38693 LP38691-Q1 LP38693-Q1

LP38691,LP38693,LP38691-Q1,LP38693-Q1 SNVS321O–JANUARY2005–REVISEDDECEMBER2015 www.ti.com 9 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validateandtesttheirdesignimplementationtoconfirmsystemfunctionality. 9.1 Application Information 9.1.1 ReverseVoltage A reverse voltage condition exists when the voltage at the output pin is higher than the voltage at the input pin. Typically this happens when V is abruptly taken low and C continues to hold a sufficient charge such that IN OUT the input to output voltage becomes reversed. A less common condition is when an alternate voltage source is connectedtotheoutput. TherearetwopossiblepathsforcurrenttoflowfromtheOUTpinbacktoINduringareversevoltagecondition. 1. While V is high enough to keep the control circuity alive, and the EN pin (LP38693 only) is above the IN V threshold, the control circuitry attempts to regulate the output voltage. If the input voltage is less than EN(ON) the programmed output voltage, the control circuit drives the gate of the pass element to the full ON condition. In this condition, reverse current flows from the OUT to the IN pin, limited only by the R of DS(ON) the pass element and the output to input voltage differential. Discharging an output capacitor up to 1000 μF in this manner does not damage the device as the current rapidly decays. However, continuous reverse currentmustbeavoided.WhentheENpinislow,thisconditionisprevented. 2. The internal PFET pass element has an inherent parasitic diode. During normal operation, the input voltage is higher than the output voltage and the parasitic diode is reverse biased. However, when V is below the IN value where the control circuity is alive, or the EN pin is low (LP38693 only), and the output voltage is more than 500 mV (typical) above the input voltage the parasitic diode becomes forward biased and current flows from the output pin to the input pin through the diode. The current in the parasitic diode must be limited to lessthan1-Acontinuousand5-Apeak. If used in a dual-supply system where the regulator output load is returned to a negative supply, the output pin must be diode-clamped to ground to limit the negative voltage transition. A Schottky diode is recommendedforthisprotectiveclamp. 9.2 Typical Application VIN VOUT VIN VOUT IN OUT IN OUT LP38691 EN LP38693 ** V ** SNS EN SNS 1 µF * GND 1 µF * 1 µF * GND 1 µF * *Minimumvaluerequiredforstability. **WSONpackagedevicesonly. 14 SubmitDocumentationFeedback Copyright©2005–2015,TexasInstrumentsIncorporated ProductFolderLinks:LP38691 LP38693 LP38691-Q1 LP38693-Q1

LP38691,LP38693,LP38691-Q1,LP38693-Q1 www.ti.com SNVS321O–JANUARY2005–REVISEDDECEMBER2015 9.2.1 DesignRequirements Table1.DesignParameters DESIGNPARAMETERS EXAMPLEVALUE Inputvoltagerange 2.7Vto10V Outputrange 1.8V Outputcurrent 1A Outputcapacitorrange 1µF InputandoutputcapacitorESRrange 5mΩto500mΩ 9.2.2 DetailedDesignProcedure 9.2.2.1 PowerDissipationandDeviceOperation The permissible power dissipation for any package is a measure of the capability of the device to pass heat from the power source, the junctions of the IC, to the ultimate heat sink, the ambient environment. Thus, the power dissipation is dependent on the ambient temperature and the thermal resistance across the various interfaces betweenthediejunctionandambientair. ThemaximumallowablepowerdissipationforthedeviceinagivenpackagecanbecalculatedusingEquation1: P =((T –T )/R ) (1) D-MAX J-MAX A θJA TheactualpowerbeingdissipatedinthedevicecanberepresentedbyEquation2: P =(V –V )×I (2) D IN OUT OUT These two equations establish the relationship between the maximum power dissipation allowed due to thermal consideration, the voltage drop across the device, and the continuous current capability of the device. These two equationsmustbeusedtodeterminetheoptimumoperatingconditionsforthedeviceintheapplication. In applications where lower power dissipation (P ) and/or excellent package thermal resistance (R ) is present, D θJA themaximumambienttemperature(T )maybeincreased. A-MAX In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature (T ) may have to be derated. T is dependent on the maximum operating junction A-MAX A-MAX temperature (T = 125°C), the maximum allowable power dissipation in the device package in the J-MAX-OP application (P ), and the junction-to ambient thermal resistance of the part/package in the application (R ), D-MAX θJA asgivenbyEquation3: T =(T –(R ×P )) (3) A-MAX J-MAX-OP θJA D-MAX Alternately, if T can not be derated, the P value must be reduced. This can be accomplished by reducing A-MAX D V in the V – V term as long as the minimum V is met, or by reducing the I term, or by some IN IN OUT IN OUT combinationofthetwo. 9.2.2.2 ExternalCapacitors In common with most regulators, the LP38691 and LP38693 require an external capacitors for regulator stability. The devices are specifically designed for portable applications requiring minimum board space and smallest components.Thesecapacitorsmustbecorrectlyselectedforgoodperformance. 9.2.2.3 InputCapacitor An input capacitor is required for stability. TI recommends that a 1-µF capacitor be connected between the devices'INpinandGNDpin(thiscapacitancevaluemaybeincreasedwithoutlimit). This capacitor must be located a distance of not more than 1 cm from the IN pin and returned to a clean analogueground.Anygoodqualityceramic,tantalum,orfilmcapacitormaybeusedattheinput. Copyright©2005–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:LP38691 LP38693 LP38691-Q1 LP38693-Q1

LP38691,LP38693,LP38691-Q1,LP38693-Q1 SNVS321O–JANUARY2005–REVISEDDECEMBER2015 www.ti.com Important: To ensure stable operation it is essential that good PCB design practices are employed to minimize ground impedance and keep input inductance low. If these conditions cannot be met, or if long leads are used to connect the battery or other power source to the LP38691 or LP38693, then TI recommends that the input capacitor is increased. Also, tantalum capacitors can suffer catastrophic failures due to surge current when connectedtoalow-impedancesourceofpower(likeabatteryoraverylargecapacitor).Ifatantalumcapacitoris used at the input, it must be ensured by the manufacturer to have a surge current rating sufficient for the application. There are no requirements for the equivalent series resistance (ESR) on the input capacitor, but tolerance and temperature coefficient must be considered when selecting the capacitor to ensure the capacitance remains approximately1 µFovertheentireoperatingtemperaturerange. 9.2.2.4 OutputCapacitor The LP3869x is designed specifically to work with very small ceramic output capacitors. A 1-µF ceramic capacitor (temperature types Z5U, Y5V or X7R/X5R) with ESR between 5 mΩ to 500 mΩ, is suitable in the LP3869xapplicationcircuit. ForthisdevicetheoutputcapacitormustbeconnectedbetweentheOUTpinandGNDpin. It is also possible to use tantalum or film capacitors at the device output, but these are not as attractive for reasonsofsizeandcost. The output capacitor must meet the requirement for the minimum value of capacitance and also have an ESR valuethatiswithintherange5mΩ to500mΩ forstability. 9.2.2.5 No-LoadStability The LP3869x remains stable and in regulation with no external load. This is an important consideration in some circuits,forexampleCMOSRAMkeep-aliveapplications. 9.2.2.6 CapacitorCharacteristics The LP3869x is designed to work with ceramic capacitors on the output to take advantage of the benefits they offer. For capacitance values in the range of 0.47 µF to 4.7 µF, ceramic capacitors are the smallest, least expensive and have the lowest ESR values, thus making them best for eliminating high frequency noise. The ESR of a typical 1-µF ceramic capacitor is in the range of 20 mΩ to 40 mΩ, which easily meets the ESR requirementforstabilityfortheLP3869x. For both input and output capacitors, careful interpretation of the capacitor specification is required to ensure correct device operation. The capacitor value can change greatly, depending on the operating conditions and capacitortype. In particular, the output capacitor selection must take account of all the capacitor parameters, to ensure that the specification is met within the application. The capacitance can vary with DC bias conditions as well as temperature and frequency of operation. Capacitor values also show some decrease over time due to aging. The capacitor parameters are also dependent on the particular case size, with smaller sizes giving poorer performance figures in general. As an example, Figure 27 shows a typical graph comparing different capacitor casesizesinaCapacitancevs.DCBiasplot.Asshowninthegraph,increasingtheDCBiasconditioncanresult in the capacitance value falling below the minimum value given in the recommended capacitor specifications table (0.7 µF in this case). Note that the graph shows the capacitance out of specification for the 0402 case size capacitorathigherbiasvoltages.Itisthereforerecommendedthatthecapacitormanufacturers’specificationsfor thenominalvaluecapacitorareconsultedforallconditions,assomecapacitorsizes(forexample,0402)maynot besuitableintheactualapplication. 16 SubmitDocumentationFeedback Copyright©2005–2015,TexasInstrumentsIncorporated ProductFolderLinks:LP38691 LP38693 LP38691-Q1 LP38693-Q1

LP38691,LP38693,LP38691-Q1,LP38693-Q1 www.ti.com SNVS321O–JANUARY2005–REVISEDDECEMBER2015 )F 0603, 10V, X5R P 1 100% L A N IM O 80% N fo % ( E 60% U L 0402, 6.3V, X5R A V P 40% A C 20% 0 1.0 2.0 3.0 4.0 5.0 DC BIAS (V) Figure27. TypicalVariationInCapacitancevsDCBias The value of the ceramic capacitor can vary with temperature. The capacitor type X7R, which operates over a temperature range of –55°C to 125°C, only varies the capacitance to within ±15%. The capacitor type X5R has a similar tolerance over a reduced temperature range of –55°C to 85°C. Many large value ceramic capacitors, larger than 1 µF, are manufactured with Z5U or Y5V temperature characteristics. Their capacitance can drop by more than 50% as the temperature varies from 25°C to 85°C. Therefore, X7R and X5R types are recommended overZ5UandY5Vinapplicationswheretheambienttemperaturechangessignificantlyaboveorbelow25°C. Tantalum capacitors are less desirable than ceramic for use as output capacitors because they are more costly whencomparingequivalentcapacitanceandvoltageratingsinthe0.47-µFto4.7-µFrange. Another important consideration is that tantalum capacitors have higher ESR values than equivalent size ceramics. This means that while it may be possible to find a tantalum capacitor with an ESR value within the stable range, it would have to be larger in capacitance (which means bigger and more costly) than a ceramic capacitor with the same ESR value. It mustalso be noted that the ESR of a typical tantalum increases about 2:1 asthetemperaturegoesfrom25°Cdownto –40°C,sosomeguardbandmustbeallowed. 9.2.2.7 RFI/EMISusceptibility Radio frequency interference (RFI) and electromagnetic interference (EMI) can degrade any integrated circuit’s performance because of the small dimensions of the geometries inside the device. In applications where circuit sources are present which generate signals with significant high frequency energy content (> 1 MHz), care must betakentoensurethatthisdoesnotaffectthedeviceregulator. If RFI/EMI noise is present on the input side of the regulator (such as applications where the input source comes from the output of a switching regulator), good ceramic bypass capacitors must be used at the input pin of the device. If a load is connected to the device output which switches at high speed (such as a clock), the high-frequency current pulses required by the load must be supplied by the capacitors on the IC output. Because the bandwidth of the regulator loop is less than 100 kHz, the control circuitry cannot respond to load changes above that frequency. This means the effective output impedance of the device at frequencies above 100 kHz is determined onlybytheoutputcapacitors. In applications where the load is switching at high speed, the output of the IC may need RF isolation from the load. TI recommends that some inductance be placed between the output capacitor and the load, and good RF bypasscapacitorsbeplaceddirectlyacrosstheload. PCB layout is also critical in high noise environments, because RFI/EMI is easily radiated directly into PC traces. Noisy circuitry must be isolated from clean circuits where possible, and grounded through a separate path. At MHz frequencies, ground planes begin to look inductive and RFI/ EMI can cause ground bounce across the ground plane. In multi-layer PCB applications, care must be taken in layout so that noisy power and ground planesdonotradiatedirectlyintoadjacentlayerswhichcarryanalogpowerandground. Copyright©2005–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 17 ProductFolderLinks:LP38691 LP38693 LP38691-Q1 LP38693-Q1

LP38691,LP38693,LP38691-Q1,LP38693-Q1 SNVS321O–JANUARY2005–REVISEDDECEMBER2015 www.ti.com 9.2.2.8 OutputNoise Noise is specified in two ways: Spot Noise or Output Noise Density is the RMS sum of all noise sources, measuredattheregulatoroutput,ataspecificfrequency(measuredwitha1-Hzbandwidth).Thistypeofnoiseis usually plotted on a curve as a function of frequency. Total Output Noise or Broad-Band Noise is the RMS sum ofspotnoiseoveraspecifiedbandwidth,usuallyseveraldecadesoffrequencies. Attention paid to the units of measurement. Spot noise is measured in units µV√Hz or nV√Hz, and total output noiseismeasuredinµV . RMS The primary source of noise in low-dropout regulators is the internal reference. Noise can be reduced in two ways: by increasing the transistor area or by increasing the current drawn by the internal reference. Increasing the area decreases the chance of fitting the die into a smaller package. Increasing the current drawn by the internalreferenceincreasesthetotalsupplycurrent(GNDpincurrent). 9.2.3 ApplicationCurves Figure28.V vsV ,ON(LP38693Only) Figure29.V vsV ,OFF(LP38693Only) OUT EN OUT EN 18 SubmitDocumentationFeedback Copyright©2005–2015,TexasInstrumentsIncorporated ProductFolderLinks:LP38691 LP38693 LP38691-Q1 LP38693-Q1

LP38691,LP38693,LP38691-Q1,LP38693-Q1 www.ti.com SNVS321O–JANUARY2005–REVISEDDECEMBER2015 10 Power Supply Recommendations The LP38691 and LP38693 are designed to operate from an input supply voltage range of 2.7 V to 10 V. The input supply must be well regulated and free of spurious noise. To ensure that the device output voltage is well regulated, input supply must be at least V + 0.5 V, or 2.7 V, whichever is higher. A minimum capacitor value OUT of1-μFisrequiredtobewithin1cmoftheINpin. 11 Layout 11.1 Layout Guidelines The dynamic performance of the LP38691 or LP38693 is dependent on the layout of the PCB. PCB layout practices that are adequate for typical LDOs may degrade the load regulation, PSRR, noise, or transient performanceoftheLP38691orLP38693. Best performance is achieved by placing C and C on the same side of the PCB as the LP38691 or IN OUT LP38693, and as close to the package as is practical. The ground connections for C and C must be back to IN OUT theLP38691orLP38693GNDpinusingaswide,andasshort,acoppertraceasispractical. Connections using long trace lengths, narrow trace widths, or connections through vias must be avoided. These addparasiticinductancesandresistancethatresultininferiorperformanceespeciallyduringtransientconditions. A Ground Plane, either on the opposite side of a two-layer PCB, or embedded in a multi-layer PCB, is strongly recommended.ThisGroundPlaneservestwopurposes: • Providesacircuitreferenceplanetoassureaccuracy. • ProvidesathermalplanetoremoveheatfromtheLP38691orLP38693WSONpackagethroughthermalvias underthepackageDAP. 11.2 Layout Example LP38691DT LP38691SD C OUT V IN PowerGround V OUT OUT CIN IN 1 6 IN Power 2 Thermal 5 SNS D Ground Pad N G N/C 3 4 OUT V IN IN CIN COUT Figure30.TO-252Package Figure31.WSONLP38691Layout space space Copyright©2005–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 19 ProductFolderLinks:LP38691 LP38693 LP38691-Q1 LP38693-Q1

LP38691,LP38693,LP38691-Q1,LP38693-Q1 SNVS321O–JANUARY2005–REVISEDDECEMBER2015 www.ti.com Layout Example (continued) LP38693MP LP38693SD EN C IN 1 6 IN OUT NC CIN GND V OUT OUT Power 2 Thermal 5 SNS IN Ground Pad Power V IN Ground EN 3 4 OUT C IN C OUT Figure32.SOT-223Layout Figure33.WSONLP38693Layout 11.3 WSON Mounting The NGG0006A (No Pullback) 6-Lead WSON package requires specific mounting techniques which are detailed in the TI AN-1187 Application Report SNOA401. Referring to the section PCB Design Recommendations, note that the pad style which must be used with the WSON package is the NSMD (non-solder mask defined) type. Additionally, TI recommends the PCB terminal pads to be 0.2 mm longer than the package pads to create a solderfillettoimprovereliabilityandinspection. The input current is split between two IN pins, 1 and 6. The two IN pins must be connected together to ensure thatthedevicecanmeetallspecificationsattheratedcurrent. The thermal dissipation of the WSON package is directly related to the printed circuit board construction and the amountofadditionalcopperareaconnectedtotheDAP. TheDAP(exposedpad)onthebottomoftheWSONpackageisconnectedtothediesubstratewithaconductive dieattachadhesive.TheDAPhasnodirectelectrical(wire)connectiontoanyofthepins.ThereisaparasiticPN junction between the die substrate and the device ground. As such, it is strongly recommend that the DAP be connecteddirectlytothegroundatdevicelead2(thatis,GND).Alternately,butnotrecommended,theDAPmay be left floating (that is, no electrical connection). The DAP must not be connected to any potential other than ground. 20 SubmitDocumentationFeedback Copyright©2005–2015,TexasInstrumentsIncorporated ProductFolderLinks:LP38691 LP38693 LP38691-Q1 LP38693-Q1

LP38691,LP38693,LP38691-Q1,LP38693-Q1 www.ti.com SNVS321O–JANUARY2005–REVISEDDECEMBER2015 12 Device and Documentation Support 12.1 Documentation Support 12.1.1 RelatedDocumentation Forrelateddocumentationseethefollowing: TexasInstrumentsAN-1187 LeadlessLeadframePackage(LLP)(SNOA401). 12.2 Related Links The table below lists quick access links. Categories include technical documents, support and community resources,toolsandsoftware,andquickaccesstosampleorbuy. Table2.RelatedLinks TECHNICAL TOOLS& SUPPORT& PARTS PRODUCTFOLDER SAMPLE&BUY DOCUMENTS SOFTWARE COMMUNITY LP38691 Clickhere Clickhere Clickhere Clickhere Clickhere LP38693 Clickhere Clickhere Clickhere Clickhere Clickhere LP38691-Q1 Clickhere Clickhere Clickhere Clickhere Clickhere LP38693-Q1 Clickhere Clickhere Clickhere Clickhere Clickhere 12.3 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TIE2E™OnlineCommunity TI'sEngineer-to-Engineer(E2E)Community.Createdtofostercollaboration amongengineers.Ate2e.ti.com,youcanaskquestions,shareknowledge,exploreideasandhelp solveproblemswithfellowengineers. DesignSupport TI'sDesignSupport QuicklyfindhelpfulE2Eforumsalongwithdesignsupporttoolsand contactinformationfortechnicalsupport. 12.4 Trademarks E2EisatrademarkofTexasInstruments. Allothertrademarksarethepropertyoftheirrespectiveowners. 12.5 Electrostatic Discharge Caution Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. 12.6 Glossary SLYZ022—TIGlossary. Thisglossarylistsandexplainsterms,acronyms,anddefinitions. 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of thisdocument.Forbrowser-basedversionsofthisdatasheet,refertotheleft-handnavigation. Copyright©2005–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 21 ProductFolderLinks:LP38691 LP38693 LP38691-Q1 LP38693-Q1

PACKAGE OPTION ADDENDUM www.ti.com 29-Apr-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) LP38691DT-1.8 NRND TO-252 NDP 3 75 TBD Call TI Call TI -40 to 125 LP38691 DT-1.8 LP38691DT-1.8/NOPB ACTIVE TO-252 NDP 3 75 Green (RoHS SN Level-2-260C-1 YEAR -40 to 125 LP38691 & no Sb/Br) DT-1.8 LP38691DT-2.5/NOPB ACTIVE TO-252 NDP 3 75 Green (RoHS SN Level-2-260C-1 YEAR -40 to 125 LP38691 & no Sb/Br) DT-2.5 LP38691DT-3.3 NRND TO-252 NDP 3 75 TBD Call TI Call TI -40 to 125 LP38691 DT-3.3 LP38691DT-3.3/NOPB ACTIVE TO-252 NDP 3 75 Green (RoHS SN Level-2-260C-1 YEAR -40 to 125 LP38691 & no Sb/Br) DT-3.3 LP38691DT-5.0/NOPB ACTIVE TO-252 NDP 3 75 Green (RoHS SN Level-2-260C-1 YEAR -40 to 125 LP38691 & no Sb/Br) DT-5.0 LP38691DTX-1.8/NOPB ACTIVE TO-252 NDP 3 2500 Green (RoHS SN Level-2-260C-1 YEAR -40 to 125 LP38691 & no Sb/Br) DT-1.8 LP38691DTX-2.5/NOPB ACTIVE TO-252 NDP 3 2500 Green (RoHS SN Level-2-260C-1 YEAR -40 to 125 LP38691 & no Sb/Br) DT-2.5 LP38691DTX-3.3/NOPB ACTIVE TO-252 NDP 3 2500 Green (RoHS SN Level-2-260C-1 YEAR -40 to 125 LP38691 & no Sb/Br) DT-3.3 LP38691DTX-5.0/NOPB ACTIVE TO-252 NDP 3 2500 Green (RoHS SN Level-2-260C-1 YEAR -40 to 125 LP38691 & no Sb/Br) DT-5.0 LP38691QSD-1.8/NOPB ACTIVE WSON NGG 6 1000 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 L256B & no Sb/Br) LP38691QSD-2.5/NOPB ACTIVE WSON NGG 6 1000 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 L257B & no Sb/Br) LP38691QSD-3.3/NOPB ACTIVE WSON NGG 6 1000 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 L258B & no Sb/Br) LP38691QSD-5.0/NOPB ACTIVE WSON NGG 6 1000 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 L259B & no Sb/Br) LP38691QSDX-1.8/NOPB ACTIVE WSON NGG 6 4500 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 L256B & no Sb/Br) LP38691QSDX-2.5/NOPB ACTIVE WSON NGG 6 4500 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 L257B & no Sb/Br) LP38691QSDX-3.3/NOPB ACTIVE WSON NGG 6 4500 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 L258B & no Sb/Br) Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 29-Apr-2020 Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) LP38691QSDX-5.0/NOPB ACTIVE WSON NGG 6 4500 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 L259B & no Sb/Br) LP38691SD-1.8/NOPB ACTIVE WSON NGG 6 1000 Green (RoHS NIPDAU | SN Level-1-260C-UNLIM -40 to 125 L118B & no Sb/Br) LP38691SD-2.5/NOPB ACTIVE WSON NGG 6 1000 Green (RoHS NIPDAU | SN Level-1-260C-UNLIM -40 to 125 L119B & no Sb/Br) LP38691SD-3.3/NOPB ACTIVE WSON NGG 6 1000 Green (RoHS NIPDAU | SN Level-1-260C-UNLIM -40 to 125 L120B & no Sb/Br) LP38691SD-5.0/NOPB ACTIVE WSON NGG 6 1000 Green (RoHS NIPDAU | SN Level-1-260C-UNLIM -40 to 125 L121B & no Sb/Br) LP38691SDX-1.8/NOPB ACTIVE WSON NGG 6 4500 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 L118B & no Sb/Br) LP38691SDX-3.3/NOPB ACTIVE WSON NGG 6 4500 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 L120B & no Sb/Br) LP38691SDX-5.0/NOPB ACTIVE WSON NGG 6 4500 Green (RoHS NIPDAU | SN Level-1-260C-UNLIM -40 to 125 L121B & no Sb/Br) LP38693MP-1.8/NOPB ACTIVE SOT-223 NDC 5 1000 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 LJVB & no Sb/Br) LP38693MP-2.5/NOPB ACTIVE SOT-223 NDC 5 1000 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 LJXB & no Sb/Br) LP38693MP-3.3 NRND SOT-223 NDC 5 1000 TBD Call TI Call TI -40 to 125 LJYB LP38693MP-3.3/NOPB ACTIVE SOT-223 NDC 5 1000 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 LJYB & no Sb/Br) LP38693MP-5.0/NOPB ACTIVE SOT-223 NDC 5 1000 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 LJZB & no Sb/Br) LP38693MPX-1.8/NOPB ACTIVE SOT-223 NDC 5 2000 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 LJVB & no Sb/Br) LP38693MPX-2.5/NOPB ACTIVE SOT-223 NDC 5 2000 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 LJXB & no Sb/Br) LP38693MPX-3.3/NOPB ACTIVE SOT-223 NDC 5 2000 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 LJYB & no Sb/Br) LP38693MPX-5.0/NOPB ACTIVE SOT-223 NDC 5 2000 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 LJZB & no Sb/Br) LP38693QSD-1.8/NOPB ACTIVE WSON NGG 6 1000 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 L260B & no Sb/Br) Addendum-Page 2

PACKAGE OPTION ADDENDUM www.ti.com 29-Apr-2020 Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) LP38693QSD-2.5/NOPB ACTIVE WSON NGG 6 1000 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 L261B & no Sb/Br) LP38693QSD-3.3/NOPB ACTIVE WSON NGG 6 1000 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 L262B & no Sb/Br) LP38693QSD-5.0/NOPB ACTIVE WSON NGG 6 1000 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 L263B & no Sb/Br) LP38693QSDX-1.8/NOPB ACTIVE WSON NGG 6 4500 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 L260B & no Sb/Br) LP38693QSDX-2.5/NOPB ACTIVE WSON NGG 6 4500 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 L261B & no Sb/Br) LP38693QSDX-3.3/NOPB ACTIVE WSON NGG 6 4500 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 L262B & no Sb/Br) LP38693QSDX-5.0/NOPB ACTIVE WSON NGG 6 4500 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 L263B & no Sb/Br) LP38693SD-1.8 NRND WSON NGG 6 1000 TBD Call TI Call TI -40 to 125 L128B LP38693SD-1.8/NOPB ACTIVE WSON NGG 6 1000 Green (RoHS NIPDAU | SN Level-1-260C-UNLIM -40 to 125 L128B & no Sb/Br) LP38693SD-2.5/NOPB ACTIVE WSON NGG 6 1000 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 L129B & no Sb/Br) LP38693SD-3.3 NRND WSON NGG 6 1000 TBD Call TI Call TI -40 to 125 L130B LP38693SD-3.3/NOPB ACTIVE WSON NGG 6 1000 Green (RoHS NIPDAU | SN Level-1-260C-UNLIM -40 to 125 L130B & no Sb/Br) LP38693SD-5.0/NOPB ACTIVE WSON NGG 6 1000 Green (RoHS NIPDAU | SN Level-1-260C-UNLIM -40 to 125 L131B & no Sb/Br) LP38693SDX-3.3/NOPB ACTIVE WSON NGG 6 4500 Green (RoHS NIPDAU | SN Level-1-260C-UNLIM -40 to 125 L130B & no Sb/Br) LP38693SDX-5.0/NOPB ACTIVE WSON NGG 6 4500 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 L131B & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. Addendum-Page 3

PACKAGE OPTION ADDENDUM www.ti.com 29-Apr-2020 (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF LP38691, LP38691-Q1, LP38693, LP38693-Q1 : •Catalog: LP38691, LP38693 •Automotive: LP38691-Q1, LP38693-Q1 NOTE: Qualified Version Definitions: •Catalog - TI's standard catalog product •Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects Addendum-Page 4

PACKAGE MATERIALS INFORMATION www.ti.com 4-Jun-2020 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) LP38691DTX-1.8/NOPB TO-252 NDP 3 2500 330.0 16.4 6.9 10.5 2.7 8.0 16.0 Q2 LP38691DTX-2.5/NOPB TO-252 NDP 3 2500 330.0 16.4 6.9 10.5 2.7 8.0 16.0 Q2 LP38691DTX-3.3/NOPB TO-252 NDP 3 2500 330.0 16.4 6.9 10.5 2.7 8.0 16.0 Q2 LP38691DTX-5.0/NOPB TO-252 NDP 3 2500 330.0 16.4 6.9 10.5 2.7 8.0 16.0 Q2 LP38691QSD-1.8/NOPB WSON NGG 6 1000 178.0 12.4 3.3 3.3 1.0 8.0 12.0 Q1 LP38691QSD-2.5/NOPB WSON NGG 6 1000 178.0 12.4 3.3 3.3 1.0 8.0 12.0 Q1 LP38691QSD-3.3/NOPB WSON NGG 6 1000 178.0 12.4 3.3 3.3 1.0 8.0 12.0 Q1 LP38691QSD-5.0/NOPB WSON NGG 6 1000 178.0 12.4 3.3 3.3 1.0 8.0 12.0 Q1 LP38691QSDX-1.8/NOPB WSON NGG 6 4500 330.0 12.4 3.3 3.3 1.0 8.0 12.0 Q1 LP38691QSDX-2.5/NOPB WSON NGG 6 4500 330.0 12.4 3.3 3.3 1.0 8.0 12.0 Q1 LP38691QSDX-3.3/NOPB WSON NGG 6 4500 330.0 12.4 3.3 3.3 1.0 8.0 12.0 Q1 LP38691QSDX-5.0/NOPB WSON NGG 6 4500 330.0 12.4 3.3 3.3 1.0 8.0 12.0 Q1 LP38691SD-1.8/NOPB WSON NGG 6 1000 180.0 12.4 3.3 3.3 1.0 8.0 12.0 Q1 LP38691SD-2.5/NOPB WSON NGG 6 1000 180.0 12.4 3.3 3.3 1.0 8.0 12.0 Q1 LP38691SD-3.3/NOPB WSON NGG 6 1000 180.0 12.4 3.3 3.3 1.0 8.0 12.0 Q1 LP38691SD-5.0/NOPB WSON NGG 6 1000 180.0 12.4 3.3 3.3 1.0 8.0 12.0 Q1 LP38691SDX-1.8/NOPB WSON NGG 6 4500 330.0 12.4 3.3 3.3 1.0 8.0 12.0 Q1 LP38691SDX-3.3/NOPB WSON NGG 6 4500 330.0 12.4 3.3 3.3 1.0 8.0 12.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 4-Jun-2020 Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) LP38691SDX-5.0/NOPB WSON NGG 6 4500 330.0 12.4 3.3 3.3 1.0 8.0 12.0 Q1 LP38693MP-1.8/NOPB SOT-223 NDC 5 1000 330.0 16.4 7.0 7.5 2.2 12.0 16.0 Q3 LP38693MP-2.5/NOPB SOT-223 NDC 5 1000 330.0 16.4 7.0 7.5 2.2 12.0 16.0 Q3 LP38693MP-3.3 SOT-223 NDC 5 1000 330.0 16.4 7.0 7.5 2.2 12.0 16.0 Q3 LP38693MP-3.3/NOPB SOT-223 NDC 5 1000 330.0 16.4 7.0 7.5 2.2 12.0 16.0 Q3 LP38693MP-5.0/NOPB SOT-223 NDC 5 1000 330.0 16.4 7.0 7.5 2.2 12.0 16.0 Q3 LP38693MPX-1.8/NOPB SOT-223 NDC 5 2000 330.0 16.4 7.0 7.5 2.2 12.0 16.0 Q3 LP38693MPX-2.5/NOPB SOT-223 NDC 5 2000 330.0 16.4 7.0 7.5 2.2 12.0 16.0 Q3 LP38693MPX-3.3/NOPB SOT-223 NDC 5 2000 330.0 16.4 7.0 7.5 2.2 12.0 16.0 Q3 LP38693MPX-5.0/NOPB SOT-223 NDC 5 2000 330.0 16.4 7.0 7.5 2.2 12.0 16.0 Q3 LP38693QSD-1.8/NOPB WSON NGG 6 1000 178.0 12.4 3.3 3.3 1.0 8.0 12.0 Q1 LP38693QSD-2.5/NOPB WSON NGG 6 1000 178.0 12.4 3.3 3.3 1.0 8.0 12.0 Q1 LP38693QSD-3.3/NOPB WSON NGG 6 1000 178.0 12.4 3.3 3.3 1.0 8.0 12.0 Q1 LP38693QSD-5.0/NOPB WSON NGG 6 1000 178.0 12.4 3.3 3.3 1.0 8.0 12.0 Q1 LP38693QSDX-1.8/NOPB WSON NGG 6 4500 330.0 12.4 3.3 3.3 1.0 8.0 12.0 Q1 LP38693QSDX-2.5/NOPB WSON NGG 6 4500 330.0 12.4 3.3 3.3 1.0 8.0 12.0 Q1 LP38693QSDX-3.3/NOPB WSON NGG 6 4500 330.0 12.4 3.3 3.3 1.0 8.0 12.0 Q1 LP38693QSDX-5.0/NOPB WSON NGG 6 4500 330.0 12.4 3.3 3.3 1.0 8.0 12.0 Q1 LP38693SD-1.8 WSON NGG 6 1000 178.0 12.4 3.3 3.3 1.0 8.0 12.0 Q1 LP38693SD-1.8/NOPB WSON NGG 6 1000 180.0 12.4 3.3 3.3 1.0 8.0 12.0 Q1 LP38693SD-2.5/NOPB WSON NGG 6 1000 178.0 12.4 3.3 3.3 1.0 8.0 12.0 Q1 LP38693SD-3.3 WSON NGG 6 1000 178.0 12.4 3.3 3.3 1.0 8.0 12.0 Q1 LP38693SD-3.3/NOPB WSON NGG 6 1000 180.0 12.4 3.3 3.3 1.0 8.0 12.0 Q1 LP38693SD-5.0/NOPB WSON NGG 6 1000 180.0 12.4 3.3 3.3 1.0 8.0 12.0 Q1 LP38693SDX-3.3/NOPB WSON NGG 6 4500 330.0 12.4 3.3 3.3 1.0 8.0 12.0 Q1 LP38693SDX-5.0/NOPB WSON NGG 6 4500 330.0 12.4 3.3 3.3 1.0 8.0 12.0 Q1 PackMaterials-Page2

PACKAGE MATERIALS INFORMATION www.ti.com 4-Jun-2020 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) LP38691DTX-1.8/NOPB TO-252 NDP 3 2500 367.0 367.0 38.0 LP38691DTX-2.5/NOPB TO-252 NDP 3 2500 367.0 367.0 38.0 LP38691DTX-3.3/NOPB TO-252 NDP 3 2500 367.0 367.0 38.0 LP38691DTX-5.0/NOPB TO-252 NDP 3 2500 367.0 367.0 38.0 LP38691QSD-1.8/NOPB WSON NGG 6 1000 210.0 185.0 35.0 LP38691QSD-2.5/NOPB WSON NGG 6 1000 210.0 185.0 35.0 LP38691QSD-3.3/NOPB WSON NGG 6 1000 210.0 185.0 35.0 LP38691QSD-5.0/NOPB WSON NGG 6 1000 210.0 185.0 35.0 LP38691QSDX-1.8/NOPB WSON NGG 6 4500 367.0 367.0 35.0 LP38691QSDX-2.5/NOPB WSON NGG 6 4500 367.0 367.0 35.0 LP38691QSDX-3.3/NOPB WSON NGG 6 4500 367.0 367.0 35.0 LP38691QSDX-5.0/NOPB WSON NGG 6 4500 367.0 367.0 35.0 LP38691SD-1.8/NOPB WSON NGG 6 1000 203.0 203.0 35.0 LP38691SD-2.5/NOPB WSON NGG 6 1000 203.0 203.0 35.0 LP38691SD-3.3/NOPB WSON NGG 6 1000 203.0 203.0 35.0 LP38691SD-5.0/NOPB WSON NGG 6 1000 203.0 203.0 35.0 LP38691SDX-1.8/NOPB WSON NGG 6 4500 367.0 367.0 35.0 LP38691SDX-3.3/NOPB WSON NGG 6 4500 367.0 367.0 35.0 LP38691SDX-5.0/NOPB WSON NGG 6 4500 346.0 346.0 35.0 LP38693MP-1.8/NOPB SOT-223 NDC 5 1000 367.0 367.0 35.0 PackMaterials-Page3

PACKAGE MATERIALS INFORMATION www.ti.com 4-Jun-2020 Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) LP38693MP-2.5/NOPB SOT-223 NDC 5 1000 367.0 367.0 35.0 LP38693MP-3.3 SOT-223 NDC 5 1000 367.0 367.0 35.0 LP38693MP-3.3/NOPB SOT-223 NDC 5 1000 367.0 367.0 35.0 LP38693MP-5.0/NOPB SOT-223 NDC 5 1000 367.0 367.0 35.0 LP38693MPX-1.8/NOPB SOT-223 NDC 5 2000 367.0 367.0 35.0 LP38693MPX-2.5/NOPB SOT-223 NDC 5 2000 367.0 367.0 35.0 LP38693MPX-3.3/NOPB SOT-223 NDC 5 2000 367.0 367.0 35.0 LP38693MPX-5.0/NOPB SOT-223 NDC 5 2000 367.0 367.0 35.0 LP38693QSD-1.8/NOPB WSON NGG 6 1000 210.0 185.0 35.0 LP38693QSD-2.5/NOPB WSON NGG 6 1000 210.0 185.0 35.0 LP38693QSD-3.3/NOPB WSON NGG 6 1000 210.0 185.0 35.0 LP38693QSD-5.0/NOPB WSON NGG 6 1000 210.0 185.0 35.0 LP38693QSDX-1.8/NOPB WSON NGG 6 4500 367.0 367.0 35.0 LP38693QSDX-2.5/NOPB WSON NGG 6 4500 367.0 367.0 35.0 LP38693QSDX-3.3/NOPB WSON NGG 6 4500 367.0 367.0 35.0 LP38693QSDX-5.0/NOPB WSON NGG 6 4500 367.0 367.0 35.0 LP38693SD-1.8 WSON NGG 6 1000 210.0 185.0 35.0 LP38693SD-1.8/NOPB WSON NGG 6 1000 203.0 203.0 35.0 LP38693SD-2.5/NOPB WSON NGG 6 1000 210.0 185.0 35.0 LP38693SD-3.3 WSON NGG 6 1000 210.0 185.0 35.0 LP38693SD-3.3/NOPB WSON NGG 6 1000 203.0 203.0 35.0 LP38693SD-5.0/NOPB WSON NGG 6 1000 203.0 203.0 35.0 LP38693SDX-3.3/NOPB WSON NGG 6 4500 346.0 346.0 35.0 LP38693SDX-5.0/NOPB WSON NGG 6 4500 367.0 367.0 35.0 PackMaterials-Page4

MECHANICAL DATA NDC0005A www.ti.com

PACKAGE OUTLINE NDP0003B TO-252 - 2.55 mm max height SCALE 1.500 TRANSISTOR OUTLINE 10.42 9.40 6.22 1.27 B 5.97 0.88 A (2.345) 1 2.285 (2.5) 2 5.46 6.73 4.57 4.96 6.35 3 0.88 3X 0.64 1.02 PKG OPTIONAL 0.64 0.25 C A B 8 8 TOP & BOTTOM 1.14 0.89 C 2.55 MAX SEATING PLANE 0.88 0.17 0.60 0.46 0.46 0.51 MIN 4.32 MIN 3 2 4 1 4219870/A 03/2018 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Reference JEDEC registration TO-252. www.ti.com

EXAMPLE BOARD LAYOUT NDP0003B TO-252 - 2.55 mm max height TRANSISTOR OUTLINE SEE SOLDER MASK DETAIL 2X (2.15) 2X (1.3) (5.7) 1 4 SYMM (4.57) (5.5) 3 (R0.05) TYP (4.38) (2.285) PKG LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE: 8X 0.07 MAX METAL EDGE 0.07 MIN ALL AROUND ALL AROUND METAL UNDER EXPOSED SOLDER MASK METAL EXPOSED METAL SOLDER MASK SOLDER MASK OPENING OPENING NON SOLDER MASK SOLDER MASK DEFINED DEFINED (PREFERRED) SOLDER MASK DETAIL 4219870/A 03/2018 NOTES: (continued) 4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature numbers SLMA002(www.ti.com/lit/slm002) and SLMA004 (www.ti.com/lit/slma004). 5. Vias are optional depending on application, refer to device data sheet. It is recommended that vias under paste be filled, plugged or tented. www.ti.com

EXAMPLE STENCIL DESIGN NDP0003B TO-252 - 2.55 mm max height TRANSISTOR OUTLINE (1.35) TYP 2X (2.15) (0.26) 2X (1.3) (R0.05) TYP (1.32) TYP (4.57) 16X (1.12) 16X (1.15) (4.38) PKG SOLDER PASTE EXAMPLE BASED ON 0.125 MM THICK STENCIL SCALE: 8X 4219870/A 03/2018 NOTES: (continued) 6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 7. Board assembly site may have different recommendations for stencil design. www.ti.com

MECHANICAL DATA NGG0006A SDE06A (Rev A) www.ti.com

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