Product Sample & Technical Tools & Support & Folder Buy Documents Software Community LP3470 SNVS003G–JUNE1999–REVISEDAPRIL2016 LP3470 Voltage Supervisor With Programmable Delay and 1% Reset Threshold 1 Features 3 Description • 5-PinSOT-23Package The LP3470 device is a micropower voltage 1 supervisory circuit designed to monitor voltages • Open-DrainResetOutput within 1% of reset threshold over temperature. It • ProgrammableResetTime-OutPeriodUsingan provides maximum adjustability for power-on-reset ExternalCapacitor (POR)andsupervisoryfunctions. • ImmunetoShortV Transients CC The LP3470 asserts a reset signal whenever the V CC • ±1%ResetThresholdAccuracyOver supply voltage falls below a reset threshold. The Temperature reset time-out period is adjustable using an external capacitor. Reset remains asserted for an interval • LowQuiescentCurrent(16µAtypical) (programmed by an external capacitor) after V has • ResetValidDowntoV =0.5V CC CC risenabovethethresholdvoltage. 2 Applications For information on available reset threshold voltage options, see Mechanical, Packaging, and Orderable • CriticalµPandµCPowerMonitoring Information. • IntelligentInstruments DeviceInformation(1) • Computers PARTNUMBER PACKAGE BODYSIZE(NOM) • PortableandBattery-PoweredEquipment LP3470 SOT-23(5) 1.60mm×2.90mm (1) For all available packages, see the Package Option Addendumattheendofthedatasheet. BasicOperatingCircuit 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA.

LP3470 SNVS003G–JUNE1999–REVISEDAPRIL2016 www.ti.com Table of Contents 1 Features.................................................................. 1 7.3 FeatureDescription...................................................8 2 Applications........................................................... 1 7.4 DeviceFunctionalModes..........................................9 3 Description............................................................. 1 8 ApplicationandImplementation........................ 10 4 RevisionHistory..................................................... 2 8.1 ApplicationInformation............................................10 8.2 TypicalApplication .................................................10 5 PinConfigurationandFunctions......................... 3 9 PowerSupplyRecommendations...................... 12 6 Specifications......................................................... 4 10 Layout................................................................... 12 6.1 AbsoluteMaximumRatings .....................................4 6.2 ESDRatings..............................................................4 10.1 LayoutGuidelines.................................................12 6.3 RecommendedOperatingConditions.......................4 10.2 LayoutExample....................................................12 6.4 ThermalInformation..................................................4 11 DeviceandDocumentationSupport................. 13 6.5 ElectricalCharacteristics...........................................5 11.1 CommunityResources..........................................13 6.6 TypicalCharacteristics..............................................6 11.2 Trademarks...........................................................13 7 DetailedDescription.............................................. 8 11.3 ElectrostaticDischargeCaution............................13 7.1 Overview...................................................................8 11.4 Glossary................................................................13 7.2 FunctionalBlockDiagram.........................................8 12 Mechanical,Packaging,andOrderable Information........................................................... 13 4 Revision History NOTE:Pagenumbersforpreviousrevisionsmaydifferfrompagenumbersinthecurrentversion. ChangesfromRevisionF(March2013)toRevisionG Page • AddedESDRatingstable,FeatureDescriptionsection,DeviceFunctionalModes,ApplicationandImplementation section,PowerSupplyRecommendationssection,Layoutsection,DeviceandDocumentationSupportsection,and Mechanical,Packaging,andOrderableInformationsection.................................................................................................. 1 • MovedOperatingtemperatureparametersfromAbsoluteMaximumRatingstoRecommendedOperatingConditions.......4 ChangesfromRevisionE(September2009)toRevisionF Page • ChangedlayoutofNationalDataSheettoTIformat............................................................................................................. 1 2 SubmitDocumentationFeedback Copyright©1999–2016,TexasInstrumentsIncorporated ProductFolderLinks:LP3470

LP3470 www.ti.com SNVS003G–JUNE1999–REVISEDAPRIL2016 5 Pin Configuration and Functions DBVPackage 5-PinSOT-23 TopView SRT 1 5 Reset GND 2 VCC1 3 4 VCC PinFunctions PIN I/O DESCRIPTION NO. NAME Setresettime-out.Connectacapacitorbetweenthispinandgroundtoselecttheresettime-outperiod(t ). 1 SRT O RP t =2000×C (C inµFandt inms).Ifnocapacitorisconnected,leavethispinfloating. RP 1 1 RP 2 GND — Groundpin. 3 V I AlwaysconnecttopinV (Pin4). CC1 CC 4 V I Supplyvoltage,andresetthresholdmonitorinput. CC Open-drain,active-lowresetoutput.Connecttoanexternalpullupresistor.Resetchangesfromhightolow 5 Reset O wheneverthemonitoredvoltage(V )dropsbelowtheresetthresholdvoltage(V ).OnceV exceeds CC RTH CC V ,Resetremainslowfortheresettime-outperiod(t )andthengoeshigh. RTH RP Copyright©1999–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:LP3470

LP3470 SNVS003G–JUNE1999–REVISEDAPRIL2016 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings overoperatingfree-airtemperaturerange(unlessotherwisenoted)(1)(2) MIN MAX UNIT V voltage –0.3 6 V CC Resetvoltage –0.3 6 V Outputcurrent(Reset) 10 mA Powerdissipation(T =25°C)(3) 300 mW A Leadtemperature(soldering,5sec) 260 °C Junctiontemperature,T 125 °C JMAX Storagetemperature,T –65 150 °C stg (1) StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thesearestressratings only,whichdonotimplyfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderRecommended OperatingConditions.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. (2) IfMilitary/Aerospacespecifieddevicesarerequired,pleasecontacttheTexasInstrumentsSalesOffice/Distributorsforavailabilityand specifications. (3) ThemaximumpowerdissipationmustbederatedatelevatedtemperaturesandisdictatedbyT (maximumjunctiontemperature), Jmax θ (junctiontoambientthermalresistance),andT (ambienttemperature).Themaximumallowablepowerdissipationatany JA A temperatureisP =(T −T )/θ orthenumbergivenintheAbsoluteMaximumRatings,whicheverislower. Dmax Jmax A JA 6.2 ESD Ratings VALUE UNIT Human-bodymodel(HBM),perANSI/ESDA/JEDECJS-001(1) ±2000 V Electrostaticdischarge V (ESD) Charged-devicemodel(CDM),perJEDECspecificationJESD22-C101(2) ±200 (1) JEDECdocumentJEP155statesthat500-VHBMallowssafemanufacturingwithastandardESDcontrolprocess. (2) JEDECdocumentJEP157statesthat250-VCDMallowssafemanufacturingwithastandardESDcontrolprocess. 6.3 Recommended Operating Conditions overoperatingfree-airtemperaturerange(unlessotherwisenoted) MIN NOM MAX UNIT V Operatingvoltage 0.5 5.5 V CC LP3470 –20 85 T Operatingtemperature °C A LP3470I –40 85 6.4 Thermal Information LP3470 THERMALMETRIC(1) DBV(SOT-23) UNIT 5PINS R Junction-to-ambientthermalresistance 171 °C/W θJA R Junction-to-case(top)thermalresistance 124.8 °C/W θJC(top) R Junction-to-boardthermalresistance 30.9 °C/W θJB ψ Junction-to-topcharacterizationparameter 17.9 °C/W JT ψ Junction-to-boardcharacterizationparameter 30.4 °C/W JB R Junction-to-case(bottom)thermalresistance — °C/W θJC(bot) (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheSemiconductorandICPackageThermalMetricsapplication report,SPRA953. 4 SubmitDocumentationFeedback Copyright©1999–2016,TexasInstrumentsIncorporated ProductFolderLinks:LP3470

LP3470 www.ti.com SNVS003G–JUNE1999–REVISEDAPRIL2016 6.5 Electrical Characteristics LimitsandtypicalnumbersareforT =25°C,andV =2.4Vto5V(unlessotherwisenoted) J CC PARAMETER TESTCONDITIONS MIN(1) TYP(2) MAX(1) UNIT V Operatingvoltage T =–20°Cto85°C 0.5 5.5 V CC J T =25°C 16 J I V supplycurrent V =4.5V µA CC CC CC T =–20°Cto85°C 30 J LP3470 0.99×V V 1.01×V RTH RTH RTH V Resetthresholdvoltage T =25°C 0.99×V V 1.01×V V RTH J RTH RTH RTH LP3470I T =–40°Cto85°C 0.985×V 1.015×V J RTH RTH T =25°C 35 V Hysteresisvoltage(3) J mV HYST T =–20°Cto85°C 15 65 J T =25°C 100 J t V toresetdelay V fallingat1mV/µs µs PD CC CC T =–20°Cto85°C 300 J T =25°C 2 t Resettime-outperiod(4) C =1nF J ms RP 1 T =–20°Cto85°C 1 3.5 J V =0.5V,I =30µA,T =–20°Cto85°C 0.1 CC OL J V =1V,I =100µA,T =–20°Cto85°C 0.1 V Resetoutputvoltagelow CC OL J V OL V =V −100mV,I =4mA, CC RTH OL 0.4 T =–20°Cto85°C J R Externalpullupresistor 0.68 20 68 kΩ 1 T =25°C 0.15 1 J I Resetoutputleakagecurrent µA LEAK T =–20°Cto85°C 6 J (1) Minimumandmaximumlimitsinstandardtypefaceare100%productiontestedat25°C.Minimumandmaximumlimitsinfulloperating temperaturerangeareensuredthroughcorrelationusingStatisticalQualityControl(SQC)methods.ThelimitsareusedtocalculateTI's AverageOutgoingQualityLevel(AOQL). (2) Typicalnumbersareat25°Candrepresentthemostlikelyparametricnorm. (3) V affectstherelationbetweenV andResetasshowninthetimingdiagram. HYST CC (4) t isprogrammablebyvaryingthevalueoftheexternalcapacitor(C )connectedtopinSRT.Theequationis:t =2000×C (C in RP 1 RP 1 1 µFandt inms). RP Copyright©1999–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:LP3470

LP3470 SNVS003G–JUNE1999–REVISEDAPRIL2016 www.ti.com 6.6 Typical Characteristics atT =25°C(unlessotherwisenoted) A Figure1.ICCvsTemperature Figure2.ICCvsVCC Figure3.V toResetDelayvsTemperature Figure4.Normalizedt vsTemperature CC RP Figure5.NormalizedV vsTemperature Figure6.TransientRejection RTH 6 SubmitDocumentationFeedback Copyright©1999–2016,TexasInstrumentsIncorporated ProductFolderLinks:LP3470

LP3470 www.ti.com SNVS003G–JUNE1999–REVISEDAPRIL2016 Typical Characteristics (continued) atT =25°C(unlessotherwisenoted) A Figure7.VHYSTvsVRTH Figure8.VHYSTvsTemperature Copyright©1999–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:LP3470

LP3470 SNVS003G–JUNE1999–REVISEDAPRIL2016 www.ti.com 7 Detailed Description 7.1 Overview The LP3470 micropower voltage supervisory circuit provides a simple solution to monitor the power supplies in microprocessor and digital systems and provides a reset controlled by the factory-programmed reset threshold on the V supply voltage pin. When the voltage declines below the reset threshold, the reset signal is asserted CC and remains asserted for an interval programmed by an external capacitor after V has risen above the CC thresholdvoltage.Theresetthresholdoptionsare2.63V,2.93V,3.08V,3.65V,4V,4.38V,4.63V. 7.2 Functional Block Diagram SRT LP3470 V CC V CC1 V REF Reset R A Q + A DELAY _ R B GND Copyright © 2016,Texas Instruments Incorporated 7.3 Feature Description 7.3.1 ResetTime-OutPeriod The reset time-out period (t ) is programmable using an external capacitor (C ) connected to pin SRT of RP 1 LP3470. A ceramic chip capacitor rated at or above 10 V is sufficient. The reset time-out period (t ) can be RP calculatedusingEquation1. t (ms)=2000xC (µF) (1) RP 1 For example a C of 100 nF will achieve a t of 200 ms. If no delay due to t is needed in a certain application, 1 RP RP thepinSRTmustbeleftfloating. 7.3.2 ResetOutput In applications like microprocessor (µP) systems, errors might occur in system operation during power up, power down, or brownout conditions. It is imperative to monitor the power supply voltage to prevent these errors from occurring. TheLP3470assertsaresetsignalwhenevertheV supplyvoltageisbelowathreshold(V )voltage.Resetis CC RTH ensured to be a logic low for V > 0.5 V. Once V exceeds the reset threshold, the reset is kept asserted for a CC CC time period (t ) programmed by an external capacitor (C ); after this interval Reset goes to logic high. If a RP 1 brownout condition occurs (monitored voltage falls below the reset threshold minus a small hysteresis), Reset goes low. When V returns above the reset threshold, Reset remains low for a time period t before going to CC RP logichigh.Figure9showsthisbehavior. 8 SubmitDocumentationFeedback Copyright©1999–2016,TexasInstrumentsIncorporated ProductFolderLinks:LP3470

LP3470 www.ti.com SNVS003G–JUNE1999–REVISEDAPRIL2016 Feature Description (continued) Figure9. ResetOutputTimingDiagram 7.3.3 PullupResistorSelection The Reset output structure of the LP3470 is a simple open-drain N-channel MOSFET switch. A pullup resistor (R )mustbeconnectedtoV . 1 CC R must be large enough to limit the current through the output MOSFET (Q ) below 10 mA. A resistor value of 1 1 more than 680 Ω ensures this. R must also be small enough to ensure a logic high while supplying all the 1 leakage current through the Reset pin. A resistor value of less than 68 kΩ satisfies this condition. A typical pullup resistorvalueof20kΩ issufficientinmostapplications. 7.3.4 Negative-GoingV Transients CC The LP3470 is relatively immune to short duration negative-going V transients (glitches). The Typical CC Characteristics show the maximum transient duration versus negative transient amplitude (see Figure 6), for which reset pulses are not generated. This graph shows the maximum pulse width a negative-going V CC transient may typically have without causing a reset pulse to be issued. As the transient amplitude increases (in other words, goes farther below the reset threshold), the maximum allowable pulse width decreases. A 0.1-µF bypasscapacitormountedclosetoV providesadditionaltransientimmunity. CC 7.4 Device Functional Modes 7.4.1 ResetOutputLow When the V supply voltage is below a threshold (V ) voltage minus a hysteresis (V ) voltage, the Reset CC RTH HYST pinwilloutputlogiclow.ResetisensuredtobealogiclowforV >0.5V. CC 7.4.2 ResetOutputHigh When the V supply voltage exceeds the reset threshold, the Reset is kept asserted for a time period (t ) CC RP programmedbyanexternalcapacitor(C );afterthisintervalResetgoestologichigh. 1 Copyright©1999–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:LP3470

LP3470 SNVS003G–JUNE1999–REVISEDAPRIL2016 www.ti.com 8 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validateandtesttheirdesignimplementationtoconfirmsystemfunctionality. 8.1 Application Information The LP3470 is a micropower CMOS voltage supervisor that is ideal for use in battery-powered microprocessor and other digital systems. It is small in size and provides maximum adjustability for power-on-reset (POR) and supervisory functions, making it a good solution in a variety of applications. The LP3470 is available in six standard reset threshold voltage options, and the reset time-out period is adjustable using an external capacitor providing maximum flexibility in any application. This device can ensure system reliability and ensures that a connectedmicroprocessorwilloperateonlywhenaminimumV supplyissatisfied. in 8.2 Typical Application TheLP3470canbeusedasasimplesupervisorcircuittomonitortheinputsupplytoamicroprocessorasshown inFigure10. Figure10. Power-OnResetCircuit 8.2.1 DesignRequirements Forthisdesignexample,usetheparameterslistedinTable1astheinputparameters. Table1.DesignParameters DESIGNPARAMETER EXAMPLEVALUE Inputsupplyvoltage 0.5to5.5V Resetthresholdvoltage 2.63V,2.93V,3.08V,3.65V,4V,4.38V,4.63V Externalpullupresistor 0.68to68kΩ Externalresettime-outperiodcapacitor C =1nF 1 Resettime-outperiod 2ms 10 SubmitDocumentationFeedback Copyright©1999–2016,TexasInstrumentsIncorporated ProductFolderLinks:LP3470

LP3470 www.ti.com SNVS003G–JUNE1999–REVISEDAPRIL2016 8.2.2 DetailedDesignProcedure The minimum application circuit requires the LP3470 Power-On Reset Circuit IC and a pullup resistor connecting the reset pin to V . The reset delay can be programmed with an additional capacitor connected from the SRT CC pin to GND. See Reset Time-Out Period and Pullup Resistor Selection for information on choosing specific valuesforcomponents. 8.2.3 ApplicationCurves Two capacitor values for C (0.1 µF and 1 µF) are used as examples to show the programmability of the output D timedelayasshowninFigure11andFigure12. Figure11.0.1-µFCapacitorProgrammedDelay Figure12.1-µFCapacitorProgrammedDelay Copyright©1999–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:LP3470

LP3470 SNVS003G–JUNE1999–REVISEDAPRIL2016 www.ti.com 9 Power Supply Recommendations The input of the LP3470 is designed to handle up to the supply voltage absolute maximum rating of 6 V. If the input supply is susceptible to any large transients above the maximum rating, then take extra precautions. An inputcapacitorisoptionalbutnotrequiredtohelpavoidfalseresetoutputtriggersduetonoise. 10 Layout 10.1 Layout Guidelines • PlacecomponentsascloseaspossibletotheIC • KeeptracesshortbetweentheICandtheC capacitortoensurethetimingdelayisasaccurateaspossible. 1 10.2 Layout Example Figure13showsalayoutexample. Figure13. LP3470LayoutExample 12 SubmitDocumentationFeedback Copyright©1999–2016,TexasInstrumentsIncorporated ProductFolderLinks:LP3470

LP3470 www.ti.com SNVS003G–JUNE1999–REVISEDAPRIL2016 11 Device and Documentation Support 11.1 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TIE2E™OnlineCommunity TI'sEngineer-to-Engineer(E2E)Community.Createdtofostercollaboration amongengineers.Ate2e.ti.com,youcanaskquestions,shareknowledge,exploreideasandhelp solveproblemswithfellowengineers. DesignSupport TI'sDesignSupport QuicklyfindhelpfulE2Eforumsalongwithdesignsupporttoolsand contactinformationfortechnicalsupport. 11.2 Trademarks E2EisatrademarkofTexasInstruments. Allothertrademarksarethepropertyoftheirrespectiveowners. 11.3 Electrostatic Discharge Caution Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. 11.4 Glossary SLYZ022—TIGlossary. Thisglossarylistsandexplainsterms,acronyms,anddefinitions. 12 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of thisdocument.Forbrowser-basedversionsofthisdatasheet,refertotheleft-handnavigation. Copyright©1999–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:LP3470

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) LP3470IM5-2.63/NOPB NRND SOT-23 DBV 5 1000 Green (RoHS SN Level-1-260C-UNLIM -40 to 85 D25C & no Sb/Br) LP3470IM5-2.75/NOPB NRND SOT-23 DBV 5 1000 Green (RoHS SN Level-1-260C-UNLIM D38C & no Sb/Br) LP3470IM5-2.83/NOPB NRND SOT-23 DBV 5 1000 Green (RoHS SN Level-1-260C-UNLIM D39C & no Sb/Br) LP3470IM5-2.93 NRND SOT-23 DBV 5 1000 TBD Call TI Call TI -40 to 85 D26C LP3470IM5-2.93/NOPB NRND SOT-23 DBV 5 1000 Green (RoHS SN Level-1-260C-UNLIM -40 to 85 D26C & no Sb/Br) LP3470IM5-3.08 NRND SOT-23 DBV 5 1000 TBD Call TI Call TI -40 to 85 D28C LP3470IM5-3.08/NOPB NRND SOT-23 DBV 5 1000 Green (RoHS SN Level-1-260C-UNLIM -40 to 85 D28C & no Sb/Br) LP3470IM5-3.65/NOPB NRND SOT-23 DBV 5 1000 Green (RoHS SN Level-1-260C-UNLIM -40 to 85 D37C & no Sb/Br) LP3470IM5-4.00 NRND SOT-23 DBV 5 1000 TBD Call TI Call TI -40 to 85 D29C LP3470IM5-4.00/NOPB NRND SOT-23 DBV 5 1000 Green (RoHS SN Level-1-260C-UNLIM -40 to 85 D29C & no Sb/Br) LP3470IM5-4.38 NRND SOT-23 DBV 5 1000 TBD Call TI Call TI -40 to 85 D30C LP3470IM5-4.38/NOPB NRND SOT-23 DBV 5 1000 Green (RoHS SN Level-1-260C-UNLIM -40 to 85 D30C & no Sb/Br) LP3470IM5-4.63 NRND SOT-23 DBV 5 1000 TBD Call TI Call TI -40 to 85 D31C LP3470IM5-4.63/NOPB NRND SOT-23 DBV 5 1000 Green (RoHS SN Level-1-260C-UNLIM -40 to 85 D31C & no Sb/Br) LP3470IM5-4.8/NOPB NRND SOT-23 DBV 5 1000 Green (RoHS SN Level-1-260C-UNLIM D15C & no Sb/Br) LP3470IM5X-2.63/NOPB NRND SOT-23 DBV 5 3000 Green (RoHS SN Level-1-260C-UNLIM -40 to 85 D25C & no Sb/Br) LP3470IM5X-2.83/NOPB NRND SOT-23 DBV 5 3000 Green (RoHS SN Level-1-260C-UNLIM D39C & no Sb/Br) LP3470IM5X-2.93/NOPB NRND SOT-23 DBV 5 3000 Green (RoHS SN Level-1-260C-UNLIM -40 to 85 D26C & no Sb/Br) LP3470IM5X-3.08 NRND SOT-23 DBV 5 3000 TBD Call TI Call TI -40 to 85 D28C Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) LP3470IM5X-3.08/NOPB NRND SOT-23 DBV 5 3000 Green (RoHS SN Level-1-260C-UNLIM -40 to 85 D28C & no Sb/Br) LP3470IM5X-4.00 NRND SOT-23 DBV 5 3000 TBD Call TI Call TI -40 to 85 D29C LP3470IM5X-4.00/NOPB NRND SOT-23 DBV 5 3000 Green (RoHS SN Level-1-260C-UNLIM -40 to 85 D29C & no Sb/Br) LP3470IM5X-4.38/NOPB NRND SOT-23 DBV 5 3000 Green (RoHS SN Level-1-260C-UNLIM -40 to 85 D30C & no Sb/Br) LP3470IM5X-4.63/NOPB NRND SOT-23 DBV 5 3000 Green (RoHS SN Level-1-260C-UNLIM -40 to 85 D31C & no Sb/Br) LP3470M5-2.63/NOPB NRND SOT-23 DBV 5 1000 Green (RoHS SN Level-1-260C-UNLIM 0 to 0 D25B & no Sb/Br) LP3470M5-2.93/NOPB NRND SOT-23 DBV 5 1000 Green (RoHS SN Level-1-260C-UNLIM 0 to 0 D26B & no Sb/Br) LP3470M5-3.08 NRND SOT-23 DBV 5 1000 TBD Call TI Call TI -20 to 85 D28B LP3470M5-3.08/NOPB NRND SOT-23 DBV 5 1000 Green (RoHS SN Level-1-260C-UNLIM 0 to 0 D28B & no Sb/Br) LP3470M5-4.00/NOPB NRND SOT-23 DBV 5 1000 Green (RoHS SN Level-1-260C-UNLIM 0 to 0 D29B & no Sb/Br) LP3470M5-4.38/NOPB NRND SOT-23 DBV 5 1000 Green (RoHS SN Level-1-260C-UNLIM 0 to 0 D30B & no Sb/Br) LP3470M5-4.63 NRND SOT-23 DBV 5 1000 TBD Call TI Call TI -20 to 85 D31B LP3470M5-4.63/NOPB NRND SOT-23 DBV 5 1000 Green (RoHS SN Level-1-260C-UNLIM 0 to 0 D31B & no Sb/Br) LP3470M5X-2.93/NOPB NRND SOT-23 DBV 5 3000 Green (RoHS SN Level-1-260C-UNLIM 0 to 0 D26B & no Sb/Br) LP3470M5X-3.08/NOPB NRND SOT-23 DBV 5 3000 Green (RoHS SN Level-1-260C-UNLIM 0 to 0 D28B & no Sb/Br) LP3470M5X-4.00/NOPB NRND SOT-23 DBV 5 3000 Green (RoHS SN Level-1-260C-UNLIM 0 to 0 D29B & no Sb/Br) LP3470M5X-4.63/NOPB NRND SOT-23 DBV 5 3000 Green (RoHS SN Level-1-260C-UNLIM 0 to 0 D31B & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. Addendum-Page 2

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 3

PACKAGE MATERIALS INFORMATION www.ti.com 29-Sep-2019 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) LP3470IM5-2.63/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP3470IM5-2.75/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP3470IM5-2.83/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP3470IM5-2.93 SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP3470IM5-2.93/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP3470IM5-3.08 SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP3470IM5-3.08/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP3470IM5-3.65/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP3470IM5-4.00 SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP3470IM5-4.00/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP3470IM5-4.38 SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP3470IM5-4.38/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP3470IM5-4.63 SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP3470IM5-4.63/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP3470IM5-4.8/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP3470IM5X-2.63/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP3470IM5X-2.83/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP3470IM5X-2.93/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 29-Sep-2019 Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) LP3470IM5X-3.08 SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP3470IM5X-3.08/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP3470IM5X-4.00 SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP3470IM5X-4.00/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP3470IM5X-4.38/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP3470IM5X-4.63/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP3470M5-2.63/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP3470M5-2.93/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP3470M5-3.08 SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP3470M5-3.08/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP3470M5-4.00/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP3470M5-4.38/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP3470M5-4.63 SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP3470M5-4.63/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP3470M5X-2.93/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP3470M5X-3.08/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP3470M5X-4.00/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP3470M5X-4.63/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 *Alldimensionsarenominal PackMaterials-Page2

PACKAGE MATERIALS INFORMATION www.ti.com 29-Sep-2019 Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) LP3470IM5-2.63/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LP3470IM5-2.75/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LP3470IM5-2.83/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LP3470IM5-2.93 SOT-23 DBV 5 1000 210.0 185.0 35.0 LP3470IM5-2.93/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LP3470IM5-3.08 SOT-23 DBV 5 1000 210.0 185.0 35.0 LP3470IM5-3.08/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LP3470IM5-3.65/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LP3470IM5-4.00 SOT-23 DBV 5 1000 210.0 185.0 35.0 LP3470IM5-4.00/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LP3470IM5-4.38 SOT-23 DBV 5 1000 210.0 185.0 35.0 LP3470IM5-4.38/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LP3470IM5-4.63 SOT-23 DBV 5 1000 210.0 185.0 35.0 LP3470IM5-4.63/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LP3470IM5-4.8/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LP3470IM5X-2.63/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 LP3470IM5X-2.83/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 LP3470IM5X-2.93/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 LP3470IM5X-3.08 SOT-23 DBV 5 3000 210.0 185.0 35.0 LP3470IM5X-3.08/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 LP3470IM5X-4.00 SOT-23 DBV 5 3000 210.0 185.0 35.0 LP3470IM5X-4.00/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 LP3470IM5X-4.38/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 LP3470IM5X-4.63/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 LP3470M5-2.63/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LP3470M5-2.93/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LP3470M5-3.08 SOT-23 DBV 5 1000 210.0 185.0 35.0 LP3470M5-3.08/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LP3470M5-4.00/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LP3470M5-4.38/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LP3470M5-4.63 SOT-23 DBV 5 1000 210.0 185.0 35.0 LP3470M5-4.63/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LP3470M5X-2.93/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 LP3470M5X-3.08/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 LP3470M5X-4.00/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 LP3470M5X-4.63/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 PackMaterials-Page3

PACKAGE OUTLINE DBV0005A SOT-23 - 1.45 mm max height SCALE 4.000 SMALL OUTLINE TRANSISTOR C 3.0 2.6 0.1 C 1.75 1.45 1.45 B A 0.90 PIN 1 INDEX AREA 1 5 2X 0.95 3.05 2.75 1.9 1.9 2 4 3 0.5 5X 0.3 0.15 0.2 C A B (1.1) TYP 0.00 0.25 GAGE PLANE 0.22 TYP 0.08 8 TYP 0.6 0 0.3 TYP SEATING PLANE 4214839/E 09/2019 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Refernce JEDEC MO-178. 4. Body dimensions do not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. www.ti.com

EXAMPLE BOARD LAYOUT DBV0005A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 5X (1.1) 1 5 5X (0.6) SYMM (1.9) 2 2X (0.95) 3 4 (R0.05) TYP (2.6) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:15X SOLDER MASK SOLDER MASK METAL UNDER METAL OPENING OPENING SOLDER MASK EXPOSED METAL EXPOSED METAL 0.07 MAX 0.07 MIN ARROUND ARROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED (PREFERRED) SOLDER MASK DETAILS 4214839/E 09/2019 NOTES: (continued) 5. Publication IPC-7351 may have alternate designs. 6. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN DBV0005A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 5X (1.1) 1 5 5X (0.6) SYMM 2 (1.9) 2X(0.95) 3 4 (R0.05) TYP (2.6) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:15X 4214839/E 09/2019 NOTES: (continued) 7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 8. Board assembly site may have different recommendations for stencil design. www.ti.com

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