LP2950, LP2951, NCV2951 Voltage Regulator - Low Power Low, Dropout 100 mA The LP2950 and LP2951 are micropower voltage regulators that are specifically designed to maintain proper regulation with an extremely www.onsemi.com low input−to−output voltage differential. These devices feature a very low quiescent bias current of 75 (cid:2)A and are capable of supplying TO−92 output currents in excess of 100 mA. Internal current and thermal CASE 29 limiting protection is provided. The LP2951 has three additional features. The first is the Error Pin: 1. Output Output that can be used to signal external circuitry of an out of 1 2. Ground regulation condition, or as a microprocessor power−on reset. The 12 2 3. Input 3 3 second feature allows the output voltage to be preset to 5.0 V, 3.3 V or STRAIGHT LEAD BENT LEAD 3.0 V output (depending on the version) or programmed from 1.25 V BULK PACK TAPE & REEL to 29 V. It consists of a pinned out resistor divider along with direct AMMO PACK access to the Error Amplifier feedback input. The third feature is aShutdown input that allows a logic level signal to turn−off or turn−on PIN CONNECTIONS 4 the regulator output. Due to the low input−to−output voltage differential and bias current 1 2 Pin: 1. Input specifications, these devices are ideally suited for battery powered 3 2. Ground computer, consumer, and industrial equipment where an extension of 1 2 3 3. Output DPAK useful battery life is desirable. The LP2950 is available in the three CASE 369C pin case 29 and DPAK packages, and the LP2951 is available in the (Top View) eight pin dual−in−line, SOIC−8 and Micro8 surface mount packages. Heatsink surface (shown as terminal 4 in The ‘A’ suffix devices feature an initial output voltage tolerance case outline drawing) is connected to Pin 2. ±0.5%. Features SOIC−8 8 • Low Quiescent Bias Current of 75 (cid:2)A CASE 751 1 • Low Input−to−Output Voltage Differential of 50 mV at 100 (cid:2)A and 380 mV at 100 mA PDIP−8 • 5.0 V, 3.3 V or 3.0 V ±0.5% Allows Use as a Regulator or Reference CASE 626 8 • Extremely Tight Line and Load Regulation 1 • Requires Only a 1.0 (cid:2)F Output Capacitor for Stability • Micro8(cid:2) 8 Internal Current and Thermal Limiting CASE 846A 1 • NCV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 PIN CONNECTIONS Qualified and PPAP Capable • These Devices are Pb−Free and RoHS Compliant Output 1 8 Input Sense 2 7 Feedback LP2951 Additional Features • Shutdown 3 6 VO Tap Error Output Signals an Out of Regulation Condition • GND 4 5 Error Output Output Programmable from 1.25 V to 29 V • Logic Level Shutdown Input (Top View) (See Following Page for Device Information.) ORDERING & MARKING INFORMATION See detailed ordering and shipping information in the package dimensions section on pages 14 and 15 of this data sheet. See general marking information in the device marking section on page 17 of this data sheet. © Semiconductor Components Industries, LLC, 1995 1 Publication Order Number: October, 2019 − Rev. 31 LP2950/D

LP2950, LP2951, NCV2951 DEVICE INFORMATION Output Voltage Operating Ambient Package 3.0 V 3.3 V 5.0 V Adjustable Temperature Range TO−92 LP2950CZ−3.0 LP2950CZ−3.3 LP2950CZ−5.0 Not TA = −40° to +125°C Suffix Z LP2950ACZ−3.0 LP2950ACZ−3.3 LP2950ACZ−5.0 Available DPAK LP2950CDT−3.0 LP2950CDT−3.3 LP2950CDT−5.0 Not TA = −40° to +125°C Suffix DT LP2950ACDT−3.0 LP2950ACDT−3.3 LP2950ACDT−5.0 Available SOIC−8 − NCV2951ACD−3.3R2 NCV2951ACDR2 NCV2951CDR2 TA = −40° to +125°C SOIC−8 LP2951CD−3.0 LP2951CD−3.3 LP2951CD LP2951CD TA = −40° to +125°C Suffix D LP2951ACD−3.0 LP2951ACD−3.3 LP2951ACD LP2951ACD Micro8 LP2951CDM−3.0 LP2951CDM−3.3 LP2951CDM LP2951CDM TA = −40° to +125°C Suffix DM LP2951ACDM−3.0 LP2951ACDM−3.3 LP2951ACDM LP2951ACDM DIP−8 LP2951CN−3.0 LP2951CN−3.3 LP2951CN LP2951CN TA = −40° to +125°C Suffix N LP2951ACN−3.0 LP2951ACN−3.3 LP2951ACN LP2951ACN LP2950Cx−xx / LP2951Cxx−xx 1% Output Voltage Precision at TA = 25°C LP2950ACx−xx / LP2951ACxx−xx 0.5% Output Voltage Precision at TA = 25°C Input Output 5.0 V/100 mA Battery or 3 182 k 1 1.0 (cid:2)F Unregulated DC Error Amplifier 60 k 1.23 V Reference LP2950CZ−5.0 GND 2 5.0 V/100 mA Battery or Input 8 Output 1 Sense 2 1.0 (cid:2)F Unregulated DC 182 k VO Tap 6 60 k 7 330 k Error Feedback Amplifier Shutdown From 3 60 k 75 mV/ CMOS/TTL 50 k 60 mV Error Output To CMOS/TTL 5 1.23 V Error Detection Reference Comparator LP2951CD or CN GND 4 This device contains 34 active transistors. Figure 1. Representative Block Diagrams www.onsemi.com 2

LP2950, LP2951, NCV2951 MAXIMUM RATINGS (TA = 25°C, unless otherwise noted.) Rating Symbol Value Unit Input Voltage VCC 30 Vdc Peak Transient Input Voltage (t < 300 ms) VCC 32 Vdc ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Power Dissipation and Thermal Characteristics Maximum Power Dissipation PD Internally Limited W Case 751(SOIC−8) D Suffix Thermal Resistance, Junction−to−Ambient R(cid:3)JA 180 °C/W Thermal Resistance, Junction−to−Case R(cid:3)JC 45 °C/W Case 369A (DPAK) DT Suffix (Note 1) Thermal Resistance, Junction−to−Ambient R(cid:3)JA 92 °C/W Thermal Resistance, Junction−to−Case R(cid:3)JC 6.0 °C/W Case 29 (TO−226AA/TO−92) Z Suffix Thermal Resistance, Junction−to−Ambient R(cid:3)JA 160 °C/W Thermal Resistance, Junction−to−Case R(cid:3)JC 83 °C/W Case 626 N Suffix Thermal Resistance, Junction−to−Ambient R(cid:3)JA 105 °C/W Case 846A (Micro8) DM Suffix Thermal Resistance, Junction−to−Ambient R(cid:3)JA 240 °C/W Feedback Input Voltage Vfb −1.5 to +30 Vdc Shutdown Input Voltage Vsd −0.3 to +30 Vdc Error Comparator Output Voltage Verr −0.3 to +30 Vdc Operating Ambient Temperature Range TA −40 to +125 °C Maximum Die Junction Temperature Range TJ +150 °C Storage Temperature Range Tstg −65 to +150 °C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. www.onsemi.com 3

LP2950, LP2951, NCV2951 ELECTRICAL CHARACTERISTICS (Vin = VO + 1.0 V, IO = 100 (cid:2)A, CO = 1.0 (cid:2)F, TA = 25°C [Note 3], unless otherwise noted.) Characteristic Symbol Min Typ Max Unit Output Voltage, 5.0 V Versions VO V Vin = 6.0 V, IO = 100 (cid:2)A, TA = 25°C LP2950C−5.0/LP2951C/NCV2951C* 4.950 5.000 5.050 LP2950AC−5.0/LP2951AC/NCV2951AC* 4.975 5.000 5.025 TA = −40 to +125°C LP2950C−5.0/LP2951C/NCV2951C* 4.900 − 5.100 LP2950AC−5.0/LP2951AC/NCV2951AC* 4.940 − 5.060 Vin = 6.0 to 30 V, IO = 100 (cid:2)A to 100 mA, TA = −40 to +125°C LP2950C−5.0/LP2951C/NCV2951C* 4.880 − 5.120 LP2950AC−5.0/LP2951AC/NCV2951AC* 4.925 − 5.075 Output Voltage, 3.3 V Versions VO V Vin = 4.3 V, IO = 100 (cid:2)A, TA = 25°C LP2950C−3.3/LP2951C−3.3 3.267 3.300 3.333 LP2950AC−3.3/LP2951AC−3.3/NCV2951AC−3.3* 3.284 3.300 3.317 TA = −40 to +125°C LP2950C−3.3/LP2951C−3.3 3.234 − 3.366 LP2950AC−3.3/LP2951AC−3.3/NCV2951AC−3.3* 3.260 − 3.340 Vin = 4.3 to 30 V, IO = 100 (cid:2)A to 100 mA, TA = −40 to +125°C LP2950C−3.3/LP2951C−3.3 3.221 − 3.379 LP2950AC−3.3/LP2951AC−3.3/NCV2951AC−3.3* 3.254 − 3.346 Output Voltage, 3.0 V Versions VO V Vin = 4.0 V, IO = 100 (cid:2)A, TA = 25°C LP2950C−3.0/LP2951C−3.0 2.970 3.000 3.030 LP2950AC−3.0/LP2951AC−3.0 2.985 3.000 3.015 TA = −40 to +125°C LP2950C−3.0/LP2951C−3.0 2.940 − 3.060 LP2950AC−3.0/LP2951AC−3.0 2.964 − 3.036 Vin = 4.0 to 30 V, IO = 100 (cid:2)A to 100 mA, TA = −40 to +125°C LP2950C−3.0/LP2951C−3.0 2.928 − 3.072 LP2950AC−3.0/LP2951AC−3.0 2.958 − 3.042 Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 1. The Junction−to−Ambient Thermal Resistance is determined by PCB copper area per Figure 29. 2. This device series contains ESD protection and exceeds the following tests: Human Body Model (HBM), 2000 V, Class 2, JESD22 A114−C Machine Model (MM), 200 V, Class B, JESD22 A115−A Charged Device Model (CDM), 2000 V, Class IV, JESD22 C101−C 3. Low duty pulse techniques are used during test to maintain junction temperature as close to ambient as possible. 4. VO(nom) is the part number voltage option. 5. Noise tests on the LP2951 are made with a 0.01 (cid:2)F capacitor connected across Pins 7 and 1. 6. Latch−up Current Maximum Rating tested per JEDEC standard: JESD78 − Inputs Low: passing positive current 100 mA and negative current −100 mA − Inputs High: passing positive current 100 mA and negative current −10 mA. *NCV prefix is for automotive and other applications requiring site and change control. www.onsemi.com 4

LP2950, LP2951, NCV2951 ELECTRICAL CHARACTERISTICS (continued) (Vin = VO + 1.0 V, IO = 100 (cid:2)A, CO = 1.0 (cid:2)F, TA = 25°C [Note 9], unless otherwise noted.) Characteristic Symbol Min Typ Max Unit Line Regulation (Vin = VO(nom) +1.0 V to 30 V) (Note 10) Regline % LP2950C−XX/LP2951C/LP2951C−XX/NCV2951C* − 0.08 0.20 LP2950AC−XX/LP2951AC/LP2951AC−XX/NCV2951AC* − 0.04 0.10 Load Regulation (IO = 100 (cid:2)A to 100 mA) Regload % LP2950C−XX/LP2951C/LP2951C−XX/NCV2951C* − 0.13 0.20 LP2950AC−XX/LP2951AC/LP2951AC−XX/NCV2951AC* − 0.05 0.10 Dropout Voltage VI − VO mV IO = 100 (cid:2)A − 30 80 IO = 100 mA − 350 450 Supply Bias Current ICC IO = 100 (cid:2)A − 93 120 (cid:2)A IO = 100 mA − 4.0 12 mA Dropout Supply Bias Current (Vin = VO(nom) − 0.5 V, ICCdropout − 110 170 (cid:2)A IO = 100 (cid:2)A) (Note 10) Current Limit (VO Shorted to Ground) ILimit − 220 300 mA Thermal Regulation Regthermal − 0.05 0.20 %/W Output Noise Voltage (10 Hz to 100 kHz) (Note 11) Vn (cid:2)Vrms CL = 1.0 (cid:2)F − 126 − CL = 100 (cid:2)F − 56 − LP2951A/LP2951AC Only Reference Voltage (TA = 25°C) Vref V LP2951C/LP2951C−XX/NCV2951C* 1.210 1.235 1.260 LP2951AC/LP2951AC−XX/NCV2951AC* 1.220 1.235 1.250 Reference Voltage (TA = −40to +125°C) Vref V LP2951C/LP2951C−XX/NCV2951C* 1.200 − 1.270 LP2951AC/LP2951AC−XX/NCV2951AC* 1.200 − 1.260 Reference Voltage (TA = −40to +125°C) Vref V IO = 100 (cid:2)A to 100 mA, Vin = 23 to 30 V LP2951C/LP2951C−XX/NCV2951C* 1.185 − 1.285 LP2951AC/LP2951AC−XX/NCV2951AC* 1.190 − 1.270 Feedback Pin Bias Current IFB − 15 40 nA Error Comparator Output Leakage Current (VOH = 30 V) Ilkg − 0.01 1.0 (cid:2)A Output Low Voltage (Vin = 4.5 V, IOL = 400 (cid:2)A) VOL − 150 250 mV Upper Threshold Voltage (Vin = 6.0 V) Vthu 40 45 − mV Lower Threshold Voltage (Vin = 6.0 V) Vthl − 60 95 mV Hysteresis (Vin = 6.0 V) Vhy − 15 − mV Shutdown Input Input Logic Voltage Vshtdn V Logic “0” (Regulator “On”) 0 − 0.7 Logic “1” (Regulator “Off”) 2.0 − 30 Shutdown Pin Input Current Ishtdn (cid:2)A Vshtdn = 2.4 V − 35 50 Vshtdn = 30 V − 450 600 Regulator Output Current in Shutdown Mode Ioff − 3.0 10 (cid:2)A (Vin = 30 V, Vshtdn = 2.0 V, VO = 0, Pin 6 Connected to Pin 7) Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 7. The Junction−to−Ambient Thermal Resistance is determined by PCB copper area per Figure 29. 8. ESD data available upon request. 9. Low duty pulse techniques are used during test to maintain junction temperature as close to ambient as possible. 10.VO(nom) is the part number voltage option. 11.Noise tests on the LP2951 are made with a 0.01 (cid:2)F capacitor connected across Pins 7 and 1. *NCV prefix is for automotive and other applications requiring site and change control. www.onsemi.com 5

LP2950, LP2951, NCV2951 DEFINITIONS Dropout Voltage − The input/output voltage differential Output Noise Voltage − The RMS ac voltage at the at which the regulator output no longer maintains regulation output, with constant load and no input ripple, measured against further reductions in input voltage. Measured when over a specified frequency range. the output drops 100 mV below its nominal value (which is Leakage Current − Current drawn through a bipolar measured at 1.0 V differential), dropout voltage is affected transistor collector−base junction, under a specified by junction temperature, load current and minimum input collector voltage, when the transistor is “off”. supply requirements. Upper Threshold Voltage − Voltage applied to the Line Regulation − The change in output voltage for a comparator input terminal, below the reference voltage change in input voltage. The measurement is made under which is applied to the other comparator input terminal, conditions of low dissipation or by using pulse techniques which causes the comparator output to change state from a such that average chip temperature is not significantly logic “0” to “1”. affected. Lower Threshold Voltage − Voltage applied to the Load Regulation − The change in output voltage for a comparator input terminal, below the reference voltage change in load current at constant chip temperature. which is applied to the other comparator input terminal, Maximum Power Dissipation − The maximum total which causes the comparator output to change state from a device dissipation for which the regulator will operate logic “1” to “0”. within specifications. Hysteresis − The difference between Lower Threshold Bias Current − Current which is used to operate the voltage and Upper Threshold voltage. regulator chip and is not delivered to the load. 10 6.0 A) LP2951C NT (m V) 5.0 TA = 25°C RRE 1.0 GE ( 4.0 RL = 50 k(cid:4) U A C T BIAS T VOL 3.0 RL = 50 (cid:4) 1 U 5 P 950/LP29 0.1 , OUTout 21..00 2 V P L 0.01 0 0.1 1.0 10 100 0 1.0 2.0 3.0 4.0 5.0 6.0 IL, LOAD CURRENT (mA) Vin, INPUT VOLTAGE (V) Figure 2. Quiescent Current Figure 3. 5.0 V Dropout Characteristics over Load 5.00 6.0 LP2951C 5.0 V) 4.99 V) GE ( GE ( 4.0 A A T 4.98 T L L O O V V 3.0 T T U U P 4.97 P UT UT 2.0 O O , ut 4.96 , ut 25°C o o 1.0 V V LP2951C 125°C −40°C 4.95 0 -(cid:2)50 0 50 100 150 200 0 1.0 2.0 3.0 4.0 5.0 6.0 TA, AMBIENT TEMPERATURE (°C) Vin, INPUT VOLTAGE (V) Figure 4. Output Voltage versus Temperature Figure 5. 5.0 V Dropout Characteristics with R = 50 (cid:2) L www.onsemi.com 6

LP2950, LP2951, NCV2951 250 400 350 μT ( A) 210500 0.1 mA Load Current AGE (mV) 320500 TA = 25°C N T RE OL 200 R V U T C 100 U 150 BIAS No Load ROPO 100 50 D 50 0 0 0 5.0 10 15 20 25 0.1 1.0 10 100 Vin, INPUT VOLTAGE (V) IO, OUTPUT CURRENT (mA) Figure 6. Input Current Figure 7. Dropout Voltage versus Output Current 550 55 5.0 LP2951C k RVOLTAGE (mV)= 50L544050000 RL = 50 544050 RVOLTAGE (mV)= 50 L UTPUT VOLTAGE (V) 243...000 RTAL == 2353°0C k Vin Decreasing Vin Increasing POUT 350 35 POUT , Oout1.0 RO RL = 50 k RO V D D 300 30 0 -(cid:2)50 0 50 100 150 4.70 4.74 4.78 4.82 4.86 4.90 T, TEMPERATURE (°C) Vin, INPUT VOLTAGE (V) Figure 8. Dropout Voltage versus Temperature Figure 9. Error Comparator Output 8.0 4.0 6.0 Vin V) E (V) 5.0 m G V, INPUT VOLTAGE (V)in7766....5050 TCAL == 21V5.o0°u Ct(cid:2)F 20--(cid:2)(cid:2).240..00UTPUT VOLTAGE CHANGE ( DOWN AND OUTPUT VOLTA 4231....0000 CL = 1.0 (cid:2)F ShutdowCnL I n=p 1u0t (cid:2)F IVTVLAoi n=u =t= 1 = 280 55. 0m°.0 CVA V IL = 1.0 mA O UT 0 VO = 5.0 V SH 5.5 -(cid:2)6.0 -1.0 0 100 200 300 400 500 600 700 800 -100 0 100 200 300 400 t, TIME ((cid:2)s) t, TIME ((cid:2)s) Figure 10. Line Transient Response Figure 11. LP2951 Enable Transient www.onsemi.com 7

LP2950, LP2951, NCV2951 200 80 CL = 1.0 (cid:2)F 400 V) D CURRENT (mA)11550000 ITVLAo =u =t 4 =20 550°. 0(cid:2)C AV to 75 mA Vout 0200 VOLTAGE CHANGE (m E REJECTION (dB)6400 IL= 0.1 mA LOA 0 ILoad -(cid:2)200UTPUT RIPPL20 TCAL == 215.0° C(cid:2)F O Vin = 6.0 V -(cid:2)400 Vout = 5.0 V -(cid:2)50 0 0 0.5 1 1.5 2 2.5 3 3.5 4 1.0 10 100 1.0 k 10 k 100 k t, TIME (ms) f, FREQUENCY (Hz) Figure 12. Load Transient Response Figure 13. Ripple Rejection 4.0 1.8 IL= 100 mA V) Hz) 3.0 CL = 1.0 (cid:2)F TVLAPO 2 ==9 25551.0°C CV LTAGE ( 1.6 √μE ( V/ OLD VO 1.4 GE NOIS 2.0 THRESH 1.2 Output “On"Output “Off" A N VOLT 1.0 CL = 100 (cid:2)F DOW 1.0 T U H S 0 0.8 100 1.0 k 10 k 100 k -(cid:2)40 -(cid:2)20 0 20 40 60 80 100 120 140 160 f, FREQUENCY (Hz) t, TEMPERATURE (°C) Figure 14. Output Noise Figure 15. Shutdown Threshold Voltage versus Temperature 100 4.0 10000 Vout = 5 V T (mA) 80 TA = 75°C TA = 25°C 2.0 GE (mV) 1000 Unstable Region RREN 60 0 CHANms)100 100 (cid:2)F TPUT CU 40 -(cid:2)2.0OLTAGE ESR (oh 10 Stable Region 0.1 (cid:2)F U V 1 O T Unstable Region for 0.1 (cid:2)F capacitor only , ut20 -(cid:2)4.0PU Vo LP2951CN OUT 0.1 Lower unstable region is for 0.1 (cid:2)F only. 1 (cid:2)F and 100 (cid:2)F show no instability with low ESR values. 0 -(cid:2)6.0 0.01 0 5.0 10 15 20 25 30 35 40 0 10 20 30 40 50 60 70 80 90 100 Vin, INPUT VOLTAGE (V) Output Current (mA) Figure 16. Maximum Rated Figure 17. Output Stability versus Output Capacitor Output Current Change www.onsemi.com 8

LP2950, LP2951, NCV2951 APPLICATIONS INFORMATION Introduction to the LP2951 is ramped up and down. The ERROR signal The LP2950/LP2951 regulators are designed with becomes valid (low) at about 1.3 V input. It goes high when internal current limiting and thermal shutdown making them the input reaches about 5.0 V (V exceeds about 4.75 V). out user−friendly. Typical application circuits for the LP2950 Since the LP2951’s dropout voltage is dependent upon the and LP2951 are shown in Figures 20 through 28. load current (refer to the curve in the Typical Performance These regulators are not internally compensated and thus Characteristics), the input voltage trip point will vary with require a 1.0 (cid:2)F (or greater) capacitance between the load current. The output voltage trip point does not vary LP2950/LP2951 output terminal and ground for stability. with load. Most types of aluminum, tantalum or multilayer ceramic The error comparator output is an open collector which will perform adequately. Solid tantalums or appropriate requires an external pullup resistor. This resistor may be multilayer ceramic capacitors are recommended for returned to the output or some other voltage within the operation below 25°C. system. The resistance value should be chosen to be At lower values of output current, less output capacitance consistent with the 400 (cid:2)A sink capability of the error is required for output stability. The capacitor can be reduced comparator. A value between 100 k(cid:4) and 1.0 M(cid:4) is to 0.33 (cid:2)F for currents less than 10 mA, or 0.1 (cid:2)F for currents suggested. No pullup resistance is required if this output is below 1.0 mA. Using the 8 pin versions at voltages less than unused. 5.0 V operates the error amplifier at lower values of gain, so When operated in the power down mode (V = 0V), in that more output capacitance is needed for stability. For the theerror comparator output will go high if it has been pulled worst case operating condition of a 100 mA load at 1.23 V up to an external supply (the output transistor is in high output (output Pin 1 connected to the feedback Pin 7) impedance state). To avoid this invalid response, the error aminimum capacitance of 3.3 (cid:2)F is recommended. comparator output should be pulled up to V (see out The LP2950 will remain stable and in regulation when Figure 18). operated with no output load. When setting the output voltage of the LP2951 with external resistors, the resistance 5.0 V values should be chosen to draw a minimum of 1.0 (cid:2)A. 4.75 V 4.70 V Output A bypass capacitor is recommended across the Voltage LP2950/LP2951 input to ground if more than 4 inches of wire connects the input to either a battery or power supply Pullup filter capacitor. to Ext Not Input capacitance at the LP2951 Feedback Pin 7 can Not Valid create a pole, causing instability if high value external ERROR Valid Pullup resistors are used to set the output voltage. Adding a 100 pF to Vout capacitor between the Output Pin 1 and the Feedback Pin 7 and increasing the output filter capacitor to at least 3.3 (cid:2)F 4.75 V + Vdropout 4.70 V + Vdropout will stabilize the feedback loop. Input Error Detection Comparator Voltage 1.3 V 1.3 V The comparator switches to a positive logic low whenever the LP2951 output voltage falls more than approximately Figure 18. ERROR Output Timing 5.0% out of regulation. This value is the comparator’s designed−in offset voltage of 60 mV divided by the 1.235 V Programming the Output Voltage (LP2951) internal reference. As shown in the representative block The LP2951CX may be pin−strapped for the nominal diagram. This trip level remains 5.0% below normal fixed output voltage using its internal voltage divider by regardless of the value of regulated output voltage. For tying Pin 1 (output) to Pin 2 (sense) and Pin 7 (feedback) to example, the error flag trip level is 4.75 V for a normal 5.0 V Pin 6 (5.0 V tap). Alternatively, it may be programmed for regulated output, or 9.50 V for a 10 V output voltage. any output voltage between its 1.235 reference voltage and Figure 2 is a timing diagram which shows the ERROR its 30 V maximum rating. An external pair of resistors is signal and the regulated output voltage as the input voltage required, as shown in Figure 19. www.onsemi.com 9

LP2950, LP2951, NCV2951 Vin for reducing noise on the 3 lead LP2950. However, increasing the capacitor from 1.0 (cid:2)F to 220 (cid:2)F only decreases the noise from 430 (cid:2)V to 160 (cid:2)Vrms for a 100 kHz 100 k 8 bandwidth at the 5.0 V output. Error 5 Vin 1 Noise can be reduced fourfold by a bypass capacitor Output Error Vout across R1, since it reduces the high frequency gain from 4 Vout to unity. Pick 2 1.23 to 30 V SNS NC ShutdInopwunt 3 SD VO T 6 NC R1 0.01 (cid:2)F 3.3 (cid:2)F CBypass(cid:5)2(cid:5)R1x1200Hz or about 0.01 (cid:2)F. When doing this, the output capacitor must GND FB be increased to 3.3 (cid:2)F to maintain stability. These changes 4 7 reduce the output noise from 430 (cid:2)V to 126 (cid:2)Vrms for a 100 kHz bandwidth at 5.0 V output. With bypass capacitor R2 added, noise no longer scales with output voltage so that improvements are more dramatic at higher output voltages. Figure 19. Adjustable Regulator Unregulated Input The complete equation for the output voltage is: 1.0 (cid:2)F 10 k 0.01 (cid:2)F MTB23P06E V (cid:2)V (1(cid:3)R1(cid:4)R2)(cid:3)I R1 out ref FB Vout where Vref is the nominal 1.235 V reference voltage and IFB 5.0 V ±1.0% 8 is the feedback pin bias current, nominally −20 nA. The 0 to 1.0 A minimum recommended load current of 1.0 (cid:2)A forces an Error 5 Error Vin Vout 1 upper limit of 1.2 M(cid:4) on the value of R2, if the regulator Output 2 must work with no load. IFB will produce a 2% typical error SNS LP2951CN in V which may be eliminated at room temperature by adjusotuitng R1. For better accuracy, choosing R2 = 100 k ShutdInopwunt 3 SD VO T 6 220 (cid:2)F reduces this error to 0.17% while increasing the resistor GND FB program current to 12 (cid:2)A. Since the LP2951 typically draws 4 7 75 (cid:2)A at no load with Pin 2 open circuited, the extra 12 (cid:2)A 0.002 (cid:2)F of current drawn is often a worthwhile tradeoff for 1.0 M eliminating the need to set output voltage in test. 2.0 k Output Noise In many applications it is desirable to reduce the noise present at the output. Reducing the regulator bandwidth by Figure 20. 1.0 A Regulator with 1.2 V Dropout increasing the size of the output capacitor is the only method www.onsemi.com 10

LP2950, LP2951, NCV2951 TYPICAL APPLICATIONS +V = 2.0 to 30 V IL Load IL = 1.23/R Unregulated Input 6.0 to 10 Vdc 8 8 0.1 (cid:2)F NC 5 Error VinVout 1 1N4001 4.2 V ±(cid:2)0.025 V OuEtrprourt 5 Error Vin Vout 1 2 SNS 2 NC 330 pF 2.0 M SNS 1.0% LP2951CN 0.1 (cid:2)F LP2951CN Shutdown 3 6 3 SD VO T 6 NC Input SD VO T 806 k GND FB 2.2 (cid:2)F 1.0% Lithium Ion GND FB Rechargeable 4 7 4 7 Cell 50 k R 1.0 (cid:2)F GND Figure 21. Lithium Ion Battery Cell Charger Figure 22. Low Drift Current Sink +Vin +Vin CMOS *Sleep Gate 470 k 8 Input 5 Vin 1 2N3906 Error Vout Vout 470 k 470 k 47 k 8 Reset LP2951CSNNS 2 NC OuEtrprourt 5 Error Vin Vout 1 2N3906 Vout 3 SD VO T 6 NC R1 2 Normally LP2951CSNNS NC 200 k Closed GN4D FB7 1.0 (cid:2)F ShutdInopwunt 3 SD VO T 6 NC 3.3 (cid:2)F 100 pF 100 k GND FB R2 4 7 Error flag occurs when Vin is too 100 k low to maintain Vout, or if Vout is re- duced by excessive load current. Figure 23. Latch Off When Error Flag Occurs Figure 24. 5.0 V Regulator with 2.5 V Sleep Function www.onsemi.com 11

LP2950, LP2951, NCV2951 +Vin 8 5 Vin 1 D2 Memory Error Vout V+ D1 SNS 2 1.0 (cid:2)F 20 LP2951CN 3.6 V NC 3 SD #1 VO T 6 NiCad GND FB 4 7 Early Warning 27 k D3 All diodes are 1N4148. Reset Early Warning flag on low input voltage. 2.7 M (cid:2)P Q1 D4 VDD Main output latches off at lower input voltages. 2N3906 8 Battery backup on auxiliary output. 330 k 5 Error Vin Vout 1 Operation: Regulator #1’s Vout is programmed one Main diode drop above 5.0 V. Its error flag becomes active SNS 2 Output when Vin < 5.7 V. When Vin drops below 5.3 V, the LP2951CN error flag of regulator #2 becomes active and via Q1 3 SD #2 VO T 6 1.0 (cid:2)F l5a.t7c hVe, sre tghuel amtoarin # o1u istp buat c“okf fin”. rWeghuelna tVioinn aagnadi nth eex eceaerldys warning signal rises, unlatching regulator #2 via D3. GND FB 4 7 Figure 25. Regulator with Early Warning and Auxiliary Output Current Limit +Vin Section 680 470 0.05 1000 (cid:2)F 2N3906 2N3906 MJE2955 10 k .33 (cid:2)F 4.7 M 8 EFrlraogr 5 Error Vin Vout 1 2 SNS NC 47 Vout @ 2.0 A LP2951CN 220 3 SD VO T 6 NC 4.7 (cid:2)F 100 (cid:2)F Tant 20 k GND FB .01 (cid:2)F R1 4 7 R2 0.033 (cid:2)F Vout = 1.25V (1.0 + R1/R2) For 5.0 V output, use internal resistors. Wire Pin 6 to 7, and wire Pin 2 to +Vout Bus. Figure 26. 2.0 A Low Dropout Regulator www.onsemi.com 12

LP2950, LP2951, NCV2951 +5.0 V 4.7 k Output* 1 5 4 20 mA 8 5 Vin 1 2 4 NC Error Vout 2 SNS NC LP2951CN * High for NC 3 SD VO T 6 NC IL < 3.5 mA 1N4001 0.1 (cid:2)F Gnd FB 4 7 1N457 1N457 360 1N457 Figure 27. Open Circuit Detector for 4.0 to 20 mA Current Loop 31.6 k 6.0 V Lead-Acid 100 k 2N3906 Battery 8 2 NC 5 Error Vin Vout 1 Main V+ 1 MC34164P−5 2 SNS Memory V+ 3 LP2951CN 1.0 (cid:2)F 3 6 20 SD VO T NC NiCad Backup Gnd FB Battery 4 7 NC Figure 28. Low Battery Disconnect 100 Free Air PD(max) for TA = 50°C 2.4 N (W) E O ESISTANC°R ( C/W) 8900 VMeoruticnatelldy 2.0Î oz. CÎLoppeÎr 12..60 DISSIPATI , THERMAL RJAUNCTION‐TO‐AI 6700 MSiizneim Puamd L ÎÎÎÎÎÎÎÎÎ 01..82 XIMUM POWER θ J A R 50 0.4 M R(cid:3)JA P, D 40 0 0 5.0 10 15 20 25 30 L, LENGTH OF COPPER (mm) Figure 29. DPAK Thermal Resistance and Maximum Power Dissipation versus PCB Copper Length www.onsemi.com 13

LP2950, LP2951, NCV2951 ORDERING INFORMATION (LP2950) Output Voltage Part Number (Volts) Tolerance (%) Package Shipping† LP2950CZ−3.0G 3.0 1.0 TO−92 2000 Units / Bag (Pb−Free) LP2950CZ−3.0RAG 3.0 1.0 TO−92 2000 Units / Tape & Reel (Pb−Free) LP2950ACZ−3.0G 3.0 0.5 TO−92 2000 Units / Bag (Pb−Free) LP2950ACZ−3.0RAG 3.0 0.5 TO−92 2000 Units / Tape & Reel (Pb−Free) LP2950CZ−3.3G 3.3 1.0 TO−92 2000 Units / Bag (Pb−Free) LP2950CZ−3.3RAG 3.3 1.0 TO−92 2000 Units / Tape & Reel (Pb−Free) LP2950ACZ−3.3G 3.3 0.5 TO−92 2000 Units / Bag (Pb−Free) LP2950ACZ−3.3RAG 3.3 0.5 TO−92 2000 Units / Tape & Reel (Pb−Free) LP2950CZ−5.0G 5.0 1.0 TO−92 2000 Units / Bag (Pb−Free) LP2950CZ−5.0RAG 5.0 1.0 TO−92 2000 Units / Tape & Reel (Pb−Free) LP2950CZ−5.0RPG 5.0 1.0 TO−92 2000 Units / Ammo Pack (Pb−Free) LP2950ACZ−5.0G 5.0 0.5 TO−92 2000 Units / Bag (Pb−Free) LP2950ACZ−5.0RAG 5.0 0.5 TO−92 2000 Units / Tape & Reel (Pb−Free) LP2950CDT−3.0G 3.0 1.0 DPAK 75 Units / Rail (Pb−Free) LP2950CDT−3.0RKG 3.0 1.0 DPAK 2500 Units / Tape & Reel (Pb−Free) LP2950ACDT−3.0G 3.0 0.5 DPAK 75 Units / Rail (Pb−Free) LP2950ACDT−3RKG 3.0 0.5 DPAK 2500 Units / Tape & Reel (Pb−Free) LP2950CDT−3.3G 3.3 1.0 DPAK 75 Units / Rail (Pb−Free) LP2950CDT−3.3RKG 3.3 1.0 DPAK 2500 Units / Tape & Reel (Pb−Free) LP2950ACDT−3.3RG 3.3 0.5 DPAK 2500 Units / Tape & Reel (Pb−Free) LP2950CDT−5.0G 5.0 1.0 DPAK 75 Units / Rail (Pb−Free) LP2950CDT−5.0RKG 5.0 1.0 DPAK 2500 Units / Tape & Reel (Pb−Free) LP2950ACDT−5.0G 5.0 0.5 DPAK 75 Units / Rail (Pb−Free) LP2950ACDT−5RKG 5.0 0.5 DPAK 2500 Units / Tape & Reel (Pb−Free) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. www.onsemi.com 14

LP2950, LP2951, NCV2951 ORDERING INFORMATION (LP2951) Output Voltage Part Number (Volts) Tolerance (%) Package Shipping† LP2951CD−3.0G 3.0 1.0 SOIC−8 98 Units / Rail (Pb−Free) LP2951CD−3.0R2G 3.0 1.0 SOIC−8 2500 Units / Tape & Reel (Pb−Free) LP2951ACD−3.0G 3.0 0.5 SOIC−8 98 Units / Rail (Pb−Free) LP2951ACD−3.0R2G 3.0 0.5 SOIC−8 2500 Units / Tape & Reel (Pb−Free) LP2951CD−3.3G 3.3 1.0 SOIC−8 98 Units / Rail (Pb−Free) LP2951CD−3.3R2G 3.3 1.0 SOIC−8 2500 Units / Tape & Reel (Pb−Free) LP2951ACD−3.3G 3.3 0.5 SOIC−8 98 Units / Rail (Pb−Free) LP2951ACD−3.3R2G 3.3 0.5 SOIC−8 2500 Units / Tape & Reel (Pb−Free) LP2951CDG 5.0 or Adj. 1.0 SOIC−8 98 Units / Rail (Pb−Free) LP2951CDR2G 5.0 or Adj. 1.0 SOIC−8 2500 Units / Tape & Reel (Pb−Free) LP2951ACDG 5.0 or Adj. 0.5 SOIC−8 98 Units / Rail (Pb−Free) LP2951ACDR2G 5.0 or Adj. 0.5 SOIC−8 2500 Units / Tape & Reel (Pb−Free) LP2951CDM−3.0R2G 3.0 1.0 Micro8 4000 Units / Tape & Reel (Pb−Free) LP2951ACDM−3.0RG 3.0 0.5 Micro8 4000 Units / Tape & Reel (Pb−Free) LP2951CDM−3.3R2G 3.3 1.0 Micro8 4000 Units / Tape & Reel (Pb−Free) LP2951ACDM−3.3RG 3.3 0.5 Micro8 4000 Units / Tape & Reel (Pb−Free) LP2951CDMR2G 5.0 or Adj. 1.0 Micro8 4000 Units / Tape & Reel (Pb−Free) LP2951ACDMR2G 5.0 or Adj. 0.5 Micro8 4000 Units / Tape & Reel (Pb−Free) LP2951ACN−3.0G 3.0 0.5 PDIP−8 50 Units / Rail (Pb−Free) LP2951CN−3.3G 3.3 1.0 PDIP−8 50 Units / Rail (Pb−Free) LP2951ACN−3.3G 3.3 0.5 PDIP−8 50 Units / Rail (Pb−Free) LP2951CNG 5.0 or Adj. 1.0 PDIP−8 50 Units / Rail (Pb−Free) LP2951ACNG 5.0 or Adj. 0.5 PDIP−8 50 Units / Rail (Pb−Free) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. www.onsemi.com 15

LP2950, LP2951, NCV2951 ORDERING INFORMATION (NCV2951) Output Voltage Part Number (Volts) Tolerance (%) Package Shipping† NCV2951ACD3.3R2G* 3.3 0.5 SOIC−8 2500 Units / Tape & Reel (Pb−Free) NCV2951ACDR2G* 5.0 or Adj. 0.5 SOIC−8 2500 Units / Tape & Reel (Pb−Free) NCV2951CDR2G* 5.0 or Adj. 1.0 SOIC−8 2500 Units / Tape & Reel (Pb−Free) NCV2951ACDMR2G* 5.0 or Adj. 0.5 Micro8 4000 Units / Tape & Reel (Pb−Free) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *NCV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable. www.onsemi.com 16

LP2950, LP2951, NCV2951 MARKING DIAGRAMS TO−92 DPAK CASE 029 CASE 369C 2950 2950A CZ−xx CZ−xx 50−yG 50−yyG 50A−yG 50AyyG ALYW(cid:2) ALYW(cid:2) ALYWW ALYWW ALYWW ALYWW (cid:2) (cid:2) SOIC−8 CASE 751 8 8 8 51z * 51z−33 * 51z−3 ALYW ALYW ALYW (cid:2) (cid:2) (cid:2) 1 1 1 PDIP−8 Micro8 CASE 626 CASE 846A 8 8 8 8 8 8 51CN 51ACN 51CN−xx 51ACN−xx PAyy P−yy AWL AWL AWL AWL AYW(cid:2) AYW(cid:2) YYWWG YYWWG YYWWG YYWWG (cid:2) (cid:2) 1 1 1 1 1 1 xx = 3.0, 3.3, or 5.0 y = 3 or 5 yy = 30, 33, or 50 z = A or C A = Assembly Location WL, L = Wafer Lot YY, Y = Year WW, W = Work Week G = Pb−Free Package (cid:2) = Pb−Free Package (Note: Microdot may be in either location) *This marking diagram also applies to NCV2951. www.onsemi.com 17

LP2950, LP2951, NCV2951 PACKAGE DIMENSIONS TO−226AA/TO−92 Z SUFFIX CASE 29−11 ISSUE AM A NOTES: B STRAIGHT LEAD 1. DIMENSIONING AND TOLERANCING PER ANSI BULK PACK Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. R 3. CONTOUR OF PACKAGE BEYOND DIMENSION R IS UNCONTROLLED. 4. LEAD DIMENSION IS UNCONTROLLED IN P AND P BEYOND DIMENSION K MINIMUM. L SEATING INCHES MILLIMETERS PLANE K DIM MIN MAX MIN MAX A 0.175 0.205 4.45 5.20 B 0.170 0.210 4.32 5.33 C 0.125 0.165 3.18 4.19 D 0.016 0.021 0.407 0.533 X X D G 0.045 0.055 1.15 1.39 G H 0.095 0.105 2.42 2.66 J 0.015 0.020 0.39 0.50 H J K 0.500 --- 12.70 --- L 0.250 --- 6.35 --- V C N 0.080 0.105 2.04 2.66 P --- 0.100 --- 2.54 SECTION X−X R 0.115 --- 2.93 --- 1 N V 0.135 --- 3.43 --- N R A B BENT LEAD N1O.TEDSIM:ENSIONING AND TOLERANCING PER TAPE & REEL ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. AMMO PACK 3. CONTOUR OF PACKAGE BEYOND DIMENSION R IS UNCONTROLLED. 4. LEAD DIMENSION IS UNCONTROLLED IN P P AND BEYOND DIMENSION K MINIMUM. T MILLIMETERS SPELAATNIENG K DIM MIN MAX A 4.45 5.20 B 4.32 5.33 C 3.18 4.19 D 0.40 0.54 X X D G 2.40 2.80 G J 0.39 0.50 K 12.70 --- J N 2.04 2.66 V P 1.50 4.00 C R 2.93 --- V 3.43 --- SECTION X−X 1 N www.onsemi.com 18

LP2950, LP2951, NCV2951 PACKAGE DIMENSIONS DPAK (SINGLE GAUGE) CASE 369C ISSUE F NOTES: A 1.DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. E C 2.CONTROLLING DIMENSION: INCHES. A 3.THERMAL PAD CONTOUR OPTIONAL WITHIN DI- b3 B MENSIONS b3, L3 and Z. c2 4.DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL 4 NOT EXCEED 0.006 INCHES PER SIDE. L3 Z 5.DIMENSIONS D AND E ARE DETERMINED AT THE D DETAIL A H 6.DOAUTTUEMRSM OA SATN EDX BT RAERME EDSE OTEFR TMHIEN EPDLA ASTT DICA TBUOMDY. 1 2 3 PLANE H. 7.OPTIONAL MOLD FEATURE. L4 INCHES MILLIMETERS NOTE 7 b2 c BOTTOM VIEW DIM MIN MAX MIN MAX A 0.086 0.094 2.18 2.38 e SIDE VIEW A1 0.000 0.005 0.00 0.13 b b 0.025 0.035 0.63 0.89 0.005 (0.13) M C b2 0.028 0.045 0.72 1.14 TOP VIEW b3 0.180 0.215 4.57 5.46 c 0.018 0.024 0.46 0.61 c2 0.018 0.024 0.46 0.61 H Z Z D 0.235 0.245 5.97 6.22 E 0.250 0.265 6.35 6.73 e 0.090 BSC 2.29 BSC L2 GPLAAUNGEE C SPELAATNIENG H 0.370 0.410 9.40 10.41 L 0.055 0.070 1.40 1.78 L1 0.114 REF 2.90 REF L2 0.020 BSC 0.51 BSC L A1 BOTTOM VIEW L3 0.035 0.050 0.89 1.27 L1 ALTERNATE L4 −−− 0.040 −−− 1.01 CONSTRUCTIONS Z 0.155 −−− 3.93 −−− DETAIL A ROTATED 90(cid:3) CW SOLDERING FOOTPRINT* 6.20 3.00 0.244 0.118 2.58 0.102 5.80 1.60 6.17 0.228 0.063 0.243 (cid:6) (cid:7) mm SCALE 3:1 inches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. www.onsemi.com 19

LP2950, LP2951, NCV2951 PACKAGE DIMENSIONS SOIC−8 NB CASE 751−07 ISSUE AK NOTES: −X− 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. A 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) 8 5 PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR B S 0.25 (0.010) M Y M PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL 1 IN EXCESS OF THE D DIMENSION AT −Y− 4 K 6. 7M5A1X−I0M1U TMH RMUA T7E51R−IA0L6 CAROEN DOIBTSIOONL.ETE. NEW STANDARD IS 751−07. G MILLIMETERS INCHES DIM MIN MAX MIN MAX A 4.80 5.00 0.189 0.197 C NX 45(cid:3) B 3.80 4.00 0.150 0.157 SEATING C 1.35 1.75 0.053 0.069 PLANE D 0.33 0.51 0.013 0.020 −Z− G 1.27 BSC 0.050 BSC H 0.10 0.25 0.004 0.010 0.10 (0.004) J 0.19 0.25 0.007 0.010 H D M J K 0.40 1.27 0.016 0.050 M 0 (cid:3) 8 (cid:3) 0 (cid:3) 8 (cid:3) N 0.25 0.50 0.010 0.020 0.25 (0.010)M Z Y S X S S 5.80 6.20 0.228 0.244 SOLDERING FOOTPRINT* 1.52 0.060 7.0 4.0 0.275 0.155 0.6 1.270 0.024 0.050 (cid:6) (cid:7) mm SCALE 6:1 inches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. www.onsemi.com 20

LP2950, LP2951, NCV2951 PACKAGE DIMENSIONS PDIP−8 CASE 626−05 ISSUE P SCALE 1:1 D A NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. E 2. CONTROLLING DIMENSION: INCHES. H 3. DIMENSIONS A, A1 AND L ARE MEASURED WITH THE PACK- AGE SEATED IN JEDEC SEATING PLANE GAUGE GS−3. 8 5 4. DIMENSIONS D, D1 AND E1 DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS ARE E1 NOT TO EXCEED 0.10 INCH. 5. DIMENSION E IS MEASURED AT A POINT 0.015 BELOW DATUM 1 4 PLANE H WITH THE LEADS CONSTRAINED PERPENDICULAR TO DATUM C. 6. DIMENSION eB IS MEASURED AT THE LEAD TIPS WITH THE NOTE 8 c LEADS UNCONSTRAINED. b2 B 7. DATUM PLANE H IS COINCIDENT WITH THE BOTTOM OF THE END VIEW LEADS, WHERE THE LEADS EXIT THE BODY. TOP VIEW WITH LEADS CONSTRAINED 8. PACKAGE CONTOUR IS OPTIONAL (ROUNDED OR SQUARE CORNERS). NOTE 5 INCHES MILLIMETERS A2 DIM MIN MAX MIN MAX e/2 A A −−−− 0.210 −−− 5.33 NOTE 3 A1 0.015 −−−− 0.38 −−− A2 0.115 0.195 2.92 4.95 L b 0.014 0.022 0.35 0.56 b2 0.060 TYP 1.52 TYP C 0.008 0.014 0.20 0.36 D 0.355 0.400 9.02 10.16 SEATING A1 PLANE D1 0.005 −−−− 0.13 −−− E 0.300 0.325 7.62 8.26 C M E1 0.240 0.280 6.10 7.11 D1 e 0.100 BSC 2.54 BSC e eB eB −−−− 0.430 −−− 10.92 L 0.115 0.150 2.92 3.81 8Xb END VIEW M −−−− 10° −−− 10° 0.010 M C A M B M NOTE 6 SIDE VIEW www.onsemi.com 21

LP2950, LP2951, NCV2951 PACKAGE DIMENSIONS Micro8(cid:4) CASE 846A−02 ISSUE J DD NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED HE E 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. 846A-01 OBSOLETE, NEW STANDARD 846A-02. MILLIMETERS INCHES PIN 1 ID e DIM MIN NOM MAX MIN NOM MAX A −− −− 1.10 −− −− 0.043 b8 PL A1 0.05 0.08 0.15 0.002 0.003 0.006 0.08 (0.003) M T B S A S b 0.25 0.33 0.40 0.010 0.013 0.016 c 0.13 0.18 0.23 0.005 0.007 0.009 D 2.90 3.00 3.10 0.114 0.118 0.122 E 2.90 3.00 3.10 0.114 0.118 0.122 e 0.65 BSC 0.026 BSC SEATING −T− PLANE L 0.40 0.55 0.70 0.016 0.021 0.028 0.038 (0.0015) A HE 4.75 4.90 5.05 0.187 0.193 0.199 A1 c L RECOMMENDED SOLDERING FOOTPRINT* 8X 8X0.48 0.80 5.25 0.65 PITCH DIMENSION: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. Micro8 is a trademark of International Rectifier. ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: N. American Technical Support: 800−282−9855 Toll Free ON Semiconductor Website: www.onsemi.com Literature Distribution Center for ON Semiconductor USA/Canada 19521 E. 32nd Pkwy, Aurora, Colorado 80011 USA Europe, Middle East and Africa Technical Support: Order Literature: http://www.onsemi.com/orderlit Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Phone: 421 33 790 2910 Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada For additional information, please contact your local Email: orderlit@onsemi.com Sales Representative ◊ www.onsemi.com LP2950/D 22

Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: O N Semiconductor: NCV2951ACD-3.3R2 NCV2951ACD3.3R2G NCV2951ACDR2 NCV2951ACDR2G NCV2951CDR2 NCV2951CDR2G LP2950ACDT-3.0G LP2950ACDT-3.3RG LP2950ACDT-3RKG LP2950ACDT-5.0G LP2950ACDT- 5RKG LP2950ACZ-3.0G LP2950ACZ-3.0RAG LP2950ACZ-3.3G LP2950ACZ-3.3RAG LP2950ACZ-5.0G LP2950ACZ-5.0RAG LP2950CDT-3.0G LP2950CDT-3.0RKG LP2950CDT-3.3G LP2950CDT-3.3RKG LP2950CDT- 5.0G LP2950CDT-5.0RKG LP2950CZ-3.0G LP2950CZ-3.0RAG LP2950CZ-3.3G LP2950CZ-3.3RAG LP2950CZ- 5.0G LP2950CZ-5.0RAG LP2950CZ-5.0RPG LP2951ACD-3.0G LP2951ACD-3.0R2G LP2951ACD-3.3G LP2951ACD-3.3R2G LP2951ACDG LP2951ACDM-3.3RG LP2951ACDM-5.0R2 LP2951ACDMR2 LP2951ACDMR2G LP2951ACDR2 LP2951ACDR2G LP2951ACN LP2951ACN-3.0 LP2951ACN-3.0G LP2951ACN- 3.3 LP2951ACN-3.3G LP2951ACNG LP2951CD LP2951CD-3.0 LP2951CD-3.0G LP2951CD-3.0R2 LP2951CD- 3.0R2G LP2951CD-3.3 LP2951CD-3.3G LP2951CD-3.3R2 LP2951CD-3.3R2G LP2951CDG LP2951CDM-3.0R2 LP2951CDM-3.0R2G LP2951CDM-3.3R2 LP2951CDM-3.3R2G LP2951CDMR2 LP2951CDMR2G LP2951CDR2 LP2951CDR2G LP2951CN LP2951CN-3.0 LP2951CN-3.0G LP2951CN-3.3 LP2951CN-3.3G LP2951CNG