Product Order Technical Tools & Support & Folder Now Documents Software Community LMZ10504EXT SNVS670J–JUNE2010–REVISEDAPRIL2019 LMZ10504EXT 4-A Power Module With 5.5-V Maximum Input Voltage for Demanding and Rugged Applications 1 Features 2 Applications • IntegratedShieldedInductor • Point-of-LoadConversionsfrom3.3-Vand5-V 1 • FlexibleStart-upSequencingUsingExternalSoft Rails Start,Tracking,andPrecisionEnable • Space-ConstrainedApplications • ProtectionAgainstIn-RushCurrentsandFaults • NoiseSensitiveApplications(Suchas SuchasInputUVLOandOutputShort-Circuit Transceiver,Medical) • SingleExposedPadandStandardPinoutforEasy 3 Description MountingandManufacturing The LMZ10504EXT power module is a complete, • Pin-to-PinCompatibleWith easy-to-use, DC-DC solution capable of driving up to – LMZ10503EXT(3-A/15-WMaximum) a 4-A load with exceptional power conversion – LMZ10505EXT(5-A/25-WMaximum) efficiency, output voltage accuracy, line and load • FastTransientResponseforPoweringFPGAs regulation. The LMZ10504EXT is available in an innovative package that enhances thermal andASICs performance and allows for hand or machine • ElectricalSpecifications soldering. – 20-WMaximumTotalOutputPower The LMZ10504EXT can accept an input voltage rail – Upto4-AOutputCurrent between 2.95 V and 5.5 V, and deliver an adjustable – InputVoltageRange2.95Vto5.5V andhighlyaccurateoutputvoltageaslow as 0.8 V. 1- MHz fixed-frequency PWM switching provides a – OutputVoltageRange0.8Vto5V predictable EMI characteristic. Two external – ±1.63%FeedbackVoltageAccuracyOver compensation components can be adjusted to set the Temperature fastest response time, while allowing the option to • PerformanceBenefits use ceramic or electrolytic output capacitors. Externally programmable soft-start capacitor – OperatesatHighAmbientTemperatures facilitates controlled start-up. The LMZ10504EXT is a – LowRadiatedEmissions(EMI)Testedto reliable and robust solution with the following EN55022ClassBStandard features: lossless cycle-by-cycle peak current limit to – Passes10-V/mRadiatedImmunityEMITested protect for overcurrent or short-circuit fault, thermal toStandardEN610004-3 shutdown, input undervoltage lockout, and prebiased start-up. The LMZ10504EXT is also fully-enabled for – PassesVibrationStandard WEBENCH®andPowerDesignertools. – MIL-STD-883Method2007.2ConditionA – JESD22-B103BCondition1 DeviceInformation(1)(2) – PassesDropStandard PARTNUMBER PACKAGE BODYSIZE(NOM) – MIL-STD-883Method2002.3ConditionB LMZ10504EXT TO-PMOD(7) 9.85mm×10.16mm – JESD22-B110ConditionB (1) For all available packages, see the orderable addendum at theendofthedatasheet. • CreateaCustomDesignUsingtheLMZ10504 (2) Peakreflowtemperatureequals245°C.SeeDesignSummary WiththeWEBENCH®PowerDesigner LMZ1xxx and LMZ2xxx Power Module Family for more details. TypicalApplicationCircuit EfficiencyV =3.3V OUT VIN 6, 7 VOUT VOUT 1 VIN LMZ10504EXT 5 CO Cin 2 EN FB 3SS GND4, EP Rfbt CSS Rcomp Ccomp Rfbb 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA.

LMZ10504EXT SNVS670J–JUNE2010–REVISEDAPRIL2019 www.ti.com Table of Contents 1 Features.................................................................. 1 8.2 TypicalApplication..................................................14 2 Applications........................................................... 1 8.3 SystemExamples...................................................20 3 Description............................................................. 1 9 PowerSupplyRecommendations...................... 23 4 RevisionHistory..................................................... 2 10 Layout................................................................... 23 5 PinConfigurationandFunctions......................... 3 10.1 LayoutGuidelines.................................................23 10.2 LayoutExamples...................................................24 6 Specifications......................................................... 4 10.3 EstimatePowerDissipationandThermal 6.1 AbsoluteMaximumRatings......................................4 Considerations.........................................................27 6.2 ESDRatings..............................................................4 10.4 PowerModuleSMTGuidelines............................28 6.3 RecommendedOperatingConditions.......................4 11 DeviceandDocumentationSupport................. 29 6.4 ThermalInformation..................................................4 11.1 DeviceSupport......................................................29 6.5 ElectricalCharacteristics...........................................5 11.2 DocumentationSupport........................................29 6.6 TypicalCharacteristics..............................................7 11.3 ReceivingNotificationofDocumentationUpdates29 7 DetailedDescription............................................ 10 11.4 CommunityResources..........................................29 7.1 Overview.................................................................10 11.5 Trademarks...........................................................31 7.2 FunctionalBlockDiagram.......................................10 11.6 ElectrostaticDischargeCaution............................31 7.3 FeatureDescription.................................................10 11.7 Glossary................................................................31 7.4 DeviceFunctionalModes........................................13 12 Mechanical,Packaging,andOrderable 8 ApplicationandImplementation........................ 14 Information........................................................... 31 8.1 ApplicationInformation............................................14 4 Revision History NOTE:Pagenumbersforpreviousrevisionsmaydifferfrompagenumbersinthecurrentversion. ChangesfromRevisionI(June2017)toRevisionJ Page • Editorialchangesonly;notechnicalchanges ....................................................................................................................... 1 ChangesfromRevisionH(September2015)toRevisionI Page • ChangedlanguageofWEBENCHlistitem;addedadditionalcontentandlinksforWEBENCHfurtherindatasheet.........1 • UpdatedEquation1 ............................................................................................................................................................. 10 • MovedtheLowRadiatedEmissions(EMI)footnotetotheApplicationInformationsection ............................................... 14 ChangesfromRevisionG(October2013)toRevisionH Page • AddedESDRatingstable,FeatureDescriptionsection,DeviceFunctionalModes,ApplicationandImplementation section,PowerSupplyRecommendationssection,Layoutsection,DeviceandDocumentationSupportsection,and Mechanical,Packaging,andOrderableInformationsection. ................................................................................................ 1 ChangesfromRevisionF(April2013)toRevisionG Page • Deleted10mils....................................................................................................................................................................... 4 • Changed10mils................................................................................................................................................................... 23 • Changed10mils................................................................................................................................................................... 27 • AddedPowerModuleSMTGuidelines................................................................................................................................. 28 2 SubmitDocumentationFeedback Copyright©2010–2019,TexasInstrumentsIncorporated ProductFolderLinks:LMZ10504EXT

LMZ10504EXT www.ti.com SNVS670J–JUNE2010–REVISEDAPRIL2019 5 Pin Configuration and Functions NDWPackage 7-LeadTO-PMOD TopView 7 VOUT 6 VOUT 5 FB Exposed Pad 4 GND Connect to GND 3 SS 2 EN 1 VIN PinFunctions PIN TYPE DESCRIPTION NAME NO. EN 2 Analog Active-highenableinputforthedevice. Exposedpadthermalconnection.ConnectthispadtothePCBgroundplaneinorderto ExposedPad — Ground reducethermalresistancevalue.Italsoprovidesanelectricalconnectiontotheinputand outputcapacitorsgroundterminals. Powergroundandsignalground.Connectthebottomfeedbackresistorbetweenthispinand GND 4 Ground thefeedbackpin. Feedbackpin.Thisistheinvertinginputoftheerroramplifierusedforsensingtheoutput FB 5 Analog voltage. Soft-startcontrolpin.Aninternal2-µAcurrentsourcechargesandexternalcapacitor SS 3 Analog connectedbetweenthispinandGND(pin4)tosettheoutputvoltageramprateduring startup.Thispincanalsobeusedtoconfigurethetrackingfeature. Alow-ESRinputcapacitanceshouldbelocatedascloseaspossibletoVINpinandGND VIN 1 Power pin. Thisistheoutputoftheinternalinductor.Connectanexternalresistorvoltagedividerfrom VOUT 6,7 Power VOUTtoFBtoground. Copyright©2010–2019,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:LMZ10504EXT

LMZ10504EXT SNVS670J–JUNE2010–REVISEDAPRIL2019 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings(1)(2) MIN MAX UNIT VIN,VOUT,EN,FB,SStoGND –0.3 6 V PowerDissipation InternallyLimited JunctionTemperature 150 °C PeakReflowCaseTemperature(30sec) 245 °C StorageTemperature,T –65 150 °C stg (1) StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thesearestressratings only,whichdonotimplyfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderRecommended OperatingConditions.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. (2) Forsolderingspecifications,refertotheAbsoluteMaximumRatingsforSoldering(SNOA549). 6.2 ESD Ratings VALUE UNIT V Electrostaticdischarge Humanbodymodel(HBM)(1) ±2000 V (ESD) (1) Thehumanbodymodelisa100-pFcapacitordischargedthrougha1.5-kΩresistorintoeachpin.TestmethodisperJESD22-AI14S. 6.3 Recommended Operating Conditions overoperatingfree-airtemperaturerange(unlessotherwisenoted) MIN MAX UNIT VINtoGND 2.95 5.5 V JunctionTemperature(T) –55 125 °C J 6.4 Thermal Information LMZ10504EXT THERMALMETRIC(1) NDW(TO-PMOD) UNIT 7PINS R Junction-to-ambientthermalresistance(2) 20 °C/W θJA R Junction-to-case(top)thermalresistance(noairflow) 1.9 °C/W θJC(top) (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheSemiconductorandICPackageThermalMetricsapplication report. (2) R measuredona2.25-in×2.25-in(5.8cm×5.8cm)4-layerboard,with1-oz.copper,thirtysixthermalvias,noairflow,and1-W θJA powerdissipation.RefertoorEvaluationBoardApplicationNote:AN-2074LMZ1050xEXTEvaluationBoard(SNVA450). 4 SubmitDocumentationFeedback Copyright©2010–2019,TexasInstrumentsIncorporated ProductFolderLinks:LMZ10504EXT

LMZ10504EXT www.ti.com SNVS670J–JUNE2010–REVISEDAPRIL2019 6.5 Electrical Characteristics SpecificationsareforT =25°Cunlessotherwisespecified.Minimumandmaximumlimitsareensuredthroughtest,design, J orstatisticalcorrelation.TypicalvaluesrepresentthemostlikelyparametricnormatT =25°C,andareprovidedforreference J purposesonly.V =V =3.3V,unlessotherwiseindicatedintheconditionscolumn. IN EN PARAMETER TESTCONDITIONS MIN(1) TYP(2) MAX(1) UNIT SYSTEMPARAMETERS 0.8 TotalFeedbackVoltage V =2.95Vto5.5V IN V VariationIncludingLine V =2.5V overtheoperatingjunction V FB OUT andLoadRegulation IOUT=0Ato4A temperaturerangeTJof 0.78 0.82 –55°Cto125°C 0.8 V FeedbackVoltage VIN=3.3V,VOUT=2.5V overtheoperatingjunction V FB Variation IOUT=0A temperaturerangeTJof 0.787 0.812 –55°Cto125°C 0.798 V FeedbackVoltage VIN=3.3V,VOUT=2.5V overtheoperatingjunction V FB Variation IOUT=4A temperaturerangeTJof 0.785 0.81 –55°Cto125°C 2.6 Rising overtheoperatingjunction temperaturerangeT of 2.95 J V InputUVLOThreshold –55°Cto125°C IN(UVL V O) (MeasuredatVINpin) 2.4 Falling overtheoperatingjunction temperaturerangeT of 1.95 J –55°Cto125°C I Soft-StartCurrent ChargingCurrent 2 µA SS 1.7 I Non-SwitchingInput V =1V overtheoperatingjunction mA Q Current FB temperaturerangeT of 3 J –55°Cto125°C 260 I ShutdownQuiescent V =5.5V,V =0V overtheoperatingjunction µA SD Current IN EN temperaturerangeT of 500 J –55°Cto125°C 5.5 I OutputCurrentLimit V =2.5V overtheoperatingjunction A OCL (AverageCurrent) OUT temperaturerangeT of 4.1 6.7 J –55°Cto125°C f FrequencyFold-back Incurrentlimit 250 kHz FB PWMSECTION 1000 fSW SwitchingFrequency overtheoperatingjunctiontemperaturerangeTJof–55°C 700 1160 kHz to125°C overtheoperatingjunctiontemperaturerangeT of–55°C D PWMDutyCycleRange J 0% 100% range to125°C ENABLECONTROL 1.23 VEN-IH ENPinRisingThreshold overtheoperatingjunctiontemperaturerangeTJof–55°C 1.8 V to125°C 1.06 VEN-IF ENPinFallingThreshold overtheoperatingjunctiontemperaturerangeTJof–55°C 0.8 V to125°C (1) Minimumandmaximumlimitsare100%productiontestedatanambienttemperature(T )of25°C.Limitsovertheoperating A temperaturerangeareensuredthroughcorrelationusingStatisticalQualityControl(SQC)methods.Limitsareusedtocalculate AverageOutgoingQualityLevel(AOQL). (2) Typicalnumbersareat25°Candrepresentthemostlikelyparametricnorm. Copyright©2010–2019,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:LMZ10504EXT

LMZ10504EXT SNVS670J–JUNE2010–REVISEDAPRIL2019 www.ti.com Electrical Characteristics (continued) SpecificationsareforT =25°Cunlessotherwisespecified.Minimumandmaximumlimitsareensuredthroughtest,design, J orstatisticalcorrelation.TypicalvaluesrepresentthemostlikelyparametricnormatT =25°C,andareprovidedforreference J purposesonly.V =V =3.3V,unlessotherwiseindicatedintheconditionscolumn. IN EN PARAMETER TESTCONDITIONS MIN(1) TYP(2) MAX(1) UNIT THERMALCONTROL T T forThermalShutdown 145 °C SD J HysteresisforThermal T 10 °C SD-HYS Shutdown PERFORMANCEPARAMETERS RefertoTable5V =2.5V OUT 10 ΔV OutputVoltageRipple BandwidthLimit=2MHz mV OUT pk-pk RefertoTable7BandwidthLimit=20MHz 5 ΔV =2.95Vto5.5V ΔVFB/ FeedbackVoltageLine IOUITN=0A 0.04% V Regulation FB I =0Ato4A 0.25% OUT ΔV =2.95Vto5.5V IN 0.04% ΔVOUT/ OutputVoltageLine IOUT=0A,VOUT=2.5V VOUT Regulation IOUT=0Ato4A 0.25% V =2.5V OUT EFFICIENCY V =3.3V 96.1% OUT V =2.5V 94.8% OUT η PeakEfficiency(1A)VIN VOUT=1.8V 93.1% =5V V =1.5V 92% OUT V =1.2V 90.4% OUT V =0.8V 86.8% OUT V =2.5V 95.7% OUT V =1.8V 94.1% OUT PeakEfficiency(1A)V η IN V =1.5V 93% =3.3V OUT V =1.2V 91.6% OUT V =0.8V 88.3% OUT V =3.3V 94.1% OUT V =2.5V 92.4% OUT FullLoadEfficiency(4A) VOUT=1.8V 90% η VIN=5V VOUT=1.5V 88.3% V =1.2V 86.1% OUT V =0.8V 80.8% OUT V =2.5V 91.4% OUT V =1.8V 90% OUT FullLoadEfficiency(4A) η V =1.5V 87.2% V =3.3V OUT IN V =1.2V 84.9% OUT V =0.8V 79.3% OUT 6 SubmitDocumentationFeedback Copyright©2010–2019,TexasInstrumentsIncorporated ProductFolderLinks:LMZ10504EXT

LMZ10504EXT www.ti.com SNVS670J–JUNE2010–REVISEDAPRIL2019 6.6 Typical Characteristics Unlessotherwisespecified,thefollowingconditionsapply:V =V =5V,C is47-µF10-VX5Rceramiccapacitor;T IN EN IN AMBIENT =25°Cforefficiencycurvesandwaveforms. V =3.3V V =2.5V OUT OUT Figure1.Efficiency Figure2.Efficiency V =1.8V V =1.5V OUT OUT Figure3.Efficiency Figure4.Efficiency V =1.2V V =0.8V OUT OUT Figure5.Efficiency Figure6.Efficiency Copyright©2010–2019,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:LMZ10504EXT

LMZ10504EXT SNVS670J–JUNE2010–REVISEDAPRIL2019 www.ti.com Typical Characteristics (continued) Unlessotherwisespecified,thefollowingconditionsapply:V =V =5V,C is47-µF10-VX5Rceramiccapacitor;T IN EN IN AMBIENT =25°Cforefficiencycurvesandwaveforms. V =5V,R =20°C/W V =3.3V,R =20°C/W IN θJA IN θJA Figure7.CurrentDerating Figure8.CurrentDerating VIN=5V,VOUT=2.5V,IOUT=4A VOUT=2.5V,IOUT=0A EvaluationBoard Figure9.RadiatedEmissions(EN55022,ClassB) Figure10.Start-Up VOUT=2.5V,IOUT=0A VIN=3.3V,VOUT=2.5V,IOUT=0.4-Ato3.6-Ato0.4-AStep 20mV/DIV,20-MHzBandwidthLimited RefertoTable5forBOM,includesoptionalcomponents Figure11.PrebiasedStart-Up Figure12.LoadTransientResponse 8 SubmitDocumentationFeedback Copyright©2010–2019,TexasInstrumentsIncorporated ProductFolderLinks:LMZ10504EXT

LMZ10504EXT www.ti.com SNVS670J–JUNE2010–REVISEDAPRIL2019 Typical Characteristics (continued) Unlessotherwisespecified,thefollowingconditionsapply:V =V =5V,C is47-µF10-VX5Rceramiccapacitor;T IN EN IN AMBIENT =25°Cforefficiencycurvesandwaveforms. VIN=5.0V,VOUT=2.5V,IOUT=0.4-Ato3.6-Ato0.4-AStep VIN=3.3V,VOUT=2.5V,IOUT=4A,20mV/DIV 20mV/DIV,20-MHzBandwidthLimited RefertoTable5forBOM RefertoTable5forBOM,includesoptionalcomponents Figure13.LoadTransientResponse Figure14.OutputVoltageRipple V =5.0V,V =2.5V,I =4A, IN OUT OUT 20mV/DIV.RefertoTable5forBOM Figure15.OutputVoltageRipple Copyright©2010–2019,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:LMZ10504EXT

LMZ10504EXT SNVS670J–JUNE2010–REVISEDAPRIL2019 www.ti.com 7 Detailed Description 7.1 Overview TheLMZ10504EXTpowermoduleisacomplete, easy-to-use DC-DC solution capable of driving up to a 4-A load with exceptional power conversion efficiency, output voltage accuracy, line and load regulation. The LMZ10504EXT is available in an innovative package that enhances thermal performance and allows for hand or machine soldering. The LMZ10504EXT is a reliable and robust solution with the following features: lossless cycle-by-cycle peak current limit to protect for overcurrent or short-circuit fault, thermal shutdown, input undervoltagelockout,andprebiasedstart-up. 7.2 Functional Block Diagram VIN 1 1: 2.2 PF 2 EN FET 2.2 PF S O M 3 VMolotadgee vers P- 1.5 PH 6, 7 VOUT SS Control Dri T E F S O M N- 5 4, EP FB GND 7.3 Feature Description 7.3.1 Enable The LMZ10504EXT features an enable (EN) pin and associated comparator to allow the user to easily sequence the LMZ10504EXT from an external voltage rail, or to manually set the input UVLO threshold. The turnon or rising threshold and hysteresis for this comparator are typically 1.23 V and 0.15 V, respectively. The precise reference for the enable comparator allows the user to ensure that the LMZ10504EXT will be disabled when the systemdemandsittobe. TheENpinshouldnotbeleftfloating.Foralways-onoperation,connectENtoVIN. 7.3.2 EnableandUVLO Using a resistor divider from VIN to EN as shown in the schematic diagram below, the input voltage at which the partbeginsswitchingcanbeincreasedabovethenormalinputUVLOlevelaccordingto: R (cid:14)R V 1.23V u ent enb IN(UVLO) R enb (1) For example, suppose that the required input UVLO level is 3.69 V. Choosing R = 10 kΩ, then we calculate enb R =20kΩ. ent 10 SubmitDocumentationFeedback Copyright©2010–2019,TexasInstrumentsIncorporated ProductFolderLinks:LMZ10504EXT

LMZ10504EXT www.ti.com SNVS670J–JUNE2010–REVISEDAPRIL2019 Feature Description (continued) VIN VIN Rent LMZ10504EXT Cin1 EN Renb GND Figure16. SettingEnableandUVLO Alternatively, the EN pin can be driven from another voltage source to cater to system sequencing requirements commonly found in FPGA and other multi-rail applications. Figure 17 shows an LMZ10504EXT that is sequenced tostartbasedonthevoltagelevelofamastersystemrail(V ). OUT1 VOUT1 VIN VIN VOUT2 VOUT Rent LMZ10504EXT Cin1 EN CO1 Renb GND Figure17. SettingEnableandUVLOUsingExternalPowerSupply 7.3.3 Soft-Start The LMZ10504EXT begins to operate when both the VIN and EN, voltages exceed the rising UVLO and enable thresholds, respectively. A controlled soft-start eliminates inrush currents during start-up and allows the user morecontrolandflexibilitywhensequencingtheLMZ10504EXTwithotherpowersupplies. In the event of either VIN or EN decreasing below the falling UVLO or enable threshold respectively, the voltage on the soft-start pin is collapsed by discharging the soft-start capacitor by a 14-µA (typical) current sink to ground. 7.3.4 Soft-StartCapacitor Determinethesoft-startcapacitancewiththefollowingrelationship: t uI C ss ss SS V FB where • V istheinternalreferencevoltage(nominally0.8V), FB • I isthesoft-startchargingcurrent(nominally2µA) SS • andC istheexternalsoft-startcapacitance. (2) SS Thus,therequiredsoft-startcapacitorperunitoutputvoltagestart-uptimeisgivenby: C 2.5 nF / ms SS (3) Forexample,a4-mssoft-starttimewillyielda10-nFcapacitance.Theminimumsoft-startcapacitanceis680pF. Copyright©2010–2019,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:LMZ10504EXT

LMZ10504EXT SNVS670J–JUNE2010–REVISEDAPRIL2019 www.ti.com Feature Description (continued) 7.3.5 Tracking The LMZ10504EXT can track the output of a master power supply during soft-start by connecting a resistor divider to the SS pin. In this way, the output voltage slew rate of the LMZ10504EXT will be controlled by a master supply for loads that require precise sequencing. When the tracking function is used, a small value soft- start capacitor should be connected to the SS pin to alleviate output voltage overshoot when recovering from a currentlimitfault. Master Power Supply VOUT1 VIN VIN VOUT2 VOUT Rtrkt EN LMZ10504EXT CO1 Cin1 VSS SS Rtrkb GND Figure18. TrackingUsingExternalPowerSupply 7.3.6 Tracking-EqualSoft-StartTime One way to use the tracking feature is to design the tracking resistor divider so that the master supply output voltage, V , and the LMZ10504EXT output voltage, V , both rise together and reach their target values at OUT1 OUT2 the same time. This is termed ratiometric start-up. For this case, the equation governing the values of tracking dividerresistorsR andR isgivenby: trkb trkt R R trkt trkb V (cid:16)1.0V OUT1 (4) Equation4includesan offset voltage, of 200 mV, to ensure that the final value of the SS pin voltage exceeds the reference voltage of the LMZ10504EXT. This offset will cause the LMZ10504EXT output voltage to reach regulation slightly before the master supply. For a value of 33 kΩ, 1% is recommended for R as a compromise trkt betweenhigh-precision and low-quiescent current through the divider while minimizing the effect of the 2-µA soft- startcurrentsource. For example, if the master supply voltage V is 3.3 V and the LMZ10504EXT output voltage was 1.8 V, then OUT1 the value of R needed to give the two supplies identical soft-start times would be 14.3 kΩ. Figure 19 shows an trkb exampleoftrackingusingequalsoft-starttime. RATIOMETRIC STARTUP V OUT1 V OUT2 E G A T L VO EN TIME Figure19. TimingDiagramforTrackingUsingEqualSoft-StartTime 12 SubmitDocumentationFeedback Copyright©2010–2019,TexasInstrumentsIncorporated ProductFolderLinks:LMZ10504EXT

LMZ10504EXT www.ti.com SNVS670J–JUNE2010–REVISEDAPRIL2019 Feature Description (continued) 7.3.7 Tracking-EqualSlewRates Alternatively, the tracking feature can be used to have similar output voltage ramp rates. This is referred to as simultaneousstart-up.Inthiscase,thetrackingresistorscanbedeterminedbasedonEquation5: 0.8V R uR trkb V (cid:16)0.8V trkt OUT2 (5) andtoensureproperoverdriveoftheSSpin: V (cid:31)0.8 u V OUT2 OUT1 (6) For the example case of V = 5 V and V = 2.5 V, with R set to 33 kΩ as before, R is calculated from OUT1 OUT2 trkt trkb Equation5tobe15.5kΩ.Figure20showsanexampleoftrackingusingequalslewrates. SIMULTANEOUS STARTUP V OUT1 V OUT2 E G A T L VO EN TIME Figure20. TimingDiagramforTrackingUsingEqualSlewRates 7.3.8 CurrentLimit When a current greater than the output current limit (I ) is sensed, the ON-time is immediately terminated and OCL the low-side MOSFET is activated. The low-side MOSFET stays on for the entire next four switching cycles. Duringtheseskippedpulses,thevoltageonthesoft-startpinisreducedby discharging the soft-start capacitor by a current sink on the soft-start pin of nominally 14 µA. Subsequent overcurrent events will drain more and more charge from the soft-start capacitor, effectively decreasing the reference voltage as the output droops due to the pulse skipping. Reactivation of the soft-start circuitry ensures that when the overcurrent situation is removed, the partwillresumenormaloperationsmoothly. 7.3.9 OvertemperatureProtection When the LMZ10504EXT senses a junction temperature greater than 145°C (typical), both switching MOSFETs are turned off and the part enters a standby state. Upon sensing a junction temperature below 135°C (typical), thepartwillre-initiatethesoft-startsequenceandbeginswitchingonceagain. 7.4 Device Functional Modes 7.4.1 PrebiasStart-UpCapability At start-up, the LMZ10504EXT is in a prebiased state when the output voltage is greater than zero. This often occurs in many multi-rail applications such as when powering an ASIC, FPGA, or DSP. The output can be prebiased in these applications through parasitic conduction paths from one supply rail to another. Even though the LMZ10504EXT is a synchronous converter, it will not pull the output low when a prebias condition exists. The LMZ10504EXT will not sink current during start-up until the soft-start voltage exceeds the voltage on the FB pin. Because the device does not sink current it protects the load from damage that might otherwise occur if current isconductedthroughtheparasiticpathsoftheload. Copyright©2010–2019,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:LMZ10504EXT

LMZ10504EXT SNVS670J–JUNE2010–REVISEDAPRIL2019 www.ti.com 8 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validateandtesttheirdesignimplementationtoconfirmsystemfunctionality. 8.1 Application Information TheLMZ10504EXTisastep-downDC-to-DCpowermodule.Itistypicallyusedtoconverta higher DC voltage to a lower DC voltage with a maximum output current of 4 A. The following design procedure can be used to select components for the LMZ10504EXT. Alternately, the WEBENCH software may be used to generate complete designs. When generating a design, the WEBENCH software uses iterative design procedure and accesses comprehensive databases of components. Visit www.ti.com for more details. Note that the low radiated emissions (EMI) are tested under the EN55022 Class B standard (EN 55022:2006, +A1:2007, FCC Part 15 SubpartB:2007).SeeFigure21andLayoutforinformationonthedeviceundertest. 8.2 Typical Application This section provides several application solutions with an associated bill of materials. The compensation for each solution was optimized to work over the full input range. Many applications have a fixed input voltage rail. It is possible to modify the compensation to obtain a faster transient response for a given input voltage operating point. VIN U1 6, 7 VOUT 1 VOUT VIN 2 EN LMZ10504EXT CO1 5 FB Cin1 SS GND 3 4, EP Rfbt CSS Rcomp Ccomp Rfbb Figure21. TypicalApplicationSchematic 8.2.1 DesignRequirements Forthisexamplethefollowingapplicationparametersexist. • V =5V IN • V =2.5V OUT • I =4A OUT • ΔV =20mV OUT pk-pk • ΔV =±20mV o_tran pk-pk Table1.BillofMaterials,V =3.3Vto5V,V =2.5V,I =4A,OptimizedforElectrolyticInput IN OUT OUT(MAX) andOutputCapacitance DESIGNATOR DESCRIPTION CASESIZE MANUFACTURER MANUFACTURERP/N QUANTITY U1 Powermodule PFM-7 TexasInstruments LMZ10504EXTTZ 1 C 150µF,6.3V,18mΩ C2,6.0×3.2×1.8mm Sanyo 6TPE150MIC2 1 in1 D3L,7.3×4.3×2.8 C 330µF,6.3V,18mΩ Sanyo 6TPE330MIL 1 O1 mm R 100kΩ 0603 VishayDale CRCW0603100KFKEA 1 fbt 14 SubmitDocumentationFeedback Copyright©2010–2019,TexasInstrumentsIncorporated ProductFolderLinks:LMZ10504EXT

LMZ10504EXT www.ti.com SNVS670J–JUNE2010–REVISEDAPRIL2019 Typical Application (continued) Table1.BillofMaterials,V =3.3Vto5V,V =2.5V,I =4A,OptimizedforElectrolyticInput IN OUT OUT(MAX) andOutputCapacitance(continued) DESIGNATOR DESCRIPTION CASESIZE MANUFACTURER MANUFACTURERP/N QUANTITY R 47.5kΩ 0603 VishayDale CRCW060347K5FKEA 1 fbb R 15kΩ 0603 VishayDale CRCW060315K0FKEA 1 comp C 330pF,±5%,C0G,50V 0603 TDK C1608C0G1H331J 1 comp C 10nF,±10%,X7R,16V 0603 Murata GRM188R71C103KA01 1 SS Table2.BillofMaterials,V =3.3V,V =0.8V,I =4A,OptimizedforSolutionSizeand IN OUT OUT(MAX) TransientResponse DESIGNATOR DESCRIPTION CASESIZE MANUFACTURER MANUFACTURERP/N QUANTITY U1 Powermodule PFM-7 TexasInstruments LMZ10504EXTTZ 1 C ,C 47µF,X5R,6.3V 1206 TDK C3216X5R0J476M 2 in1 O1 R 110kΩ 0402 VishayDale CRCW0402100KFKED 1 fbt R 1.0kΩ 0402 VishayDale CRCW04021K00FKED 1 comp C 27pF,±5%,C0G,50V 0402 Murata GRM1555C1H270JZ01 1 comp C 10nF,±10%,X7R,16V 0402 Murata GRM155R71C103KA01 1 SS 8.2.2 DetailedDesignProcedure LMZ10504EXT is fully supported by WEBENCH and offers the following: component selection, performance, electrical, and thermal simulations as well as the Build-It board, for a reduced design time. On the other hand, all externalcomponentscanbecalculatedbyfollowingthedesignprocedurebelow. 1. Determine the input voltage and output voltage. Also, make note of the ripple voltage and voltage transient requirements. 2. Determinethenecessaryinputandoutputcapacitance. 3. Calculatethefeedbackresistordivider. 4. Selecttheoptimizedcompensationcomponentvalues. 5. Estimatethepowerdissipationandboardthermalrequirements. 6. FollowthePCBdesignguideline. 7. Learn about the LMZ10504EXT features such as enable, input UVLO, soft start, tracking, prebiased start-up, currentlimit,andthermalshutdown. 8.2.2.1 CustomDesignWithWEBENCH® Tools ClickheretocreateacustomdesignusingtheLMZ10504devicewiththeWEBENCH® PowerDesigner. 1. Startbyenteringtheinputvoltage(V ),outputvoltage(V ),andoutputcurrent(I )requirements. IN OUT OUT 2. Optimizethedesignforkeyparameterssuchasefficiency,footprint,andcostusingtheoptimizerdial. 3. ComparethegenerateddesignwithotherpossiblesolutionsfromTexasInstruments. The WEBENCH Power Designer provides a customized schematic along with a list of materials with real-time pricingandcomponentavailability. Inmostcases,theseactionsareavailable: • Runelectricalsimulationstoseeimportantwaveformsandcircuitperformance • Runthermalsimulationstounderstandboardthermalperformance • ExportcustomizedschematicandlayoutintopopularCADformats • PrintPDFreportsforthedesign,andsharethedesignwithcolleagues GetmoreinformationaboutWEBENCHtoolsatwww.ti.com/WEBENCH. Copyright©2010–2019,TexasInstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:LMZ10504EXT

LMZ10504EXT SNVS670J–JUNE2010–REVISEDAPRIL2019 www.ti.com 8.2.2.2 InputCapacitorSelection A 22-µF or 47-µF high-quality dielectric (X5R, X7R) ceramic capacitor rated at twice the maximum input voltage is typically sufficient. The input capacitor must be placed as close as possible to the VIN pin and GND exposed pad to substantially eliminate the parasitic effects of any stray inductance or resistance on the PCB and supply lines. Neglecting capacitor equivalent series resistance (ESR), the resultant input capacitor AC ripple voltage is a triangular waveform. The minimum input capacitance for a given peak-to-peak value (ΔV ) of V is specified as IN IN follows: I uDu(1(cid:16)D) C t OUT in f u’V sw IN where • thePWMdutycycle,D,isgivenbyEquation8: (7) V D OUT V IN (8) IfΔV is1%ofV ,thisequalsto50mVandf =1MHz. IN IN SW 2.5V 2.5V 4A x ( ) x (1 - ) Cin 8 1 MH5Vz x 50(cid:3)mV5V 8 20(cid:3)µF (9) A second criteria before finalizing the C bypass capacitor is the RMS current capability. The necessary RMS in currentratingoftheinputcapacitortoabuckregulatorcanbeestimatedby: I I u D(1(cid:16)D) Cin(RMS) OUT (10) 2.5V§ 2.5V• ICin(RMS) = 4A x 5V '1 - 5V „= 2A (11) With this high AC current present in the input capacitor, the RMS current rating becomes an important parameter. The maximum input capacitor ripple voltage and RMS current occur at 50% duty cycle. Select an inputcapacitorratedforatleastthemaximumcalculatedI . Cin(RMS) Additional bulk capacitance with higher ESR may be required to damp any resonance effects of the input capacitanceandparasiticinductance. 8.2.2.3 OutputCapacitorSelection In general, 22-µF to 100-µF high-quality dielectric (X5R, X7R) ceramic capacitor rated at twice the maximum output voltage is sufficient given the optimal high frequency characteristics and low ESR of ceramic dielectrics. Although,theoutputcapacitorcanalsobeofelectrolyticchemistryforincreasedcapacitancedensity. Two output capacitance equations are required to determine the minimum output capacitance. One equation determines the output capacitance (C ) based on PWM ripple voltage. The second equation determines C O O basedontheloadtransientcharacteristics.Selectthelargestcapacitancevalueofthetwo. The minimum capacitance, given the maximum output voltage ripple (ΔV ) requirement, is determined by the OUT followingequation: ’i C t L O 8uf u>’V (cid:16)(’i uR )@ sw OUT L ESR where • thepeaktopeakinductorcurrentripple(Δi )isequaltoEquation13: (12) L (V (cid:16)V )uD ’i IN OUT L Luf sw (13) R is the total output capacitor ESR, L is the inductance value of the internal power inductor, where L = 1.5 ESR µH,andf =1MHz.Therefore,perthedesignexample: SW 16 SubmitDocumentationFeedback Copyright©2010–2019,TexasInstrumentsIncorporated ProductFolderLinks:LMZ10504EXT

LMZ10504EXT www.ti.com SNVS670J–JUNE2010–REVISEDAPRIL2019 (5V(cid:16)2.5V)u2.5V ’i 5V 833 mA L 1.5 PH u 1 MHz (14) TheminimumoutputcapacitancerequirementduetothePWMripplevoltageis: 833 mA C t O 8u1 MHzu“20 mV(cid:16)(cid:11)833 mAu3 m:(cid:12)” ‹ … (15) C t6 PF O (16) ThreemΩisatypicalR valueforceramiccapacitors. ESR Equation17providesagoodfirstpasscapacitancerequirementforaloadtransient: I uV uLuV C t step FB IN O 4uV u(V (cid:16)V )u’Vo_tran OUT IN OUT where • I isthepeaktopeakloadstep, step • V =0.8V, FB • andΔV isthemaximumoutputvoltagedeviation,whichis±20mV. (17) o_tran Thereforethecapacitancerequirementforthegivendesignparametersis: 3.2Au0.8Vu1.5PHu5V C t O 4u2.5Vu(5V(cid:16)2.5V)u20mV (18) C t39 PF O (19) Inthisparticulardesigntheoutputcapacitanceisdeterminedbytheloadtransientrequirements. Table3listssomeexamplesofcommerciallyavailablecapacitorsthatcanbeusedwiththeLMZ10504EXT. Table3.RecommendedOutputFilterCapacitors VOLTAGE(V),R MANUFACTUR C (µF) ESR MAKE PARTNUMBER CASESIZE O (mΩ) ER 22 6.3,<5 Ceramic,X5R TDK C3216X5R0J226M 1206 47 6.3,<5 Ceramic,X5R TDK C3216X5R0J476M 1206 47 6.3,<5 Ceramic,X5R TDK C3225X5R0J476M 1210 47 10.0,<5 Ceramic,X5R TDK C3225X5R1A476M 1210 100 6.3,<5 Ceramic,X5R TDK C3225X5R0J107M 1210 100 6.3,50 Tantalum AVX TPSD157M006#0050 D,7.5×4.3×2.9mm 100 6.3,25 OrganicPolymer Sanyo 6TPE100MPB2 B2,3.5×2.8×1.9mm 150 6.3,18 OrganicPolymer Sanyo 6TPE150MIC2 C2,6.0×3.2×1.8mm 330 6.3,18 OrganicPolymer Sanyo 6TPE330MIL D3L,7.3×4.3×2.8mm 470 6.3,23 NiobiumOxide AVX NOME37M006#0023 E,7.3×4.3×4.1mm 8.2.2.3.1 OutputVoltageSetting AresistordividernetworkfromV totheFBpindeterminesthedesiredoutputvoltageasfollows: OUT R (cid:14)R V 0.8Vu fbt fbb OUT R fbb (20) R is defined based on the voltage loop requirements and R is then selected for the desired output voltage. fbt fbb Resistors are normally selected as 0.5% or 1% tolerance. Higher accuracy resistors such as 0.1% are also available. Copyright©2010–2019,TexasInstrumentsIncorporated SubmitDocumentationFeedback 17 ProductFolderLinks:LMZ10504EXT

LMZ10504EXT SNVS670J–JUNE2010–REVISEDAPRIL2019 www.ti.com The feedback voltage (at V = 2.5 V) is accurate to within –2.5% / +2.5% over temperature and over line and OUT load regulation. Additionally, the LMZ10504EXT contains error nulling circuitry to substantially eliminate the feedback voltage variation over temperature as well as the long-term aging effects of the internal amplifiers. In addition the zero nulling circuit dramatically reduces the 1/f noise of the bandgap amplifier and reference. The manifestationofthiscircuitactionisthatthedutycyclewillhavetwoslightlydifferentbut distinct operating points, eachevidenteveryotherswitchingcycle. 8.2.2.4 LoopCompensation The LMZ10504EXT preserves flexibility by integrating the control components around the internal error amplifier while utilizing three small external compensation components from V to FB. An integrated type II (two pole, OUT one zero) voltage-mode compensation network is featured. To ensure stability, an external resistor and small value capacitor can be added across the upper feedback resistor as a pole-zero pair to complete a type III (three pole, two zero) compensation network. The compensation components recommended in Table 4 provide type III compensation at an optimal control loop performance. The typical phase margin is 45° with a bandwidth of 80 kHz. Calculated output capacitance values not listed in Table 4 should be verified before designing into production. The AN-2013 LMZ1050x/LMZ1050xEXT SIMPLE SWITCHER Power Module (SNVA417) is a detailed application note that provides verification support. In general, calculated output capacitance values below the suggested value will have reduced phase margin and higher control loop bandwidth. Output capacitance values above the suggested values will experience a lower bandwidth and increased phase margin. Higher bandwidth is associated with faster system response to sudden changes such as load transients. Phase marginchangesthecharacteristicsoftheresponse.Lowerphasemarginisassociatedwithunderdamped ringing and higher phase margin is associated with overdamped response. Losing all phase margin will cause the system to be unstable; an optimized area of operation is 30° to 60° of phase margin, with a bandwidth of 100 kHz±20kHz. VIN VOUT VIN Ccomp EN Rfbt LMZ10504EXT Rcomp FB GND Rfbb Figure22. LoopCompensationControlComponents Table4.LMZ10504EXTCompensationComponentValues(1) ESR(mΩ) V (V) C (µF) R (kΩ) C (pF) R (kΩ) IN O fbt comp comp MIN MAX 22 2 20 200 27 1.5 47 2 20 124 68 1.4 100 1 10 82.5 150 0.681 150 1 5 63.4 220 1 5 150 10 25 63.4 220 3.48 150 26 50 226 62 12.1 220 15 30 150 100 6.98 220 31 60 316 560 14 (1) Inthespecialcasewheretheoutputvoltageis0.8V,TIrecommendstoremoveR andkeepR ,R ,andC foratypeIII fbb fbt comp comp compensation. 18 SubmitDocumentationFeedback Copyright©2010–2019,TexasInstrumentsIncorporated ProductFolderLinks:LMZ10504EXT

LMZ10504EXT www.ti.com SNVS670J–JUNE2010–REVISEDAPRIL2019 Table4.LMZ10504EXTCompensationComponentValues()(continued) ESR(mΩ) V (V) C (µF) R (kΩ) C (pF) R (kΩ) IN O fbt comp comp MIN MAX 22 2 20 118 43 9.09 47 2 20 76.8 100 3.32 100 1 10 49.9 180 2.49 150 1 5 40.2 330 1 3.3 150 10 25 43.2 330 4.99 150 26 50 143 100 7.5 220 15 30 100 180 4.99 220 31 60 200 100 8.06 8.2.3 ApplicationCurves VOUT=3.3V VOUT=3.3V Figure23.CurrentDerating Figure24.Efficiency Figure25.RadiatedEmissions(EN55022,ClassB) Copyright©2010–2019,TexasInstrumentsIncorporated SubmitDocumentationFeedback 19 ProductFolderLinks:LMZ10504EXT

LMZ10504EXT SNVS670J–JUNE2010–REVISEDAPRIL2019 www.ti.com 8.3 System Examples 8.3.1 ApplicationSchematicfor3.3-Vto5-VInputand2.5-VOutputWithOptimizedRippleandTransient Response The compensation for each solution was optimized to work over the full input range. Many applications have a fixed input voltage rail. It is possible to modify the compensation to obtain a faster transient response for a given inputvoltageoperatingpoint. U1 Optional VIN 6, 7 VOUT 1 VOUT VIN 2 EN LMZ10504EXT Ccomp CO1 CO2 CO3 Cin2 + Cin1 5 Rfbt FB SS GND Rcomp 3 4, EP CSS Optional Rfbb Figure26. Schematicfor2.5-VOutputBasedon3.3-Vto5-VInput Table5.BillofMaterials,V =3.3Vto5V,V =2.5V,I =4A,OptimizedforLowInputand IN OUT OUT(MAX) OutputRippleVoltageandFastTransientResponse DESIGNATOR DESCRIPTION CASESIZE MANUFACTURER MANUFACTURERP/N QUANTITY U1 Powermodule PFM-7 TexasInstruments LMZ10504EXTTZ 1 C 22µF,X5R,10V 1210 AVX 1210ZD226MAT 2 in1 C 220µF,10V,AL-Elec E Panasonic EEE1AA221AP 1* in2 C 4.7µF,X5R,10V 0805 AVX 0805ZD475MAT 1* O1 C 22µF,X5R,6.3V 1206 AVX 12066D226MAT 1* O2 C 100µF,X5R,6.3V 1812 AVX 18126D107MAT 1 O3 R 75kΩ 0402 VishayDale CRCW040275K0FKED 1 fbt R 34.8kΩ 0402 VishayDale CRCW040234K8FKED 1 fbb R 1.0kΩ 0402 VishayDale CRCW04021K00FKED 1 comp C 100pF,±5%,C0G,50V 0402 Murata GRM1555C1H101JZ01 1 comp C 10nF,±10%,X7R,16V 0402 Murata GRM155R71C103KA01 1 SS Table6.OutputVoltageSetting(R =75kΩ) fbt V R OUT fbb 2.5V 34.8kΩ 1.8V 59kΩ 1.5V 84.5kΩ 1.2V 150kΩ 0.9V 590kΩ 20 SubmitDocumentationFeedback Copyright©2010–2019,TexasInstrumentsIncorporated ProductFolderLinks:LMZ10504EXT

LMZ10504EXT www.ti.com SNVS670J–JUNE2010–REVISEDAPRIL2019 8.3.2 ApplicationSchematicfor3.3-Vto5-VInputand2.5-VOutput The compensation for each solution was optimized to work over the full input range. Many applications have a fixed input voltage rail. It is possible to modify the compensation to obtain a faster transient response for a given inputvoltageoperatingpoint. U1 VIN 1 VOUT 6, 7 VOUT VIN LMZ10504EXT CO1 CO2 CO3 Ren1 5 + FB Cin5 Cin4 Cin3 Cin2 Cin1 EN 2 SS GND 3 4, EP Rfbt CSS Rcomp Ccomp Rfbb Figure27. Schematicfor2.5-VOutputBasedon3.3-Vto5-VInput Table7.BillofMaterials,V =3.3Vto5V,V =2.5V,I =4A IN OUT OUT(MAX) DESIGNATOR DESCRIPTION CASESIZE MANUFACTURER MANUFACTURERP/N QUANTITY U1 Powermodule PFM-7 TexasInstruments LMZ10504EXTTZ 1 C 1µF,X7R,16V 0805 TDK C2012X7R1C105K 1 in1 C ,C 4.7µF,X5R,6.3V 0805 TDK C2012X5R0J475K 2 in2 O1 C ,C 22µF,X5R,16V 1210 TDK C3225X5R1C226M 2 in3 O2 C 47µF,X5R,6.3V 1210 TDK C3225X5R0J476M 1 in4 C 220µF,10V,AL-Elec E Panasonic EEE1AA221AP 1 in5 C 100µF,X5R,6.3V 1812 TDK C4532X5R0J107M 1 O3 R 75kΩ 0805 VishayDale CRCW080575K0FKEA 1 fbt R 34.8kΩ 0805 VishayDale CRCW080534K8FKEA 1 fbb R 1.1kΩ 0805 VishayDale CRCW08051K10FKEA 1 comp C 180pF,±5%,C0G,50V 0603 TDK C1608C0G1H181J 1 comp R 100kΩ 0805 VishayDale CRCW0805100KFKEA 1 en1 C 10nF,±5%,C0G,50V 0805 TDK C2012C0G1H103J 1 SS Table8.OutputVoltageSetting(R =75kΩ) fbt V R OUT fbb 2.5V 34.8kΩ 1.8V 59kΩ 1.5V 84.5kΩ 1.2V 150kΩ 0.9V 590kΩ Copyright©2010–2019,TexasInstrumentsIncorporated SubmitDocumentationFeedback 21 ProductFolderLinks:LMZ10504EXT

LMZ10504EXT SNVS670J–JUNE2010–REVISEDAPRIL2019 www.ti.com 8.3.3 EMITestedSchematicfor2.5-VOutputBasedon3.3-Vto5-VInput The compensation for each solution was optimized to work over the full input range. Many applications have a fixed input voltage rail. It is possible to modify the compensation to obtain a faster transient response for a given inputvoltageoperatingpoint. U1 VIN 1 VOUT 6, 7 VOUT VIN LMZ10504EXT CO1 5 FB Cin3 Cin2 Cin1 EN 2 SS GND 3 4, EP Rfbt CSS Rcomp Ccomp Rfbb Figure28. EMITestedSchematicfor2.5-VOutputBasedon3.3-Vto5-VInput Table9. BillofMaterials,V =5V,V =2.5V,I =4A,TestedWithEN55022ClassBRadiated IN OUT OUT(MAX) Emissions DESIGNATOR DESCRIPTION CASESIZE MANUFACTURER MANUFACTURERP/N QUANTITY U1 Powermodule PFM-7 TexasInstruments LMZ10504EXTTZ 1 C 1µF,X7R,16V 0805 TDK C2012X7R1C105K 1 in1 C 4.7µF,X5R,6.3V 0805 TDK C2012X5R0J475K 1 in2 C 47µF,X5R,6.3V 1210 TDK C3225X5R0J476M 1 in3 C 100µF,X5R,6.3V 1812 TDK C4532X5R0J107M 1 O1 R 75kΩ 0805 VishayDale CRCW080575K0FKEA 1 fbt R 34.8kΩ 0805 VishayDale CRCW080534K8FKEA 1 fbb R 1.1kΩ 0805 VishayDale CRCW08051K10FKEA 1 comp C 180pF,±5%,C0G,50V 0603 TDK C1608C0G1H181J 1 comp C 10nF,±5%,C0G,50V 0805 TDK C2012C0G1H103J 1 SS Table10.OutputVoltageSetting(R =75kΩ) fbt V R OUT fbb 3.3V 23.7kΩ 2.5V 34.8kΩ 1.8V 59kΩ 1.5V 84.5kΩ 1.2V 150kΩ 0.9V 590kΩ 22 SubmitDocumentationFeedback Copyright©2010–2019,TexasInstrumentsIncorporated ProductFolderLinks:LMZ10504EXT

LMZ10504EXT www.ti.com SNVS670J–JUNE2010–REVISEDAPRIL2019 9 Power Supply Recommendations The LMZ10504EXT device is designed to operate from an input voltage supply range between 2.95 V and 5.5 V. This input supply must be well regulated and able to withstand maximum input current and maintain a stable voltage.Theresistanceoftheinputsupplyrailmustbelowenoughthatan input current transient does not cause a high enough drop at the LMZ10504EXT supply voltage that can cause a false UVLO fault triggering and system reset. If the input supply is more than a few inches from the LMZ10504EXT, additional bulk capacitance may be required in addition to the ceramic bypass capacitors. The amount of bulk capacitance is not critical, but a47-μFor100-μFelectrolyticcapacitorisatypicalchoice. 10 Layout 10.1 Layout Guidelines PCB layout is an important part of DC-DC converter design. Poor board layout can disrupt the performance of a DC-DC converter and surrounding circuitry by contributing to EMI, ground bounce and resistive voltage drop in the traces. These can send erroneous signals to the DC-DC converter resulting in poor regulation or instability. Goodlayoutcanbeimplementedbyfollowingafewsimpledesignrules. 1. Minimizeareaofswitchedcurrentloops. From an EMI reduction standpoint, it is imperative to minimize the high di/dt current paths. The high current that does not overlap contains high di/dt, see Figure 29. Therefore physically place input capacitor (C ) as in1 close as possible to the LMZ10504EXT VIN pin and GND exposed pad to avoid observable high-frequency noise on the output pin. This will minimize the high di/dt area and reduce radiated EMI. Additionally, groundingforboththeinputandoutputcapacitorshouldconsistofalocalized top side plane that connects to theGNDexposedpad(EP). 2. Haveasinglepointground. Route the ground connections for the feedback, soft-start, and enable components only to the GND pin of the device. This prevents any switched or load currents from flowing in the analog ground traces. If not properly placed, poor grounding can result in degraded load regulation or erratic output voltage ripple behavior.Providethesinglepointgroundconnectionfrompin4toEP. 3. MinimizetracelengthtotheFBpin. Both feedback resistors, R and R , and the compensation components, R and C , should be fbt fbb comp comp located close to the FB pin. Because the FB node is high impedance, keep the copper area as small as possible.Thisismostimportantasrelativelyhigh-valueresistorsareusedtosettheoutputvoltage. 4. Makeinputandoutputbusconnectionsaswideaspossible. This reduces any voltage drops on the input or output of the converter and maximizes efficiency. To optimize voltageaccuracyattheload,ensurethataseparatefeedbackvoltagesensetraceismadeattheload. Doing sowillcorrectforvoltagedropsandprovideoptimumoutputaccuracy. 5. Provideadequatedeviceheat-sinking. Use an array of heat-sinking vias to connect the exposed pad to the ground plane on the bottom PCB layer. If the PCB has multiple copper layers, thermal vias can also be employed to make connection to inner layer heat-spreading ground planes. For best results use a 6 × 6 via array with minimum via diameter of 8 mils thermal vias spaced 59 mils (1.5 mm). Ensure enough copper area is used for heat-sinking to keep the junctiontemperaturebelow125°C. Copyright©2010–2019,TexasInstrumentsIncorporated SubmitDocumentationFeedback 23 ProductFolderLinks:LMZ10504EXT

LMZ10504EXT SNVS670J–JUNE2010–REVISEDAPRIL2019 www.ti.com 10.2 Layout Examples ThePCBdesignisavailableintheLMZ10504EXTproductfolderatwww.ti.com VIN LMZ10505EXT VOUT VIN VOUT High dI Cin1 dt CO1 GND Loop 1 Loop 2 Figure29. CriticalCurrentLoopstoMinimize Top View Thermal Vias GND GND EXPOSED PAD CIN 1 2 3 4 5 6 7 COUT VIN VIN ENSS GNDFB VOUTVOUT VOUT RENT CSS RFBT CFF RENB RFBB GND Plane Figure30. PCBLayoutGuide 24 SubmitDocumentationFeedback Copyright©2010–2019,TexasInstrumentsIncorporated ProductFolderLinks:LMZ10504EXT

LMZ10504EXT www.ti.com SNVS670J–JUNE2010–REVISEDAPRIL2019 Layout Examples (continued) Figure31. TopCopper Figure32. InternalLayer1(Ground) Copyright©2010–2019,TexasInstrumentsIncorporated SubmitDocumentationFeedback 25 ProductFolderLinks:LMZ10504EXT

LMZ10504EXT SNVS670J–JUNE2010–REVISEDAPRIL2019 www.ti.com Layout Examples (continued) Figure33. InternalLayer2(GroundandSignalTraces) Figure34. BottomCopper 26 SubmitDocumentationFeedback Copyright©2010–2019,TexasInstrumentsIncorporated ProductFolderLinks:LMZ10504EXT

LMZ10504EXT www.ti.com SNVS670J–JUNE2010–REVISEDAPRIL2019 10.3 Estimate Power Dissipation and Thermal Considerations Use the current derating curves in the Typical Characteristics section to obtain an estimate of power loss (P ). For the design case of V = 5 V, V = 2.5 V, I = 4 A, T = 85°C , and T = 125°C, the IC_LOSS IN OUT OUT A(MAX) J(MAX) devicemustseeathermalresistancefromcasetoambient(θ )oflessthan: CA T (cid:16)T T t J(MAX) A(MAX) (cid:16)T CA JC P IC_LOSS (21) 500 oCucm2 Board Area_cm2 t u 41oC W (22) Given the typical thermal resistance from junction to case (θ ) to be 1.9°C/W (typical). Continuously operating at JC aT greaterthan125°Cwillhaveashortenlifespan. J To reach θ = 41°C/W, the PCB is required to dissipate heat effectively. With no airflow and no external heat, a CA goodestimateoftherequiredboardareacoveredby1-oz.copperonboththetopandbottommetallayersis: 500 oCucm2 Board Area_cm2 t u T W CA (23) 500 oCucm2 Board Area_cm2 t u 41oC W (24) As a result, approximately 12 square cm of 1-oz. copper on top and bottom layers is required for the PCB design. The PCB copper heat sink must be connected to the exposed pad (EP). Approximately thirty six 8 milsthermal vias spaced 59 mils (1.5 mm) apart must connect the top copper to the bottom copper. For an extended discussion and formulations of thermal rules of thumb, refer to AN-2020 Thermal Design By Insight, Not Hindsight (SNVA419) and for an example of a high thermal performance PCB layout, refer to the evaluation boardapplicationnoteAN-2074LMZ1050xEXTEvaluationBoard (SNVA450). Copyright©2010–2019,TexasInstrumentsIncorporated SubmitDocumentationFeedback 27 ProductFolderLinks:LMZ10504EXT

LMZ10504EXT SNVS670J–JUNE2010–REVISEDAPRIL2019 www.ti.com 10.4 Power Module SMT Guidelines Therecommendationsbelowareforastandardmodulesurfacemountassembly • LandPattern– FollowthePCBlandpatternwitheithersoldermaskdefinedornon-soldermaskdefinedpads • StencilAperture – For the exposed die attach pad (DAP), adjust the stencil for approximately 80% coverage of the PCB land pattern – ForallotherI/Opadsusea1:1ratiobetweentheapertureandthelandpatternrecommendation. • SolderPaste– UseastandardSACAlloysuchasSAC305,type3orhigher • StencilThickness –0.125to0.15mm • Reflow-Refertosolderpastesupplierrecommendationandoptimizedperboardsizeanddensity • Maximumnumberofreflowsallowedisone • RefertoDesignSummaryLMZ1xxxandLMZ2xxxPowerModulesFamily(SNAA214)forreflowinformation. Figure35. SampleReflowProfile Table11.SampleReflowProfileTable MAXTEMP REACHED TIMEABOVE REACHED TIMEABOVE REACHED TIMEABOVE REACHED PROBE (°C) MAXTEMP 235°C 235°C 245°C 245°C 260°C 260°C 1 242.5 6.58 0.49 6.39 0.00 – 0.00 – 2 242.5 7.10 0.55 6.31 0.00 7.10 0.00 – 3 241.0 7.09 0.42 6.44 0.00 – 0.00 – 28 SubmitDocumentationFeedback Copyright©2010–2019,TexasInstrumentsIncorporated ProductFolderLinks:LMZ10504EXT

LMZ10504EXT www.ti.com SNVS670J–JUNE2010–REVISEDAPRIL2019 11 Device and Documentation Support 11.1 Device Support 11.1.1 Third-PartyProductsDisclaimer TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER ALONEORINCOMBINATIONWITHANYTIPRODUCTORSERVICE. 11.1.2 DevelopmentSupport 11.1.2.1 CustomDesignWithWEBENCH® Tools ClickheretocreateacustomdesignusingtheLMZ10504devicewiththeWEBENCH® PowerDesigner. 1. Startbyenteringtheinputvoltage(V ),outputvoltage(V ),andoutputcurrent(I )requirements. IN OUT OUT 2. Optimizethedesignforkeyparameterssuchasefficiency,footprint,andcostusingtheoptimizerdial. 3. ComparethegenerateddesignwithotherpossiblesolutionsfromTexasInstruments. The WEBENCH Power Designer provides a customized schematic along with a list of materials with real-time pricingandcomponentavailability. Inmostcases,theseactionsareavailable: • Runelectricalsimulationstoseeimportantwaveformsandcircuitperformance • Runthermalsimulationstounderstandboardthermalperformance • ExportcustomizedschematicandlayoutintopopularCADformats • PrintPDFreportsforthedesign,andsharethedesignwithcolleagues GetmoreinformationaboutWEBENCHtoolsatwww.ti.com/WEBENCH. 11.2 Documentation Support 11.2.1 RelatedDocumentation Forrelateddocumentation,seethefollowing: • AN-2027InvertingApplicationfortheLMZ14203SIMPLESWITCHERPowerModule (SNVA425) • AbsoluteMaximumRatingsforSoldering(SNOA549) • AN-2074LMZ1050xEXTEvaluationBoard (SNVA450) • AN-2013LMZ1050x/LMZ1050xEXTSIMPLESWITCHERPowerModule (SNVA417) • AN-2024LMZ1420x/LMZ1200xEvaluationBoard(SNVA422) • AN-2020ThermalDesignByInsight,NotHindsight (SNVA419) • AN-2026EffectofPCBDesignonThermalPerformanceofSIMPLESWITCHERPowerModules (SNVA424) • DesignSummaryLMZ1xxxandLMZ2xxxPowerModulesFamily(SNAA214) 11.3 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed.Forchangedetails,reviewtherevisionhistoryincludedinanyreviseddocument. 11.4 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TIE2E™OnlineCommunity TI'sEngineer-to-Engineer(E2E)Community.Createdtofostercollaboration amongengineers.Ate2e.ti.com,youcanaskquestions,shareknowledge,exploreideasandhelp solveproblemswithfellowengineers. Copyright©2010–2019,TexasInstrumentsIncorporated SubmitDocumentationFeedback 29 ProductFolderLinks:LMZ10504EXT

LMZ10504EXT SNVS670J–JUNE2010–REVISEDAPRIL2019 www.ti.com Community Resources (continued) DesignSupport TI'sDesignSupport QuicklyfindhelpfulE2Eforumsalongwithdesignsupporttoolsand contactinformationfortechnicalsupport. 30 SubmitDocumentationFeedback Copyright©2010–2019,TexasInstrumentsIncorporated ProductFolderLinks:LMZ10504EXT

LMZ10504EXT www.ti.com SNVS670J–JUNE2010–REVISEDAPRIL2019 11.5 Trademarks E2EisatrademarkofTexasInstruments. WEBENCHisaregisteredtrademarkofTexasInstruments. Allothertrademarksarethepropertyoftheirrespectiveowners. 11.6 Electrostatic Discharge Caution Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. 11.7 Glossary SLYZ022—TIGlossary. Thisglossarylistsandexplainsterms,acronyms,anddefinitions. 12 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of thisdocument.Forbrowser-basedversionsofthisdatasheet,refertotheleft-handnavigation. Copyright©2010–2019,TexasInstrumentsIncorporated SubmitDocumentationFeedback 31 ProductFolderLinks:LMZ10504EXT

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) LMZ10504EXTTZ/NOPB ACTIVE TO-PMOD NDW 7 250 RoHS Exempt SN Level-3-245C-168 HR -55 to 125 LMZ10504 & Green EXT LMZ10504EXTTZE/NOPB ACTIVE TO-PMOD NDW 7 45 RoHS Exempt SN Level-3-245C-168 HR -55 to 125 LMZ10504 & Green EXT LMZ10504EXTTZX/NOPB ACTIVE TO-PMOD NDW 7 500 RoHS Exempt SN Level-3-245C-168 HR -55 to 125 LMZ10504 & Green EXT (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 12-Apr-2019 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) LMZ10504EXTTZ/NOPB TO- NDW 7 250 330.0 24.4 10.6 14.22 5.0 16.0 24.0 Q2 PMOD LMZ10504EXTTZX/NOPB TO- NDW 7 500 330.0 24.4 10.6 14.22 5.0 16.0 24.0 Q2 PMOD PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 12-Apr-2019 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) LMZ10504EXTTZ/NOPB TO-PMOD NDW 7 250 367.0 367.0 45.0 LMZ10504EXTTZX/NOPB TO-PMOD NDW 7 500 367.0 367.0 45.0 PackMaterials-Page2

MECHANICAL DATA NDW0007A BOTTOM SIDE OF PACKAGE TOP SIDE OF PACKAGE TZA07A (Rev D) www.ti.com

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