LMV321, LMV358, LMV324 Single, Dual, Quad Low-Voltage, Rail-to-Rail Operational Amplifiers The LMV321, LMV358, and LMV324 are CMOS single, dual, and quad low voltage operational amplifiers with rail−to−rail output www.onsemi.com swing. These amplifiers are a cost−effective solution for applications where low power consumption and space saving packages are critical. Specification tables are provided for operation from power supply 5 voltages at 2.7 V and 5 V. Rail−to−Rail operation provides improved 1 1 SC−70 signal−to−noise preformance. Ultra low quiescent current makes this TSOP−5 CASE 419A series of amplifiers ideal for portable, battery operated equipment. The CASE 483 common mode input range includes ground making the device useful for low−side current−shunt measurements. The ultra small packages allow for placement on the PCB in close proximity to the signal source 1 Micro8(cid:3) thereby reducing noise pickup. CASE 846A Features 8 • Operation from 2.7 V to 5.0 V Single−Sided Power Supply 8 • LMV321 Single Available in Ultra Small 5 Pin SC70 Package 1 1 • SOIC−8 UDFN8 No Output Crossover Distortion CASE 751 CASE 517AJ • Industrial temperature Range: −40°C to +85°C • Rail−to−Rail Output • Low Quiescent Current: LMV358 Dual − 220 (cid:2)A, Max per Channel • No Output Phase−Reversal from Overdriven Input 1 1 • These are Pb−Free Devices SOIC−14 TSSOP−14 CASE 751A CASE 948G Typical Applications • Notebook Computers and PDA’s ORDERING AND MARKING INFORMATION • Portable Battery−Operated Instruments See detailed ordering and shipping information in the package • Active Filters dimensions section on page 12 of this data sheet. 120 80 100 70 80 N (dB) 60 R (dB) 60 VS = 5 V AI 40 MR 50 G C 20 Over −40°C to +85°C 40 0 Same Gain (cid:2)1.8 dB (Typ) −20 30 10 100 1k 10k 100k 1M 10M −1 0 1 2 3 4 5 FREQUENCY (Hz) INPUT COMMON MODE VOLTAGE (V) Figure 1. Open Loop Frequency Response Figure 2. CMRR vs. Input Common Mode (R = 2 k(cid:2), T = 25(cid:2)C, V = 5 V) Voltage L A S © Semiconductor Components Industries, LLC, 2015 1 Publication Order Number: February, 2015 − Rev. 12 LMV321/D

LMV321, LMV358, LMV324 MARKING DIAGRAMS SC−70 TSOP−5 Micro8 8 5 AAC(cid:2) M(cid:2) 3ACA(cid:2)YW(cid:2) AVY3W58(cid:2) (cid:2) 1 1 AAC = Specific Device Code 3AC= Specific Device Code V358 = Specific Device Code M = Date Code A = Assembly Location A = Assembly Location (cid:2) = Pb−Free Package Y = Year Y = Year (Note: Microdot may be in either location) W = Work Week W = Work Week (cid:2) = Pb−Free Package (cid:2) = Pb−Free Package (Note: Microdot may be in either location) (Note: Microdot may be in either location) SOIC−8 UDFN8 8 V358 AC M ALYW (cid:2) (cid:2) 1 V358 = Specific Device Code AC = Specific Device Code A = Assembly Location M = Date Code L = Wafer Lot (cid:2) = Pb−Free Package Y = Year W = Work Week (cid:2) = Pb−Free Package SOIC−14 TSSOP−14 14 14 LMV LMV324 324 AWLYWWG ALYW 1 1 LMV324= Specific Device Code LMV324= Specific Device Code A = Assembly Location A = Assembly Location WL = Wafer Lot L = Wafer Lot Y = Year Y = Year WW = Work Week W = Work Week G = Pb−Free Package (cid:2) = Pb−Free Package PIN CONNECTIONS SC70−5/TSOP−5 UDFN8/Micro8/SOIC−8 SOIC−14 TSSOP−14 OUT A 1 14 OUT D OUT A 1 14 OUT D 1 5 OUT A 1 8 V+ +IN V+ IN A− 2 −A+ +D− 13 IN D− IN A− 2 −A+ +D− 13 IN D− 2 IN A− 2 −A+ 7 OUT B IN A+ 3 12 IN D+ IN A+ 3 12 IN D+ V− + V+ 4 11 V− V+ 4 11 V− − 3 4 IN A+ 3 6 IN B− IN B+ 5 10 IN C+ IN B+ 5 10 IN C+ −IN OUTPUT B (Top View) V− 4 + − 5 IN B+ OIUNT B B− 67 −B+ +C− 98 IONU CT− C OIUNT B B− 67 −B+ +C− 98 IONU CT− C (Top View) (Top View) (Top View) www.onsemi.com 2

LMV321, LMV358, LMV324 MAXIMUM RATINGS Symbol Rating Value Unit VS Supply Voltage (Operating Range VS = 2.7 V to 5.5 V) 5.5 V VIDR Input Differential Voltage (cid:2)Supply Voltage V VICR Input Common Mode Voltage Range −0.5 to (V+) + 0.5 V Maximum Input Current 10 mA tSo Output Short Circuit (Note 1) Continuous TJ Maximum Junction Temperature (Operating Range −40°C to 85°C) 150 °C (cid:3)JA Thermal Resistance: °C/W SC−70 280 Micro8 238 TSOP−5 333 UDFN8 (1.2 mm x 1.8 mm x 0.5 mm) 350 SOIC−8 212 SOIC−14 156 TSSOP−14 190 Tstg Storage Temperature −65 to 150 °C Mounting Temperature (Infrared or Convection −20 sec) 260 °C VESD ESD Tolerance V LMV321 Machine Model 100 Human Body Model 1000 LMV358/324 Machine Model 100 Human Body Mode 2000 Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functional- ity should not be assumed, damage may occur and reliability may be affected. 1. Continuous short−circuit operation to ground at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 150°C. Output currents in excess of 45 mA over long term may adversely affect reliability. Shorting output to either V+ or V− will adversely affect reliability. www.onsemi.com 3

LMV321, LMV358, LMV324 2.7 V DC ELECTRICAL CHARACTERISTICS (Unless otherwise specified, all limits are guaranteed for TA = 25°C, V+ = 2.7 V, RL = 1 M(cid:4), V− = 0 V, VO = V+/2) Parameter Symbol Condition Min Typ Max Unit Input Offset Voltage VIO TA = −40°C to +85°C 1.7 9 mV Input Offset Voltage Average Drift ICVOS TA = −40°C to +85°C 5 (cid:2)V/°C Input Bias Current IB TA = −40°C to +85°C <1 nA Input Offset Current IIO TA = −40°C to +85°C <1 nA Common Mode Rejection Ratio CMRR 0 V (cid:3) VCM (cid:3) 1.7 V 50 63 dB Power Supply Rejection Ratio PSRR 2.7 V (cid:3) V+ (cid:3) 5 V, 50 60 dB VO = 1 V Input Common−Mode Voltage Range VCM For CMRR (cid:4) 50 dB 0 to 1.7 −0.2 to 1.9 V Output Swing VOH RL = 10 k(cid:4) to 1.35 V VCC − 100 VCC − 10 mV VOL RL = 10 k(cid:4) to 1.35 V (Note 2) 60 180 mV Supply Current LMV321 ICC 80 185 (cid:2)A LMV358 (Both Amplifiers) 140 340 LMV324 (4 Amplifiers) 260 680 2.7 V AC ELECTRICAL CHARACTERISTICS (Unless otherwise specified, all limits are guaranteed for TA = 25°C, V+ = 2.7 V, RL = 1 M(cid:4), V− = 0 V, VO = V+/2) Parameter Symbol Condition Min Typ Max Unit Gain Bandwidth Product GBWP CL = 200 pF 1 MHz Phase Margin (cid:5) 60 ° m Gain Margin Gm 10 dB Input−Referred Voltage Noise en f = 50 kHz 50 nV/√Hz Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 2. Guaranteed by design and/or characterization. www.onsemi.com 4

LMV321, LMV358, LMV324 5.0 V DC ELECTRICAL CHARACTERISTICS (Unless otherwise specified, all limits are guaranteed for TA = 25°C, V+ = 5.0 V, RL = 1 M(cid:4), V− = 0 V, VO = V+/2) Parameter Symbol Condition Min Typ Max Unit Input Offset Voltage VIO TA = −40°C to +85°C 1.7 9 mV Input Offset Voltage Average Drift TCVIO TA = −40°C to +85°C 5 (cid:2)V/°C Input Bias Current (Note 3) IB < 1 nA TA = −40°C to +85°C Input Offset Current (Note 3) IIO TA = −40°C to +85°C < 1 nA Common Mode Rejection Ratio CMRR 0 V (cid:3) VCM (cid:3) 4 V 50 65 dB Power Supply Rejection Ratio PSRR 2.7 V (cid:3) V+ (cid:3) 5 V, 50 60 dB VO = 1 V, VCM = 1 V Input Common−Mode Voltage Range VCM For CMRR (cid:4) 50 dB 0 to 4 −0.2 to 4.2 V Large Signal Voltage Gain (Note 3) AV RL = 2 k(cid:4) 15 100 V/mV TA = −40°C to +85°C 10 Output Swing VOH RL = 2 k(cid:4) to 2.5 V VCC − 300 VCC − 40 mV TA = −40°C to +85°C VCC − 400 VOL RL = 2 k(cid:4) to 2.5 V (Note 3) 120 300 mV TA = −40°C to +85°C 400 VOH RL = 10 k(cid:4) to 2.5 V (Note 3) VCC − 100 mV TA = −40°C to +85°C VCC − 200 VOL RL = 10 k(cid:4) to 2.5 V 65 180 mV TA = −40°C to +85°C 280 Output Short Circuit Current IO Sourcing = VO = 0 V (Note 3) 10 60 mA Sinking = VO = 5 V (Note 3) 10 160 Supply Current ICC LMV321 130 250 (cid:2)A TA = −40°C to +85°C 350 LMV358 Both Amplifiers 210 440 TA = −40°C to +85°C 615 LMV324 All Four Amplifiers 410 830 TA = −40°C to +85°C 1160 5.0 V AC ELECTRICAL CHARACTERISTICS (Unless otherwise specified, all limits are guaranteed for TA = 25°C, V+ = 5.0 V, RL = 1 M(cid:4), V− = 0 V, VO = V+/2) Parameter Symbol Condition Min Typ Max Unit Slew Rate SR 1 V/(cid:2)s Gain Bandwidth Product GBWP CL = 200 pF 1 MHz Phase Margin (cid:5) 60 ° m Gain Margin Gm 10 dB Input−Referred Voltage Noise en f = 50 kHz 50 nV/√Hz Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 3. Guaranteed by design and/or characterization. www.onsemi.com 5

LMV321, LMV358, LMV324 TYPICAL CHARACTERISTICS (TA = 25°C and VS = 5 V unless otherwise specified) 120 170 100 150 130 80 °) N ( 110 B) 60 GI d R N ( MA 90 AI 40 E G S 70 A 20 H P 50 Over −40°C to +85°C 0 Same Gain (cid:2)1.8 dB (Typ) 30 −20 10 10 100 1k 10k 100k 1M 10M 10 100 1k 10k 100k 1M 10M FREQUENCY (Hz) FREQUENCY (Hz) Figure 3. Open Loop Frequency Response Figure 4. Open Loop Phase Margin (R = 2 k(cid:2), T = 25(cid:2)C, V = 5 V) (R = 2 k(cid:2), T = 25(cid:2)C, V = 5 V) L A S L A S 100 80 90 75 80 70 70 65 B) 60 B) 60 d d R ( 50 R ( 55 VS = 2.7 V R R M 40 M 50 f = 10 kHz C C 30 45 20 40 10 35 0 30 10 100 1k 10k 100k −0.5 0 0.5 1 1.5 2 2.5 3 FREQUENCY (Hz) INPUT COMMON MODE VOLTAGE (V) Figure 5. CMRR vs. Frequency Figure 6. CMRR vs. Input Common Mode (RL = 5 k(cid:2), VS = 5 V) Voltage 80 100 90 70 80 70 B) 60 VS = 5 V B) 60 d d R ( f = 10 kHz R ( 50 R R M 50 S 40 C P 30 40 20 10 30 0 −1 0 1 2 3 4 5 1k 10k 100k 1M 10M INPUT COMMON MODE VOLTAGE (V) FREQUENCY (Hz) Figure 7. CMRR vs. Input Common Mode Figure 8. PSRR vs. Frequency Voltage (RL = 5 k(cid:2), VS = 2.7 V, +PSRR) www.onsemi.com 6

LMV321, LMV358, LMV324 TYPICAL CHARACTERISTICS (TA = 25°C and VS = 5 V unless otherwise specified) 90 100 80 90 80 70 70 60 B) B) 60 d 50 d R ( R ( 50 R 40 R S S 40 P P 30 30 20 20 10 10 0 0 1k 10k 100k 1M 10M 1k 10k 100k 1M 10M FREQUENCY (Hz) FREQUENCY (Hz) Figure 9. PSRR vs. Frequency Figure 10. PSRR vs. Frequency (RL = 5 k(cid:2), VS = 2.7 V, −PSRR) (RL = 5 k(cid:2), VS = 5 V, +PSRR) 100 5 90 4.5 80 4 70 3.5 B) 60 V) 3 RR (d 50 (mS2.5 PS 40 VO 2 30 1.5 20 1 VS = 2.7 V 10 0.5 0 0 1k 10k 100k 1M 10M 0 0.5 1 1.5 2 2.5 3 FREQUENCY (Hz) VCM (V) Figure 11. PSRR vs. Frequency Figure 12. VOS vs CMR (R = 5 k(cid:2), V = 5 V, −PSRR) L S 5 200 4.5 180 4 160 A) 3.5 (cid:2)T ( 140 3 N 120 V) E m R 2.5 R 100 (S U VO 2 Y C 80 L 1.5 P 60 P U 1 VS = 5.0 V S 40 0.5 20 0 0 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 VCM (V) SUPPLY VOLTAGE (V) Figure 13. V vs CMR OS Figure 14. Supply Current vs. Supply Voltage www.onsemi.com 7

LMV321, LMV358, LMV324 TYPICAL CHARACTERISTICS (TA = 25°C and VS = 5 V unless otherwise specified) 1 0 RL = 10 k(cid:4) −0.01 Vout = 1 VPP V) Positive Swing Av = +1 + ( −0.02 V 0.1 O −0.03 T D −0.04 E %) C −0.05 N ( E R −0.06 E 0.01 EF −0.07 R T−0.08 U O V −0.09 0.001 −0.1 10 100 1k 10k 100k 2.5 3 3.5 4 4.5 5 (Hz) SUPPLY VOLTAGE (V) Figure 15. THD+N vs Frequency Figure 16. Output Voltage Swing vs Supply Voltage (R = 10k) L 0.1 0 0.09 V) −20 O V− ( 00..0078 mA) −40 D T 0.06 T ( −60 E N NC 0.05 RE −80 E R R 0.04 U E C−100 EF 0.03 NK RT 0.02 SI−120 U VO 0.01 Negative Swing −140 0 −160 2.5 3 3.5 4 4.5 5 0 0.5 1 1.5 2 2.5 SUPPLY VOLTAGE (V) VOUT REFERENCED TO V− (V) Figure 17. Output Voltage Swing vs Supply Figure 18. Sink Current vs. Output Voltage Voltage (RL = 10k) VS = 2.7 V 0 120 −20 100 A) A) m T (m −40 NT ( 80 N E E R R −60 R 60 R U U C C E K −80 C 40 N R SI OU −100 S 20 −120 0 0 1 2 3 4 5 0 0.5 1.0 1.5 2.0 2.5 VOUT REFERENCED TO V− (V) VOUT REFERENCED TO V+ (V) Figure 19. Sink Current vs. Output Voltage Figure 20. Source Current vs. Output Voltage V = 5.0 V V = 2.7 V S S www.onsemi.com 8

LMV321, LMV358, LMV324 TYPICAL CHARACTERISTICS (TA = 25°C and VS = 5 V unless otherwise specified) 110 RL = 2 k(cid:4) 100 AV = 1 50 mV/div A) 90 2 (cid:2)s/div m 80 NT ( 70 E R 60 R U 50 C E 40 C R 30 U O S 20 10 0 0 1 2 3 4 5 VOUT REFERENCED TO V+ (V) Figure 21. Source Current vs. Output Voltage Figure 22. Settling Time vs. Capacitive Load V = 5.0 V S RL = 1 M(cid:4) 50 mV/div AV = 1 2 (cid:2)s/div 50 mV/div 2 (cid:2)s/div Non−Inverting (G = +1) Input Output Figure 23. Settling Time vs. Capacitive Load Figure 24. Step Response − Small Signal 50 mV/div 1 V/div 2 (cid:2)s/div 2 (cid:2)s/div Inverting (G = −1) Non−Inverting (G = +1) Input Input Output Output Figure 25. Step Response − Small Signal Figure 26. Step Response − Large Signal www.onsemi.com 9

LMV321, LMV358, LMV324 TYPICAL CHARACTERISTICS (TA = 25°C and VS = 5 V unless otherwise specified) 1 V/div 2 (cid:2)s/div Inverting (G = −1) Input Output Figure 27. Step Response − Large Signal www.onsemi.com 10

LMV321, LMV358, LMV324 APPLICATIONS 50 k R1 5.0 k VCC R2 − VCC Vref 10 k − VCC LMV321 VO MC1403 2.5 V +LMV321 VO Vref(cid:5)12VCC + fO(cid:5)2(cid:6)1RC For:fo = 1.0 kHz VO(cid:5)2.5V(1(cid:6)RR12) R C R C RC == 01.60 1k(cid:4) (cid:2)F Figure 28. Voltage Reference Figure 29. Wien Bridge Oscillator VCC C R3 R1 C Vin − CO R2 LMV321 VO Hysteresis + CO = 10 C R2 VOH Vref R1 + VO Vref LMV321 Vin − VO Given: fo = center frequency VOL A(fo) = gain at center frequency VinL VinH V L(cid:5) R1 (V (cid:7)VVref (cid:6)V CThhoeons:e vaRlu3e(cid:5) fo, CQ in R1(cid:6)R2 OL ref) ref (cid:6)f C O VinH(cid:5)R1R(cid:6)1R2 (VOH(cid:7)Vref)(cid:6)Vref R1(cid:5)2AR(3f ) R1 O H(cid:5) (V (cid:7)V ) R1R3 R1(cid:6)R2 OH OL R2(cid:5) 4Q2R1(cid:7)R3 Figure 30. Comparator with Hysteresis For less than 10% error from operational amplifier, ((QO fO)/BW) < 0.1 where fo and BW are expressed in Hz. If source impedance varies, filter may be preceded with voltage follower buffer to stabilize filter parameters. Figure 31. Multiple Feedback Bandpass Filter www.onsemi.com 11

LMV321, LMV358, LMV324 ORDERING INFORMATION Number of Order Number Channels Specific Device Marking Package Type Shipping† LMV321SQ3T2G Single AAC SC−70 3000 / Tape & Reel (Pb−Free) LMV321SN3T1G Single 3AC TSOP−5 3000 / Tape & Reel (Pb−Free) LMV358DMR2G Dual V358 Micro8 4000 / Tape & Reel (Pb−Free) LMV358MUTAG Dual AC UDFN8 3000 / Tape & Reel (Pb−Free) LMV358DR2G Dual V358 SOIC−8 2500 / Tape & Reel (Pb−Free) LMV324DR2G Quad LMV324 SOIC−14 2500 / Tape & Reel (Pb−Free) LMV324DTBR2G Quad LMV TSSOP−14 2500 / Tape & Reel 324 (Pb−Free) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. www.onsemi.com 12

LMV321, LMV358, LMV324 PACKAGE DIMENSIONS SC−88A (SC−70−5/SOT−353) CASE 419A−02 ISSUE L A NOTES: 1. DIMENSIONING AND TOLERANCING G PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. 419A−01 OBSOLETE. NEW STANDARD 419A−02. 4. DIMENSIONS A AND B DO NOT INCLUDE 5 4 MOLD FLASH, PROTRUSIONS, OR GATE BURRS. S −B− INCHES MILLIMETERS 1 2 3 DIM MIN MAX MIN MAX A 0.071 0.087 1.80 2.20 B 0.045 0.053 1.15 1.35 C 0.031 0.043 0.80 1.10 D 0.004 0.012 0.10 0.30 D 5 PL 0.2 (0.008) M B M G 0.026 BSC 0.65 BSC H --- 0.004 --- 0.10 J 0.004 0.010 0.10 0.25 N K 0.004 0.012 0.10 0.30 N 0.008 REF 0.20 REF S 0.079 0.087 2.00 2.20 J C K H SOLDER FOOTPRINT 0.50 0.0197 0.65 0.025 0.65 0.025 0.40 0.0157 1.9 (cid:8) (cid:9) 0.0748 mm SCALE 20:1 inches www.onsemi.com 13

LMV321, LMV358, LMV324 PACKAGE DIMENSIONS TSOP−5 CASE 483−02 ISSUE K NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME NOTE 5 D5X Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 0.20 C A B 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH 2X 0.10 T THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. M 4. DIMENSIONS A AND B DO NOT INCLUDE MOLD 2X 0.20 T B 5 4 S FFLLAASSHH,, PPRROOTTRRUUSSIIOONNSS,, OORR GGAATTEE BBUURRRRSS. SMHOALLDL NOT 1 2 3 EXCEED 0.15 PER SIDE. DIMENSION A. K 5. OPTIONAL CONSTRUCTION: AN ADDITIONAL B G DETAIL Z TTRRIIMMMMEEDD LLEEAADD INSO ATL TLOO WEXETDE INND T HMIOS RLEO CTHATAINO N0..2 A A FROM BODY. MILLIMETERS TOP VIEW DIM MIN MAX A 3.00 BSC B 1.50 BSC DETAIL Z C 0.90 1.10 J D 0.25 0.50 C G 0.95 BSC H 0.01 0.10 0.05 J 0.10 0.26 H C SPELAATNIENG END VIEW MK 0.02 0(cid:3) 010.6 (cid:3) 0 SIDE VIEW S 2.50 3.00 SOLDERING FOOTPRINT* 1.9 0.074 0.95 0.037 2.4 0.094 1.0 0.039 0.7 (cid:8) (cid:9) 0.028 SCALE 10:1 mm inches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. www.onsemi.com 14

LMV321, LMV358, LMV324 PACKAGE DIMENSIONS Micro8™ CASE 846A−02 ISSUE J DD NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. HE E 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. 846A-01 OBSOLETE, NEW STANDARD 846A-02. MILLIMETERS INCHES DIM MIN NOM MAX MIN NOM MAX PIN 1 ID e A −− −− 1.10 −− −− 0.043 b8 PL A1 0.05 0.08 0.15 0.002 0.003 0.006 b 0.25 0.33 0.40 0.010 0.013 0.016 0.08 (0.003) M T B S A S c 0.13 0.18 0.23 0.005 0.007 0.009 D 2.90 3.00 3.10 0.114 0.118 0.122 E 2.90 3.00 3.10 0.114 0.118 0.122 e 0.65 BSC 0.026 BSC SEATING L 0.40 0.55 0.70 0.016 0.021 0.028 −T− PLANE HE 4.75 4.90 5.05 0.187 0.193 0.199 0.038 (0.0015) A A1 c L RECOMMENDED SOLDERING FOOTPRINT* 8X 8X0.48 0.80 5.25 0.65 PITCH DIMENSION: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. www.onsemi.com 15

LMV321, LMV358, LMV324 PACKAGE DIMENSIONS UDFN8 1.8x1.2, 0.4P CASE 517AJ ISSUE O D A B NOTES: 1. DIMENSIONING AND TOLERANCING PER 0.10 C ASME Y14.5M, 1994. ÉÉ L1 2. CONTROLLING DIMENSION: MILLIMETERS. REFEPRINE ONCNEE ÉÉ E 3. TDEIMREMNINSAIOLN A bN DAP ISP LMIEESA STUOR PELDA TBEEDTWEEN 0.15 AND 0.30 mm FROM TERMINAL TIP. DETAIL A 4. MOLD FLASH ALLOWED ON TERMINALS NOTE 5 ALONG EDGE OF PACKAGE. FLASH MAY 0.10 C NOT EXCEED 0.03 ONTO BOTTOM TOP VIEW SURFACE OF TERMINALS. 5. DETAIL A SHOWS OPTIONAL CONSTRUCTION FOR TERMINALS. 0.05 C (A3) MILLIMETERS DIM MIN MAX A A 0.45 0.55 A1 0.00 0.05 0.05 C A3 0.127 REF SIDE VIEWA1 C SPELAATNIENG bb2 0.01.530 RE0.F25 D 1.80 BSC E 1.20 BSC e/2 e 0.40 BSC e DETAIL A L 0.45 0.55 (b2) 8XL L1 0.00 0.03 L2 0.40 REF 1 4 MOUNTING FOOTPRINT* (L2) SOLDERMASK DEFINED 8 5 8Xb 7X 0.86X6 BOTTOM VIEW 0.10 M C A B 0.22 0.05 M C NOTE 3 1.50 1 0.32 0.40 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. www.onsemi.com 16

LMV321, LMV358, LMV324 PACKAGE DIMENSIONS SOIC−8 NB CASE 751−07 ISSUE AK NOTES: −X− 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. A 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) 8 5 PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR B S 0.25 (0.010) M Y M PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL 1 IN EXCESS OF THE D DIMENSION AT −Y− 4 K 6. 7M5A1X−I0M1U TMH RMUA T7E51R−IA0L6 CAROEN DOIBTSIOONL.ETE. NEW STANDARD IS 751−07. G MILLIMETERS INCHES DIM MIN MAX MIN MAX A 4.80 5.00 0.189 0.197 C NX 45(cid:3) B 3.80 4.00 0.150 0.157 SEATING C 1.35 1.75 0.053 0.069 PLANE D 0.33 0.51 0.013 0.020 −Z− G 1.27 BSC 0.050 BSC H 0.10 0.25 0.004 0.010 0.10 (0.004) J 0.19 0.25 0.007 0.010 H D M J K 0.40 1.27 0.016 0.050 M 0 (cid:3) 8 (cid:3) 0 (cid:3) 8 (cid:3) N 0.25 0.50 0.010 0.020 0.25 (0.010)M Z Y S X S SOLDERING FOOTPRINT* S 5.80 6.20 0.228 0.244 1.52 0.060 7.0 4.0 0.275 0.155 0.6 1.270 0.024 0.050 (cid:8) (cid:9) mm SCALE 6:1 inches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. www.onsemi.com 17

LMV321, LMV358, LMV324 PACKAGE DIMENSIONS SOIC−14 NB CASE 751A−03 ISSUE K D A NOTES: B 1.DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2.CONTROLLING DIMENSION: MILLIMETERS. 14 8 3.DIMENSION b DOES NOT INCLUDE DAMBAR A3 PROTRUSION. ALLOWABLE PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF AT MAXIMUM MATERIAL CONDITION. H E 4.DIMENSIONS D AND E DO NOT INCLUDE MOLD PROTRUSIONS. L 5.MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 1 7 DETAIL A MILLIMETERS INCHES 0.25 M B M 13Xb DIM MIN MAX MIN MAX A 1.35 1.75 0.054 0.068 0.25 M C A S B S A1 0.10 0.25 0.004 0.010 A3 0.19 0.25 0.008 0.010 DETAIL A b 0.35 0.49 0.014 0.019 h A D 8.55 8.75 0.337 0.344 X 45(cid:3) E 3.80 4.00 0.150 0.157 e 1.27 BSC 0.050 BSC H 5.80 6.20 0.228 0.244 h 0.25 0.50 0.010 0.019 e A1 C SEATING M ML 0.04 0(cid:3) 1.72 5(cid:3) 0.001 6(cid:3) 0.074 9(cid:3) PLANE SOLDERING FOOTPRINT* 6.50 14X 1.18 1 1.27 PITCH 14X 0.58 DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. www.onsemi.com 18

LMV321, LMV358, LMV324 PACKAGE DIMENSIONS TSSOP−14 CASE 948G ISSUE B 14X K REF NOTES: 1. DIMENSIONING AND TOLERANCING PER 0.10 (0.004) M T U S V S ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 0.15 (0.006) T U S 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. N MOLD FLASH OR GATE BURRS SHALL NOT 0.25 (0.010) EXCEED 0.15 (0.006) PER SIDE. 2XL/2 14 8 4. DINIMTEERNLSEIOADN FBL DAOSEHS O NRO PTR IONTCRLUUDSIEON. M INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. L B 5. DIMENSION K DOES NOT INCLUDE DAMBAR −U− N PROTRUSION. ALLOWABLE DAMBAR PIN 1 PROTRUSION SHALL BE 0.08 (0.003) TOTAL IDENT. F IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 1 7 DETAIL E 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE −W−. 0.15 (0.006) T U S A K MILLIMETERS INCHES −V− K1 DIM MIN MAX MIN MAX ÇÉÇÉÇÉ A 4.90 5.10 0.193 0.200 B 4.30 4.50 0.169 0.177 J J1 ÇÉÇÉÇÉ C −−− 1.20 −−− 0.047 D 0.05 0.15 0.002 0.006 F 0.50 0.75 0.020 0.030 SECTION N−N G 0.65 BSC 0.026 BSC H 0.50 0.60 0.020 0.024 J 0.09 0.20 0.004 0.008 −W− J1 0.09 0.16 0.004 0.006 C K 0.19 0.30 0.007 0.012 K1 0.19 0.25 0.007 0.010 0.10 (0.004) L 6.40 BSC 0.252 BSC M 0 (cid:3) 8 (cid:3) 0 (cid:3) 8 (cid:3) −T− SEATING D G H DETAIL E PLANE SOLDERING FOOTPRINT* 7.06 1 0.65 PITCH 14X 14X 0.36 1.26 DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. www.onsemi.com 19

LMV321, LMV358, LMV324 Micro8 is a trademark of International Rectifier. ON Semiconductor and the are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: N. American Technical Support: 800−282−9855 Toll Free ON Semiconductor Website: www.onsemi.com Literature Distribution Center for ON Semiconductor USA/Canada P.O. Box 5163, Denver, Colorado 80217 USA Europe, Middle East and Africa Technical Support: Order Literature: http://www.onsemi.com/orderlit Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Phone: 421 33 790 2910 Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Japan Customer Focus Center For additional information, please contact your local Email: orderlit@onsemi.com Phone: 81−3−5817−1050 Sales Representative www.onsemi.com LMV321/D 20

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