Product Sample & Technical Tools & Support & Folder Buy Documents Software Community LMC6482 SNOS674E–NOVEMBER1997–REVISEDAPRIL2015 LMC6482 CMOS Dual Rail-to-Rail Input and Output Operational Amplifier 1 Features 3 Description • TypicalUnlessOtherwiseNoted The LMC6482 device provides a common-mode 1 rangethatextendstobothsupplyrails.Thisrail-to-rail • Rail-to-RailInputCommon-ModeVoltageRange performance combined with excellent accuracy, due (EnsuredOverTemperature) to a high CMRR, makes it unique among rail-to-rail • Rail-to-RailOutputSwing(Within20-mVofSupply input amplifiers. The device is ideal for systems, such Rail,100-kΩLoad) as data acquisition, that require a large input signal range. The LMC6482 is also an excellent upgrade for • Ensured3-V,5-V,and15-VPerformance circuits using limited common-mode range amplifiers • ExcellentCMRRandPSRR:82dB suchastheTLC272andTLC277. • UltralowInputCurrent:20fA Maximum dynamic signal range is assured in low • HighVoltageGain(RL=500k Ω):130dB voltage and single supply systems by the rail-to-rail • Specifiedfor2-kΩ and600-Ω Loads output swing of the LMC6482. The rail-to-rail output • Power-GoodOutput swing is ensured for loads down to 600 Ω of the device. Ensured low-voltage characteristics and low- • AvailableinVSSOPPackage power dissipation make the LMC6482 especially well- suited for battery-operated systems. LMC6482 is also 2 Applications available in a VSSOP package, which is almost half • DataAcquisitionSystems the size of a SOIC-8 device. See the LMC6484 data sheet for a quad CMOS operational amplifier with • TransducerAmplifiers thesesamefeatures. • Hand-heldAnalyticInstruments • MedicalInstrumentation DeviceInformation(1) • ActiveFilter,PeakDetector,SampleandHold,pH PARTNUMBER PACKAGE BODYSIZE(NOM) Meter,CurrentSource SOIC(8) 4.90mm×3.91mm • ImprovedReplacementforTLC272,TLC277 LMC6482 VSSOP(8) 3.00mm×3.00mm PDIP(8) 9.81mm×6.35mm (1) For all available packages, see the orderable addendum at theendofthedatasheet. Rail-to-RailInput Rail-to-RailOutput A1 ±0.18 V A2 ±0.18 V 3V 3V 0V 0V 500mV 50(cid:29)s 500mV 50(cid:29)s C001 C002 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA.

LMC6482 SNOS674E–NOVEMBER1997–REVISEDAPRIL2015 www.ti.com Table of Contents 1 Features.................................................................. 1 7.2 FunctionalBlockDiagram.......................................18 2 Applications........................................................... 1 7.3 FeatureDescription.................................................18 3 Description............................................................. 1 7.4 DeviceFunctionalModes........................................19 4 RevisionHistory..................................................... 2 8 ApplicationandImplementation........................ 20 8.1 ApplicationInformation............................................20 5 PinConfigurationandFunctions......................... 3 8.2 TypicalApplications ...............................................22 6 Specifications......................................................... 3 9 PowerSupplyRecommendations...................... 28 6.1 AbsoluteMaximumRatings......................................3 10 Layout................................................................... 28 6.2 ESDRatings..............................................................4 6.3 RecommendedOperatingConditions.......................4 10.1 LayoutGuidelines.................................................28 6.4 ThermalInformation..................................................4 10.2 LayoutExample....................................................28 6.5 ElectricalCharacteristicsforV+=5V.......................4 11 DeviceandDocumentationSupport................. 30 6.6 ElectricalCharacteristicsforV+=3V.......................7 11.1 Trademarks...........................................................30 6.7 TypicalCharacteristics..............................................9 11.2 ElectrostaticDischargeCaution............................30 7 DetailedDescription............................................ 18 11.3 Glossary................................................................30 7.1 Overview.................................................................18 12 Mechanical,Packaging,andOrderable Information........................................................... 30 4 Revision History NOTE:Pagenumbersforpreviousrevisionsmaydifferfrompagenumbersinthecurrentversion. ChangesfromRevisionD(March2013)toRevisionE Page • AddedPinConfigurationandFunctionssection,ESDRatingstable,FeatureDescriptionsection,DeviceFunctional Modes,ApplicationandImplementationsection,PowerSupplyRecommendationssection,Layoutsection,Device andDocumentationSupportsection,andMechanical,Packaging,andOrderableInformationsection .............................. 1 ChangesfromRevisionC(March2013)toRevisionD Page • ChangedlayoutofNationalDataSheettoTIformat........................................................................................................... 27 2 SubmitDocumentationFeedback Copyright©1997–2015,TexasInstrumentsIncorporated ProductFolderLinks:LMC6482

LMC6482 www.ti.com SNOS674E–NOVEMBER1997–REVISEDAPRIL2015 5 Pin Configuration and Functions D,DGKandPPackages 8-PinSOIC,VSSOPandPDIP (TopView) PinFunctions PIN TYPE DESCRIPTION NO. NAME 1 OUTPUTA O OutputforAmplifierA 2 INVERTINGINPUTA I InvertinginputforAmplifierA 3 NONINVERTINGINPUTA I NoninvertinginputforAmplifierA 4 V– P Negativesupplyvoltageinput 5 NONINVERTINGINPUTB I NoninvertinginputforAmplifierB 6 INVERTINGINPUTB I InvertinginputforAmplifierB 7 OUTPUTB O OutputforAmplifierB 8 V+ P Positivesupplyvoltageinput 6 Specifications 6.1 Absolute Maximum Ratings overoperatingfree-airtemperaturerange(unlessotherwisenoted)(1)(2) MIN MAX UNIT DifferentialInputVoltage ±SupplyVoltage VoltageatInput/OutputPin (V−)−0.3 (V+)+0.3 V SupplyVoltage(V+−V−) 16 V CurrentatInputPin (3) −5 5 mA CurrentatOutputPin (4) (5) −30 30 mA CurrentatPowerSupplyPin 40 mA LeadTemperature (Soldering,10sec.) 260 °C JunctionTemperature (6) 150 °C Storagetemperature,T −65 150 °C stg (1) StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thesearestressratings only,whichdonotimplyfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderRecommended OperatingConditions.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. (2) IfMilitary/Aerospacespecifieddevicesarerequired,pleasecontacttheTISalesOffice/Distributorsforavailabilityandspecifications. (3) Limitinginputpincurrentisonlynecessaryforinputvoltagesthatexceedabsolutemaximuminputvoltageratings. (4) Appliestobothsingle-supplyandsplit-supplyoperation.Continuousshortcircuitoperationatelevatedambienttemperaturecanresultin exceedingthemaximumallowedjunctiontemperatureof150°C.Outputcurrentsinexcessof±30mAoverlongtermmayadversely affectreliability. (5) DonotshortcircuitoutputtoV+,whenV+isgreaterthan13Vorreliabilitywillbeadverselyaffected. (6) ThemaximumpowerdissipationisafunctionofT ,R ,andT .Themaximumallowablepowerdissipationatanyambient J(max) θJA A temperatureisP =(T −T )/θ .AllnumbersapplyforpackagessoldereddirectlyintoaPCboard. D J(max) A JA Copyright©1997–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:LMC6482

LMC6482 SNOS674E–NOVEMBER1997–REVISEDAPRIL2015 www.ti.com 6.2 ESD Ratings VALUE UNIT V Electrostaticdischarge Human-bodymodel(HBM),perANSI/ESDA/JEDECJS-001(1) ±1500 V (ESD) (1) JEDECdocumentJEP155statesthat500-VHBMallowssafemanufacturingwithastandardESDcontrolprocess. 6.3 Recommended Operating Conditions overoperatingfree-airtemperaturerange(unlessotherwisenoted)(1) MIN MAX UNIT SupplyVoltage 3 15.5 V LMC6482AM –55 125 °C JunctionTemperatureRange LMC6482AI,LMC6482I –40 −85 °C (1) StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thesearestressratings only,whichdonotimplyfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderRecommended OperatingConditions.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. 6.4 Thermal Information LMC6482 LMC6482 LMC6482 THERMALMETRIC(1) D(SOIC) DGK(VSSOP) P(PDIP) UNIT 8PINS 8PINS 8PINS R Junction-to-ambientthermalresistance 155 194 90 °C/W θJA (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheICPackageThermalMetricsapplicationreport,SPRA953. 6.5 Electrical Characteristics for V+ = 5 V Unlessotherwisespecified,alllimitsspecifiedforT =25°C,V+=5V,V−=0V,V =V =V+/2andR >1M. J CM O L AtTemperature PARAMETER TESTCONDITIONS TJ=25°C Extremes(1) UNIT MIN TYP(2) MAX(3) MIN TYP(2) MAX(3) DCElectricalCharacteristics LMC6482AI 0.11 0.75 1.35 InputOffset V LMC6482I 0.11 3 3.7 mV OS Voltage LMC6482M 0.11 3 3.8 TCV InputOffset 1 OS Voltage μV/°C AverageDrift LMC6482AI 0.02 4 I InputCurrent See (4) LMC6482I 0.02 4 pA B LMC6482M 0.02 10 LMC6482AI 0.01 2 I InputOffset See (4) LMC6482I 0.01 2 pA OS Current LMC6482M 0.01 5 C Common- 3 IN ModeInput pF Capacitance R Input 10 IN TeraΩ Resistance (1) SeeRecommendedOperatingConditionsforoperatingtemperatureranges. (2) TypicalValuesrepresentthemostlikelyparametricnorm. (3) Alllimitsarespecifiedbytestingorstatisticalanalysis. (4) Ensuredlimitsaredictatedbytesterlimitationsandnotdeviceperformance.Actualperformanceisreflectedinthetypicalvalue. 4 SubmitDocumentationFeedback Copyright©1997–2015,TexasInstrumentsIncorporated ProductFolderLinks:LMC6482

LMC6482 www.ti.com SNOS674E–NOVEMBER1997–REVISEDAPRIL2015 Electrical Characteristics for V+ = 5 V (continued) Unlessotherwisespecified,alllimitsspecifiedforT =25°C,V+=5V,V−=0V,V =V =V+/2andR >1M. J CM O L AtTemperature PARAMETER TESTCONDITIONS TJ=25°C Extremes(1) UNIT MIN TYP(2) MAX(3) MIN TYP(2) MAX(3) LMC6482AI 70 82 67 0V≤V ≤15V Common- V+=15CVM LMC6482I 65 82 62 Mode LMC6482M 65 82 60 CMRR dB Rejection LMC6482AI 70 82 67 Ratio 0V≤V ≤5V V+=5VCM LMC6482I 65 82 62 LMC6482M 65 82 60 Positive 5V≤V+≤15V, LMC6482AI 70 82 67 +PSRR PowerSupply V−=0V LMC6482I 65 82 62 dB Rejection V =2.5V Ratio O LMC6482M 65 82 60 Negative −5V≤V−≤−15V, LMC6482AI 70 82 67 −PSRR PowerSupply V+=0V LMC6482I 65 82 62 dB Rejection V =−2.5V Ratio O LMC6482M 65 82 60 LMC6482AI V−−0.3 −0.25 0 LMC6482I V−−0.3 −0.25 0 V LMC6482M V−−0.3 −0.25 0 Input Common- V+=5Vand15V LMC6482AI V++ V++0.3 V+ VCM ModeVoltage ForCMRR≥50dB 0.25 Range LMC6482I V++ V++0.3 V+ V 0.25 LMC6482M V++ V++0.3 V+ 0.25 LMC6482AI 140 666 84 Sourcing LMC6482I 120 666 72 V/mV LMC6482M 120 666 60 R =2kΩ(5)(4) L LMC6482AI 35 75 20 Sinking LMC6482I 35 75 20 V/mV LargeSignal LMC6482M 35 75 18 A V VoltageGain LMC6482AI 80 300 48 Sourcing LMC6482I 50 300 30 V/mV LMC6482M 50 300 25 R =600Ω(5)(4) L LMC6482AI 20 35 13 Sinking LMC6482I 15 35 10 V/mV LMC6482M 15 35 8 (5) V+=15V,V =7.5VandR connectedto7.5V.ForSourcingtests,7.5V≤V ≤11.5V.ForSinkingtests,3.5V≤V ≤7.5V. CM L O O Copyright©1997–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:LMC6482

LMC6482 SNOS674E–NOVEMBER1997–REVISEDAPRIL2015 www.ti.com Electrical Characteristics for V+ = 5 V (continued) Unlessotherwisespecified,alllimitsspecifiedforT =25°C,V+=5V,V−=0V,V =V =V+/2andR >1M. J CM O L AtTemperature PARAMETER TESTCONDITIONS TJ=25°C Extremes(1) UNIT MIN TYP(2) MAX(3) MIN TYP(2) MAX(3) V OutputSwing V+=5V LMC6482AI 4.8 4.9 4.7 O R =2kΩtoV+/2 L LMC6482I 4.8 4.9 4.7 V LMC6482M 4.8 4.9 4.7 LMC6482AI 0.1 0.18 0.24 LMC6482I 0.1 0.18 0.24 V LMC6482M 0.1 0.18 0.24 LMC6482AI 4.5 4.7 4.24 LMC6482I 4.5 4.7 4.24 V+=5V LMC6482M 4.5 4.7 4.24 RL=600ΩtoV+/2 LMC6482AI 0.3 0.5 0.65 V LMC6482I 0.3 0.5 0.65 LMC6482M 0.3 0.5 0.65 LMC6482AI 14.4 14.7 14.2 LMC6482I 14.4 14.7 14.2 V+=15V LMC6482M 14.4 14.7 14.2 RL=2kΩtoV+/2 LMC6482AI 0.16 0.32 0.45 V LMC6482I 0.16 0.32 0.45 LMC6482M 0.16 0.32 0.45 LMC6482AI 13.4 14.1 13 LMC6482I 13.4 14.1 13 V V+=15V LMC6482M 13.4 14.1 13 RL=600ΩtoV+/2 LMC6482AI 0.5 1 1.3 LMC6482I 0.5 1 1.3 V LMC6482M 0.5 1 1.3 LMC6482AI 16 20 12 Sourcing,V =0V LMC6482I 16 20 12 mA O OutputShort LMC6482M 16 20 10 I CircuitCurrent SC V+=5V LMC6482AI 11 15 9.5 Sinking,V =5V LMC6482I 11 15 9.5 mA O LMC6482M 11 15 8 LMC6482AI 28 30 22 Sourcing,V =0V LMC6482I 28 30 22 mA O OutputShort LMC6482M 28 30 20 I CircuitCurrent SC V+=15V LMC6482AI 30 30 24 Sinking, V =12V(6) LMC6482I 30 30 24 mA O LMC6482M 30 30 22 LMC6482AI 1 1.4 1.8 BothAmplifiers V+=+5V, LMC6482I 1 1.4 1.8 mA V =V+/2 Supply O LMC6482M 1 1.4 1.9 I S Current LMC6482AI 1.3 1.6 1.9 BothAmplifiers V+=15V, LMC6482I 1.3 1.6 1.9 mA V =V+/2 O LMC6482M 1.3 1.6 2 (6) DonotshortcircuitoutputtoV+,whenV+isgreaterthan13Vorreliabilitywillbeadverselyaffected. 6 SubmitDocumentationFeedback Copyright©1997–2015,TexasInstrumentsIncorporated ProductFolderLinks:LMC6482

LMC6482 www.ti.com SNOS674E–NOVEMBER1997–REVISEDAPRIL2015 Electrical Characteristics for V+ = 5 V (continued) Unlessotherwisespecified,alllimitsspecifiedforT =25°C,V+=5V,V−=0V,V =V =V+/2andR >1M. J CM O L AtTemperature PARAMETER TESTCONDITIONS TJ=25°C Extremes(1) UNIT MIN TYP(2) MAX(3) MIN TYP(2) MAX(3) ACElectricalCharacteristics See (7) LMC6482AI 1 1.3 0.7 V/μs SR SlewRate LMC6482I 0.9 1.3 0.63 LMC6482M 0.9 1.3 0.54 V/μs Gain- V+=15V GBW Bandwidth 1.5 MHz Product φ PhaseMargin 50 Deg m G GainMargin 15 dB m Amp-to-Amp See (8) 150 dB Isolation Input-Referred F=1kHz e 37 nV/√Hz n VoltageNoise V =1V cm Input-Referred F=1kHz I 0.03 pA/√Hz n CurrentNoise F=10kHz,A =−2 V R =10kΩ, 0.01% L Total VO=4.1VPP T.H.D. Harmonic F=10kHz,A =−2 V Distortion R =10kΩ, L 0.01% V =8.5V O PP V+=10V (7) V+=15V.ConnectedasVoltageFollowerwith10Vstepinput.Numberspecifiedistheslowerofeitherthepositiveornegativeslew rates. (8) Inputreferred,V+=15VandR =100kΩconnectedto7.5V.Eachampexcitedinturnwith1kHztoproduceV =12V . L O PP 6.6 Electrical Characteristics for V+ = 3 V Unlessotherwisespecified,alllimitsspecifiedforT =25°C,V+=3V,V−=0V,V =V =V+/2andR >1M. J CM O L AtTemperature PARAMETER TESTCONDITIONS TJ=25°C Extremes(1) UNIT MIN TYP(2) MAX(3) MIN TYP(2) MAX(3) DCElectricalCharacteristics LMC6482AI 0.9 2 2.7 InputOffset V LMC6482I 0.9 3 3.7 mV OS Voltage LMC6482M 0.9 3 3.8 InputOffset TCV Voltage 2 μV/°C OS AverageDrift InputBias 0.02 I pA B Current InputOffset 0.01 I pA OS Current Common LMC6482AI 64 74 Mode CMRR 0V≤V ≤3V LMC6482I 60 74 dB Rejection CM Ratio LMC6482M 60 74 (1) SeeRecommendedOperatingConditionsforoperatingtemperatureranges. (2) TypicalValuesrepresentthemostlikelyparametricnorm. (3) Alllimitsarespecifiedbytestingorstatisticalanalysis. Copyright©1997–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:LMC6482

LMC6482 SNOS674E–NOVEMBER1997–REVISEDAPRIL2015 www.ti.com Electrical Characteristics for V+ = 3 V (continued) Unlessotherwisespecified,alllimitsspecifiedforT =25°C,V+=3V,V−=0V,V =V =V+/2andR >1M. J CM O L AtTemperature PARAMETER TESTCONDITIONS TJ=25°C Extremes(1) UNIT MIN TYP(2) MAX(3) MIN TYP(2) MAX(3) LMC6482AI 68 80 PowerSupply 3V≤V+≤15V, PSRR Rejection V−=0V LMC6482I 60 80 dB Ratio LMC6482M 60 80 LMC6482AI V−−0.25 0 LMC6482I V−−0.25 0 V Input Common- ForCMRR≥50 LMC6482M V−−0.25 0 V CM ModeVoltage dB LMC6482AI V+ V++0.25 Range LMC6482I V+ V++0.25 V LMC6482M V+ V++0.25 2.8 V R =2kΩtoV+/2 L 0.2 V LMC6482AI 2.5 2.7 LMC6482I 2.5 2.7 V V OutputSwing O R =600Ωto LMC6482M 2.5 2.7 L V+/2 LMC6482AI 0.37 0.6 LMC6482I 0.37 0.6 V LMC6482M 0.37 0.6 LMC6482AI 0.825 1.2 1.5 I SupplyCurrent BothAmplifiers LMC6482I 0.825 1.2 1.5 mA S LMC6482M 0.825 1.2 1.6 ACElectricalCharacteristics SR SlewRate See (4) 0.9 V/μs Gain- 1 MHz GBW Bandwidth Product Total F=10kHz,A =−2 V T.H.D. Harmonic R =10kΩ,V =2V 0.01% L O PP Distortion (4) ConnectedasvoltageFollowerwith2-Vstepinput.Numberspecifiedistheslowerofeitherthepositiveornegativeslewrates. 8 SubmitDocumentationFeedback Copyright©1997–2015,TexasInstrumentsIncorporated ProductFolderLinks:LMC6482

LMC6482 www.ti.com SNOS674E–NOVEMBER1997–REVISEDAPRIL2015 6.7 Typical Characteristics V =15V,SingleSupply,T =25°Cunlessotherwisespecified S A Figure1.SupplyCurrentvs.SupplyVoltage Figure2.InputCurrentvs.Temperature Figure3.SourcingCurrentvs.OutputVoltage Figure4.SourcingCurrentvs.OutputVoltage Figure5.SourcingCurrentvs.OutputVoltage Figure6.SinkingCurrentvs.OutputVoltage Copyright©1997–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:LMC6482

LMC6482 SNOS674E–NOVEMBER1997–REVISEDAPRIL2015 www.ti.com Typical Characteristics (continued) V =15V,SingleSupply,T =25°Cunlessotherwisespecified S A Figure7.SinkingCurrentvs.OutputVoltage Figure8.SinkingCurrentvs.OutputVoltage Figure10.InputVoltageNoisevs.Frequency Figure9.OutputVoltageSwingvs.SupplyVoltage Figure11.InputVoltageNoisevs.InputVoltage Figure12.InputVoltageNoisevs.InputVoltage 10 SubmitDocumentationFeedback Copyright©1997–2015,TexasInstrumentsIncorporated ProductFolderLinks:LMC6482

LMC6482 www.ti.com SNOS674E–NOVEMBER1997–REVISEDAPRIL2015 Typical Characteristics (continued) V =15V,SingleSupply,T =25°Cunlessotherwisespecified S A Figure13.InputVoltageNoisevs.InputVoltage Figure14.CrosstalkRejectionvs.Frequency Figure15.CrosstalkRejectionvs.Frequency Figure16.PositivePSRRvs.Frequency Figure17.NegativePSRRvs.Frequency Figure18.CMRRvs.Frequency Copyright©1997–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:LMC6482

LMC6482 SNOS674E–NOVEMBER1997–REVISEDAPRIL2015 www.ti.com Typical Characteristics (continued) V =15V,SingleSupply,T =25°Cunlessotherwisespecified S A Figure19.CMRRvs.InputVoltage Figure20.CMRRvs.InputVoltage Figure21.CMRRvs.InputVoltage Figure22.Δv vs.CMR OS Figure23.Δv vs.CMR Figure24.InputVoltagevs.OutputVoltage OS 12 SubmitDocumentationFeedback Copyright©1997–2015,TexasInstrumentsIncorporated ProductFolderLinks:LMC6482

LMC6482 www.ti.com SNOS674E–NOVEMBER1997–REVISEDAPRIL2015 Typical Characteristics (continued) V =15V,SingleSupply,T =25°Cunlessotherwisespecified S A Figure25.InputVoltagevs.OutputVoltage Figure26.Open-LoopFrequencyResponse Figure27.Open-LoopFrequencyResponse Figure28.Open-LoopFrequencyResponsevs.Temperature Figure29.MaximumOutputSwingvs.Frequency Figure30.GainandPhasevs.CapacitiveLoad Copyright©1997–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:LMC6482

LMC6482 SNOS674E–NOVEMBER1997–REVISEDAPRIL2015 www.ti.com Typical Characteristics (continued) V =15V,SingleSupply,T =25°Cunlessotherwisespecified S A Figure31.GainandPhasevs.CapacitiveLoad Figure32.Open-LoopOutputImpedancevs.Frequency Figure33.Open-LoopOutputImpedancevs.Frequency Figure34.SlewRatevs.SupplyVoltage Figure35.NoninvertingLargeSignalPulseResponse Figure36.NoninvertingLargeSignalPulseResponse 14 SubmitDocumentationFeedback Copyright©1997–2015,TexasInstrumentsIncorporated ProductFolderLinks:LMC6482

LMC6482 www.ti.com SNOS674E–NOVEMBER1997–REVISEDAPRIL2015 Typical Characteristics (continued) V =15V,SingleSupply,T =25°Cunlessotherwisespecified S A Figure37.NoninvertingLargeSignalPulseResponse Figure38.NoninvertingSmallSignalPulseResponse Figure39.NoninvertingSmallSignalPulseResponse Figure40.NoninvertingSmallSignalPulseResponse Figure41.InvertingLargeSignalPulseResponse Figure42.InvertingLargeSignalPulseResponse Copyright©1997–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:LMC6482

LMC6482 SNOS674E–NOVEMBER1997–REVISEDAPRIL2015 www.ti.com Typical Characteristics (continued) V =15V,SingleSupply,T =25°Cunlessotherwisespecified S A Figure43.InvertingLargeSignalPulseResponse Figure44.InvertingSmallSignalPulseResponse Figure45.InvertingSmallSignalPulseResponse Figure46.InvertingSmallSignalPulseResponse Figure47.Stabilityvs.CapacitiveLoad Figure48.Stabilityvs.CapacitiveLoad 16 SubmitDocumentationFeedback Copyright©1997–2015,TexasInstrumentsIncorporated ProductFolderLinks:LMC6482

LMC6482 www.ti.com SNOS674E–NOVEMBER1997–REVISEDAPRIL2015 Typical Characteristics (continued) V =15V,SingleSupply,T =25°Cunlessotherwisespecified S A Figure49.Stabilityvs.CapacitiveLoad Figure50.Stabilityvs.CapacitiveLoad Figure51.Stabilityvs.CapacitiveLoad Figure52.Stabilityvs.CapacitiveLoad Copyright©1997–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 17 ProductFolderLinks:LMC6482

LMC6482 SNOS674E–NOVEMBER1997–REVISEDAPRIL2015 www.ti.com 7 Detailed Description 7.1 Overview The LMC6482 is a dual CMOS operational amplifier that supports both rail-to-rail inputs and outputs. It may be operatedinbothdualsupplymodeandsinglesupplymode. 7.2 Functional Block Diagram 7.3 Feature Description 7.3.1 AmplifierTopology The LMC6482 incorporates specially designed wide-compliance range current mirrors and the body effect to extendinputcommon-moderangetoeachsupplyrail.Complementaryparalleleddifferentialinputstages,likethe type used in other CMOS and bipolar rail-to-rail input amplifiers, were not used because of their inherent accuracyproblemsduetoCMRR,crossoverdistortion,andopen-loopgainvariation. The LMC6482s input stage design is complemented by an output stage capable of rail-to-rail output swing even when driving a large load. Rail-to-rail output swing is obtained by taking the output directly from the internal integratorinsteadofanoutputbufferstage. 7.3.2 InputCommon-ModeVoltageRange Unlike Bi-FET amplifier designs, the LMC6482 does not exhibit phase inversion when an input voltage exceeds the negative supply voltage. Figure 53 shows an input voltage exceeding both supplies with no resulting phase inversionontheoutput. AninputvoltagesignalexceedsthelMC6482powersupplyvoltageswithnooutputphaseinversion. Figure53. InputVoltage The absolute maximum input voltage is 300 mV beyond either supply rail at room temperature. Voltages greatly exceeding this absolute maximum rating, as in Figure 54, can cause excessive current to flow in or out of the inputpinspossiblyaffectingreliability. 18 SubmitDocumentationFeedback Copyright©1997–2015,TexasInstrumentsIncorporated ProductFolderLinks:LMC6482

LMC6482 www.ti.com SNOS674E–NOVEMBER1997–REVISEDAPRIL2015 Feature Description (continued) A±7.5-Vinputsignalgreatlyexceedsthe3-VsupplyinFigure55causingnophaseinversionduetoR. I Figure54. InputSignal Applications that exceed this rating must externally limit the maximum input current to ±5 mA with an input resistor(R)asshowninFigure55. I R inputcurrentprotectionforvoltagesexceedingthesupplyvoltages. I Figure55. R InputCurrentProtectionfor I VoltagesExceedingtheSupplyVoltages 7.3.3 Rail-to-RailOutput TheapproximatedoutputresistanceoftheLMC6482is180-Ωsourcingand13-0Ω sinkingatV =3Vand110-Ω S sourcing and 80-Ω sinking at Vs = 5 V. Using the calculated output resistance, maximum output voltage swing canbeestimatedasafunctionofload. 7.4 Device Functional Modes The LMC6482 may be used in applications where each amplifier channel is used independently, or in applicationsinwhichthechannelsarecascaded.SeeTypicalApplicationsformoreinformation. Copyright©1997–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 19 ProductFolderLinks:LMC6482

LMC6482 SNOS674E–NOVEMBER1997–REVISEDAPRIL2015 www.ti.com 8 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validateandtesttheirdesignimplementationtoconfirmsystemfunctionality. 8.1 Application Information 8.1.1 UpgradingApplications The LMC6484 quads and LMC6482 duals have industry-standard pin outs to retrofit existing applications. System performance can be greatly increased by the features of the LMC6482. The key benefit of designing in the LMC6482 is increased linear signal range. Most op-amps have limited input common-mode ranges. Signals that exceed this range generate a nonlinear output response that persists long after the input signal returns to thecommon-moderange. Linear signal range is vital in applications such as filters where signal peaking can exceed input common-mode rangesresultinginoutputphaseinversionorseveredistortion. 8.1.2 DataAcquisitionSystems Low power, single supply data acquisition system solutions are provided by buffering the ADC12038 with the LMC6482 (Figure 56). Capable of using the full supply range, the LMC6482 does not require input signals to be scaled down to meet limited common-mode voltage ranges. The LMC4282 CMRR of 82 dB maintains integral linearity of a 12-bit data acquisition system to ±0.325 LSB. Other rail-to-rail input amplifiers with only 50 dB of CMRRwilldegradetheaccuracyofthedataacquisitionsystemtoonly8bits. Operatingfromthesamesupplyvoltage,theLMC6482bufferstheADC12038maintainingexcellentaccuracy. Figure56. BufferingtheADC12038WiththeLMC6482 20 SubmitDocumentationFeedback Copyright©1997–2015,TexasInstrumentsIncorporated ProductFolderLinks:LMC6482

LMC6482 www.ti.com SNOS674E–NOVEMBER1997–REVISEDAPRIL2015 Application Information (continued) 8.1.3 InstrumentationCircuits The LMC6482 has the high input impedance, large common-mode range and high CMRR needed for designing instrumentation circuits. Instrumentation circuits designed with the LMC6482 can reject a larger range of common-mode signals than most in-amps. This makes instrumentation circuits designed with the LMC6482 an excellent choice of noisy or industrial environments. Other applications that benefit from these features include analyticmedicalinstruments,magneticfielddetectors,gasdetectors,andsilicon-basedtransducers. A small valued potentiometer is used in series with R to set the differential gain of the 3-op-amp instrumentation g circuit in Figure 57. This combination is used instead of one large valued potentiometer to increase gain trim accuracyandreduceerrorduetovibration. Figure57. LowPower3-Op-AmpInstrumentationAmplifier A 2-op-amp instrumentation amplifier designed for a gain of 100 is shown in Figure 58. Low sensitivity trimming is made for offset voltage, CMRR, and gain. Low cost and low power consumption are the main advantages of this2-op-ampcircuit. Higher frequency and larger common-mode range applications are best facilitated by a 3-op-amp instrumentation amplifier. Figure58. Low-PowerTwo-Op-AmpInstrumentationAmplifier 8.1.4 SpiceMacromodel AspicemacromodelisavailablefortheLMC6482.Thismodelincludesaccuratesimulationofthefollowing: • Inputcommon-modevoltagerange • Frequencyandtransientresponse • GBWdependenceonloadingconditions • Quiescentanddynamicsupplycurrent • Outputswingdependenceonloadingconditions Manymorecharacteristicsarelistedonthemacromodeldisk. Copyright©1997–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 21 ProductFolderLinks:LMC6482

LMC6482 SNOS674E–NOVEMBER1997–REVISEDAPRIL2015 www.ti.com Application Information (continued) ContactyourlocalTIsalesofficetoobtainanoperationalamplifierspicemodellibrarydisk. 8.2 Typical Applications 8.2.1 3-VSingleSupplyBufferCircuit Figure59. 3-VSingleSupplyBufferCircuit 8.2.1.1 DesignRequirements Forbestperformance,ensurethattheinputvoltageswingisbetweenV+andV-. Ensurethattheinputdoesnotexceedthecommon-modeinputrange. To reduce the risk of destabilizing the output, use resistive isolation on the output when driving capacitive loads (seetheDetailedDesignProceduresection). When large feedback resistors are used, it may be necessary to compensate for parasitic capacitance on the input.SeetheDetailedDesignProceduresection. 8.2.1.2 DetailedDesignProcedure 8.2.1.2.1 CapacitiveLoadCompensation Capacitive load compensation can be accomplished using resistive isolation as shown in Figure 60. This simple techniqueisusefulforisolatingthecapacitiveinputsofmultiplexersandA/Dconverters. Figure60. ResistiveIsolationofa330-pFCapacitiveLoad Figure61. PulseResponseoftheLMC6482CircuitinFigure60 22 SubmitDocumentationFeedback Copyright©1997–2015,TexasInstrumentsIncorporated ProductFolderLinks:LMC6482

LMC6482 www.ti.com SNOS674E–NOVEMBER1997–REVISEDAPRIL2015 Typical Applications (continued) 8.2.1.2.1.1 CapacitiveLoadTolerance The LMC6482 can typically directly drive a 100-pF load with V = 15 V at unity gain without oscillating. The unity S gain follower is the most sensitive configuration. Direct capacitive loading reduces the phase margin of op-amps. The combination of the output impedance of the op-amp and the capacitive load induces phase lag. This results ineitheranunderdampedpulseresponseoroscillation. Improvedfrequencyresponseisachievedbyindirectlydrivingcapacitiveloads,asshowninFigure62. Compensatedtohandlea330pFcapacitiveload. Figure62. LMC6482NoninvertingAmplifier R1 and C1 serve to counteract the loss of phase margin by feeding forward the high-frequency component of the output signal back to the amplifiers inverting input, thereby preserving phase margin in the overall feedback loop. The values of R1 and C1 are experimentally determined for the desired pulse response. The resulting pulse responseisshowninFigure63. Figure63. PulseResponseof Lmc6482CircuitinFigure62 8.2.1.2.1.2 CompensatingForInputCapacitance It is quite common to use large values of feedback resistance with amplifiers that have ultralow input current, like the LMC6482. Large feedback resistors can react with small values of input capacitance due to transducers, photodiodes,andcircuitsboardparasiticstoreducephasemargins. Copyright©1997–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 23 ProductFolderLinks:LMC6482

LMC6482 SNOS674E–NOVEMBER1997–REVISEDAPRIL2015 www.ti.com Typical Applications (continued) Figure64. CancelingtheEffectofInputCapacitance The effect of input capacitance can be compensated for by adding a feedback capacitor. The feedback capacitor (asinFigure64),C,isfirstestimatedby: f (1) or R C ≤R C (2) 1 IN 2 f whichtypicallyprovidessignificantovercompensation. Printed-circuit-board stray capacitance may be larger or smaller than that of a bread-board, so the actual optimum value for C may be different. The values of C should be checked on the actual circuit. (Refer to the f f LMC660quadCMOSamplifierdatasheetforamoredetaileddiscussion.) 8.2.1.2.1.3 OffsetVoltageAdjustment Offset voltage adjustment circuits are illustrated in Figure 65 and Figure 66. Large value resistances and potentiometers are used to reduce power consumption while providing typically ±2.5 mV of adjustment range, referredtotheinput,forbothconfigurationswithV =±5V. S V+ R4 R3 5V 500 k: VIN - 1 1 M: 2 LMC6482 VOUT 1 k: + -5V 499: 500 k: V- VVOIUNT = -RR43 V- Figure65. InvertingConfigurationOffsetVoltageAdjustment Figure66. NoninvertingConfigurationOffsetVoltageAdjustment 24 SubmitDocumentationFeedback Copyright©1997–2015,TexasInstrumentsIncorporated ProductFolderLinks:LMC6482

LMC6482 www.ti.com SNOS674E–NOVEMBER1997–REVISEDAPRIL2015 Typical Applications (continued) 8.2.1.3 ApplicationCurves Figure67.Rail-To-RailInput Figure68.Rail-To-RailOutput 8.2.2 TypicalSingle-SupplyApplications The circuit in Figure 69 uses a single supply to half-wave rectify a sinusoid centered about ground. R limits I current into the amplifier caused by the input voltage exceeding the supply voltage. Full-wave rectification is providedbythecircuitinFigure71. Figure69.Half-WaveRectifierWithInputCurrent Figure70.Half-WaveRectifierWaveform Protection(R) I Copyright©1997–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 25 ProductFolderLinks:LMC6482

LMC6482 SNOS674E–NOVEMBER1997–REVISEDAPRIL2015 www.ti.com Typical Applications (continued) In Figure 75 dielectric absorption and leakage is minimized by using a polystyrene or polyethylene hold capacitor. The droop rate is primarily determined by the value of C and diode leakage current. The ultralow H inputcurrentoftheLMC6482hasanegligibleeffectondroop. Figure71.Full-WaveRectifierWithInputCurrent Figure72.Full-WaveRectifierWaveform Protection(R) I Figure73.LargeComplianceRangeCurrent Figure74.PositiveSupplyCurrentSense Source Figure75.Low-VoltagePeakDetectorWithRail-To-RailPeakCaptureRange 26 SubmitDocumentationFeedback Copyright©1997–2015,TexasInstrumentsIncorporated ProductFolderLinks:LMC6482

LMC6482 www.ti.com SNOS674E–NOVEMBER1997–REVISEDAPRIL2015 Typical Applications (continued) The high CMRR (82 dB) of the LMC6482 allows excellent accuracy throughout the rail-to-rail dynamic capture rangeofthecircuit. Figure76. Rail-To-RailSampleandHold The low-pass filter circuit in Figure 77 can be used as an anti-aliasing filter with the same voltage supply as the A/Dconverter. Filter designs can also take advantage of the LMC6482 ultralow input current. The ultralow input current yields negligible offset error even when large value resistors are used. This in turn allows the use of smaller valued capacitorswhichtakelessboardspaceandcostless. Figure77. Rail-To-RailSingleSupplyLowPassFilter Copyright©1997–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 27 ProductFolderLinks:LMC6482

LMC6482 SNOS674E–NOVEMBER1997–REVISEDAPRIL2015 www.ti.com 9 Power Supply Recommendations The LMC6482 can be operated over a supply range of 3 V to 15 V. To achieve noise immunity as appropriate to the application, it is important to use good PCB layout practices for power supply rails and planes, as well as usingbypasscapacitorsconnectedbetweenthepowersupplypinsandground. 10 Layout 10.1 Layout Guidelines It is generally recognized that any circuit which must operate with less than 1000 pA of leakage current requires special layout of the PC board. When one wishes to take advantage of the ultralow input current of the LMC6482, typically less than 20 fA, it is essential to have an excellent layout. Fortunately, the techniques of obtaining low leakages are quite simple. First, the user must not ignore the surface leakage of the PCB, even through it may sometimes appear acceptably low, because under conditions of high humidity or dust or contamination,thesurfaceleakagewillbeappreciable. To minimize the effect of any surface leakage, lay out a ring of foil completely surrounding the LM6482s inputs and the terminals of capacitors, diodes, conductors, resistors, relay terminals, and so forth connected to the inputs of the op-amp, as in Figure 78. To have a significant effect, guard rings should be placed on both the top and bottom of the PCB. This PC foil must then be connected to a voltage which is at the same voltage as the amplifier inputs, because no leakage current can flow between two points at the same potential. For example, a PCB trace-to-pad resistance of 1012 Ω, which is normally considered a very large resistance, could leak 5 pA if the trace were a 5-V bus adjacent to the pad of the input. This would cause a 250 times degradation from the actual performance of the LMC6482. However, if a guard ring is held within 5 mV of the inputs, then even a resistance of 1011 Ω would cause only 0.05 pA of leakage current. See Figure 79 through Figure 81 for typical connectionsofguardringsforstandardop-ampconfigurations. The designer should be aware that when it is inappropriate to lay out a PCB for the sake of just a few circuits, another technique is even better than a guard ring on a PCB: Do not insert the input pin of the amplifier into the PCB at all, but bend it up in the air and use only air as an insulator. Air is an excellent insulator. In this case you may have to forego some of the advantages of PCB construction, but the advantages are sometimes well worth theeffortofusingpoint-to-pointup-in-the-airwiring.SeeFigure82. 10.2 Layout Example Figure78. ExampleofGuardRinginPCBLayoutTypicalConnectionsofGuardRings 28 SubmitDocumentationFeedback Copyright©1997–2015,TexasInstrumentsIncorporated ProductFolderLinks:LMC6482

LMC6482 www.ti.com SNOS674E–NOVEMBER1997–REVISEDAPRIL2015 Layout Example (continued) Figure79. InvertingAmplifierTypicalConnectionsofGuardRings Figure80. NoninvertingAmplifierTypicalConnectionsofGuardRings Figure81. FollowerTypicalConnectionsofGuardRings (InputpinsareliftedoutofPCBandsoldereddirectlytocomponents.AllotherpinsconnectedtoPCB.) Figure82. AirWiring Copyright©1997–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 29 ProductFolderLinks:LMC6482

LMC6482 SNOS674E–NOVEMBER1997–REVISEDAPRIL2015 www.ti.com 11 Device and Documentation Support 11.1 Trademarks Alltrademarksarethepropertyoftheirrespectiveowners. 11.2 Electrostatic Discharge Caution Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. 11.3 Glossary SLYZ022—TIGlossary. Thisglossarylistsandexplainsterms,acronyms,anddefinitions. 12 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of thisdocument.Forbrowser-basedversionsofthisdatasheet,refertotheleft-handnavigation. 30 SubmitDocumentationFeedback Copyright©1997–2015,TexasInstrumentsIncorporated ProductFolderLinks:LMC6482

PACKAGE OPTION ADDENDUM www.ti.com 22-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) LMC6482AIM NRND SOIC D 8 95 TBD Call TI Call TI -40 to 85 LMC64 82AIM LMC6482AIM/NOPB ACTIVE SOIC D 8 95 Green (RoHS SN Level-1-260C-UNLIM -40 to 85 LMC64 & no Sb/Br) 82AIM LMC6482AIMX NRND SOIC D 8 2500 TBD Call TI Call TI -40 to 85 LMC64 82AIM LMC6482AIMX/NOPB ACTIVE SOIC D 8 2500 Green (RoHS SN Level-1-260C-UNLIM -40 to 85 LMC64 & no Sb/Br) 82AIM LMC6482AIN/NOPB ACTIVE PDIP P 8 40 Green (RoHS SN Level-1-NA-UNLIM -40 to 85 LMC64 & no Sb/Br) 82AIN LMC6482IM NRND SOIC D 8 95 TBD Call TI Call TI -40 to 85 LMC64 82IM LMC6482IM/NOPB ACTIVE SOIC D 8 95 Green (RoHS SN Level-1-260C-UNLIM -40 to 85 LMC64 & no Sb/Br) 82IM LMC6482IMM NRND VSSOP DGK 8 1000 TBD Call TI Call TI -40 to 85 A10 LMC6482IMM/NOPB ACTIVE VSSOP DGK 8 1000 Green (RoHS SN Level-1-260C-UNLIM -40 to 85 A10 & no Sb/Br) LMC6482IMMX NRND VSSOP DGK 8 3500 TBD Call TI Call TI -40 to 85 A10 LMC6482IMMX/NOPB ACTIVE VSSOP DGK 8 3500 Green (RoHS SN Level-1-260C-UNLIM -40 to 85 A10 & no Sb/Br) LMC6482IMX NRND SOIC D 8 2500 TBD Call TI Call TI -40 to 85 LMC64 82IM LMC6482IMX/NOPB ACTIVE SOIC D 8 2500 Green (RoHS SN Level-1-260C-UNLIM -40 to 85 LMC64 & no Sb/Br) 82IM LMC6482IN/NOPB ACTIVE PDIP P 8 40 Green (RoHS Call TI | SN Level-1-NA-UNLIM -40 to 85 LMC6482IN & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 22-Feb-2020 (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 29-Sep-2019 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) LMC6482AIMX SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LMC6482AIMX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LMC6482IMM VSSOP DGK 8 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LMC6482IMM/NOPB VSSOP DGK 8 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LMC6482IMMX VSSOP DGK 8 3500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LMC6482IMMX/NOPB VSSOP DGK 8 3500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LMC6482IMX SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LMC6482IMX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 29-Sep-2019 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) LMC6482AIMX SOIC D 8 2500 367.0 367.0 35.0 LMC6482AIMX/NOPB SOIC D 8 2500 367.0 367.0 35.0 LMC6482IMM VSSOP DGK 8 1000 210.0 185.0 35.0 LMC6482IMM/NOPB VSSOP DGK 8 1000 210.0 185.0 35.0 LMC6482IMMX VSSOP DGK 8 3500 367.0 367.0 35.0 LMC6482IMMX/NOPB VSSOP DGK 8 3500 367.0 367.0 35.0 LMC6482IMX SOIC D 8 2500 367.0 367.0 35.0 LMC6482IMX/NOPB SOIC D 8 2500 367.0 367.0 35.0 PackMaterials-Page2

PACKAGE OUTLINE D0008A SOIC - 1.75 mm max height SCALE 2.800 SMALL OUTLINE INTEGRATED CIRCUIT C SEATING PLANE .228-.244 TYP [5.80-6.19] .004 [0.1] C A PIN 1 ID AREA 6X .050 [1.27] 8 1 2X .189-.197 [4.81-5.00] .150 NOTE 3 [3.81] 4X (0 -15 ) 4 5 8X .012-.020 B .150-.157 [0.31-0.51] .069 MAX [3.81-3.98] .010 [0.25] C A B [1.75] NOTE 4 .005-.010 TYP [0.13-0.25] 4X (0 -15 ) SEE DETAIL A .010 [0.25] .004-.010 0 - 8 [0.11-0.25] .016-.050 [0.41-1.27] DETAIL A (.041) TYPICAL [1.04] 4214825/C 02/2019 NOTES: 1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed .006 [0.15] per side. 4. This dimension does not include interlead flash. 5. Reference JEDEC registration MS-012, variation AA. www.ti.com

EXAMPLE BOARD LAYOUT D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM SEE DETAILS 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:8X SOLDER MASK SOLDER MASK METAL OPENING OPENING METAL UNDER SOLDER MASK EXPOSED METAL EXPOSED METAL .0028 MAX .0028 MIN [0.07] [0.07] ALL AROUND ALL AROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED SOLDER MASK DETAILS 4214825/C 02/2019 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] SOLDER PASTE EXAMPLE BASED ON .005 INCH [0.125 MM] THICK STENCIL SCALE:8X 4214825/C 02/2019 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com

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