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  • 型号: LM7372MR
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LM7372MR产品简介:

ICGOO电子元器件商城为您提供LM7372MR由Texas Instruments设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 LM7372MR价格参考。Texas InstrumentsLM7372MR封装/规格:线性 - 放大器 - 仪表,运算放大器,缓冲器放大器, 电压反馈 放大器 2 电路 8-SO PowerPad。您可以下载LM7372MR参考资料、Datasheet数据手册功能说明书,资料中有LM7372MR 详细功能的应用电路图电压和使用方法及教程。

产品参数 图文手册 常见问题
参数 数值
-3db带宽

220MHz

产品目录

集成电路 (IC)

描述

IC OPAMP VFB 120MHZ 8SOPWRPAD

产品分类

Linear - Amplifiers - Instrumentation, OP Amps, Buffer Amps

品牌

Texas Instruments

数据手册

点击此处下载产品Datasheet

产品图片

产品型号

LM7372MR

PCN设计/规格

点击此处下载产品Datasheet

rohs

含铅 / 不符合限制有害物质指令(RoHS)规范要求

产品系列

VIP™ III

供应商器件封装

8-SO PowerPad

包装

管件

压摆率

3000 V/µs

增益带宽积

120MHz

安装类型

表面贴装

封装/外壳

8-SOIC(0.154",3.90mm 宽)裸焊盘

工作温度

-40°C ~ 85°C

放大器类型

电压反馈

标准包装

95

电压-电源,单/双 (±)

9 V ~ 36 V, ±4.5 V ~ 18 V

电压-输入失调

2mV

电流-电源

13mA

电流-输入偏置

2.7µA

电流-输出/通道

260mA

电路数

2

设计资源

http://www.digikey.com/product-highlights/cn/zh/texas-instruments-webench-design-center/3176

输出类型

-

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PDF Datasheet 数据手册内容提取

Product Sample & Technical Tools & Support & Folder Buy Documents Software Community LM7372 SNOS926F–MAY1999–REVISEDSEPTEMBER2014 LM7372 High Speed, High Output Current, Dual Operational Amplifier 1 Features 3 Description • −80dBcHighestHarmonicDistortion@1MHz, The LM7372 is a high speed dual voltage feedback 1 amplifier with the slewing characteristic of current 2V PP feedback amplifiers. However, it can be used in all • VeryHighSlewRate:3000V/µs traditionalvoltagefeedbackamplifierconfigurations. • WideGainBandwidthProduct:120MHz The LM7372 is stable for gains as low as +2 or −1. It • −3dBFrequency@A =+2:200MHz V provides a very high slew rate at 3000 V/µs and a • LowSupplyCurrent:13mA(bothamplifiers) wide gain bandwidth product of 120 MHz, while consuming only 6.5 mA/per amplifier of supply • HighOpenLoopGain:85dB current. It is ideal for video and high speed signal • HighOutputCurrent:150mA processing applications such as xDSL and pulse • DifferentialGainandPhase:0.01%,0.02° amplifiers. With 150 mA output current, the LM7372 can be used for video distribution, as a transformer 2 Applications driverorasalaserdiodedriver. • HDSLandADSLDrivers Operation on ±15 V power supplies allows for large • MultimediaBroadcastSystems signal swings and provides greater dynamic range and signal-to-noise ratio. The LM7372 offers high • ProfessionalVideoCameras SFDR and low THD, ideal for ADC/DAC systems. In • CATV/FiberOpticsSignalProcessing addition, the LM7372 is specified for ±5 V operation • PulseAmplifiersandPeakDetectors forportableapplications. • HDTVAmplifiers The LM7372 is built on TI's Advance VIP™ III (Vertically integrated PNP) complementary bipolar process. DeviceInformation(1) PARTNUMBER PACKAGE BODYSIZE(NOM) LM7372 DDA(8) 4.90mm×3.91mm LM7372 D(16) 9.90mm×3.91mm (1) For all available packages, see the orderable addendum at theendofthedatasheet. SingleSupplyApplication(16-PinSOIC) HarmonicDistortionvsFrequency -50 VCC VS = ±12V + VIN 0V.CC1C1uF 54 +L-M17/13247 2+ 0.C16u3F 2C07uF )cBd( NOITR -70 AVRLOV = == 1 220V0P-P HD2 R9 O R3 50 TS 10R.12k 5.1k R25k 1:1 PTawiris Lteinde ID CINO -90 HD3 R6 M 2k 100 R + R2 R27k AH C3 10.2k 47uF R4 R8 5.1k 50 -110 12 - C2 1/2 13 100k 1M 10M 0.1uF LM7372 - VIN 11 + 6 FREQUENCY (Hz) 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA.

LM7372 SNOS926F–MAY1999–REVISEDSEPTEMBER2014 www.ti.com Table of Contents 1 Features.................................................................. 1 7 DetailedDescription............................................ 12 2 Applications........................................................... 1 7.1 FunctionalBlockDiagram.......................................12 3 Description............................................................. 1 8 ApplicationandImplementation........................ 13 4 RevisionHistory..................................................... 2 8.1 ApplicationInformation............................................13 5 PinConfigurationandFunctions......................... 3 8.2 TypicalApplication..................................................13 8.3 ApplicationDetails...................................................14 6 Specifications......................................................... 4 9 PowerSupplyRecommendations...................... 20 6.1 AbsoluteMaximumRatings......................................4 6.2 HandlingRatings.......................................................4 10 Layout................................................................... 21 6.3 RecommendedOperatingConditions(1)...................4 10.1 LayoutGuidelines.................................................21 6.4 ThermalInformation..................................................4 11 DeviceandDocumentationSupport................. 21 6.5 ±15VDCElectricalCharacteristics..........................5 11.1 Trademarks...........................................................21 6.6 ±15VACElectricalCharacteristics..........................6 11.2 ElectrostaticDischargeCaution............................21 6.7 ±5VDCElectricalCharacteristics............................6 11.3 Glossary................................................................21 6.8 ±5VACElectricalCharacteristics............................7 12 Mechanical,Packaging,andOrderable 6.9 TypicalPerformanceCharacteristics........................8 Information........................................................... 21 4 Revision History NOTE:Pagenumbersforpreviousrevisionsmaydifferfrompagenumbersinthecurrentversion. ChangesfromRevisionE(March2013)toRevisionF Page • Changeddatasheetstructureandorganization.Added,updated,orrenamedthefollowingsections:Device InformationTable,PinConfigurationandFunctions,ApplicationandImplementation;DeviceandDocumentation Support;Mechanical,Packaging,andOrderingInformation.................................................................................................. 1 • Changed"JunctionTemperatureRange"to"OperatingTemperatureRange"...................................................................... 4 • DeletedT =25°CforElectricalCharacteristicstables.......................................................................................................... 5 J ChangesfromRevisionD(March2013)toRevisionE Page • ChangedlayoutofNationalDataSheettoTIformat........................................................................................................... 21 2 SubmitDocumentationFeedback Copyright©1999–2014,TexasInstrumentsIncorporated ProductFolderLinks:LM7372

LM7372 www.ti.com SNOS926F–MAY1999–REVISEDSEPTEMBER2014 5 Pin Configuration and Functions NOTE For SO PowerPAD package the exposed pad should be tied either to V− or left electrically floating.DieattachmaterialisconductiveandisinternallytiedtoV−. *HeatsinkPins.(1) PackageDDA PackageD 8-PinSOPowerPAD 16-PinSOIC TopView TopView 1 8 + * 1 16 * OUT A V NC 2 15 NC A 2 - + 7 OUT A 3 A 14 V+ -IN A OUT B - + -INA 4 13 OUTB 3 6 +IN A 5 12 -IN B +IN A -IN B B B + - V- 6 + - 11 +IN B NC 7 10 NC V- 4 5 +IN B * 8 9 * PinFunctions PIN NUMBER I/O DESCRIPTION NAME DDA D * –– 1,8,9,16 –– HeatsinkPin -INA 2 4 I ChAInvertingInput +INA 3 5 I ChANon-invertingInput -INB 6 12 I ChBInvertingInput +INB 5 11 I ChBNon-invertingInput NC –– 2,7,10,15 –– NoConnection OUTA 1 3 O OutputA OUTB 7 13 O OutputB V- 4 6 I NegativeSupply V+ 8 14 I PositiveSupply (1) ThemaximumpowerdissipationisafunctionofT ,R ,andT .Themaximumallowablepowerdissipationatanyambient (JMAX) θJA A temperatureisP =(T –T )/R .AllnumbersapplyforpackagessoldereddirectlyintoaPCboard.ThevalueforR is D (JMAX) A θJA θJA 106°C/Wforthe16-PinSOICpackage.Withatotalareaof4sq.inof1ozCUconnectedtopins1,6,8,9&16,R forthe16-PinSOIC θJA isdecreasedto70°C/W.8-PinSOPowerPADpackageR iswith2in2heatsink(topandbottomlayereach)and1oz.copper(see θJA Table2andApplicationandImplementation) Copyright©1999–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:LM7372

LM7372 SNOS926F–MAY1999–REVISEDSEPTEMBER2014 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings(1)(2)(3) overoperatingfree-airtemperaturerange(unlessotherwisenoted) PARAMETER MIN MAX UNIT SuppyVoltage(V+−V−) 36 V DifferentialInputVoltage(V =±15V) ±10 V S OutputShortCircuittoGround(2) Continuous InfraredorConvectionReflow(20sec.) 235 °C SolderingInformation WaveSolderingLeadTemperature(10sec.) 260 °C InputVoltage V−toV+ V MaximumJunctionTemperature(4) 150 °C (1) AbsoluteMaximumRatingsindicatelimitsbeyondwhichdamagetothedevicemayoccur.OperatingRatingsindicateconditionsfor whichthedeviceisintendedtobefunctional,butspecificperformanceisnotensured.Forensuredspecificationsandthetest conditions,seetheElectricalCharacteristics. (2) Appliestobothsingle-supplyandsplit-supplyoperation.Continuousshortcircuitoperationatelevatedambienttemperaturecanresultin exceedingthemaximumallowedjunctiontemperatureof150°C. (3) IfMilitary/Aerospacespecifieddevicesarerequired,pleasecontacttheTexasInstrumentsSalesOffice/Distributorsforavailabilityand specifications. (4) ThemaximumpowerdissipationisafunctionofT ,R ,andT .Themaximumallowablepowerdissipationatanyambient (JMAX) θJA A temperatureisP =(T –T )/R .AllnumbersapplyforpackagessoldereddirectlyintoaPCboard.ThevalueforR is D (JMAX) A θJA θJA 106°C/Wforthe16-PinSOICpackage.Withatotalareaof4sq.inof1ozCUconnectedtopins1,6,8,9&16,R forthe16-PinSOIC θJA isdecreasedto70°C/W.8-PinSOPowerPADpackageR iswith2in2heatsink(topandbottomlayereach)and1oz.copper(see θJA Table2andApplicationandImplementation) 6.2 Handling Ratings MIN MAX UNIT T Storagetemperaturerange −65 150 °C stg Humanbodymodel(HBM),perANSI/ESDA/JEDECJS-001,all 1500 pins(2) V Electrostaticdischarge(1) V (ESD) Chargeddevicemodel(CDM),perJEDECspecification 200 JESD22-C101,allpins(3) (1) Fortestingpurposes,ESDwasappliedusinghumanbodymodel,1.5kΩinserieswith100pF.Machinemodel,0Ωinserieswith200pF. (2) JEDECdocumentJEP155statesthat1500-VHBMallowssafemanufacturingwithastandardESDcontrolprocess. (3) JEDECdocumentJEP157statesthat200-VCDMallowssafemanufacturingwithastandardESDcontrolprocess. 6.3 Recommended Operating Conditions(1) overoperatingfree-airtemperaturerange(unlessotherwisenoted) MIN MAX UNIT SupplyVoltage 9 36 V OperatingTemperatureRange −40 85 °C (1) AbsoluteMaximumRatingsindicatelimitsbeyondwhichdamagetothedevicemayoccur.OperatingRatingsindicateconditionsfor whichthedeviceisintendedtobefunctional,butspecificperformanceisnotensured.Forensuredspecificationsandthetest conditions,seetheElectricalCharacteristics. 6.4 Thermal Information DDA D THERMALMETRIC(1) UNIT 8PINS(2) 16PINS(2) R Junction-to-ambientthermalresistance 106 47 °C/W θJA (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheICPackageThermalMetricsapplicationreport,SPRA953. (2) ThemaximumpowerdissipationisafunctionofT ,R ,andT .Themaximumallowablepowerdissipationatanyambient (JMAX) θJA A temperatureisP =(T –T )/R .AllnumbersapplyforpackagessoldereddirectlyintoaPCboard.ThevalueforR is D (JMAX) A θJA θJA 106°C/Wforthe16-PinSOICpackage.Withatotalareaof4sq.inof1ozCUconnectedtopins1,6,8,9&16,R forthe16-PinSOIC θJA isdecreasedto70°C/W.8-PinSOPowerPADpackageR iswith2in2heatsink(topandbottomlayereach)and1oz.copper(see θJA Table2andApplicationandImplementation) 4 SubmitDocumentationFeedback Copyright©1999–2014,TexasInstrumentsIncorporated ProductFolderLinks:LM7372

LM7372 www.ti.com SNOS926F–MAY1999–REVISEDSEPTEMBER2014 6.5 ±15V DC Electrical Characteristics Unlessotherwisespecified,alllimitsensuredforV =0VandR =1kΩ.Boldfaceapplyatthetemperatureextremes. CM L PARAMETER TESTCONDITIONS MIN(1) TYP(2) MAX(1) UNIT V InputOffsetVoltage 8.0 mV OS 2.0 10.0 TCV InputOffsetVoltageAverageDrift 12 µV/°C OS I InputBiasCurrent 10 µA B 2.7 12 I InputOffsetCurrent 4.0 µA OS 0.1 6.0 R InputResistance CommonMode 40 MΩ IN DifferentialMode 3.3 MΩ R OpenLoopOutputResistance 15 Ω O CMRR CommonModeRejectionRatio V =±10V 75 dB CM 93 70 PSRR PowerSupplyRejectionRatio V =±15Vto±5V 75 dB S 90 70 V InputCommon-ModeVoltageRange CMRR>60dB ±13 V CM A LargeSignalVoltageGain(3) R =1kΩ 75 dB V L 85 70 R =100Ω 70 dB L 81 66 V OutputSwing R =1kΩ 13 V O L 13.4 12.7 −13 V −13.3 −12.7 I =−150mA 11.8 V OUT 12.4 11.4 I =150mA −11.2 V OUT −11.9 −10.8 I OutputShortCircuitCurrent Sourcing 260 mA SC Sinking 250 mA I SupplyCurrent(bothAmps) 17 mA S 13 19 (1) Alllimitsarespecifiedbytestingorstatisticalanalysis. (2) Typicalvaluesrepresentthemostlikelyparameticnorm. (3) Largesignalvoltagegainisthetotaloutputswingdividedbytheinputsignalrequiredtoproducethatswing.ForV =±15V,V =± S OUT 10V.ForV =±5V,V =±2V S OUT Copyright©1999–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:LM7372

LM7372 SNOS926F–MAY1999–REVISEDSEPTEMBER2014 www.ti.com 6.6 ±15V AC Electrical Characteristics Unlessotherwisespecified,alllimitsensuredforV =0VandR =1kΩ.Boldfaceapplyatthetemperatureextremes. CM L PARAMETER TESTCONDITIONS MIN(1) TYP(2) MAX(1) UNIT SR SlewRate(3) A =+2,V 13V 3000 V/µs V IN P-P A =+2,V 10V 2000 V IN P-P UnityBandwidthProduct 120 MHz −3dBFrequency A =+2 220 MHz V φ PhaseMargin A =6dB 70 deg m VOL t SettlingTime(0.1%) A =−1,A =±5V, ns S V O 50 R =500Ω L t PropagationDelay A =−2,V =±5V, ns P V IN 6.0 R =500Ω L A DifferentialGain(4) 0.01% D φ DifferentialPhase(4) 0.02 deg D hd2 SecondHarmonicDistortion V =2V ,R =100Ω −80 dBc OUT P-P L F =1MHz,A =+2 IN V V =16.8V ,R =100Ω −73 dBc OUT P-P L hd3 ThirdHarmonicDistortion V =2V ,R =100Ω −91 dBc OUT P-P L F =1MHz,A =+2 IN V V =16.8V ,R =100Ω −67 dBc OUT P-P L IMD IntermodulationDistortion Fin1=75kHz, dBc Fin2=85kHz −87 V =16.8V ,R =100Ω OUT P-P L e Input-ReferredVoltageNoise f=10kHz 14 nV/√Hz n i Input-ReferredCurrentNoise f=10kHz 1.5 pA/√Hz n (1) Alllimitsarespecifiedbytestingorstatisticalanalysis. (2) Typicalvaluesrepresentthemostlikelyparameticnorm. (3) SlewRateistheaverageoftherisingandfallingslewrates. (4) DifferentialgainandphasearemeasuredwithA =+2,V =1V at3.58MHzandoutputis150Ωterminated. V IN PP 6.7 ±5V DC Electrical Characteristics Unlessotherwisespecified,alllimitsensuredforV =0VandR =1kΩ.Boldfaceapplyatthetemperatureextremes. CM L PARAMETER TESTCONDITIONS MIN(1) TYP(2) MAX(1) UNIT V InputOffsetVoltage 8.0 mV OS 2.2 10.0 TCV InputOffsetVoltageAverageDrift 12 µV/°C OS I InputBiasCurrent 10 µA B 3.3 12 I InputOffsetCurrent 4 µA OS 0.1 6 R InputResistance CommonMode 40 MΩ IN DifferentialMode 3.3 MΩ R OpenLoopOutputResistance 15 Ω O CMRR CommonModeRejectionRatio V =±2.5V 70 dB CM 90 65 PSRR PowerSupplyRejectionRatio V =±15Vto±5V 75 dB S 90 70 V InputCommon-ModeVoltageRange CMRR>60dB ±3 V CM A LargeSignalVoltageGain(3) R =1kΩ 70 dB V L 78 65 R =100Ω 64 dB L 72 60 (1) Alllimitsarespecifiedbytestingorstatisticalanalysis. (2) Typicalvaluesrepresentthemostlikelyparameticnorm. (3) Largesignalvoltagegainisthetotaloutputswingdividedbytheinputsignalrequiredtoproducethatswing.ForV =±15V,V =± S OUT 10V.ForV =±5V,V =±2V S OUT 6 SubmitDocumentationFeedback Copyright©1999–2014,TexasInstrumentsIncorporated ProductFolderLinks:LM7372

LM7372 www.ti.com SNOS926F–MAY1999–REVISEDSEPTEMBER2014 ±5V DC Electrical Characteristics (continued) Unlessotherwisespecified,alllimitsensuredforV =0VandR =1kΩ.Boldfaceapplyatthetemperatureextremes. CM L PARAMETER TESTCONDITIONS MIN(1) TYP(2) MAX(1) UNIT V OutputSwing R =1kΩ 3.2 V O L 3.4 3.0 −3.2 V −3.4 −3.0 I =−80mA 2.5 V OUT 2.8 2.2 I =80mA −2.5 V OUT −2.7 −2.2 I OutputShortCircuitCurrent Sourcing 150 mA SC Sinking 150 mA I SupplyCurrent(bothAmps) 16 mA S 12.4 18 6.8 ±5V AC Electrical Characteristics Unlessotherwisespecified,alllimitsensuredforV =0VandR =1kΩ.Boldfaceapplyatthetemperatureextremes. CM L PARAMETER TESTCONDITIONS MIN(1) TYP(2) MAX(1) UNIT SR SlewRate(3) A =+2,V 3V 700 V/µs V IN P-P UnityBandwidthProduct 100 MHz −3dBFrequency A =+2 125 MHz V φ PhaseMargin 70 deg m t SettlingTime(0.1%) A =−1,V =±1V,R =500Ω 70 ns S V O L t PropagationDelay A =+2,V =±1V,R =500Ω 7 ns P V IN L A DifferentialGain(4) 0.02% D φ DifferentialPhase(4) 0.03 deg D hd2 SecondHarmonicDistortion V =2V ,R =100Ω dBc OUT P-P L −84 F =1MHz,A =+2 IN V hd3 ThirdHarmonicDistortion V =2V ,R =100Ω dBc OUT P-P L −94 F =1MHz,A =+2 IN V e Input-ReferredVoltageNoise f=10kHz 14 nV/√Hz n i Input-ReferredCurrentNoise f=10kHz 1.8 pA/√Hz n (1) Alllimitsarespecifiedbytestingorstatisticalanalysis. (2) Typicalvaluesrepresentthemostlikelyparameticnorm. (3) SlewRateistheaverageoftherisingandfallingslewrates. (4) DifferentialgainandphasearemeasuredwithA =+2,V =1V at3.58MHzandoutputis150Ωterminated. V IN PP Copyright©1999–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:LM7372

LM7372 SNOS926F–MAY1999–REVISEDSEPTEMBER2014 www.ti.com 6.9 Typical Performance Characteristics -50 -30 VS = ±12V VS = ±12V )cBd( NO -70 AVRLOV = == 1 220V0P-P HD2 )cBd( NO -50 AVRLOV = == 1 21060.8VP-P HD3 ITROTSID ITROTSID -70 HD2 CINO -90 HD3 CINO M M R R -90 A A H H -110 -110 100k 1M 10M 100k 1M 10M FREQUENCY (Hz) FREQUENCY (Hz) Figure1.HarmonicDistortionvsFrequency Figure2.HarmonicDistortionvsFrequency -30 -30 VS = ±12V VS = ±12V )cBd( NO -50 AVRVOL === 1820V0P-P HD2 )cBd( NO -50 AVRLOV = == 1 81060.8VP-P HD3 ITR ITR O O HD2 TSID -70 TSID C C INO HD3 INO -70 M M R -90 R A A H H -110 -90 100k 1M 100M 100k 1M 10M FREQUENCY (Hz) FREQUENCY (Hz) Figure3.HarmonicDistortionvsFrequency Figure4.HarmonicDistortionvsFrequency -50 -40 VS = ±12V VS = ±12V AV = 8 AV = 8 RL = 100 Rf =L =1 M10H0z )cBd( NO -70 f = 100kHzHD2 )cBd( NO -60 HD2 ITRO ITRO TSID -90 HD3 TSID -80 HD3 -110 -100 1 10 20 1 10 20 OUTPUT VOLTAGE (VP-P) OUTPUT VOLTAGE (VP-P) Figure5.HarmonicDistortionvs Figure6.HarmonicDistortionvsOutputLevel 8 SubmitDocumentationFeedback Copyright©1999–2014,TexasInstrumentsIncorporated ProductFolderLinks:LM7372

LM7372 www.ti.com SNOS926F–MAY1999–REVISEDSEPTEMBER2014 Typical Performance Characteristics (continued) -60 -50 VS = ±12V VS = ±12V AV = 2 AV = 2 RL = 100 RL = 100 f = 100kHZ f = 1MHZ )cBd( N -80 )cBd( N -70 O O ITRO HD2 ITRO HD2 TSID -100 TSID -90 HD3 HD3 -120 -110 1 10 20 1 10 20 OUTPUT VOLTAGE (VP-P) OUTPUT VOLTAGE (VP-P) Figure7.HarmonicDistortionvsOutputLevel Figure8.HarmonicDistortionvsOutputLevel -60 -40 VS = ±12V VS = ±12v AV = 2 AV = 2 VO = 2VP-P -60 VO = 2VP-P )cB -80 f = 100kHz )cB f = 1MHz d d ( N ( N O O -80 ITRO HD2 ITRO HD2 TSID -100 TSID -100 HD3 HD3 -120 -120 10 100 1000 10 100 1000 LOAD RESISTANCE (:) LOAD RESISTANCE (:) Figure9.HarmonicDistortionvsLoadResistance Figure10.HarmonicDistortionvsLoadResistance -40 -40 VS = ±12V VS = ±12V AV = 8 AV = 8 -60 Vf =O 1=M 2VHPz-P -60 VO = 2VP-P f = 100kHz )cB )cB d d ( N ( N O -80 O -80 ITR HD2 ITR HD2 O O TSID TSID -100 HD3 -100 HD3 -120 -120 10 100 1000 10 100 1000 LOAD RESISTANCE (:) LOAD RESISTANCE (:) Figure11.HarmonicDistortionvsLoadResistance Figure12.HarmonicDistortionvsLoadResistance Copyright©1999–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:LM7372

LM7372 SNOS926F–MAY1999–REVISEDSEPTEMBER2014 www.ti.com Typical Performance Characteristics (continued) 2 2 VS = ±12V 1 RL = 100 1 )B 0 )B 0 d d ( NIA -1 GAIN = +2 ( NIA -1 GAIN = +2 G G DEZILAM --32 GAIN = +8 DEZILAM --32 GAIN = +8 R R O O N -4 N -4 -5 -5 VS = ±15V RL = 100 -6 -6 1 10 100 1000 1 10 100 1000 FREQUENCY (MHz) FREQUENCY (MHz) Figure13.FrequencyResponse Figure14.FrequencyResponse 2 VS = ±5V VS = ±12V )Bd( NIAG DEZILAMR ---32101 GAIN = +8 GAIN = +2 RL = 100 )vid/Vm001( EGATLOV TU ARLV == 1200 ON -4 PTU O -5 -6 1 10 100 1000 TIME (100ns/div) FREQUENCY (MHz) Figure16.SmallSignalPulseResponse Figure15.FrequencyResponse 100 VS = ±12V AV = 2 90 )vid RL = 100 80 /V 2( EG )W 70 0.5 oz ATLOV TU T/C°( AJ 5600 1.0 oz P TU 2.0 oz O 40 30 20 0 0.5 1.0 1.5 2.0 2.5 TIME (100ns/div) 2 COPPER AREA (in) Figure17.LargeSignalPulseResponse Figure18.ThermalPerformanceof8ld-SOPowerPAD 10 SubmitDocumentationFeedback Copyright©1999–2014,TexasInstrumentsIncorporated ProductFolderLinks:LM7372

LM7372 www.ti.com SNOS926F–MAY1999–REVISEDSEPTEMBER2014 Typical Performance Characteristics (continued) -50 3 VS = ±5V VS = ±15V AV = 2 2.5 )cBd( NO -70 VRLO = = 1 20V0P-P )Aµ( TN 2 ITROTSID CINO -90 HD2 ERRUC SAIB TU 1.51 M P RA NI H HD3 0.5 -110 0 -40 25 85 125 100k 1M 10M TEMPERATURE (°C) FREQUENCY (Hz) Figure20.InputBiasCurrent(µA)vsTemperature Figure19.HarmonicDistortionvsFrequency 20 VS = ±15V POSITIVE OUTPUT 10 )V ( EG A TLO 0 V TU P TUO -10 NEGATIVE OUTPUT -20 -200 -100 0 100 200 OUTPUT CURRENT (mA) Figure21.OutputVoltagevsOutputCurrent Copyright©1999–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:LM7372

LM7372 SNOS926F–MAY1999–REVISEDSEPTEMBER2014 www.ti.com 7 Detailed Description 7.1 Functional Block Diagram M1 Q1 Q4 RE V- + IN OUTPUT IN- A V+ BUFFER Q3 Q2 M2 Figure22. SimplifiedSchematicDiagram 12 SubmitDocumentationFeedback Copyright©1999–2014,TexasInstrumentsIncorporated ProductFolderLinks:LM7372

LM7372 www.ti.com SNOS926F–MAY1999–REVISEDSEPTEMBER2014 8 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validateandtesttheirdesignimplementationtoconfirmsystemfunctionality. 8.1 Application Information The LM7372 is a high speed dual operational amplifier with a very high slew rate and very low distortion. Like many other op amps, it is used in conventional voltage feedback amplifier applications, and has a class AB output stage in order to deliver high currents to low impedance loads. However, it draws a low quiescent supply current in most situations since the supply current increases when necessary to keep up with large output swing and/or high frequency (see High Frequency/Large Signal Swing Considerations). For most op amps in typical applications, this topology means that internal power dissipation is rarely an issue, even with the trend to smaller surface mount packages. However, TI has designed the LM7372 for applications where there are significant levels of power dissipation, and a way to effectively remove the internal heat generated by this power dissipation is needed in order to maintain the semiconductor junction temperature at acceptable levels. This is particularly importantinenvironmentswithelevatedambienttemperatures. 8.2 Typical Application V+ + 0.1uF 8 0.1uF 20uF + VIN 3 + 1/2 1 LM7372 5.1k 2 - 50 1:1 Twisted 2k Pair Line 2k 100 2k 50 6 - 1/2 7 0.1uF LM7372 - VIN 5 + 4 5.1k V- 0.1uF + 20uF Figure23. SplitSupplyApplication(SOPowerPAD) Copyright©1999–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:LM7372

LM7372 SNOS926F–MAY1999–REVISEDSEPTEMBER2014 www.ti.com Typical Application (continued) VCC + C1 C6 C7 + VIN 0.1uF 5 + 14 0.1uF 20uF 1/2 3 LM7372 VCC 4 - R9 R3 50 R1 5.1k 1:1 10.2k R5 Twisted Pair Line 2k R6 100 2k + R7 R2 2k C3 10.2k 47uF R4 R8 5.1k 50 12 - C2 1/2 13 0.1uF LM7372 - VIN 11 + 6 Figure24. SingleSupplyApplication(16-PinSOIC) 8.3 Application Details Several factors contribute to power dissipation and consequently higher semiconductor junction temperatures. Understanding these factors is necessary if the LM7372 is to perform to the desired specifications. Since different applications will have different dissipation levels and since there are various possible compromises between the ways these factors will contribute to the total junction temperature, this section will examine the typical application shown in Figure 24 as an example, and offer solutions when encountering excessive junction temperatures. There are two major contributors to the internal power dissipation. The first is the product of the supply voltage and the LM7372 quiescent current when no signal is being delivered to the external load, and the second is the additional power dissipated while delivering power to the external load. For low frequency (<1MHz) applications, the LM7372 supply current specification will suffice to determine the quiescent power dissipation (see High Frequency/Large Signal Swing Considerations for cases where the frequency range exceeds 1MHz and the LM7372 supply current increases). The LM7372 quiescent supply current is given as 6.5 mA per amplifier, so witha24-Vsupply,thepowerdissipationis: P = V x 2I Q S q = 24 x 2 x (6.5 x 10-3) = 312mW where • (V =V+-V−) (1) S This is already a high level of internal power dissipation, and in a small surface mount package with a thermal resistance of R = 140°C/Watt -- a not unreasonable value for an 8-Pin SOIC package -- would result in a θJA junctiontemperature140°C/Wx0.312W=43.7°Cabovetheambienttemperature.Asimilarcalculationusingthe worst case maximum supply current specification of 8.5 mA per amplifier at an 85°C ambient will yield a power dissipation of 456 mW with a junction temperature of 149°C, perilously close to the maximum permitted junction temperatureof150°C. The second contributor to high junction temperature is the additional power dissipated internally when power is being delivered to the external load. This cause of temperature rise can be more difficult to calculate, even when theactualoperatingconditionsareknown. 14 SubmitDocumentationFeedback Copyright©1999–2014,TexasInstrumentsIncorporated ProductFolderLinks:LM7372

LM7372 www.ti.com SNOS926F–MAY1999–REVISEDSEPTEMBER2014 Application Details (continued) For a Class B output stage, one transistor of the output pair will conduct the load current as the output voltage swings positive, with the other transistor drawing no current, and hence dissipating no power. During the other half of the signal swing, this situation is reversed, with the lower transistor sinking the load current and the upper transistor cut off. The current in each transistor will be a half wave rectified version of the total load current. Ideally neither transistor will dissipate power when there is no signal swing, but will dissipate increasing power as the output current increases. However, as the signal voltage across the load increases with load current, the voltage across the output transistor (which is the difference voltage between the supply voltage and the instantaneous voltage across the load) will decrease and a point will be reached where the dissipation in the transistor will begin to decrease again. If the signal is driven into a square wave, ideally the transistor dissipation willfalltozero. Therefore, for each amplifier, with an effective load each of R and a sine wave source, integration over the half L cyclewithasupplyvoltageV andaloadvoltageV yieldstheaveragepowerdissipationof: S L P =V V /πR -V 2/2R D S L L L L where • V isthesupplyvoltage S • V isthepeaksignalswingacrosstheloadR (2) L L For the package, the power dissipation will be doubled since there are two amplifiers in the package, each contributinghalftheswingacrosstheload. The circuit in Single Supply Application, Figure 24, is using the LM7372 as the upstream driver in an ADSL application with Discrete MultiTone modulation. With DMT the upstream signal is spread into 32 adjacent channelseach4kHzwide.FortransmissionoverPOTS,theregulartelephoneservice,thisupstreamsignalfrom the CPE (Customer Premise Equipment) occupies a frequency band from around 20 kHz up to a maximum frequency of 135 kHz. At first sight, these relatively low transmission frequencies certainly do not seem to require the use of very high speed amplifiers with GBW products in the range of hundreds of megahertz. However, the close spacing of multiple channels places stringent requirements on the linearity of the amplifier, since non- linearitiesinthepresenceofmultipletoneswillcauseharmonicproductstobegeneratedthatcaneasilyinterfere with the higher frequency down stream signals also present on the line. The need to deliver 3rd Harmonic distortion terms lower than −75 dBc is the reason for the LM7372 quiescent current levels. Each amplifier is running over 3mA in the output stage alone in order to minimize crossover distortion. The xDSL signal levels are adjusted to provide a given power level on the line, and in the case of ADSL, this is an average power of 13 dBm. For a line with a characteristic impedance of 100 Ω this is only 20 mW (= 1 mW x 10(13/10)). Because the transformer shown in Figure 24 is part of a transceiver circuit, two back-termination resistors are connected in serieswitheachamplifieroutput.ThereforetheequivalentR foreachamplifierisalso100Ω,andeachamplifier L isrequiredtodeliver20mWtothisload. SinceV 2/2RL=20mWthenV =2V(peak). (3) L L Using Equation 2 with this value for signal swing and a 24V supply, the internal power dissipation per amplifier is 132.8mW. Adding the quiescent power dissipation to the amplifier dissipation gives the total package internal powerdissipationas P =312mW+(2x132.8mW)=578mW (4) D(TOTAL) This result is actually quite pessimistic because it assumes that the dissipation as a result of load current is simply added to the dissipation as a result of quiescent current. This is not correct, since the AB bias current in the output stage is diverted to load current as the signal swing amplitude increases from zero. In fact with load currents in excess of 3.3 mA, all the bias current is flowing in the load, consequently reducing the quiescent component of power dissipation. Also, it assumes a sine wave signal waveform when the actual waveform is composed of many tones of different phases and amplitudes which may demonstrate lower average power dissipationlevels. Copyright©1999–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:LM7372

LM7372 SNOS926F–MAY1999–REVISEDSEPTEMBER2014 www.ti.com Application Details (continued) The average current for a load power of 20 mW is 14.1 mA (= √(20mW/100)). Neglecting the AB bias current, this appears as a full-wave rectified current waveform in the supply current with a peak value of 19.9mA. The peak to average ratio for a waveform of this shape is 1.57, so the total average load current is 12.7 mA (= 19.9 mA/1.57). Adding this to the quiescent current, and subtracting the power dissipated in the load (20 mV x 2 = 40 mW) gives the same package power dissipation level calculated above (= (12.7 + 13) mA x 24 V –40 mV = 576 mW). Nevertheless, when the supply current peak swing is measured, it is found to be significantly lower because the AB bias current is contributing to the load current. The supply current has a peak swing of only 14 mA (compared to 19.9 mA) superimposed on the quiescent current, with a total average value of only 21 mA. Therefore,thetotalpackagepowerdissipationinthisapplicationis: P = (V x I ) - Power in Load D(TOTAL) S avg = (24 x 21)mW - 40mW = 464mW (5) This level of power dissipation would not take the junction temperature in the 8-Pin SO PowerPAD package over the absolute maximum rating at elevated ambient temperatures (barely), but there is no margin to allow for componenttolerancesorsignalvariances. To develop 20 mW in a 100 Ω requires each amplifier to deliver a peak voltage of only 2V, or 4V( ). This level P-P of signal swing does not require a high supply voltage but the application uses a 24V supply. This is because the modulationtechniqueusesalargenumberoftonestotransmitthedata.Whiletheaveragepowerlevelisheldto 20 mW, at any time the phase and amplitude of individual tones will be such as to generate a combined signal with a higher peak value than 2 V. For DMT this crest factor is taken to be around 5.33 so each amplifier has to beabletohandleapeakvoltageswingof: V =1.4x5.33=7.5Vor15V( ) (6) Lpeak P-P If other factors, such as transformer loss or even higher peak to average ratios are allowed for, this means the amplifiersmusteachswingbetween16to18V( ). P-P The required signal swing can be reduced by using a step-up transformer to drive the line. For example a 1:2 ratio will reduce the peak swing requirement by half, and this would allow the supply to be reduced by a corresponding amount. This is not recommended for the LM7372 in this particular application for two reasons. First, although the quiescent power contribution to the overall dissipation is reduced by about 150 mW, the internal power dissipation to drive the load remains the same, since the load for each amplifier is now 25 Ω instead of 100 Ω. Secondly, this is a transceiver application where downstream signals are simultaneously appearing at the transformer secondary. The down stream signals appear differentially across the back termination resistors and are now stepped down by the transformer turns ratio with a consequent loss in receiver sensitivity compared to using a 1:1 transformer. Any trade-off to reduce the supply voltage by an increase in turns ratio should bear these factors in mind, as well as the increased signal current levels required with lower impedanceloads. At an elevated ambient temperature of 85°C and with an average power dissipation of 464mW, a package thermal resistance between 60°C/W and 80°C/W will be needed to keep the maximum junction temperature in the range 110°C to 120°C. The SO PowerPAD package would be the package of choice here with ample board copperareatoaidinheatdissipation(seeTable2). For most standard surface mount packages (8-Pin SOIC, 14-Pin SOIC, 16-Pin SOIC, and so forth), the only meansofheatremovalfromthedieisthroughthebondwirestoexternalcopperconnectingtotheleads.Usually it will be difficult to reduce the thermal resistance of these packages below 100°C/W by these methods and several manufacturers, including Texas Instruments, offer package modifications to enhance the thermal characteristics. 16 SubmitDocumentationFeedback Copyright©1999–2014,TexasInstrumentsIncorporated ProductFolderLinks:LM7372

LM7372 www.ti.com SNOS926F–MAY1999–REVISEDSEPTEMBER2014 Application Details (continued) L* H* 16-PIN SURFACE MOUNT Figure25. CopperHeatsinkPatterns The LM7372 is available in the 16-Pin SOIC package. Since only 8 pins are needed for the two operational amplifiers, the remaining pins are used for heat sink purposes. Each of the end pins, 1,8,9 & 16 are internally bonded to the lead frame and form an effective means of transferring heat to external copper. This external coppercanbeeitherelectricallyisolatedorbepartofthetopsidegroundplaneinasinglesupplyapplication. Figure 25 shows a copper pattern which can be used to dissipate internal heat from the LM7372. Table 1 gives somevaluesofR fordifferentvaluesofLandHwith1ozcopper. θJA Table1.16-PinSOICThermalResistancewithAreaofCu L(in) H(in) R (°C/W) θJA 1 0.5 83 2 1 70 3 1.5 67 From Table 1 it is apparent that two areas of 1oz copper at each end of the package, each 2 in2 in area (for a total of 2600mm2) will be sufficient to hold the maximum junction temperature under 120°C with an 85°C ambient temperature. An even better package for removing internally generated heat is a package with an exposed die attach paddle. Improved removal of internal heat can be achieved by directly connecting bond wires to the lead frame inside the package. Since this lead frame supports the die attach paddle, heat is transferred directly from the substrate to the outside copper by these bond wires. The LM7372 is also available in the 8-Pin SO PowerPAD package. For this package the entire lower surface of the paddle is not covered with plastic, which would otherwise act as a thermal barrier to heat transfer. Heat is transferred directly from the die through the paddle rather than through the small diameter bonding wires. Values of R in °C/W for the SO PowerPAD package with various areas and θJA weightsofcopperaretabulatedinTable2. Copyright©1999–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 17 ProductFolderLinks:LM7372

LM7372 SNOS926F–MAY1999–REVISEDSEPTEMBER2014 www.ti.com Table2. ThermalResistanceofSOPowerPADPackage COPPER AREA 0.5in2 1.0in2 2.0in2 (EACHSIDE) (EACHSIDE) (EACHSIDE) 0.5oz Top 115 105 102 1.0oz Layer 91 79 72 2.0oz Only 74 60 52 0.5oz Bottom 102 88 81 1.0oz Layer 92 75 65 2.0oz Only 85 66 54 0.5oz TopAndBottom 83 70 63 1.0oz 71 57 47 2.0oz 63 48 37 Table 2 clearly demonstrates the superior thermal qualities of the exposed pad package. For example, using the topside copper only in the same way as shown for the SOIC package (Figure 25), the SO PowerPAD requires half the area of 1 oz copper (2 in2, total or 1300mm2), for a comparable thermal resistance of 72°C/Watt. This givesconsiderablymoreflexibilityinthePCBlayoutasidefromusinglesscopper. The shape of the heat sink shown in Figure 25 is necessary to allow external components to be connected to the package pins. If thermal vias are used beneath the SO PowerPAD to the bottom side ground plane, then a square pattern heat sink can be used and there is no restriction on component placement on the top side of the board. Even better thermal characteristics are obtained with bottom layer heat sinking. A 2 inch square of 0.5oz copper gives the same thermal resistance (81°C/W) as a competitive thermally enhanced 8-Pin SOIC package which needs two layers of 2 oz copper, each 4 in2 (for a total of 5000 mm2). With heavier copper, thermal resistances as low as 54°C/W are possible with bottom side heat sinking only, substantially improving the long term reliability since the maximum junction temperature is held to less than 110°C, even with an ambient temperature of 85°C. If both top and bottom copper planes are used, the thermal resistance can be brought to under40°C/W. 8.3.1 HighFrequency/LargeSignalSwingConsiderations The LM7372 employs a unique input stage in order to support large slew rate and high output current capability with large output swings, with a relatively low quiescent current. This input architecture boosts the device supply current when the application demands it. The result is a supply current which increases at high enough frequencieswhentheoutputswingislargeenoughwithaddedpowerdissipationasaconsequence. Figure26showstheamountofincreaseinsupplycurrentasafunctionoffrequencyforvarioussinusoidaloutput swingamplitudes: 1000 8-Pin SO PowerPAD qJA= 47°C/W 10V supply (1 amplifier) T = 85°C A TJ= 140°C 10V supply (2 amplifiers) )A 100 m ( E 30V supply S A (1 amplifier) E R C N 10 30V supply IIS (22 0aVmPPplifi2e4rVs1P)5PVPP 10VP3PVPP 6VPP 2VPP VPP 1 1 1 10 100 FREQUENCY(MHz) Figure26. PowerSupplyCurrentIncrease 18 SubmitDocumentationFeedback Copyright©1999–2014,TexasInstrumentsIncorporated ProductFolderLinks:LM7372

LM7372 www.ti.com SNOS926F–MAY1999–REVISEDSEPTEMBER2014 Figure 26 shows that there could be 1 mA or more excess supply current per amplifier with close to full output swing (24 V ) when frequency is just above 1MHz (or at higher frequencies when the output swing is less). This PP boost in supply current enables the output to “keep up” with high frequency/large signal output swing, but in turn, increases the total package power dissipation and therefore raises the device junction temperature. As a consequence, it is necessary to pay special attention to the package heatsink design for these demanding applications, especially for ones that run at higher supply voltages. For that reason, Figure 26 has the safe operating limits for the 8-Pin SO PowerPAD package -- for example, “30V supply (2 amplifiers)” horizontal line -- superimposed on top of it (with T limit of 140°C when operated at 85°C ambient), so that the designer can J readilydecidewhetherornotthereisneedforadditionalheatsinking. For example, if the LM7372 is operating similarly to the Figure 24 schematic with a single power supply of 10 V, it is safe to have up to 10 V output swing at up to 40 MHz with no additional heat sinking. This is determined PP by inspecting Figure 24 where the "10 V supply (2 amplifiers)" safe operating limit intercepts the 10 V swing PP graph at around 40 MHz Use the "10 V supply (1 amplifier) safe operating limit in cases where the second amplifierintheLM7372packagedoesnotexperiencehighfrequency/highoutputswingconditions. At any given “I increase” value (y axis), the product of frequency and output swing remains essentially constant S for all output swing plots. This holds true for the lower frequency range before the plots experience a slope increase. Therefore, if the application example just discussed operates up to 60MHz instead, it is possible to calculatethejunction-temperature-limitedmaximumoutputswingof6.7V (=40MHzx10V /60MHz)instead. PP PP Please note that Figure 26 precludes any additional amplifier power dissipation related to load (this topic is discussed below in detail). This load current, if large enough, will reduce the operating frequency/output swing further. It is important to note that the LM7372 can be destroyed if it is allowed to dissipate enough power that compromisesitsmaximumjunctiontemperaturelimitof150°C. With the op amp tied to a load, the device power dissipation consists of the quiescent power due to the supply current flow into the device, in addition to power dissipation due to the load current. The load portion of the power itself could include an average value (due to a DC load current) and an AC component. DC load current would flow if there is an output voltage offset, or the output AC average current is non-zero, or if the op amp operates in a single supply application where the output is maintained somewhere in the range of linear operation.Therefore: P =P +P +P (7) D(TOTAL) Q DC AC P =|I •V |(OpAmpQuiescentPowerDissipation) (8) Q S S P =|I •(V -V )|(DCLoadPower) (9) DC O R O ForP ,(ACLoadPower)seeTable3 AC where: • I =SupplyCurrent S • V =TotalSupplyVoltage(V+-V−) S • I =AverageLoadCurrent O • V =AverageOutputVoltage O • V =ReferenceVoltage(V+forsourcingandV−forsinkingcurrent) R Table 3 shows the maximum AC component of the load power dissipated by the op amp for standard Sinusoidal, Triangular,andSquareWaveforms: Table3.NormalizedMaximumACPowerDissipatedintheOutputStageforStandardWaveforms P (W.Ω/V2) AC SINUSOIDAL TRIANGULAR SQUARE 50.7x10−3 46.9x10−3 62.5x10−3 The table entries are normalized to V 2/R . These entries are computed at the output swing point where the S L amplifier dissipation is the highest for each waveform type. To figure out the AC load current component of power dissipation, simply multiply the table entry corresponding to the output waveform by the factor V 2/R . For S L example, with ±5V supplies, a 100-Ω load and triangular output waveform, power dissipation in the output stage is calculated as: P = 46.9 x 10−3 x 102/100 = 46.9mW which contributes another 2.2°C (= 46.9mW x 47°C/W) AC risetotheLM7372junctiontemperatureinthe8-PinSOPowerPADpackage. Copyright©1999–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 19 ProductFolderLinks:LM7372

LM7372 SNOS926F–MAY1999–REVISEDSEPTEMBER2014 www.ti.com 9 Power Supply Recommendations The LM7372 is fabricated on a high voltage, high speed process. Using high supply voltages ensures adequate headroom to give low distortion with large signal swings. In Figure 24, a single 24 V supply is used. To maximize the output dynamic range the non-inverting inputs are biased to half supply voltage by the resistive divider R1, R2. The input signals are AC coupled and the coupling capacitors (C1, C2) can be scaled with the bias resistors (R3,R4)toformahighpassfilterifunwantedcouplingfromthePOTSsignaloccurs. Supply decoupling is important at both low and high frequencies. The 10µF Tantalum and 0.1µF Ceramic capacitors should be connected close to the supply Pin 14. Note that the V− pin (pin 6), and the PCB area associated with the heatsink (Pins 1,8,9 & 16) are at the same potential. Any layout should avoid running input signal leads close to this ground plane, or unwanted coupling of high frequency supply currents may generate distortionproducts. Although this application shows a single supply, conversion to a split supply is straightforward. The half supply resistive divider network is eliminated and the bias resistors at the non-inverting inputs are returned to ground. For example, see Figure 23 where the pin numbers in Figure 23 are given for SO PowerPAD package, whereas those in Single Supply Application (16-Pin SOIC) are for the SOIC package. With a split supply, note that the ground planeandtheheatsinkcoppermustbeseparateandareatdifferentpotentials,withtheheatsink(pin4oftheSO PowerPAD,pins6,1,8,9and16oftheSOIC)nowatanegativepotential(V−). In either configuration, the area under the input pins should be kept clear of copper (whether ground plane copperorheatsinkcopper)toavoidparasiticcouplingtotheinputs. The LM7372 is stable with non inverting closed loop gains as low as +2. Typical of any voltage feedback operational amplifier, as the closed loop gain of the LM7372 is increased, there is a corresponding reduction in the closed loop signal bandwidth. For low distortion performance it is recommended to keep the closed loop bandwidth at least 10X the highest signal frequency. This is because there is less loop gain (the difference between the open loop gain and the closed loop gain) available at higher frequencies to reduce harmonic distortionterms. 20 SubmitDocumentationFeedback Copyright©1999–2014,TexasInstrumentsIncorporated ProductFolderLinks:LM7372

LM7372 www.ti.com SNOS926F–MAY1999–REVISEDSEPTEMBER2014 10 Layout 10.1 Layout Guidelines Generally, a good high-frequency layout will keep power supply and ground traces away from the inverting input and output pins. Parasitic capacitance on these nodes to ground will cause frequency response peaking and possible circuit oscillations (see Application Note OA-15, "Frequent Faux Pas in Applying Wideband Current Feedback Amplifiers", SNOA367, for more information). Texas Instruments suggests the following evaluation boardsasaguideforhighfrequencylayoutandasanaidindevicetestingandcharacterization: Table4.PrintedCircuitBoardLayoutandEvaluationBoards DEVICE PACKAGE EVALUATIONBOARDPN LM7372MA 16-PinSOIC None LM7372MR 8-PinSOPowerPAD LMH730121 The DAP (die attach paddle) on the 8-Pin SO PowerPAD should be tied to V−. It should not be tied to ground. SeetherespectiveEvaluationBoarddocumentation. 11 Device and Documentation Support 11.1 Trademarks VIPisatrademarkofTexasInstruments. Allothertrademarksarethepropertyoftheirrespectiveowners. 11.2 Electrostatic Discharge Caution Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. 11.3 Glossary SLYZ022—TIGlossary. Thisglossarylistsandexplainsterms,acronyms,anddefinitions. 12 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of thisdocument.Forbrowser-basedversionsofthisdatasheet,refertotheleft-handnavigation. Copyright©1999–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 21 ProductFolderLinks:LM7372

PACKAGE OPTION ADDENDUM www.ti.com 21-Nov-2017 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) LM7372IMA NRND SOIC D 16 48 TBD Call TI Call TI -40 to 85 LM7372IMA LM7372IMA/NOPB ACTIVE SOIC D 16 48 Green (RoHS CU SN Level-1-260C-UNLIM -40 to 85 LM7372IMA & no Sb/Br) LM7372IMAX/NOPB ACTIVE SOIC D 16 2500 Green (RoHS CU SN Level-1-260C-UNLIM -40 to 85 LM7372IMA & no Sb/Br) LM7372MR LIFEBUY SO PowerPAD DDA 8 95 TBD Call TI Call TI -40 to 85 LM73 72MR LM7372MR/NOPB ACTIVE SO PowerPAD DDA 8 95 Green (RoHS CU SN Level-3-260C-168 HR -40 to 85 LM73 & no Sb/Br) 72MR LM7372MRX NRND SO PowerPAD DDA 8 2500 TBD Call TI Call TI -40 to 85 LM73 72MR LM7372MRX/NOPB ACTIVE SO PowerPAD DDA 8 2500 Green (RoHS CU SN Level-3-260C-168 HR -40 to 85 LM73 & no Sb/Br) 72MR (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 21-Nov-2017 (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 4-Sep-2014 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) LM7372IMAX/NOPB SOIC D 16 2500 330.0 16.4 6.5 10.3 2.3 8.0 16.0 Q1 LM7372MRX SO DDA 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 Power PAD LM7372MRX/NOPB SO DDA 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 Power PAD PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 4-Sep-2014 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) LM7372IMAX/NOPB SOIC D 16 2500 367.0 367.0 35.0 LM7372MRX SOPowerPAD DDA 8 2500 367.0 367.0 35.0 LM7372MRX/NOPB SOPowerPAD DDA 8 2500 367.0 367.0 35.0 PackMaterials-Page2

None

GENERIC PACKAGE VIEW DDA 8 PowerPAD TM SOIC - 1.7 mm max height PLASTIC SMALL OUTLINE Images above are just a representation of the package family, actual package may vary. Refer to the product data sheet for package details. 4202561/G

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