Product Sample & Technical Tools & Support & Folder Buy Documents Software Community LM6132,LM6134 SNOS751E–APRIL2000–REVISEDSEPTEMBER2014 LM6132/LM6134 Dual and Quad Low Power 10 MHz Rail-to-Rail I/O Operational Amplifiers 1 Features 3 Description • (For5VSupply,TypUnlessNoted) The LM6132/34 provides new levels of speed vs. 1 power performance in applications where low voltage • Rail-to-RailInputCMVR −0.25Vto5.25V supplies or power limitations previously made • Rail-to-RailOutputSwing0.01Vto4.99V compromise necessary. With only 360 μA/amp supply • HighGain-Bandwidth,10MHzat20kHz current, the 10 MHz gain-bandwidth of this device supports new portable applications where higher • SlewRate12V/μs powerdevicesunacceptablydrainbatterylife. • LowSupplyCurrent360μA/Amp The LM6132/34 can be driven by voltages that • WideSupplyRange2.7Vtoover24V exceed both power supply rails, thus eliminating • CMRR100dB concerns over exceeding the common-mode voltage • Gain100dBwithR =10k range. The rail-to-rail output swing capability provides L the maximum possible dynamic range at the output. • PSRR82dB This is particularly important when operating on low supply voltages. The LM6132/34 can also drive large 2 Applications capacitiveloadswithoutoscillating. • BatteryOperatedInstrumentation Operating on supplies from 2.7 V to over 24 V, the • InstrumentationAmplifiers LM6132/34 is excellent for a very wide range of • PortableScanners applications, from battery operated systems with large bandwidth requirements to high speed • WirelessCommunications instrumentation. • FlatPanelDisplayDriver DeviceInformation(1) PARTNUMBER PACKAGE BODYSIZE(NOM) LM6132 SOIC(8) 4.90mmx3.91mm LM6132 PDIP(8) 9.81mmx6.35mm LM6134 SOIC(14) 8.65mmx3.91mm LM6134 PDIP(14) 19.177mmx6.35mm (1) For all available packages, see the orderable addendum at theendofthedatasheet. SupplyCurrentvs.SupplyVoltage OffsetVoltagevs.SupplyVoltage 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA.

LM6132,LM6134 SNOS751E–APRIL2000–REVISEDSEPTEMBER2014 www.ti.com Table of Contents 1 Features.................................................................. 1 6.9 2.7VACElectricalCharacteristics............................6 2 Applications........................................................... 1 6.10 24VDCElectricalCharacteristics...........................7 3 Description............................................................. 1 6.11 24VACElectricalCharacteristics...........................7 6.12 TypicalPerformanceCharacteristics......................8 4 RevisionHistory..................................................... 2 7 ApplicationandImplementation........................ 13 5 PinConfigurationandFunctions......................... 3 7.1 ApplicationInformation............................................13 6 Specifications......................................................... 4 7.2 EnhancedSlewRate..............................................13 6.1 AbsoluteMaximumRatings......................................4 7.3 TypicalApplications................................................17 6.2 HandlingRatings.......................................................4 8 DeviceandDocumentationSupport.................. 18 6.3 RecommendedOperatingConditions(1)...................4 8.1 RelatedLinks..........................................................18 6.4 ThermalInformation,8-Pin.......................................4 8.2 Trademarks.............................................................18 6.5 ThermalInformation,14-Pin.....................................4 8.3 ElectrostaticDischargeCaution..............................18 6.6 5.0VDCElectricalCharacteristics............................5 8.4 Glossary..................................................................18 6.7 5.0VACElectricalCharacteristics............................6 9 Mechanical,Packaging,andOrderable 6.8 2.7VDCElectricalCharacteristics............................6 Information........................................................... 18 4 Revision History NOTE:Pagenumbersforpreviousrevisionsmaydifferfrompagenumbersinthecurrentversion. ChangesfromRevisionD(February2013)toRevisionE Page • Changed"JunctionTemperatureRange"to"OperatingTemperatureRange"anddeleted"T"........................................... 4 J • DeletedT =25°CforElectricalCharacteristicstables.......................................................................................................... 5 J ChangesfromRevisionC(February2013)toRevisionD Page • ChangedlayoutofNationalDataSheettoTIformat........................................................................................................... 17 2 SubmitDocumentationFeedback Copyright©2000–2014,TexasInstrumentsIncorporated ProductFolderLinks:LM6132 LM6134

LM6132,LM6134 www.ti.com SNOS751E–APRIL2000–REVISEDSEPTEMBER2014 5 Pin Configuration and Functions 8-PinSOIC/PDIP 14-PinSOIC/PDIP PackagesDandP PackagesDandNFF TopView TopView PinFunctions PIN LM6132 LM6134 I/O DESCRIPTION NAME D/NFF0014 D/P A -INA 2 2 I ChAInvertingInput +INA 3 3 I ChANon-invertingInput -INB 6 6 I ChBInvertingInput +INB 5 5 I ChBNon-invertingInput -INC 9 I ChCInvertingInput +INC 10 I ChCNon-invertingInput -IND 13 I ChDInvertingInput +IND 12 I ChDNon-invertingInput OUTA 1 1 O ChAOutput OUTB 7 7 O ChBOutput OUTC 8 O ChCOutput OUTD 14 O ChDOutput V- 4 11 I NegativeSupply V+ 8 4 I PositiveSupply Copyright©2000–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:LM6132 LM6134

LM6132,LM6134 SNOS751E–APRIL2000–REVISEDSEPTEMBER2014 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings(1)(2) overoperatingfree-airtemperaturerange(unlessotherwisenoted) MIN MAX UNIT DifferentialInputVoltage ±15 V (V+)+0.3 VoltageatInput/OutputPin (V−)−0.3 V SupplyVoltage(V+–V−) 35 V CurrentatInputPin ±10 mA CurrentatOutputPin(3) ±25 mA CurrentatPowerSupplyPin 50 mA LeadTemp.(soldering,10sec.) 260 °C JunctionTemperature(4) 150 °C (1) AbsoluteMaximumRatingsindicatelimitsbeyondwhichdamagetothedevicemayoccur.OperatingRatingsindicateconditionsfor whichthedeviceisintendedtobefunctional,butspecificperformanceisnotguaranteed.Forguaranteedspecificationsandthetest conditions,seetheElectricalcharacteristics. (2) IfMilitary/Aerospacespecifieddevicesarerequired,pleasecontacttheTexasInstrumentsSalesOffice/Distributorsforavailabilityand specifications. (3) Appliestobothsingle-supplyandsplit-supplyoperation.Continuousshortcircuitoperationatelevatedambienttemperaturecanresultin exceedingthemaximumallowedjunctiontemperatureof150°C. (4) ThemaximumpowerdissipationisafunctionofT ,R ,andT .Themaximumallowablepowerdissipationatanyambient J(MAX) θJA A temperatureisP =(T −T )/R .AllnumbersapplyforpackagessoldereddirectlyintoaPCboard. D J(MAX) A θJA 6.2 Handling Ratings MIN MAX UNIT T Storagetemperaturerange −65 +150 °C stg Humanbodymodel(HBM),perANSI/ESDA/JEDECJS-001,all 2500 V(ESD) Electrostaticdischarge pins(1) V (1) HumanBodyModel,1.5kΩinserieswith100pF.JEDECdocumentJEP155statesthat2500-VHBMallowssafemanufacturingwitha standardESDcontrolprocess. 6.3 Recommended Operating Conditions(1) overoperatingfree-airtemperaturerange(unlessotherwisenoted) MIN MAX UNIT SupplyVoltage 1.8≤V+≤24 V OperatingTemperatureRange:LM6132,LM6134 −40 +85 °C (1) AbsoluteMaximumRatingsindicatelimitsbeyondwhichdamagetothedevicemayoccur.OperatingRatingsindicateconditionsfor whichthedeviceisintendedtobefunctional,butspecificperformanceisnotguaranteed.Forguaranteedspecificationsandthetest conditions,seetheElectricalcharacteristics. 6.4 Thermal Information, 8-Pin D(SOIC) P(PDIP) THERMALMETRIC(1) UNIT 8PINS 8PINS R Junction-to-ambientthermalresistance 193 115 °C/W θJA (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheICPackageThermalMetricsapplicationreport,SPRA953. 6.5 Thermal Information, 14-Pin D(SOIC) NFF(PDIP) THERMALMETRIC(1) UNIT 14PINS 14PINS R Junction-to-ambientthermalresistance 126 81 °C/W θJA (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheICPackageThermalMetricsapplicationreport,SPRA953. 4 SubmitDocumentationFeedback Copyright©2000–2014,TexasInstrumentsIncorporated ProductFolderLinks:LM6132 LM6134

LM6132,LM6134 www.ti.com SNOS751E–APRIL2000–REVISEDSEPTEMBER2014 6.6 5.0V DC Electrical Characteristics Unlessotherwisespecified,alllimitsguaranteedforV+=5.0V,V−=0V,V =V =V+/2andR >1MΩtoV+/2.Boldface CM O L limitsapplyatthetemperatureextremes LM6134AI LM6134BI PARAMETER TESTCONDITIONS TYP(1) LM6132AI LM6132BI UNIT LIMIT(2) LIMIT(2) V InputOffsetVoltage 2 6 mV OS 0.25 4 8 max TCV InputOffsetVoltageAverageDrift 5 μV/C OS I InputBiasCurrent 0V≤V ≤5V 140 180 nA B CM 110 300 350 max I InputOffsetCurrent 30 30 nA OS 3.4 50 50 max R InputResistance,CM 104 MΩ IN CMRR CommonModeRejectionRatio 0V≤V ≤4V 75 75 CM 100 70 70 dB 0V≤V ≤5V 60 60 min CM 80 55 55 PSRR PowerSupplyRejectionRatio ±2.5V≤V+≤±12V 78 78 dB 82 75 75 min V −0.25 0 0 CM InputCommon-ModeVoltageRange V 5.25 5.0 5.0 A LargeSignalVoltageGain R =10k 25 15 V/mV V L 100 8 6 min V OutputSwing 100kLoad 4.98 4.98 V O 4.992 4.93 4.93 min 0.017 0.017 V 0.007 0.019 0.019 max 10kLoad 4.94 4.94 V 4.952 4.85 4.85 min 0.07 0.07 V 0.032 0.09 0.09 max 5kLoad 4.90 4.90 V 4.923 4.85 4.85 min 0.095 0.095 V 0.051 0.12 0.12 max I OutputShortCircuitCurrent Sourcing 2 2 mA SC 4 LM6132 2 1 min Sinking 1.8 1.8 mA 3.5 1.8 1 min I OutputShortCircuitCurrent Sourcing 2 2 mA SC 3 LM6134 1.6 1 min Sinking 1.8 1.8 mA 3.5 1.3 1 min I SupplyCurrent PerAmplifier 400 400 μA S 360 450 450 max (1) TypicalValuesrepresentthemostlikelyparametricnormal. (2) Alllimitsareguaranteedbytestingorstatisticalanalysis. Copyright©2000–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:LM6132 LM6134

LM6132,LM6134 SNOS751E–APRIL2000–REVISEDSEPTEMBER2014 www.ti.com 6.7 5.0V AC Electrical Characteristics Unlessotherwisespecified,alllimitsguaranteedforV+=5.0V,V−=0V,V =V =V+/2andR >1MΩtoV+/2.Boldface CM O L limitsapplyatthetemperatureextremes LM6134AI LM6134BI PARAMETER TESTCONDITIONS TYP(1) LM6132AI LM6132BI UNIT LIMIT(2) LIMIT(2) SR SlewRate ±4V@V =±6V 8 8 V/μs S 14 R <1kΩ 7 7 min S GBW Gain-BandwidthProduct f=20kHz 7.4 7.4 MHz 10 7 7 min θm PhaseMargin R =10k 33 deg L G GainMargin R =10k 10 dB m L e InputReferredVoltageNoise f=1kHz 27 nV/√Hz n i InputReferredCurrentNoise f=1kHz 0.18 pA/√Hz n (1) TypicalValuesrepresentthemostlikelyparametricnormal. (2) Alllimitsareguaranteedbytestingorstatisticalanalysis. 6.8 2.7V DC Electrical Characteristics Unlessotherwisespecified,alllimitsguaranteedforV+=2.7V,V−=0V,V =V =V+/2andR >1MΩtoV+/2.Boldface CM O L limitsapplyatthetemperatureextreme LM6134AI LM6134BI PARAMETER TESTCONDITIONS TYP(1) LM6132AI LM6132BI UNIT LIMIT(2) LIMIT(2) V InputOffsetVoltage 2 6 mV OS 0.12 8 12 max I InputBiasCurrent 0V≤V ≤2.7V 90 nA B CM I InputOffsetCurrent 2.8 nA OS R InputResistance 134 MΩ IN CMRR CommonModeRejectionRatio 0V≤V ≤2.7V 82 dB CM PSRR PowerSupplyRejectionRatio ±1.35V≤V+≤±12V 80 dB V InputCommon-ModeVoltageRange 2.7 2.7 V CM 0 0 A LargeSignalVoltageGain R =10k 100 V/mV V L V OutputSwing R =100k 0.08 0.08 V O L 0.03 0.112 0.112 max 2.65 2.65 V 2.66 2.25 2.25 min I SupplyCurrent PerAmplifier 330 μA S (1) TypicalValuesrepresentthemostlikelyparametricnormal. (2) Alllimitsareguaranteedbytestingorstatisticalanalysis. 6.9 2.7V AC Electrical Characteristics Unlessotherwisespecified,alllimitsguaranteedforV+=2.7V,V−=0V,V =V =V+/2andR >1MΩtoV+/2. CM O L LM6134AI LM6134BI TYP LM6132AI LM6132BI PARAMETER TESTCONDITIONS (1) LIMIT LIMIT UNIT (2) (2) GBW Gain-BandwidthProduct R =10k,f=20kHz 7 MHz L θ PhaseMargin R =10k 23 deg m L G GainMargin 12 dB m (1) TypicalValuesrepresentthemostlikelyparametricnormal. (2) Alllimitsareguaranteedbytestingorstatisticalanalysis. 6 SubmitDocumentationFeedback Copyright©2000–2014,TexasInstrumentsIncorporated ProductFolderLinks:LM6132 LM6134

LM6132,LM6134 www.ti.com SNOS751E–APRIL2000–REVISEDSEPTEMBER2014 6.10 24V DC Electrical Characteristics Unlessotherwisespecified,alllimitsguaranteedforV+=24V,V−=0V,V =V =V+/2andR >1MΩtoV+/2.Boldface CM O L limitsapplyatthetemperatureextreme LM6134AI LM6134BI PARAMETER TESTCONDITIONS TYP(1) LM6132AI LM6132BI UNIT LIMIT(2) LIMIT(2) V InputOffsetVoltage 3 7 mV OS 1.7 5 9 max I InputBiasCurrent 0V≤V ≤24V 125 nA B CM I InputOffsetCurrent 4.8 nA OS R InputResistance 210 MΩ IN CMRR CommonModeRejectionRatio 0V≤V ≤24V 80 dB CM PSRR PowerSupplyRejectionRatio 2.7V≤V+≤24V 82 dB V InputCommon-ModeVoltageRange −0.25 0 0 Vmin CM 24.25 24 24 Vmax A LargeSignalVoltageGain R =10k 102 V/mV V L V OutputSwing R =10k V O L 0.075 0.15 0.15 max 23.86 23.8 23.8 V min I SupplyCurrent PerAmplifier 450 450 μA S 390 490 490 max (1) TypicalValuesrepresentthemostlikelyparametricnormal. (2) Alllimitsareguaranteedbytestingorstatisticalanalysis. 6.11 24V AC Electrical Characteristics Unlessotherwisespecified,alllimitsguaranteedforV+=24V,V−=0V,V =V =V+/2andR >1MΩtoV+/2. CM O L LM6134AI LM6134BI PARAMETER TESTCONDITIONS TYP(1) LM6132AI LM6132BI UNIT LIMIT(2) LIMIT(2) GBW Gain-BandwidthProduct R =10k,f=20kHz 11 MHz L θ PhaseMargin R =10k 23 deg m L G GainMargin R =10k 12 dB m L THD+N TotalHarmonicDistortionandNoise A =+1,V =20V V O P-P 0.0015% f=10kHz (1) TypicalValuesrepresentthemostlikelyparametricnormal. (2) Alllimitsareguaranteedbytestingorstatisticalanalysis. Copyright©2000–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:LM6132 LM6134

LM6132,LM6134 SNOS751E–APRIL2000–REVISEDSEPTEMBER2014 www.ti.com 6.12 Typical Performance Characteristics T =25°C,R =10kΩunlessotherwisespecified A L Figure1.SupplyCurrentvs.SupplyVoltage Figure2.OffsetVoltagevs.SupplyVoltage Figure3.dV vs.V Figure4.dV vs.V OS CM OS CM Figure5.dV vs.V Figure6.I vs.V OS CM BIAS CM 8 SubmitDocumentationFeedback Copyright©2000–2014,TexasInstrumentsIncorporated ProductFolderLinks:LM6132 LM6134

LM6132,LM6134 www.ti.com SNOS751E–APRIL2000–REVISEDSEPTEMBER2014 Typical Performance Characteristics (continued) T =25°C,R =10kΩunlessotherwisespecified A L Figure7.I vs.V Figure8.I vs.V BIAS CM BIAS CM Figure9.InputBiasCurrentvs.SupplyVoltage Figure10.NegativePSRRvs.Frequency Figure11.PositivePSSRvs.Frequency Figure12.dVOSvs.OutputVoltage Copyright©2000–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:LM6132 LM6134

LM6132,LM6134 SNOS751E–APRIL2000–REVISEDSEPTEMBER2014 www.ti.com Typical Performance Characteristics (continued) T =25°C,R =10kΩunlessotherwisespecified A L Figure13.dV vs.OutputVoltage Figure14.dV vs.OutputVoltage OS OS Figure15.CMRRvs.Frequency Figure16.OutputVoltagevs.SinkingCurrent Figure17.OutputVoltagevs.SinkingCurrent Figure18.OutputVoltagevs.SinkingCurrent 10 SubmitDocumentationFeedback Copyright©2000–2014,TexasInstrumentsIncorporated ProductFolderLinks:LM6132 LM6134

LM6132,LM6134 www.ti.com SNOS751E–APRIL2000–REVISEDSEPTEMBER2014 Typical Performance Characteristics (continued) T =25°C,R =10kΩunlessotherwisespecified A L Figure19.OutputVoltagevs.SourcingCurrent Figure20.OutputVoltagevs.SourcingCurrent Figure21.OutputVoltagevs.SourcingCurrent Figure22.NoiseVoltagevs.Frequency Figure23.NoiseCurrentvs.Frequency Figure24.NFvs.SourceResistance Copyright©2000–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:LM6132 LM6134

LM6132,LM6134 SNOS751E–APRIL2000–REVISEDSEPTEMBER2014 www.ti.com Typical Performance Characteristics (continued) T =25°C,R =10kΩunlessotherwisespecified A L Figure25.GainandPhasevs.Frequency Figure26.GainandPhasevs.Frequency Figure27.GainandPhasevs.Frequency Figure28.GBWvs.SupplyVoltageat20kHz 12 SubmitDocumentationFeedback Copyright©2000–2014,TexasInstrumentsIncorporated ProductFolderLinks:LM6132 LM6134

LM6132,LM6134 www.ti.com SNOS751E–APRIL2000–REVISEDSEPTEMBER2014 7 Application and Implementation 7.1 Application Information The LM6132 brings a new level of ease of use to op amp system design. Greater than rail-to-rail input voltage eliminatesconcernoverexceedingthecommon-modevoltagerange. Rail-to-rail output swing provides the maximum possible dynamic range at the output. This is particularly importantwhenoperatingonlowsupplyvoltages. The high gain-bandwidth with low supply current opens new battery powered applications, where high power consumptionpreviouslyreducedbatterylifetounacceptablelevels. To take advantage of these features, some ideas should be kept in mind, which are outlined in subsequent sections. 7.2 Enhanced Slew Rate Unlike most bipolar op amps, the unique phase reversal prevention/speed-up circuit in the input stage eliminates phasereversalandallowstheslewratetobeafunctionoftheinputsignalamplitude. Figure 30 shows how excess input signal is routed around the input collector-base junctions directly to the currentmirrors. The LM6132/34 input stage converts the input voltage change to a current change. This current change drives thecurrentmirrorsthroughthecollectorsofQ1–Q2,Q3–Q4whentheinputlevelsarenormal. If the input signal exceeds the slew rate of the input stage and the differential input voltage rises above a diode drop, the excess signal bypasses the normal input transistors, (Q1–Q4), and is routed in correct phase through thetwoadditionaltransistors,(Q5,Q6),directlyintothecurrentmirrors. Thereroutingofexcesssignalallowstheslew-ratetoincreasebyafactorof10to1ormore.(SeeFigure29). As the overdrive increases, the op amp reacts better than a conventional op amp. Large fast pulses will raise the slewratetoaround25Vto30V/μs. Figure29. SlewRatevs.DifferentialV IN V =±12V S This effect is most noticeable at higher supply voltages and lower gains where incoming signals are likely to be large. Thisspeed-upactionaddsstabilitytothesystemwhendrivinglargecapacitiveloads. Copyright©2000–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:LM6132 LM6134

LM6132,LM6134 SNOS751E–APRIL2000–REVISEDSEPTEMBER2014 www.ti.com Enhanced Slew Rate (continued) 7.2.1 DrivingCapacitiveLoads Capacitive loads decrease the phase margin of all op amps. This is caused by the output resistance of the amplifier and the load capacitance forming an R-C phase lag network. This can lead to overshoot, ringing and oscillation.Slewratelimitingcanalsocauseadditionallag.Mostopampswithafixedmaximumslew-ratewilllag furtherandfurtherbehindwhendrivingcapacitiveloadseventhoughthedifferentialinputvoltageraises.Withthe LM6132, the lag causes the slew rate to raise. The increased slew-rate keeps the output following the input much better. This effectively reduces phase lag. After the output has caught up with the input, the differential inputvoltagedropsdownandtheamplifiersettlesrapidly. Figure30. InternalBlockDiagram 14 SubmitDocumentationFeedback Copyright©2000–2014,TexasInstrumentsIncorporated ProductFolderLinks:LM6132 LM6134

LM6132,LM6134 www.ti.com SNOS751E–APRIL2000–REVISEDSEPTEMBER2014 Enhanced Slew Rate (continued) These features allow the LM6132 to drive capacitive loads as large as 500 pF at unity gain and not oscillate. The scope photos (Figure 31 and Figure 32) show the LM6132 driving a 500 pF load. In Figure 31 , the lower trace is withnocapacitiveloadandtheuppertraceiswitha500pFload.Hereweareoperatingon ±12Vsupplieswitha 20 V pulse. Excellent response is obtained with a C of 39 pF. In Figure 32, the supplies have been reduced to PP f ±2.5V, the pulse is 4 VPP and C is 39 pF. The best value for the compensation capacitor should be established F after the board layout is finished because the value is dependent on board stray capacity, the value of the feedbackresistor,theclosedloopgainand,tosomeextent,thesupplyvoltage. Another effect that is common to all op amps is the phase shift caused by the feedback resistor and the input capacitance. This phase shift also reduces phase margin. This effect is taken care of at the same time as the effectofthecapacitiveloadwhenthecapacitorisplacedacrossthefeedbackresistor. ThecircuitshowninFigure33wasusedforFigure31 andFigure32. Figure31. Twenty-VoltStepResponse: withCapLoad(TopTrace) withoutCapLoad(BottomTrace) Figure32. Four-VoltStepResponse: withCapLoad(TopTrace) withoutCapLoad(BottomTrace) Copyright©2000–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:LM6132 LM6134

LM6132,LM6134 SNOS751E–APRIL2000–REVISEDSEPTEMBER2014 www.ti.com Enhanced Slew Rate (continued) Figure33. CapLoadTestCircuit Figure 34 shows a method for compensating for load capacitance (C ) effects by adding both an isolation O resistor R at the output and a feedback capacitor C directly between the output and the inverting input pin. O F Feedback capacitor C compensates for the pole introduced by R and C , minimizing ringing in the output F O O waveform while the feedback resistor R compensates for dc inaccuracies introduced by R . Depending on the F O sizeoftheloadcapacitance,thevalueofR istypicallychosentobebetween100Ω to1kΩ. O Figure34. CapacitiveLoadingCompensationTechnique 16 SubmitDocumentationFeedback Copyright©2000–2014,TexasInstrumentsIncorporated ProductFolderLinks:LM6132 LM6134

LM6132,LM6134 www.ti.com SNOS751E–APRIL2000–REVISEDSEPTEMBER2014 7.3 Typical Applications 7.3.1 ThreeOpAmpInstrumentationAmpwithRail-to-RailInputandOutput UsingtheLM6134,a3opampinstrumentationamplifierwithrail-to-railinputsandrailtorailoutputcanbemade. Thesefeaturesmaketheseinstrumentationamplifiersidealforsinglesupplysystems. Some manufacturers use a precision voltage divider array of 5 resistors to divide the common-mode voltage to get an input range of rail-to-rail or greater. The problem with this method is that it also divides the signal, so to even get unity gain, the amplifier must be run at high closed loop gains. This raises the noise and drift by the internal gain factor and lowers the input impedance. Any mismatch in these precision resistors reduces the CMR aswell.UsingtheLM6134,alloftheseproblemsareeliminated. In this example, amplifiers A and B act as buffers to the differential stage (Figure 35). These buffers assure that the input impedance is over 100 MΩ and they eliminate the requirement for precision matched resistors in the input stage. They also assure that the difference amp is driven from a voltage source. This is necessary to maintaintheCMRsetbythematchingofR1–R2withR3–R4. Figure35. InstrumentationAmplifier 7.3.2 FlatPanelDisplayBuffering Three features of the LM6132/34 make it a superb choice for TFT LCD applications. First, its low current draw (360 μA per amplifier at 5 V) makes it an ideal choice for battery powered applications such as in laptop computers. Second, since the device operates down to 2.7 V, it is a natural choice for next generation 3V TFT panels. Last, but not least, the large capacitive drive capability of the LM6132 comes in very handy in driving highlycapacitiveloadsthatarecharacteristicofLCDdisplaydrivers. The large capacitive drive capability of the LM6132/34 allows it to be used as buffers for the gamma correction reference voltage inputs of resistor-DAC type column (Source) drivers in TFT LCD panels. This amplifier is also useful for buffering only the center reference voltage input of Capacitor-DAC type column (Source) drivers such astheLMC750Xseries. Since for VGA and SVGA displays, the buffered voltages must settle within approximately 4 μs, the well known technique of using a small isolation resistor in series with the amplifier's output very effectively dampens the ringingattheoutput. With its wide supply voltage range of 2.7 V to 24 V, the LM6132/34 can be used for a diverse range of applications. The system designer is thus able to choose a single device type that serves many sub-circuits in the system, eliminating the need to specify multiple devices in the bill of materials. Along with its sister parts, the LM6142 and LM6152 that have the same wide supply voltage capability, choice of the LM6132 in a design eliminatestheneedtosearchformultiplesourcesfornewdesigns. Copyright©2000–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 17 ProductFolderLinks:LM6132 LM6134

LM6132,LM6134 SNOS751E–APRIL2000–REVISEDSEPTEMBER2014 www.ti.com 8 Device and Documentation Support 8.1 Related Links The table below lists quick access links. Categories include technical documents, support and community resources,toolsandsoftware,andquickaccesstosampleorbuy. Table1.RelatedLinks TECHNICAL TOOLS& SUPPORT& PARTS PRODUCTFOLDER SAMPLE&BUY DOCUMENTS SOFTWARE COMMUNITY LM6132 Clickhere Clickhere Clickhere Clickhere Clickhere LM6134 Clickhere Clickhere Clickhere Clickhere Clickhere 8.2 Trademarks Alltrademarksarethepropertyoftheirrespectiveowners. 8.3 Electrostatic Discharge Caution Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. 8.4 Glossary SLYZ022—TIGlossary. Thisglossarylistsandexplainsterms,acronyms,anddefinitions. 9 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of thisdocument.Forbrowser-basedversionsofthisdatasheet,refertotheleft-handnavigation. 18 SubmitDocumentationFeedback Copyright©2000–2014,TexasInstrumentsIncorporated ProductFolderLinks:LM6132 LM6134

PACKAGE OPTION ADDENDUM www.ti.com 22-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) LM6132AIM NRND SOIC D 8 95 TBD Call TI Call TI -40 to 85 LM61 32AIM LM6132AIM/NOPB ACTIVE SOIC D 8 95 Green (RoHS SN Level-1-260C-UNLIM -40 to 85 LM61 & no Sb/Br) 32AIM LM6132AIMX NRND SOIC D 8 2500 TBD Call TI Call TI -40 to 85 LM61 32AIM LM6132AIMX/NOPB ACTIVE SOIC D 8 2500 Green (RoHS SN Level-1-260C-UNLIM -40 to 85 LM61 & no Sb/Br) 32AIM LM6132BIM NRND SOIC D 8 95 TBD Call TI Call TI -40 to 85 LM61 32BIM LM6132BIM/NOPB ACTIVE SOIC D 8 95 Green (RoHS SN Level-1-260C-UNLIM -40 to 85 LM61 & no Sb/Br) 32BIM LM6132BIMX NRND SOIC D 8 2500 TBD Call TI Call TI -40 to 85 LM61 32BIM LM6132BIMX/NOPB ACTIVE SOIC D 8 2500 Green (RoHS SN Level-1-260C-UNLIM -40 to 85 LM61 & no Sb/Br) 32BIM LM6132BIN/NOPB ACTIVE PDIP P 8 40 Green (RoHS Call TI | SN Level-1-NA-UNLIM -40 to 85 LM6132 & no Sb/Br) BIN LM6134AIM NRND SOIC D 14 55 TBD Call TI Call TI -40 to 85 LM6134AIM LM6134AIM/NOPB ACTIVE SOIC D 14 55 Green (RoHS SN Level-1-260C-UNLIM -40 to 85 LM6134AIM & no Sb/Br) LM6134AIMX/NOPB ACTIVE SOIC D 14 2500 Green (RoHS SN Level-1-260C-UNLIM -40 to 85 LM6134AIM & no Sb/Br) LM6134BIM NRND SOIC D 14 55 TBD Call TI Call TI -40 to 85 LM6134BIM LM6134BIM/NOPB ACTIVE SOIC D 14 55 Green (RoHS SN Level-1-260C-UNLIM -40 to 85 LM6134BIM & no Sb/Br) LM6134BIMX/NOPB ACTIVE SOIC D 14 2500 Green (RoHS SN Level-1-260C-UNLIM -40 to 85 LM6134BIM & no Sb/Br) LM6134BIN/NOPB ACTIVE PDIP NFF 14 25 Green (RoHS SN Level-1-NA-UNLIM -40 to 85 LM6134BIN & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 22-Feb-2020 PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 29-Sep-2019 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) LM6132AIMX SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LM6132AIMX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LM6132BIMX SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LM6132BIMX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LM6134AIMX/NOPB SOIC D 14 2500 330.0 16.4 6.5 9.35 2.3 8.0 16.0 Q1 LM6134BIMX/NOPB SOIC D 14 2500 330.0 16.4 6.5 9.35 2.3 8.0 16.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 29-Sep-2019 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) LM6132AIMX SOIC D 8 2500 367.0 367.0 35.0 LM6132AIMX/NOPB SOIC D 8 2500 367.0 367.0 35.0 LM6132BIMX SOIC D 8 2500 367.0 367.0 35.0 LM6132BIMX/NOPB SOIC D 8 2500 367.0 367.0 35.0 LM6134AIMX/NOPB SOIC D 14 2500 367.0 367.0 35.0 LM6134BIMX/NOPB SOIC D 14 2500 367.0 367.0 35.0 PackMaterials-Page2

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PACKAGE OUTLINE D0008A SOIC - 1.75 mm max height SCALE 2.800 SMALL OUTLINE INTEGRATED CIRCUIT C SEATING PLANE .228-.244 TYP [5.80-6.19] .004 [0.1] C A PIN 1 ID AREA 6X .050 [1.27] 8 1 2X .189-.197 [4.81-5.00] .150 NOTE 3 [3.81] 4X (0 -15 ) 4 5 8X .012-.020 B .150-.157 [0.31-0.51] .069 MAX [3.81-3.98] .010 [0.25] C A B [1.75] NOTE 4 .005-.010 TYP [0.13-0.25] 4X (0 -15 ) SEE DETAIL A .010 [0.25] .004-.010 0 - 8 [0.11-0.25] .016-.050 [0.41-1.27] DETAIL A (.041) TYPICAL [1.04] 4214825/C 02/2019 NOTES: 1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed .006 [0.15] per side. 4. This dimension does not include interlead flash. 5. Reference JEDEC registration MS-012, variation AA. www.ti.com

EXAMPLE BOARD LAYOUT D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM SEE DETAILS 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:8X SOLDER MASK SOLDER MASK METAL OPENING OPENING METAL UNDER SOLDER MASK EXPOSED METAL EXPOSED METAL .0028 MAX .0028 MIN [0.07] [0.07] ALL AROUND ALL AROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED SOLDER MASK DETAILS 4214825/C 02/2019 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] SOLDER PASTE EXAMPLE BASED ON .005 INCH [0.125 MM] THICK STENCIL SCALE:8X 4214825/C 02/2019 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com

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MECHANICAL DATA N0014A N14A (Rev G) www.ti.com

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