LM5041A www.ti.com SNVS350B–MARCH2005–REVISEDMARCH2013 LM5041A Cascaded PWM Controller CheckforSamples:LM5041A FEATURES DESCRIPTION 1 • InternalStart-upBiasRegulator The LM5041A PWM controller contains all of the features necessary to implement either current-fed or • ProgrammableLineUnder-VoltageLockout voltage-fed push-pull or bridge power converters. (UVLO)withAdjustableHysteresis These “Cascaded” topologies are well suited for • CurrentModeControl multiple output and higher power applications. The • InternalErrorAmplifierwithReference LM5041A’s four control outputs include: the buck stage controls (HD and LD) and the push-pull control • Cycle-by-cycleOver-CurrentProtection outputs (PUSH and PULL). Push-pull outputs are • LeadingEdgeBlanking driven at 50% nominal duty cycle at one half of the • ProgrammablePush-PullOverlaporDead switching frequency of the buck stage and can be configured for either an overlap time (for current-fed Time applications) or a both-off time (for voltage-fed • Internal1.5APush-PullGateDrivers applications). Push-pull stage MOSFETs can be • ProgrammableSoft-Start driven directly from the internal gate drivers while the • ProgrammableOscillatorwithSyncCapability buck stage requires an external driver such as the LM5102. The LM5041A includes a high-voltage start- • PrecisionReference up regulator that operates over a wide input range of • ThermalShutdown 15V to 100V. The PWM controller is designed for high-speed capability including an oscillator APPLICATIONS frequency range up to 1 MHz and total propagation delaysoflessthan100ns.Additionalfeaturesinclude: • TelecommunicationPowerConverters line Under-Voltage Lockout (UVLO), soft-start, an • IndustrialPowerConverters error amplifier, precision voltage reference, and • Multi-OutputPowerConverters thermalshutdown. • +42VAutomotiveSystems The two differences between the LM5041 and the LM5041A are: No second level current limit in the 'A' version No softstart (SS) shutdown comparator in the 'A'version. PACKAGES • TSSOP-16 • WSON-16(5mm×5mm)ThermallyEnhanced 1 Pleasebeawarethatanimportantnoticeconcerningavailability,standardwarranty,anduseincriticalapplicationsof TexasInstrumentssemiconductorproductsanddisclaimerstheretoappearsattheendofthisdatasheet. PRODUCTIONDATAinformationiscurrentasofpublicationdate. Copyright©2005–2013,TexasInstrumentsIncorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarilyincludetestingofallparameters.

LM5041A SNVS350B–MARCH2005–REVISEDMARCH2013 www.ti.com Typical Application Circuit 33V - 76V VOUT VDD VCC HB VIN HD HI HO HS LI LD LO RT LM5102 LM5041A 2 VSS RT1 RT2 PUSH FEED BACK PULL FB Figure1. SimplifiedCascadedPush-PullPowerConverter Connection Diagram 1 16 VIN UVLO 2 15 FB RT 3 14 COMP TIME 4 13 REF SS 5 12 HD CS 6 11 LD AGND 7 VCC PGND 10 8 9 PUSH PULL Figure2. 16-LeadTSSOPorWSON SeePWorNHQ0016APackage 2 SubmitDocumentationFeedback Copyright©2005–2013,TexasInstrumentsIncorporated ProductFolderLinks:LM5041A

LM5041A www.ti.com SNVS350B–MARCH2005–REVISEDMARCH2013 PINDESCRIPTIONS PIN NAME DESCRIPTION APPLICATIONINFORMATION 1 V SourceInputVoltage Inputtostart-upregulator.Inputrange15Vto100V. IN Invertinginputfortheinternalerroramplifier.Thenon- 2 FB FeedbackSignal invertinginputisconnectedtoa0.75Vreference. Thereisaninternal5kΩresistorpull-uponthispin.The 3 COMP OutputoftheInternalErrorAmplifier erroramplifierprovidesanactivesink. Maximumoutputcurrent:10mA.Locallydecouplewitha 4 REF Precision5voltreferenceoutput 0.1µFcapacitor.ReferencestayslowuntilthelineUVand theV UVaresatisfied. CC BuckswitchPWMcontroloutput.Themaximumdutycycle clampforthisoutputcorrespondstoanofftimeoftypically 5 HD MainBuckPWMcontroloutput 240nspercycle.TheLM5101orLM5102Buckstagegate drivercanbeusedtolevelshiftanddrivetheBuckswitch. SyncSwitchcontroloutput.InversionofHDoutput.The 6 LD SyncSwitchcontroloutput LM5101orLM5102lowerdrivecanbeusedtodrivethe synchronousrectifierswitch. Ifanauxiliarywindingraisesthevoltageonthispinabove Outputfromtheinternalhighvoltagestart-up 7 V theregulationsetpoint,theinternalstart-upregulatorwill CC regulator.Regulatedto9volts. shutdown,reducingtheICpowerdissipation. Outputofthepush-pullgatedriver.Outputcapabilityof 8 PUSH Outputofthepush-pulldrivers 1.5Apeak. Outputofthepush-pullgatedriver.Outputcapabilityof 9 PULL Outputofthepush-pulldrivers 1.5Apeak. 10 PGND Powerground Connectdirectlytoanalogground. 11 AGND Analogground Connectdirectlytopowerground. CurrentsenseinputtothePWMcomparator(CMcontrol). Thereisa50nsleadingedgeblankingonthispin.Using 12 CS Currentsenseinput separatededicatedcomparator,ifCSexceeds0.5Vthe outputswillgointocyclebycyclecurrentlimit. Anexternalcapacitorandaninternal10uAcurrentsource, 13 SS Soft-startcontrol setthesoft-startramp. Anexternalresistor(R )setstheoverlaptimeordead SET timeforthepush-pulloutputs.Aresistorconnected 14 TIME Push-Pulloverlapanddeadtimecontrol betweenTIMEandGNDproducesoverlap.Aresistor connectedbetweenTIMEandREFproducesdeadtime. Anexternalresistorsetstheoscillatorfrequency.Thispin 15 RT/SYNC Oscillatortimingresistorpinandsync willalsoacceptanexternaloscillator. Anexternaldividerfromthepowerconvertersourcesets theshutdownlevels.Thresholdofoperationequals2.5V. 16 UVLO LineUnder-VoltageShutdown Hysteresisissetbyaswitchedinternalcurrentsource (20µA). TheexposeddieattachpadontheWSONpackageshould beconnectedtoaPCBthermalpadatgroundpotential. WSON SUB Diesubstrate ForadditionalinformationonusingtheNoPullBack DAP WSONpackage,pleaserefertoLLPApplicationNoteAN- 1187(SNOA401). Copyright©2005–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:LM5041A

LM5041A SNVS350B–MARCH2005–REVISEDMARCH2013 www.ti.com Block Diagram 9V SERIES VIN REGULATOR VCC 5V VCC REFERENCE VREF ENABLE UVLO UVLO + 2.5V - LOGI C UVLO HYSTERESIS 45 PA (20 PA) CLK HD 5V SLOPE COMP COMP RAMP GENERATOR 0.75V 5k PWM S Q LD + 100k + - FB - 1.4V R Q 50k LOGIC SS PGND CS + - 2k 0.5V CLK + LEB AGND 10 PA SS SS TIME VCC OSC DRIVE PUSH R CLK OVERLAP RT / SYNC OR OSCILLATOR DIVIDE BY 2 DEAD TIME VCC CONTROL DRIVE PULL R Figure3. SimplifiedBlockDiagram 4 SubmitDocumentationFeedback Copyright©2005–2013,TexasInstrumentsIncorporated ProductFolderLinks:LM5041A

LM5041A www.ti.com SNVS350B–MARCH2005–REVISEDMARCH2013 Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. Absolute Maximum Ratings(1)(2) V toGND 100V IN V toGND 16V CC AllOtherInputstoGND -0.3to7V JunctionTemperature 150°C StorageTemperatureRange -65°Cto+150°C ESDRating 2kV Wave 4seconds 260°C LeadTemperature(3) Infrared 10seconds 240°C VaporPhase 75seconds 219°C (1) AbsoluteMaximumRatingsarelimitsbeyondwhichdamagetothedevicemayoccur.OperatingRatingsareconditionsunderwhich operationofthedeviceisintendedtobefunctional.Forspecificationsandtestconditions,seetheElectricalCharacteristics. (2) IfMilitary/Aerospacespecifieddevicesarerequired,pleasecontacttheTexasInstrumentsSalesOffice/Distributorsforavailabilityand specifications. (3) FordetailedinformationonsolderingplasticTSSOPandWSONpackages,visitwww.ti.com/packaging. Operating Ratings(1) V 15to90V IN JunctionTemperature -40°Cto+125°C (1) AbsoluteMaximumRatingsarelimitsbeyondwhichdamagetothedevicemayoccur.OperatingRatingsareconditionsunderwhich operationofthedeviceisintendedtobefunctional.Forspecificationsandtestconditions,seetheElectricalCharacteristics. Electrical Characteristics SpecificationswithstandardtypefaceareforT =25°C,andthosewithboldfacetypeapplyoverfullOperatingJunction J Temperaturerange.V =48V,V =10V,RT=26.7kΩ,R =20kΩ)unlessotherwisestated(1) IN CC SET Symbol Parameter Conditions Min Typ Max Units StartupRegulator V Reg V Regulation opencircuit 8.7 9 9.3 V CC CC V CurrentLimit See(2) 15 25 mA CC I-V StartupRegulator IN Leakage(externalVcc V =100V 145 500 µA IN Supply) ShutdownCurrent(Iin) UVLO=0V,V =open 350 450 µA CC V Supply CC V Under-voltage CC V Reg- LockoutVoltage(positive CC V Reg-275mV V 400mV CC goingV ) cc V Under-voltage CC 1.7 2.1 2.6 V Hysteresis SupplyCurrent(I ) C =0 3 4 mA CC L ErrorAmplifier GBW GainBandwidth 3 MHz DCGain 80 dB InputVoltage V =COMP 0.735 0.75 0.765 V FB COMPSinkCapability V =1.5V,COMP=1V 4 8 mA FB (1) AllelectricalcharacteristicshavingroomtemperaturelimitsaretestedduringproductionwithT =T =25°C.Allhotandcoldlimitsare A J specifiedbycorrelatingtheelectricalcharacteristicstoprocessandtemperaturevariationsandapplyingstatisticalprocesscontrol. (2) Devicethermallimitationsmaylimitusablerange. Copyright©2005–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:LM5041A

LM5041A SNVS350B–MARCH2005–REVISEDMARCH2013 www.ti.com Electrical Characteristics (continued) SpecificationswithstandardtypefaceareforT =25°C,andthosewithboldfacetypeapplyoverfullOperatingJunction J Temperaturerange.V =48V,V =10V,RT=26.7kΩ,R =20kΩ)unlessotherwisestated(1) IN CC SET Symbol Parameter Conditions Min Typ Max Units ReferenceSupply V RefVoltage I =0mA 4.85 5 5.15 V REF REF RefVoltageRegulation I =0to10mA 25 50 mV REF RefCurrentLimit 15 20 mA CurrentLimit CSStepfrom0to0.6V ILIMDelaytoOutput TimetoOnsetofOUT 40 ns Transition(90%),C =0 L CyclebyCycleThreshold 0.45 0.5 0.55 V Voltage LeadingEdgeBlanking 50 ns Time CSSinkCurrent(clocked) CS=0.3V 2 5 mA Soft-Start Soft-startCurrentSource 7 10 13 µA Soft-starttoCOMPOffset 0.35 0.55 0.75 V Oscillator Frequency1 180 200 220 T =25°C kHz (RT=26.7KΩ) J 175 225 Frequency2 515 600 685 kHz (RT=7.87KΩ) Syncthreshold 3 3.5 V PWMComparator COMPsetto2VCSstepped DelaytoOutput 0to0.4V,Timetoonsetof 25 ns OUTtransitionlow MaxDutyCycle TS=OscillatorPeriod (Ts-240ns)/Ts) % MinDutyCycle COMP=0V 0 % COMPtoPWM 0.32 ComparatorGain COMPOpenCircuit FB=0V 4.1 4.8 5.5 V Voltage COMPShortCircuit FB=0V,COMP=0V 0.6 1 1.4 mA Current SlopeCompensation DeltaincreaseatPWM SlopeCompAmplitude 110 mV ComparatortoCS UVLOShutdown Under-voltageShutdown 2.44 2.5 2.56 V Under-voltageShutdown HysteresisCurrent 16 20 24 µA Source 6 SubmitDocumentationFeedback Copyright©2005–2013,TexasInstrumentsIncorporated ProductFolderLinks:LM5041A

LM5041A www.ti.com SNVS350B–MARCH2005–REVISEDMARCH2013 Electrical Characteristics (continued) SpecificationswithstandardtypefaceareforT =25°C,andthosewithboldfacetypeapplyoverfullOperatingJunction J Temperaturerange.V =48V,V =10V,RT=26.7kΩ,R =20kΩ)unlessotherwisestated(1) IN CC SET Symbol Parameter Conditions Min Typ Max Units BuckStageOutputs OutputHighlevel 5(V ) V REF OutputHighSaturation I =10mA,REF=V 0.5 1 V OUT OUT OutputLowSaturation I =−10mA 0.5 1 V OUT RiseTime C =100pF 10 ns L FallTime C =100pF 10 ns L Push-PullOutputs R =20kΩConnectedto SET OverlapTime GND,50%to50% 60 90 120 ns Transitions R =20kΩConnectedto SET DeadTime REF,50%to50% 65 95 125 ns Transitions OutputHighSaturation I =50mA,V -V 0.25 0.5 V OUT CC OUT OutputLowSaturation I =100mA 0.5 1 V OUT RiseTime C =1nF 20 ns L FallTime C =1nF 20 ns L ThermalShutdown T ThermalShutdownTemp. 165 °C SD ThermalShutdown 25 °C Hysteresis ThermalResistance θ TSSOPPackage 125 °C/W JA JunctiontoAmbient WSONPackage 32 °C/W Copyright©2005–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:LM5041A

LM5041A SNVS350B–MARCH2005–REVISEDMARCH2013 www.ti.com Typical Performance Characteristics V andV vsV V vsI CC IN IN CC CC 20 10 VIN 8 15 VIN = 15V V) (N 6 VI V) ND 10 VCC (CC A V 4 C C V 5 2 0 0 0 5 10 15 20 0 5 10 15 20 25 VIN (V) ICC (mA) Figure4. Figure5. SSPinCurrentvsTemp FrequencyvsRT 13 1000 12 A)P 11 Hz) NT ( Y (k E 10 C R N R E U U C Q S 9 E S R F 8 7 100 -25 25 75 125 1000 10000 100000 TEMPERATURE (oC) RT (:) Figure6. Figure7. OverlapTimevsR DeadTimevsR SET SET 500 500 400 400 ME (ns) 300 E (ns) 300 TI M P TI RLA 200 AD 200 VE DE O 100 100 0 0 10 30 50 70 90 110 10 30 50 70 90 110 RSET (k:) RSET (k:) Figure8. Figure9. 8 SubmitDocumentationFeedback Copyright©2005–2013,TexasInstrumentsIncorporated ProductFolderLinks:LM5041A

LM5041A www.ti.com SNVS350B–MARCH2005–REVISEDMARCH2013 Typical Performance Characteristics (continued) OverlapTimevsTemp DeadTimevsTemp 120 130 110 120 )sn( EMIT P 10900 RSET = 20k: )sn( EMIT 111000 RSET = 20k: ALR DA EV 80 ED 90 O 70 80 60 70 -25 25 75 125 -25 25 75 125 TEMPERATURE (oC) TEMPERATURE (oC) Figure10. Figure11. ErrorAmplifierGainPhase Figure12. Copyright©2005–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:LM5041A

LM5041A SNVS350B–MARCH2005–REVISEDMARCH2013 www.ti.com DETAILED OPERATING DESCRIPTION The LM5041A PWM controller contains all of the features necessary to implement either current-fed or voltage- fed push-pull or bridge power converters. These “Cascaded” topologies are well suited for multiple output and higher power applications. The LM5041A’s four control outputs include: the buck stage controls (HD and LD) and the push-pull control outputs (PUSH and PULL). Push-pull outputs are driven at 50% nominal duty cycle at one half of the switching frequency of the buck stage and can be configured for either an overlap time (for current-fed applications) or a both-off time (for voltage-fed applications). Push-pull stage MOSFETs can be driven directly from the internal gate drivers while the buck stage requires an external driver such as the LM5102. The LM5041A includes a high-voltage start-up regulator that operates over a wide input range of 15V to 100V. The PWM controller is designed for high-speed capability including an oscillator frequency range up to 1 MHz and totalpropagationdelaysoflessthan100ns.Additionalfeaturesinclude:lineUnder-VoltageLockout(UVLO),soft- start,anerroramplifier,precisionvoltagereference,andthermalshutdown. High Voltage Start-Up Regulator The LM5041A contains an internal high-voltage start-up regulator, thus the input pin (Vin) can be connected directly to the line voltage. The regulator output is internally current limited to 15mA. When power is applied, the regulator is enabled and sources current into an external capacitor connected to the Vcc pin. The recommended capacitance range for the Vcc regulator is 0.1uF to 100uF. When the voltage on the Vcc pin reaches the regulation point of 9V and the internal voltage reference (REF) reaches its regulation point of 5V, the controller outputs are enabled. The Buck stage outputs will remain enabled until Vcc falls below 7V or the line Under- Voltage Lockout detector indicates that Vin is out of range. The push-pull outputs continue switching until the REF pin voltage falls below approximately 3V. In typical applications, an auxiliary transformer winding is connected through a diode to the Vcc pin. This winding must raise the Vcc voltage above 9.3V to shut off the internal start-up regulator. Powering V from an auxiliary winding improves efficiency while reducing the CC controller's power dissipation. The recommended capacitance range for the Vref regulator output is 0.1uF to 10uF. The external V capacitor must be sized such that the capacitor maintains a V voltage greater than 7V during CC CC the initial start-up. During a fault mode when the converter auxiliary winding is inactive, external current draw on the V line should be limited so the power dissipated in the start-up regulator does not exceed the maximum CC powerdissipationofthecontroller. An external start-up or other bias rail can be used instead of the internal start-up regulator by connecting the V CC andtheV pinstogetherandfeedingtheexternalbiasvoltageintothetwopins. IN Line Under-Voltage Detector The LM5041A contains a line Under-Voltage Lockout (UVLO) circuit. An external set-point resistor divider from V to ground sets the operational range of the converter. The divider must be designed such that the voltage at IN theUVLOpinwillbegreaterthan2.5VwhenV isinthedesiredoperatingrange.IftheUnder-Voltagethreshold IN is not met, all functions of the controller are disabled and the controller will enter a low-power state with input current <300µA. ULVO hysteresis is accomplished with an internal 20µA current source that is switched on or off into the impedance of the set-point divider. When the UVLO threshold is exceeded, the current source is activated to instantly raise the voltage at the UVLO pin. When the UVLO pin falls below the 2.5V threshold, the current source is turned off causing the voltage at the UVLO pin to fall. The UVLO pin can also be used to implement a remote enable / disable function. By shorting the UVLO pin to ground, the converter can be disabled. Buck Stage Control Outputs The LM5041A Buck switch maximum duty cycle clamp ensures that there will be sufficient off time each cycle to recharge the bootstrap capacitor used in the high side gate driver. The Buck switch remains off, and the sync switch remains on, for at least 250ns per switching cycle. The Buck stage control outputs (LD and HD) are CMOSbufferswithlogiclevelsof0to5V. During any fault state or Under-Voltage off state, the buck stage control outputs will default to HD low and LD high. 10 SubmitDocumentationFeedback Copyright©2005–2013,TexasInstrumentsIncorporated ProductFolderLinks:LM5041A

LM5041A www.ti.com SNVS350B–MARCH2005–REVISEDMARCH2013 Push-Pull Outputs The push pull outputs operate continuously at a nominal 50% duty cycle. A distinguishing feature of the LM5041A is the ability to accurately configure either dead time (both-off) or overlap time (both-on) on the complementary push-pull outputs. The overlap/dead time magnitude is controlled by a resistor connected to the TIME pin on the controller. The TIME pin holds one end of the resistor at 2.5V and the other end of the resistor should be connected to either REF for dead time control setting or to GND for overlap control. The polarity of the current in the TIME is detected by the LM5041A The magnitude of the overlap/dead time can be calculated as follows: OverlapTime(ns)=(3.66xR )+7 SET OverlapTimeinns,R connectedtoGND,R inkΩ SET SET DeadTime(ns)=(3.69xR )+21 SET DeadTimeinns,R connectedtoREF,R inkΩ SET SET RecommendedR programmingrange:10kΩ to100kΩ SET Current-fed designs require a period of overlap to insure there is a continuous path for the buck inductor current. Voltage-fed designs require a period of dead time to insure there is no time when the push-pull transformer acts as a shorted turn to the low impedance sourcing node. The push-pull outputs alternate continuously under all conditionsprovidedREFthevoltageisgreaterthan3V. K1 * RSET PUSH DEADTIME WAVEFORMS K1 * RSET PULL K2 * RSET PUSH OVERLAP K2 * RSET WAVEFORMS PULL Figure13. PWM Comparator The PWM comparator compares the slope compensated current ramp signal to the loop error voltage from the internal error amplifier (COMP pin). This comparator is optimized for speed in order to achieve minimum controllabledutycycles.Thecomparatorpolarityissuchthat0VontheCOMPpinwillproducezerodutycyclein thebuckstage. Error Amplifier Aninternalhighgainwide-bandwidtherroramplifierisprovidedwithintheLM5041A.Theamplifier’snon-inverting input is tied to a 0.75V reference. The inverting input is connected to the FB pin. In non-isolated applications the power converter output is connected to the FB pin via the voltage setting resistors. Loop compensation components are connected between the COMP and FB pins. For most isolated applications the error amplifier function is implemented on the secondary side of the converter and the internal error amp is not used. The internal error amplifier is configured as an open drain output and can be disabled by connecting the FB pin to ground. An internal 5kΩ pull-up resistor between the 5V reference and COMP can be used as the pull-up for an opto-couplerinisolatedapplications. Copyright©2005–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:LM5041A

LM5041A SNVS350B–MARCH2005–REVISEDMARCH2013 www.ti.com Current Limit/Current Sense The LM5041A provides cycle-by-cycle over-current protection. If the voltage at the CS comparator (CS pin voltage plus slope comp voltage) exceeds 0.5V the present buck stage duty cycle is terminated (cycle by cycle current limit). A small RC filter located near the controller is recommended to filter current sense signals at the CS pin. An internal MOSFET discharges the external CS pin for an additional 50ns at the beginning of each cycletoreducetheleadingedgespikethatoccurswhenthebuckstageMOSFETisturnedon. The LM5041A current sense and PWM comparators are very fast, and may respond to short duration noise pulses. Layout considerations are critical for the current sense filter and sense resistor. The capacitor associated with the CS filter must be placed close to the device and connected directly to the pins of the controller (CS and GND). If a current sense transformer is used, both leads of the transformer secondary should be routed to the sense resistor, which should also be located close to the IC. A resistor may be used for current sensing instead of a transformer, located in the push-pull transistor sources, but a low inductance type of resistor is required. Whendesigningwithasenseresistor,allofthenoisesensitive low power grounds should be connected together around the IC and a single connection should be made to the high current power ground (sense resistor ground point). Oscillator and Sync Capability The LM5041A oscillator is set by a single external resistor connected between the RT pin and GND. To set a desiredoscillatorfrequency(F),thenecessaryRTresistorcanbecalculatedfrom: (1/F) - 235 x 10-9 RT = : 182 x 10-12 (1) The buck stage will switch at the oscillator frequency and each push-pull output will switch at half the oscillator frequencyinapush-pullconfiguration.TheLM5041Acanalsobesynchronizedtoanexternalclock.Theexternal clock must have a higher frequency than the free running frequency set by the RT resistor. The clock signal should be capacitively coupled into the RT pin with a 100pF capacitor. A peak voltage level greater than 3V is required for detection of the sync pulse. The sync pulse width should be set in the 15 to 150ns range by the external components. The RT resistor is always required, whether the oscillator is free running or externally synchronized. The voltage at the RT pin is internally regulated to 2V. The RT resistor should be located very closetothedeviceandconnecteddirectlytothepinsoftheIC(RTandGND). Slope Compensation The PWM comparator compares the current sense signal to the voltage at the COMP pin. The output stage of the internal error amplifier generally drives the COMP pin. At duty cycles greater than 50 percent, current mode control circuits are subject to sub-harmonic oscillation. By adding an additional fixed ramp signal (slope compensation) to the current sense ramp, oscillations can be avoided. The LM5041A integrates this slope compensation by buffering the internal oscillator ramp and summing a current ramp generated by the oscillator internally with the current sense signal. Additional slope compensation may be provided by increasing the source impedanceofthecurrentsensesignal. Soft-start and Shutdown The soft-start feature allows the power converter to gradually reach the initial steady state operating point, thereby reducing start-up stresses and surges. At power on, a 10uA current is sourced out of the soft-start pin (SS) to charge an external capacitor. The capacitor voltage will ramp up slowly and will limit the maximum duty cycle of the buck stage. In the event of a fault as indicated by V Under-voltage, line Under-voltage the output CC drivers are disabled and the soft-start capacitor is discharged to 0.7V. When the fault condition is no longer present, a soft-start sequence will begin again and buck stage duty cycle will gradually increase as the soft-start capacitorischarged. Thermal Protection Internal Thermal Shutdown circuitry is provided to protect the integrated circuit in the event that the maximum junctiontemperatureisexceeded.Whenactivated,typicallyat165degreesCelsius,thecontrollerisforcedintoa low-power standby state, disabling the output drivers and the bias regulator. This feature is provided to prevent catastrophicfailuresfromaccidentaldeviceoverheating. 12 SubmitDocumentationFeedback Copyright©2005–2013,TexasInstrumentsIncorporated ProductFolderLinks:LM5041A

LM5041A www.ti.com SNVS350B–MARCH2005–REVISEDMARCH2013 Typical Application VOUT T1 L1 33V - 76V VDD VDD HB VCC HB + HO HI VIN HD HI HO T1 HS HS LI LI + LD LO LO LM5100 LM5102 LM5041A VSS RT2 RT1 PUSH PULL COMP FEED BACK Figure14. SimplifiedCascadedHalf-Bridge Copyright©2005–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:LM5041A

LM5041A SNVS350B–MARCH2005–REVISEDMARCH2013 www.ti.com Application Circuit: Input 35-80V, Output 2.5V, 50A 14 SubmitDocumentationFeedback Copyright©2005–2013,TexasInstrumentsIncorporated ProductFolderLinks:LM5041A

LM5041A www.ti.com SNVS350B–MARCH2005–REVISEDMARCH2013 REVISION HISTORY ChangesfromRevisionA(March2013)toRevisionB Page • ChangedlayoutofNationalDataSheettoTIformat.......................................................................................................... 14 Copyright©2005–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:LM5041A

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) LM5041AMTC/NOPB ACTIVE TSSOP PW 16 92 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 LM5041A & no Sb/Br) MTC LM5041AMTCX/NOPB ACTIVE TSSOP PW 16 2500 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 LM5041A & no Sb/Br) MTC LM5041ASD/NOPB ACTIVE WSON NHQ 16 1000 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 5041ASD & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 6-Nov-2015 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) LM5041AMTCX/NOPB TSSOP PW 16 2500 330.0 12.4 6.95 5.6 1.6 8.0 12.0 Q1 LM5041ASD/NOPB WSON NHQ 16 1000 178.0 12.4 5.3 5.3 1.3 8.0 12.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 6-Nov-2015 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) LM5041AMTCX/NOPB TSSOP PW 16 2500 367.0 367.0 35.0 LM5041ASD/NOPB WSON NHQ 16 1000 210.0 185.0 35.0 PackMaterials-Page2

MECHANICAL DATA NHQ0016A SDA16A (Rev A) www.ti.com

PACKAGE OUTLINE PW0016A TSSOP - 1.2 mm max height SCALE 2.500 SMALL OUTLINE PACKAGE SEATING PLANE C 6.6 TYP 6.2 A 0.1 C PIN 1 INDEX AREA 14X 0.65 16 1 2X 5.1 4.55 4.9 NOTE 3 8 9 0.30 B 4.5 16X 0.19 1.2 MAX 4.3 0.1 C A B NOTE 4 (0.15) TYP SEE DETAIL A 0.25 GAGE PLANE 0.15 0.05 0.75 0.50 0 -8 DETA 20AIL A TYPICAL 4220204/A 02/2017 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side. 5. Reference JEDEC registration MO-153. www.ti.com

EXAMPLE BOARD LAYOUT PW0016A TSSOP - 1.2 mm max height SMALL OUTLINE PACKAGE 16X (1.5) SYMM (R0.05) TYP 1 16X (0.45) 16 SYMM 14X (0.65) 8 9 (5.8) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE: 10X SOLDER MASK METAL UNDER SOLDER MASK OPENING METAL SOLDER MASK OPENING EXPOSED METAL EXPOSED METAL 0.05 MAX 0.05 MIN ALL AROUND ALL AROUND NON-SOLDER MASK SOLDER MASK DEFINED DEFINED (PREFERRED) SOLDE15.000R MASK DETAILS 4220204/A 02/2017 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN PW0016A TSSOP - 1.2 mm max height SMALL OUTLINE PACKAGE 16X (1.5) SYMM (R0.05) TYP 1 16X (0.45) 16 SYMM 14X (0.65) 8 9 (5.8) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE: 10X 4220204/A 02/2017 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com

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