LM4876 www.ti.com SNAS054E–FEBRUARY2000–REVISEDMAY2013 LM4876 1.1W Audio Power Amplifier with Logic Low Shutdown CheckforSamples:LM4876 FEATURES DESCRIPTION 1 • DoesNotRequireOutputCouplingCapacitors, The LM4876 is a single 5V supply bridge-connected 2 audiopoweramplifiercapableofdelivering1.1W(typ) BootstrapCapacitors,OrSnubberCircuits ofcontinuousaveragepowertoan8Ω loadwith0.5% • 10-pinVSSOPand8-pinSOICPackages THD+N. • Unity-GainStable Like other audio amplifiers in the Boomer series, the • ExternalGainSet LM4876 is designed specifically to provide high quality output power with a minimal amount of APPLICATIONS external components. The LM4876 does not require output coupling capacitors, bootstrap capacitors, or • MobilePhones snubber networks. It is perfectly suited for low-power • PortableComputers portablesystems. • DesktopComputers The LM4876 features an active low externally • Low-VoltageAudioSystems controlled, micro-power shutdown mode. Additionally, the LM4876 features an internal thermal shutdown KEY SPECIFICATIONS protection mechanism. For PCB space efficiency, the LM4876 is available in VSSOP and SOIC surface • THD+Nat1kHzfor1WContinuousAverage mountpackages. OutputPowerinto8Ω 0.5%(max) • OutputPowerAt1kHzInto8Ω with10% The unity-gain stable LM4876's closed loop gain is setusingexternalresistors. THD+N1.5W(typ) • ShutdownCurrent0.01µA(typ) • SupplyVoltageRange2.0Vto5.5V Typical Application Figure1. TypicalLM4876AudioAmplifierApplicationCircuit Numbersin()arespecifictothe10-pinVSSOPpackage. 1 Pleasebeawarethatanimportantnoticeconcerningavailability,standardwarranty,anduseincriticalapplicationsof TexasInstrumentssemiconductorproductsanddisclaimerstheretoappearsattheendofthisdatasheet. Alltrademarksarethepropertyoftheirrespectiveowners. 2 PRODUCTIONDATAinformationiscurrentasofpublicationdate. Copyright©2000–2013,TexasInstrumentsIncorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarilyincludetestingofallparameters.

LM4876 SNAS054E–FEBRUARY2000–REVISEDMAY2013 www.ti.com Connection Diagrams Figure2. VSSOPPackage– TopView SeePackageNumberDGS Figure3. SOICPackage–TopView SeePackageNumberD Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. Absolute Maximum Ratings(1)(2) SupplyVoltage 6.0V StorageTemperature −65°Cto+150°C InputVoltage −0.3VtoV +0.3V DD PowerDissipation(3) InternallyLimited ESDSusceptibility(4) 2500V ESDSusceptibility(5) 250V JunctionTemperature 150°C VaporPhase(60sec.) 215°C SolderingInformation SmallOutlinePackage Infrared(15sec.) 220°C θ (typ)—DGS 56°C/W JC θ (typ)—DGS 210°C/W JA θ (typ)—D 35°C/W JC θ (typ)—D 140°C/W JA (1) IfMilitary/Aerospacespecifieddevicesarerequired,pleasecontacttheTexasInstruments'SalesOffice/Distributorsforavailabilityand specifications. (2) AbsoluteMaximumRatingsindicatelimitsbeyondwhichdamagetothedevicemayoccur.OperatingRatingsindicateconditionsfor whichthedeviceisfunctional,butdonotensurespecificperformancelimits.ElectricalCharacteristicsstateDCandACelectrical specificationsunderparticulartestconditionsthatensurespecificperformancelimits.Thisassumesthatthedeviceoperateswithinthe OperatingRatings.Specificationsarenotensuredforparameterswherenolimitisgiven.Thetypicalvalue,however,isagood indicationofdeviceperformance. (3) ThemaximumpowerdissipationmustbederatedatelevatedtemperaturesandisdictatedbyT ,θ ,andtheambienttemperature JMAX JA T .ThemaximumallowablepowerdissipationisP =(T –T )/θ orthenumbergiveninAbsoluteMaximumRatings,whichever A DMAX JMAX A JA islower.FortheLM4876,T =150°C.Thetypicaljunction-to-ambientthermalresistanceis140°C/WfortheDpackageand JMAX 210°C/WfortheDGSpackage. (4) Humanbodymodel,100pFdischargedthrougha1.5kΩresistor. (5) MachineModel,220pF–240pFdischargedthroughallpins. Operating Ratings TemperatureRange T ≤T ≤T −40°C≤T ≤85° MIN A MAX A SupplyVoltage 2.0V≤V ≤5.5V DD 2 SubmitDocumentationFeedback Copyright©2000–2013,TexasInstrumentsIncorporated ProductFolderLinks:LM4876

LM4876 www.ti.com SNAS054E–FEBRUARY2000–REVISEDMAY2013 Electrical Characteristics(1)(2) ThefollowingspecificationsapplyforV =5Vunlessotherwisespecified.LimitsapplyforT =25°C. DD A LM4876 Units Symbol Parameter Conditions Typical (3) Limit (4) (Limits) 2.0 V(min) V SupplyVoltage DD 5.5 V(max) I QuiescentPowerSupplyCurrent V =0V,I =0A 6.5 10.0 mA(max) DD IN o I ShutdownCurrent V =0V 0.01 2 µA(max) SD PIN1 V OutputOffsetVoltage V =0V 5 50 mV(max) OS IN THD=0.5%(max);f=1kHz;R =8Ω 1.10 W(min) L P OutputPower 1.0 o THD+N=10%;f=1kHz;R =8Ω 1.5 W L THD+N P =1Wrms;A =2;20Hz≤f≤20 0.25 % TotalHarmonicDistortion+Noise o VD kHz;R =8Ω L PSRR PowerSupplyRejectionRatio V =4.9Vto5.1V 65 dB DD (1) Allvoltagesaremeasuredwithrespecttothegroundpin,unlessotherwisespecified. (2) AbsoluteMaximumRatingsindicatelimitsbeyondwhichdamagetothedevicemayoccur.OperatingRatingsindicateconditionsfor whichthedeviceisfunctional,butdonotensurespecificperformancelimits.ElectricalCharacteristicsstateDCandACelectrical specificationsunderparticulartestconditionsthatensurespecificperformancelimits.Thisassumesthatthedeviceoperateswithinthe OperatingRatings.Specificationsarenotensuredforparameterswherenolimitisgiven.Thetypicalvalue,however,isagood indicationofdeviceperformance. (3) Typicalsaremeasuredat25°Candrepresenttheparametricnorm. (4) LimitsareensuredtoAOQL(AverageOutgoingQualityLevel). Electrical Characteristics V = 5/3.3/2.6V DD LM4876 Units Symbol Parameter Conditions Typical(1) Limit(2) (Limits) V ShutdownInputVoltageHigh 1.2 V(min) IH V ShutdownInputVoltageLow 0.4 V(max) IL (1) Typicalsaremeasuredat25°Candrepresenttheparametricnorm. (2) LimitsareensuredtoAOQL(AverageOutgoingQualityLevel). External Components Description (Figure1) Components FunctionalDescription 1. R Invertinginputresistancewhichsetstheclosed-loopgaininconjunctionwithR.Thisresistoralsoformsahighpass i f filterwithC atf =1/(2πRC). i C i i 2. C InputcouplingcapacitorwhichblockstheDCvoltageattheamplifiersinputterminals.Alsocreatesahighpassfilterwith i R atf =1/(2πRC).Refertothesection,SELECTINGPROPEREXTERNALCOMPONENTS,foranexplanationof i C i i howtodeterminethevalueofC. i 3. R Feedbackresistancewhichsetstheclosed-loopgaininconjunctionwithR. f i 4. C Supplybypasscapacitorwhichprovidespowersupplyfiltering.RefertothePOWERSUPPLYBYPASSINGsectionfor S informationconcerningproperplacementandselectionofthesupplybypasscapacitor. 5. C Bypasspincapacitorwhichprovideshalf-supplyfiltering.Refertothesection,SELECTINGPROPEREXTERNAL B COMPONENTS,forinformationconcerningproperplacementandselectionofC . B Copyright©2000–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:LM4876

LM4876 SNAS054E–FEBRUARY2000–REVISEDMAY2013 www.ti.com Typical Performance Characteristics THD+NvsFrequency THD+NvsFrequency Figure4. Figure5. THD+NvsFrequency THD+NvsOutputPower Figure6. Figure7. THD+NvsOutputPower THD+NvsOutputPower Figure8. Figure9. 4 SubmitDocumentationFeedback Copyright©2000–2013,TexasInstrumentsIncorporated ProductFolderLinks:LM4876

LM4876 www.ti.com SNAS054E–FEBRUARY2000–REVISEDMAY2013 Typical Performance Characteristics (continued) OutputPowervsSupplyVoltage OutputPowervsSupplyVoltage Figure10. Figure11. OutputPowervsSupplyVoltage OutputPowervsSupplyVoltage Figure12. Figure13. OutputPowervsLoadResistance PowerDissipationvsOutputPower Figure14. Figure15. Copyright©2000–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:LM4876

LM4876 SNAS054E–FEBRUARY2000–REVISEDMAY2013 www.ti.com Typical Performance Characteristics (continued) PowerDeratingCurve ClippingVoltagevsSupplyVoltage Figure16. Figure17. NoiseFloor FrequencyResponsevsInputCapacitorSize Figure18. Figure19. PowerSupplyRejectionRatio OpenLoopFrequencyResponse Figure20. Figure21. 6 SubmitDocumentationFeedback Copyright©2000–2013,TexasInstrumentsIncorporated ProductFolderLinks:LM4876

LM4876 www.ti.com SNAS054E–FEBRUARY2000–REVISEDMAY2013 Typical Performance Characteristics (continued) SupplyCurrentvsShutdownVoltage SupplyCurrentvsSupplyVoltage LM4876@VDD=5/3.3/2.6Vdc Figure22. Figure23. Copyright©2000–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:LM4876

LM4876 SNAS054E–FEBRUARY2000–REVISEDMAY2013 www.ti.com APPLICATION INFORMATION BRIDGE CONFIGURATION EXPLANATION As shown in Figure 1, the LM4876 consists of two operational amplifiers. External resistors R and R set the f i closed-loop gain of Amp1, whereas two internal 40kΩ resistors set Amp2's gain at -1. The LM4876 drives a load, suchasaspeaker,connectedbetweenthetwoamplifieroutputs,V 1andV 2. o o Figure 1 shows that the Amp1 output serves as the Amp2 input, which results in both amplifiers producing signals identical in magnitude, but 180° out of phase. Taking advantage of this phase difference, a load is placed between V 1 and V 2 and driven differentially (commonly referred to as "bridge mode"). This results in a o o differentialgainof A =2*(R/R) (1) VD f i Bridge mode is different from single-ended amplifiers that drive loads connected between a single amplifier's output and ground. For a given supply voltage, bridge mode has a distinct advantage over the single-ended configuration: its differential output doubles the voltage swing across the load. This results in four times the output power when compared to a single-ended amplifier under the same conditions. This increase in attainable output power assumes that the amplifier is not current limited or that the output signal is not clipped. To ensure minimum output signal clipping when choosing an amplifier's closed-loop gain, refer to the AUDIO POWER AMPLIFIERDESIGNsection. AnotheradvantageofthedifferentialbridgeoutputisnonetDCvoltageacrosstheload.Thisresultsfrombiasing V 1 and V 2 at half-supply. This eliminates the coupling capacitor that single supply, single-ended amplifiers o o require. Eliminating an output coupling capacitor in a single-ended configuration forces a single-supply amplifier's half-supply bias voltage across the load. The current flow created by the half-supply bias voltage increases internalICpowerdissipationandmaypermanentlydamageloadssuchasspeakers. POWER DISSIPATION Power dissipation is a major concern when designing a successful bridged or single-ended amplifier. Equation 2 states the maximum power dissipation point for a single-ended amplifier operating at a given supply voltage and drivingaspecifiedoutputload. P =(V )2/(2π2R )Single-Ended (2) DMAX DD L However, a direct consequence of the increased power delivered to the load by a bridge amplifier is higher internalpowerdissipationforthesameconditions. The LM4876 has two operational amplifiers in one package and the maximum internal power dissipation is four times that of a single-ended amplifier. Equation 3 states the maximum power dissipation for a bridge amplifier. However, even with this substantial increase in power dissipation, the LM4876 does not require heatsinking. FromEquation3,assuminga5Vpowersupplyandan8Ω load,themaximumpowerdissipationpointis633mW. P =4*(V )2/(2π2R )BridgeMode (3) DMAX DD L The maximum power dissipation point given by Equation 3 must not exceed the power dissipation given by Equation4: P =(T -T )/θ (4) DMAX JMAX A JA The LM4876's T = 150°C. In the D package, the LM4876's θ is 140°C/W. At any given ambient JMAX JA temperature T , use Equation 4 to find the maximum internal power dissipation supported by the IC packaging. A Rearranging Equation 4 results in Equation 5. This equation gives the maximum ambient temperature that still allowsmaximumpowerdissipationwithoutviolatingtheLM4876'smaximumjunctiontemperature. T =T -P θ (5) A JMAX DMAX JA For a typical application with a 5V power supply and an 8W load, the maximum ambient temperature that allows maximumpowerdissipationwithoutexceedingthemaximumjunctiontemperatureisapproximately61°C. T =P θ +T (6) JMAX DMAX JA A 8 SubmitDocumentationFeedback Copyright©2000–2013,TexasInstrumentsIncorporated ProductFolderLinks:LM4876

LM4876 www.ti.com SNAS054E–FEBRUARY2000–REVISEDMAY2013 FortheVSSOP10Apackage,θ =210°C/W.Equation6showsthatT ,fortheVSSOP10package,is158°C JA JMAX for an ambient temperature of 25°C and using the same 5V power supply and an 8Ω load. This violates the LM4876's 150°C maximum junction temperature when using the VSSOP10A package. Reduce the junction temperature by reducing the power supply voltage or increasing the load resistance. Further, allowance should be made for increased ambient temperatures. To achieve the same 61°C maximum ambient temperature found for the SOIC8 package, the VSSOP10 packaged part should operate on a 4.1V supply voltage when driving an 8Ω load. Alternatively, a 5V supply can be used when driving a load with a minimum resistance of 12Ω for the same61°Cmaximumambienttemperature. Fully charged Li-ion batteries typically supply 4.3V to portable applications such as cell phones. This supply voltage allows the LM4876 to drive loads with a minimum resistance of 9Ω without violating the maximum junctiontemperaturewhenthemaximumambienttemperatureis61°C. The above examples assume that a device is a surface mount part operating around the maximum power dissipation point. Since internal power dissipation is a function of output power, higher ambient temperatures are allowedasoutputpowerordutycycledecreases. If the result of Equation 3 is greater than that of Equation 4, then decrease the supply voltage, increase the load impedance, or reduce the ambient temperature. If these measures are insufficient, a heat sink can be added to reduce θ . The heat sink can be created using additional copper area around the package, with connections to JA the ground pin(s), supply pin and amplifier output pins. When adding a heat sink, the θ is the sum of θ , θ , JA JC CS and θ . ( θ is the junction-to-case thermal impedance, θ is the case-to-sink thermal impedance, and θ is SA JC CS SA the sink-to-ambient thermal impedance.) Refer to the Typical Performance Characteristics curves for power dissipationinformationatloweroutputpowerlevels. POWER SUPPLY BYPASSING As with any power amplifier, proper supply bypassing is critical for low noise performance and high power supply rejection. Applications that employ a 5V regulator typically use a 10µF in parallel with a 0.1µF filter capacitors to stabilize the regulator's output, reduce noise on the supply line, and improve the supply's transient response. However, their presence does not eliminate the need for local bypass capacitance at the LM4876's supply pins. Keep the length of leads and traces that connect capacitors between the LM4876's power supply pin and ground as short as possible. Connecting a 1µF capacitor between the BYPASS pin and ground improves the internal bias voltage's stability and improves the amplifier's PSRR. The PSRR improvements increase as the bypass pin capacitor value increases. Too large, however, and the amplifier's click and pop performance can be compromised. The selection of bypass capacitor values, especially C , depends on desired PSRR requirements, B click and pop performance (as explained in the section, SELECTING PROPER EXTERNAL COMPONENTS), systemcost,andsizeconstraints. MICRO-POWER SHUTDOWN The voltage applied to the SHUTDOWN pin controls the LM4876's shutdown function. Activate micro-power shutdown by applying a voltage below 400mV to the SHUTDOWN pin. When active, the LM4876's micro-power shutdown feature turns off the amplifier's bias circuitry, reducing the supply current. Though the LM4876 is in shutdown when 400mV is applied to the SHUTDOWN pin, the supply current may be higher than 0.01µA (typ) shutdown current. Therefore, for the lowest supply current during shutdown, connect the SHUTDOWN pin to ground. The relationship between the supply voltage, the shutdown current, and the voltage applied to the SHUTDOWNpinisshowninTypicalPerformanceCharacteristicscurves. There are a few ways to control the micro-power shutdown. These include using a single-pole, single-throw switch, a microprocessor, or a microcontroller. When using a switch, connect an external pull-down resistor between the SHUTDOWN pin and GND. Connect the switch between the SHUTDOWN pin and V . Select CC normal amplifier operation by closing the switch. Opening the switch connects the SHUTDOWN pin to GND through the pull-down resistor, activating micro-power shutdown. The switch and resistor ensure that the SHUTDOWN pin will not float. This prevents unwanted state changes. In a system with a microprocessor or a microcontroller, use a digital output to apply the control voltage to the SHUTDOWN pin. Driving the SHUTDOWN pinwithactivecircuitryeliminatesthepulldownresistor. Copyright©2000–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:LM4876

LM4876 SNAS054E–FEBRUARY2000–REVISEDMAY2013 www.ti.com SELECTING PROPER EXTERNAL COMPONENTS Optimizing the LM4876's performance requires properly selecting external components. Though the LM4876 operates well when using external components with wide tolerances, best performance is achieved by optimizing componentvalues. TheLM4876isunity-gainstable,givingadesignermaximumdesignflexibility.Thegainshouldbesettonomore than a given application requires. This allows the amplifier to achieve minimum THD+N and maximum signal-to- noise ratio. These parameters are compromised as the closed-loop gain increases. However, low gain demands input signals with greater voltage swings to achieve maximum output power. Fortunately, many signal sources such as audio CODECs have outputs of 1V (2.83V ). Please refer to the AUDIO POWER AMPLIFIER RMS P-P DESIGNsectionformoreinformationonselectingthepropergain. InputCapacitorValueSelection Amplifyingthelowestaudiofrequenciesrequireshighvalueinputcouplingcapacitor(C inFigure1).Ahighvalue i capacitor can be expensive and may compromise space efficiency in portable designs. In many cases, however, the speakers used in portable systems, whether internal or external, have little ability to reproduce signals below 150 Hz. Applications using speakers with this limited low frequency response reap little improvement by using a largeinputcapacitor. Besides affecting system cost and size, C also affects the LM4876's click and pop performance. When the i supplyvoltageisfirstapplied,atransient(pop)iscreatedasthechargeontheinputcapacitorchangesfromzero to a quiescent state. The magnitude of the pop is directly proportional to the input capacitor's size. Higher value capacitors need more time to reach a quiescent DC voltage (usually V /2) when charged with a fixed current. CC The amplifier's output charges the input capacitor through the feedback resistor, R. Thus, pops can be f minimized by selecting an input capacitor value that is no higher than necessary to meet the desired -3dB frequency. As shown in Figure 1, the input resistor (R) and the input capacitor, C produce a -3dB high pass filter cutoff I I frequencythatisfoundusingEquation7. f =2πR C (7) -3dB IN I Asanexamplewhenusingaspeakerwithalowfrequencylimitof150Hz,Equation7givesavalueofC equalto i 0.1µF.The0.22µFC showninFigure1allowsforaspeakerwhoseresponseextendsdownto75Hz. i BypassCapacitorValueSelection Besides minimizing the input capacitor size, careful consideration should be paid to value of, C , the capacitor B connected to the BYPASS pin. Since C determines how fast the LM4876 settles to quiescent operation, its B value is critical when minimizing turn-on pops. The slower the LM4876's outputs ramp to their quiescent DC voltage (nominally 1/2 V ), the smaller the turn-on pop. Choosing C equal to 1.0µF along with a small value of DD B C (in the range of 0.1µF to 0.39µF), produces a click-less and pop-less shutdown function. As discussed above, i choosingC assmallaspossiblehelpsminimizeclicksandpops. i AUDIO POWER AMPLIFIER DESIGN AudioAmplifierDesign:Driving1Wintoan8Ω Load Thefollowingarethedesiredoperationalparameters: PowerOutput 1W RMS LoadImpedance 8Ω InputLevel 1V RMS InputImpedance 20kΩ Bandwidth 100Hz–20kHz±0.25dB 10 SubmitDocumentationFeedback Copyright©2000–2013,TexasInstrumentsIncorporated ProductFolderLinks:LM4876

LM4876 www.ti.com SNAS054E–FEBRUARY2000–REVISEDMAY2013 The design begins by specifying the minimum supply voltage necessary to obtain the specified output power. One way to find the minimum supply voltage is to use the Output Power vs Supply Voltage curve in the Typical Performance Characteristics section. Another way, using Equation 8, is to calculate the peak output voltage necessarytoachievethedesiredoutputpowerforagivenloadimpedance.Toaccountfortheamplifier'sdropout voltage, two additional voltages, based on the Dropout Voltage vs Supply Voltage in the Typical Performance Characteristicscurves,mustbeaddedtotheresultobtainedbyEquation8.ThisresultsinEquation9. (8) V ≥(V +(V +V )) (9) CC OUTPEAK ODTOP ODBOT The Output Power vs Supply Voltage graph for an 8Ω load indicates a minimum supply voltage of 4.6V. This is easily met by the commonly used 5V supply voltage. The additional voltage creates the benefit of headroom, allowing the LM4876 to produce peak output power in excess of 1W without clipping or other audible distortion. The choice of supply voltage must also not create a violation of maximum power dissipation as explained above inthePOWERDISSIPATIONsection. After satisfying the LM4876's power dissipation requirements, the minimum differential gain is found using Equation10. (10) Thus,aminimumgainof2.83allowstheLM4876'storeachfulloutputswingandmaintainlownoiseandTHD+N performance.Forthisexample,letA =3. VD The amplifier's overall gain is set using the input (R) and feedback (R) resistors. With the desired input i f impedancesetat20kΩ,thefeedbackresistorisfoundusingEquation11. R/R =A /2 f i VD where • ThevalueofR is30kΩ. (11) f The last step in this design example is setting the amplifier's -3dB low frequency bandwidth. To achieve the desired ±0.25dB pass band magnitude variation limit, the low frequency response must extend to at least one- fifth the lower bandwidth limit and the high frequency response must extend to at least five times the upper bandwidthlimit.Theresultsisan f =100Hz/5=20Hz L andan F =20kHz*5=100kHz H As mentioned in the External Components Description section, R and C create a highpass filter that sets the i i amplifier'slowerbandpassfrequencylimit.Findthecouplingcapacitor'svalueusingEquation12. Ci≥1/(2πRif ) (12) L Theresultis 1/(2π*20kΩ*20Hz)=0.398µF. Usea0.39µFcapacitor,thecloseststandardvalue. The product of the desired high frequency cutoff (100kHz in this example) and the differential gain, A , VD determines the upper passband response limit. With A = 3 and f = 100kHz, the closed-loop gain bandwidth VD H product (GBWP) is 150kHz. This is less than the LM4876's 4MHz GBWP. With this margin, the amplifier can be usedindesignsthatrequiremoredifferentialgainandavoidperformance-restrictingbandwidthlimitations. Copyright©2000–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:LM4876

LM4876 SNAS054E–FEBRUARY2000–REVISEDMAY2013 www.ti.com REVISION HISTORY ChangesfromRevisionD(May2013)toRevisionE Page • ChangedlayoutofNationalDataSheettoTIformat.......................................................................................................... 11 12 SubmitDocumentationFeedback Copyright©2000–2013,TexasInstrumentsIncorporated ProductFolderLinks:LM4876

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) LM4876M/NOPB ACTIVE SOIC D 8 95 Green (RoHS SN Level-1-260C-UNLIM -40 to 85 LM487 & no Sb/Br) 6M LM4876MM/NOPB ACTIVE VSSOP DGS 10 1000 Green (RoHS SN Level-1-260C-UNLIM -40 to 85 G76 & no Sb/Br) LM4876MX/NOPB ACTIVE SOIC D 8 2500 Green (RoHS SN Level-1-260C-UNLIM -40 to 85 LM487 & no Sb/Br) 6M (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 12-Aug-2013 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) LM4876MM/NOPB VSSOP DGS 10 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LM4876MX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 12-Aug-2013 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) LM4876MM/NOPB VSSOP DGS 10 1000 210.0 185.0 35.0 LM4876MX/NOPB SOIC D 8 2500 367.0 367.0 35.0 PackMaterials-Page2

PACKAGE OUTLINE DGS0010A VSSOP - 1.1 mm max height SCALE 3.200 SMALL OUTLINE PACKAGE C 5.05 4.75 TYP SEATING PLANE A PIN 1 ID 0.1 C AREA 8X 0.5 10 1 3.1 2X 2.9 NOTE 3 2 5 6 0.27 10X 0.17 B 3.1 0.1 C A B 1.1 MAX 2.9 NOTE 4 0.23 TYP SEE DETAIL A 0.13 0.25 GAGE PLANE 0.15 0.7 0 - 8 0.05 0.4 DETAIL A TYPICAL 4221984/A 05/2015 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side. 5. Reference JEDEC registration MO-187, variation BA. www.ti.com

EXAMPLE BOARD LAYOUT DGS0010A VSSOP - 1.1 mm max height SMALL OUTLINE PACKAGE 10X (1.45) 10X (0.3) SYMM (R0.05) TYP 1 10 SYMM 8X (0.5) 5 6 (4.4) LAND PATTERN EXAMPLE SCALE:10X SOOPLEDNEINRG MASK METAL MSOELTDAEL RU NMDAESRK SOOPLEDNEINRG MASK 0.05 MAX 0.05 MIN ALL AROUND ALL AROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED SOLDER MASK DETAILS NOT TO SCALE 4221984/A 05/2015 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN DGS0010A VSSOP - 1.1 mm max height SMALL OUTLINE PACKAGE 10X (1.45) SYMM (R0.05) TYP 10X (0.3) 1 10 SYMM 8X (0.5) 5 6 (4.4) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:10X 4221984/A 05/2015 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com

PACKAGE OUTLINE D0008A SOIC - 1.75 mm max height SCALE 2.800 SMALL OUTLINE INTEGRATED CIRCUIT C SEATING PLANE .228-.244 TYP [5.80-6.19] .004 [0.1] C A PIN 1 ID AREA 6X .050 [1.27] 8 1 2X .189-.197 [4.81-5.00] .150 NOTE 3 [3.81] 4X (0 -15 ) 4 5 8X .012-.020 B .150-.157 [0.31-0.51] .069 MAX [3.81-3.98] .010 [0.25] C A B [1.75] NOTE 4 .005-.010 TYP [0.13-0.25] 4X (0 -15 ) SEE DETAIL A .010 [0.25] .004-.010 0 - 8 [0.11-0.25] .016-.050 [0.41-1.27] DETAIL A (.041) TYPICAL [1.04] 4214825/C 02/2019 NOTES: 1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed .006 [0.15] per side. 4. This dimension does not include interlead flash. 5. Reference JEDEC registration MS-012, variation AA. www.ti.com

EXAMPLE BOARD LAYOUT D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM SEE DETAILS 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:8X SOLDER MASK SOLDER MASK METAL OPENING OPENING METAL UNDER SOLDER MASK EXPOSED METAL EXPOSED METAL .0028 MAX .0028 MIN [0.07] [0.07] ALL AROUND ALL AROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED SOLDER MASK DETAILS 4214825/C 02/2019 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] SOLDER PASTE EXAMPLE BASED ON .005 INCH [0.125 MM] THICK STENCIL SCALE:8X 4214825/C 02/2019 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com

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