ICGOO在线商城 > 集成电路(IC) > PMIC - 电压基准 > LM4140CCMX-1.2/NOPB
数量阶梯 | 香港交货 | 国内含税 |
+xxxx | $xxxx | ¥xxxx |
查看当月历史价格
查看今年历史价格
LM4140CCMX-1.2/NOPB产品简介:
ICGOO电子元器件商城为您提供LM4140CCMX-1.2/NOPB由Texas Instruments设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 LM4140CCMX-1.2/NOPB价格参考。Texas InstrumentsLM4140CCMX-1.2/NOPB封装/规格:PMIC - 电压基准, 系列 电压基准 IC ±0.1% 8mA 8-SOIC。您可以下载LM4140CCMX-1.2/NOPB参考资料、Datasheet数据手册功能说明书,资料中有LM4140CCMX-1.2/NOPB 详细功能的应用电路图电压和使用方法及教程。
参数 | 数值 |
产品目录 | 集成电路 (IC) |
描述 | IC VREF SERIES PREC 1.25V 8-SOIC |
产品分类 | |
品牌 | Texas Instruments |
数据手册 | |
产品图片 | |
产品型号 | LM4140CCMX-1.2/NOPB |
rohs | 无铅 / 符合限制有害物质指令(RoHS)规范要求 |
产品系列 | - |
产品培训模块 | http://www.digikey.cn/PTM/IndividualPTM.page?site=cn&lang=zhs&ptm=26100 |
供应商器件封装 | 8-SOIC |
其它名称 | 296-37379-1 |
制造商产品页 | http://www.ti.com/general/docs/suppproductinfo.tsp?distId=10&orderablePartNumber=LM4140CCMX-1.2/NOPB |
包装 | 剪切带 (CT) |
参考类型 | 串联,精度 |
安装类型 | 表面贴装 |
容差 | ±0.1% |
封装/外壳 | 8-SOIC(0.154",3.90mm 宽) |
工作温度 | 0°C ~ 70°C |
标准包装 | 1 |
温度系数 | 10ppm/°C |
电压-输入 | 1.8 V ~ 5.5 V |
电压-输出 | 1.25V |
电流-输出 | 8mA |
电流-阴极 | - |
电流-静态 | 320µA |
通道数 | 1 |
Product Sample & Technical Tools & Support & Reference Folder Buy Documents Software Community Design LM4140 SNVS053F–JUNE2000–REVISEDSEPTEMBER2016 LM4140 High Precision Low Noise Low Dropout Voltage Reference 1 Features 3 Description • HighInitialAccuracy:0.1% The LM4140 series of precision references are 1 designed to combine high accuracy, low drift, and • Ultra-LowNoise noisewithlowpowerdissipationinasmallpackage. • LowTemperatureCoefficient:3ppm/°C(AGrade) The LM4140 is the industry's first reference with • LowVoltageOperation:1.8V output voltage options lower than the bandgap • LowDropoutVoltage:20mV(Typical)at1mA voltage. • SupplyCurrent:230µA(Typical), ≤ 1µADisable The key to the advance performance of the LM4140 Mode is the use of EEPROM registers and CMOS DACs for • EnablePin temperature coefficient curvature correction and trimming of the output voltage accuracy of the device • OutputVoltageOptions:1.024V,1.25V,2.048V, duringthefinalproductiontesting. 2.5V,and4.096V • CustomVoltagesFrom0.5Vto4.5V The major advantage of this method is the much higher resolution available with DACs than is • TemperatureRange:0°Cto70°C available economically with most methods used by otherbandgapreferences. 2 Applications The low input and dropout voltage, low supply • Portable,Battery-PoweredEquipment current, and output drive capability of the LM4140 • InstrumentationandTestEquipment makes this product an ideal choice for battery • Automotive poweredandportableapplications. • IndustrialProcessControl The LM4140 is available in three grades (A, B, C) • DataAcquisitionSystems with 0.1% initial accuracy and 3, 6, and 10 ppm/°C temperature coefficients. For even lower temperature • MedicalEquipment coefficients,contactTexasInstruments. • PrecisionScales The device performance is specified over the • ServoSystems temperature range 0°C to 70°C, and is available in • BatteryCharging compact8-pinpackage. For other output voltage options from 0.5 V to 4.5 V, contactTexasInstruments. DeviceInformation(1) PARTNUMBER PACKAGE BODYSIZE(NOM) LM4140 SOIC(8) 4.90mm×3.91mm (1) For all available packages, see the orderable addendum at theendofthedatasheet. TypicalApplication Input Output 2 6 VIN VREF COUT 5 1 (cid:133)F NC 3 Enable GND 1, 4 7, 8 Copyright © 2016, Texas Instruments Incorporated 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA.
LM4140 SNVS053F–JUNE2000–REVISEDSEPTEMBER2016 www.ti.com Table of Contents 1 Features.................................................................. 1 7.4 DeviceFunctionalModes........................................10 2 Applications........................................................... 1 8 ApplicationandImplementation........................ 11 3 Description............................................................. 1 8.1 ApplicationInformation............................................11 4 RevisionHistory..................................................... 2 8.2 TypicalApplications................................................14 5 PinConfigurationandFunctions......................... 3 9 PowerSupplyRecommendations...................... 20 6 Specifications......................................................... 4 10 Layout................................................................... 20 6.1 AbsoluteMaximumRatings......................................4 10.1 LayoutGuidelines.................................................20 6.2 ESDRatings..............................................................4 10.2 LayoutExample....................................................20 6.3 RecommendedOperatingConditions.......................4 11 DeviceandDocumentationSupport................. 21 6.4 ThermalInformation..................................................4 11.1 ReceivingNotificationofDocumentationUpdates21 6.5 ElectricalCharacteristics...........................................5 11.2 CommunityResources..........................................21 6.6 TypicalCharacteristics..............................................6 11.3 Trademarks...........................................................21 7 DetailedDescription............................................ 10 11.4 ElectrostaticDischargeCaution............................21 7.1 Overview.................................................................10 11.5 Glossary................................................................21 7.2 FunctionalBlockDiagram.......................................10 12 Mechanical,Packaging,andOrderable Information........................................................... 21 7.3 FeatureDescription.................................................10 4 Revision History NOTE:Pagenumbersforpreviousrevisionsmaydifferfrompagenumbersinthecurrentversion. ChangesfromRevisionE(April2013)toRevisionF Page • AddedESDRatingstable,FeatureDescriptionsection,DeviceFunctionalModes,ApplicationandImplementation section,PowerSupplyRecommendationssection,Layoutsection,DeviceandDocumentationSupportsection,and Mechanical,Packaging,andOrderableInformationsection.................................................................................................. 1 • AddedThermalInformationtable........................................................................................................................................... 4 ChangesfromRevisionD(April2005)toRevisionE Page • ChangedlayoutofNationalSemiconductorDataSheettoTIformat.................................................................................... 1 2 SubmitDocumentationFeedback Copyright©2000–2016,TexasInstrumentsIncorporated ProductFolderLinks:LM4140
LM4140 www.ti.com SNVS053F–JUNE2000–REVISEDSEPTEMBER2016 5 Pin Configuration and Functions DPackage 8-PinSOIC TopView Ground 1 8 Ground VIN 2 7 Ground Enable 3 6 VREF Ground 4 5 NC Not to scale PinFunctions PIN TYPE(1) DESCRIPTION NAME NO. Enable 3 I Pulledtoinputfornormaloperation.Forcingthispintogroundturnsofftheoutput. Ground 1,4,7,8 G Negativesupplyorgroundconnection.Thesepinsmustbeconnectedtoground. NC 5 — Thispinmustbeleftopen. V 2 I Positivesupply. IN V 6 O Referenceoutput.Capableofsourcingupto8mA. REF (1) G=Ground,I=Input,O=Output Copyright©2000–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:LM4140
LM4140 SNVS053F–JUNE2000–REVISEDSEPTEMBER2016 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings overoperatingfree-airtemperaturerange(unlessotherwisenoted)(1) MIN MAX UNIT Maximumvoltageonanyinputpin –0.3 5.6 V Outputshort-circuitduration Indefinite Powerdissipation(T =25°C)(2) 345 mW A Storagetemperature,T –65 150 °C stg (1) StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thesearestressratings only,whichdonotimplyfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderRecommended OperatingConditions.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. (2) WithoutPCBcopperenhancements.ThemaximumpowerdissipationmustbederatedatelevatedtemperaturesandislimitedbyT JMAX (maximumjunctiontemperature),R (junctiontoambientthermalresistance)andT (ambienttemperature).Themaximumpower θJA A dissipationatanytemperatureis:PDiss =(T −T )/R uptothevaluelistedintheAbsoluteMaximumRatings.TheR for MAX JMAX A θJA θJA the8-pinSOICpackageis160°C/W. 6.2 ESD Ratings VALUE UNIT Human-bodymodel(HBM),perANSI/ESDA/JEDECJS-001(1) ±2000 V Electrostaticdischarge V (ESD) Charged-devicemodel(CDM),perJEDECspecificationJESD22-C101(2) ±200 (1) JEDECdocumentJEP155statesthat500-VHBMallowssafemanufacturingwithastandardESDcontrolprocess. (2) JEDECdocumentJEP157statesthat250-VCDMallowssafemanufacturingwithastandardESDcontrolprocess. 6.3 Recommended Operating Conditions overoperatingfree-airtemperaturerange(unlessotherwisenoted) MIN NOM MAX UNIT Ambienttemperature 0 70 °C Junctiontemperature 0 80 °C 6.4 Thermal Information LM4140 THERMALMETRIC(1) D(SOIC) UNIT 8PINS R Junction-to-ambientthermalresistance 119.3 °C/W θJA R Junction-to-case(top)thermalresistance 52.3 °C/W θJC(top) R Junction-to-boardthermalresistance 60.3 °C/W θJB ψ Junction-to-topcharacterizationparameter 14.5 °C/W JT ψ Junction-to-boardcharacterizationparameter 59.7 °C/W JB R Junction-to-case(bottom)thermalresistance — °C/W θJC(bot) (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheSemiconductorandICPackageThermalMetricsapplication report. 4 SubmitDocumentationFeedback Copyright©2000–2016,TexasInstrumentsIncorporated ProductFolderLinks:LM4140
LM4140 www.ti.com SNVS053F–JUNE2000–REVISEDSEPTEMBER2016 6.5 Electrical Characteristics V =3Vforthe1.024-Vand1.25-V,V =5Vforallothervoltageoptions,V =V ,C =1µF(1),I =1mA,and IN IN EN IN OUT LOAD T =T =25°C(unlessotherwisenoted) A J PARAMETER TESTCONDITIONS MIN(2) TYP(3) MAX(2) UNIT Outputvoltageinitial VREF accuracy(4) Allversions ±0.1% Agrade 3 TCVREF/°C Temperaturecoefficient 0°C≤TA≤70°C Bgrade 6 ppm/°C Cgrade 10 TA=25°C 50 300 1.024-Vand1.25-Voptions,1.8V≤VIN≤5.5V 0°C≤TA≤70°C 350 ΔVREF/ΔVIN Lineregulation ppm/V Allothervoltageoptions, TA=25°C 20 200 Vref+200mV≤VIN≤5.5V 0°C≤TA≤70°C 250 TA=25°C 1 20 Allothervoltageoptions 0°C≤TA≤70°C 150 ΔVREF/ΔILOAD Loadregulation 1mA≤ILOAD≤8mA ppm/mA TA=25°C 5 35 4.096-Voption 0°C≤TA≤70°C 150 ΔVREF Long-termstability 1000hours 60 ppm ΔVREF Thermalhysteresis(5) 0°C≤TA≤+70°C 20 ppm Operatingvoltage 1.024-Vand1.25-Voptions,IL=1mAto8mA,0°C≤TA≤70°C 1.8 5.5 V TA=25°C 20 40 IL=1mA 2.048-Vand2.5-V 0°C≤TA≤70°C 45 options TA=25°C 160 235 IL=8mA VIN-VREF Dropoutvoltage(6) 0°C≤TA≤70°C 400 mV TA=25°C 20 40 IL=1mA 0°C≤TA≤70°C 45 4.096-Voption TA=25°C 195 270 IL=8mA 0°C≤TA≤70°C 490 VN Outputnoisevoltage(7) 0.1Hzto10Hz 2.2 µVPP TA=25°C 230 320 Allothervoltageoptions 0°C≤TA≤70°C 375 IS(ON) Supplycurrent ILOAD=0mA µA TA=25°C 265 350 4.096-Voption 0°C≤TA≤70°C 400 TA=25°C 0.01 IS(OFF) Supplycurrent VEnable<0.4V µA 0°C≤TA≤70°C 1 VH Logichighinputvoltage 0°C≤TA≤70°C 0.8×VIN V IH Logichighinputcurrent 2 nA VL Logiclowinputvoltage 0°C≤TA≤70°C 0.4 V IL Logiclowinputcurrent 1 nA TA=25°C 8.5 20 35 ISC Short-circuitcurrent mA 0°C≤TA≤70°C 40 (1) Forproperoperation,a1-µFcapacitorisrequiredbetweentheoutputpinandtheGNDpinofthedevice. (2) Limitsare100%productiontestedat25°C.LimitsovertheoperatingtemperaturerangeareensuredthroughcorrelationusingStatistical QualityControl(SQC)methods.ThelimitsareusedtocalculateTI'sAverageOutgoingQualityLevel(AOQL). (3) Typicalnumbersareat25°Candrepresentthemostlikelyparametricnorm. (4) HightemperatureandmechanicalstressassociatedwithPCBassemblycanhavesignificantimpactontheinitialaccuracyofthe LM4140andmaycreatesignificantshiftsinV . REF (5) Thermalhysteresisisdefinedasthechangesin25°Coutputvoltagebeforeandafterthecyclingofthedevicefrom0°Cto70°C. (6) Dropoutvoltageisdefinedastheminimuminputtooutputdifferentialvoltageatwhichtheoutputvoltagedropsby0.5%belowthevalue measuredwithV =3Vforthe1.024-Vand1.25-V,V =5Vforallothervoltageoptions. IN IN (7) Theoutputnoiseisbasedon1.024Voption.OutputnoiseislinearlyproportionaltoV . REF Copyright©2000–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:LM4140
LM4140 SNVS053F–JUNE2000–REVISEDSEPTEMBER2016 www.ti.com 6.6 Typical Characteristics T =25°C,noload,C =1µF,V =3Vfor1.024-Vand1.25-V,and5Vforallothervoltageoptions,andV =V A OUT IN IN EN (unlessotherwisenoted).The1-µFoutputcapacitorisactivelydischargedtoground(seeON/OFFOperationformore details). Figure1.PowerUpandDownGroundCurrent Figure2.EnableResponse Figure3.LineTransientResponse Figure4.LoadTransientResponse Figure5.OutputImpedance Figure6.PowerSupplyRejectionRatio 6 SubmitDocumentationFeedback Copyright©2000–2016,TexasInstrumentsIncorporated ProductFolderLinks:LM4140
LM4140 www.ti.com SNVS053F–JUNE2000–REVISEDSEPTEMBER2016 Typical Characteristics (continued) T =25°C,noload,C =1µF,V =3Vfor1.024-Vand1.25-V,and5Vforallothervoltageoptions,andV =V A OUT IN IN EN (unlessotherwisenoted).The1-µFoutputcapacitorisactivelydischargedtoground(seeON/OFFOperationformore details). 1.024-Vand1.25-Voptionsrequire1.8-Vsupply Figure7.DropoutVoltagevsLoadCurrent Figure8.OutputVoltageChangevsSinkCurrent(ISINK) Figure9.TotalCurrent(I )vsSupplyVoltage Figure10.TotalCurrent(I )vsSupplyVoltage S(OFF) S(ON) Figure11.SpectralNoiseDensity(0.1Hzto10Hz) Figure12.SpectralNoiseDensity(10Hzto100kHz) Copyright©2000–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:LM4140
LM4140 SNVS053F–JUNE2000–REVISEDSEPTEMBER2016 www.ti.com Typical Characteristics (continued) T =25°C,noload,C =1µF,V =3Vfor1.024-Vand1.25-V,and5Vforallothervoltageoptions,andV =V A OUT IN IN EN (unlessotherwisenoted).The1-µFoutputcapacitorisactivelydischargedtoground(seeON/OFFOperationformore details). Figure13.GroundCurrentvsLoadCurrent Figure14.Long-TermDrift Figure15.LoadRegulationvsTemperature Figure16.OutputVoltagevsLoadCurrent Figure17.LineRegulationvsTemperature Figure18.I vsTemperature Q 8 SubmitDocumentationFeedback Copyright©2000–2016,TexasInstrumentsIncorporated ProductFolderLinks:LM4140
LM4140 www.ti.com SNVS053F–JUNE2000–REVISEDSEPTEMBER2016 Typical Characteristics (continued) T =25°C,noload,C =1µF,V =3Vfor1.024-Vand1.25-V,and5Vforallothervoltageoptions,andV =V A OUT IN IN EN (unlessotherwisenoted).The1-µFoutputcapacitorisactivelydischargedtoground(seeON/OFFOperationformore details). Figure19.Short-CircuitCurrentvsTemperature Figure20.DropoutVoltagevsLoadCurrent(VOUT)=2V Figure21.TypicalTemperatureCoefficient(Sampleof5Parts) Copyright©2000–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:LM4140
LM4140 SNVS053F–JUNE2000–REVISEDSEPTEMBER2016 www.ti.com 7 Detailed Description 7.1 Overview The LM4140 device is a high-precision series voltage reference available in 5 difference output voltage options, including the 1.024-V option below the bandgap voltage. The series reference can operate with input voltage as low as VREF + 400 mV over temperature, consuming 400 µA or less over temperature depending on voltage option.Whileinshutdown,thedeviceconsumes10nA(typical). 7.2 Functional Block Diagram VIN EN – Bandgap Cell + VOUT Copyright © 2016, Texas Instruments Incorporated 7.3 Feature Description 7.3.1 ON/OFFOperation TheLM4140isdesignedtoquicklyreducebothV andI tozerowhenturnedoff.V isrestoredinlessthan REF Q REF 200 µs when turned on. During the turnoff, the charge across the output capacitor is discharged to ground throughinternalcircuitry. The LM4140 is turned off by pulling the enable input low, and turned on by driving the input high. If this feature is not to be used, the enable pin must be tied to the V to keep the reference on at all times (the enable pin must IN notbeleftfloating). To ensure proper operation, the signal source used to drive the enable pin must be able to swing above and below the specified high and low voltage thresholds which ensure an ON or OFF state (see Electrical Characteristics). The ON/OFF signal may come from either a totem-pole output, or an open-collector output with pullup resistor to the LM4140 input voltage. This high-level voltage may exceed the LM4140 input voltage, but must remain within theabsolutemaximumratingfortheenablepin. 7.4 Device Functional Modes Table1liststheoperationalmodesoftheLM4140. Table1.OperationalModes ENABLEPIN LOGICSTATE DESCRIPTION EN=V 1 Normaloperation,devicepoweredup IN EN=Ground 0 Deviceinshutdown 10 SubmitDocumentationFeedback Copyright©2000–2016,TexasInstrumentsIncorporated ProductFolderLinks:LM4140
LM4140 www.ti.com SNVS053F–JUNE2000–REVISEDSEPTEMBER2016 8 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validateandtesttheirdesignimplementationtoconfirmsystemfunctionality. 8.1 Application Information 8.1.1 InputCapacitors Althoughnotalwaysrequired,TIrecommendsaninputcapacitor.Asupplybypasscapacitorontheinputassures thatthereferenceisworkingfromasourcewithlowimpedance,whichimprovesstability.Abypasscapacitorcan also improve transient response by providing a reservoir of stored energy that the reference can use in case wheretheloadcurrentdemandsuddenlyincreases.ThevalueusedforC maybeusedwithoutlimit. IN 8.1.2 OutputCapacitors The LM4140 requires a 1-µF (nominally) output capacitor for loop stability (compensation) as well as transient response. During the sudden changes in load current demand, the output capacitor must source or sink current duringthetimeittakesthecontrolloopoftheLM4140torespond. This capacitor must be selected to meet the requirements of minimum capacitance and equivalent series resistance(ESR)range. In general, the capacitor value must be at least 0.2 µF (over the actual ambient operating temperature), and the ESRmustbewithintherangeindicatedinFigure22,Figure23,andFigure24. Figure22.0.22-µFESRRange Figure23.1-µFESRRange Copyright©2000–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:LM4140
LM4140 SNVS053F–JUNE2000–REVISEDSEPTEMBER2016 www.ti.com Application Information (continued) Figure24.10-µFESRRange 8.1.3 TantalumCapacitors Surface-mountable solid tantalum capacitors offer a good combination of small physical size for the capacitance value, and ESR in the range required by the LM4140. The results of testing the LM4140 stability with surface mount solid tantalum capacitors show good stability with values in the range of 0.1 µF. However, optimum performanceisachievedwitha1-µFcapacitor. Table2showstantalumcapacitorsthathavebeenverifiedassuitableforusewiththeLM4140. Table2.1-µFSurface-MountTantalumCapacitor SelectionGuide MANUFACTURER PARTNUMBER Kemet T491A105M010AS NEC NRU105N10 Siemens B45196-E3105-K Nichicon F931C105MA Sprague 293D105X0016A2T Table3.2.2-µFSurface-MountTantalumCapacitor SelectionGuide MANUFACTURER PARTNUMBER Kemet T491A225M010AS NEC NRU225M06 Siemens B45196/2.2/10/10 Nichicon F930J225MA Sprague 293D225X0010A2T 8.1.4 AluminumElectrolyticCapacitors Although probably not a good choice for a production design, because of relatively large physical size, an aluminium electrolytic capacitor can be used in the design prototype for an LM4140 reference. A 1-µF capacitor meeting the ESR conditions can be used. If the operating temperature drops below 0°C, the reference may not remain stable, as the ESR of the aluminium electrolytic capacitor increases, and may exceed the limits indicated inthefigures. 12 SubmitDocumentationFeedback Copyright©2000–2016,TexasInstrumentsIncorporated ProductFolderLinks:LM4140
LM4140 www.ti.com SNVS053F–JUNE2000–REVISEDSEPTEMBER2016 8.1.5 MultilayerCeramicCapacitors Surface-mountable multilayer ceramic capacitors may be an attractive choice because of their relatively small physicalsizeandexcellentRFcharacteristics. However, they sometimes have an ESR values lower than the minimum required by the LM4140, and relatively large capacitance change with temperature. The manufacturer's datasheet for the capacitor must be consulted before selecting a value. Test results of LM4140 stability using multilayer ceramic capacitors show that a minimumof0.2µFisusuallyrequired. Table4showsthemultilayerceramiccapacitorsthathavebeenverifiedassuitableforusewiththeLM4140. Table4.Surface-MountCeramicCapacitorsSelection Guide CAPACITOR(µF) MANUFACTURER PARTNUMBER 2.2 Tokin 1E225ZY5U-C203 2.2 Murata GRM42-6Y5V225Z16 4.7 Tokin 1E475ZY5U-C304 8.1.6 ReverseCurrentPath The P-channel Pass transistor used in the LM4140 has an inherent diode connected between the V and V IN REF pins(seeFigure25). Figure25. InternalP-ChannelPassTransistor Forcing the output to voltages higher than the input, or pulling V below voltage stored on the output capacitor IN by more than a V , forward biases this diode and current flows from the V terminal to V . No damage to the be REF IN LM4140occursundertheseconditionsaslongasthecurrentflowingintotheoutputpindoesnotexceed50mA. 8.1.7 OutputAccuracy Likeallreferences,eitherseriesorshunt,theafterassemblyaccuracyismadeupofprimarilythreecomponents: initialaccuracyitself,thermalhysteresis,andeffectsofthePCBassemblystress. LM4140providesanexcellentoutputinitialaccuracyof0.1%andtemperaturecoefficientof6ppm/°C(BGrade). Forbestaccuracyandprecision,theLM4140junctiontemperaturemustnotexceed70°C. The thermal hysteresis curve on this datasheet are performance characteristics of three typical parts selected at randomfromasampleof40parts. Parts are mounted in a socket to minimize the effect of PCB's mechnical expansion and contraction. Readings are taken at 25°C following multiple temperature cycles to 0°C and 70°C. The labels on the X axis of Figure 26 indicatethedevicetemperaturecyclepriortomeasurementat25°C. Copyright©2000–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:LM4140
LM4140 SNVS053F–JUNE2000–REVISEDSEPTEMBER2016 www.ti.com Figure26. TypicalThermalHysteresis The mechanical stress due to the PCB's mechanical and thermal stress can cause an output voltage shift more than the true thermal coefficient of the device. References in surface mount packages are more susceptible to thesestressesbecauseofthesmallamountofplasticmoldingwhichsupporttheleads. FollowingtherecommendationsonLayoutcanminimizethemechanicalstressonthedevice. 8.2 Typical Applications 8.2.1 PrecisionDACReference 4.1 k(cid:13) VIN VIN VREF LM4140 4.7 (cid:29)F 50 k(cid:13)(cid:3)(cid:3)10T -4.096 1 mA EN 100 k(cid:13) GND DAC Copyright © 2016, Texas Instruments Incorporated Figure27. PrecisionDACReferenceSchematic 8.2.1.1 DesignRequirements Generateaprecision,temperature-stablevoltagereferenceforuseindigital-to-analogconverterapplications. 8.2.1.2 DetailedDesignProcedure Use LM4140-4.096 to generate a 4.096-V reference voltage. Use an adjustable resistor network to fine tune the reference. 14 SubmitDocumentationFeedback Copyright©2000–2016,TexasInstrumentsIncorporated ProductFolderLinks:LM4140
LM4140 www.ti.com SNVS053F–JUNE2000–REVISEDSEPTEMBER2016 Typical Applications (continued) 8.2.1.3 ApplicationCurves Figure28.OutputVoltagevsLoadCurrent Figure29.TypicalTemperatureCoefficient (Sampleof5Parts) 8.2.2 BoostedOutputCurrent VIN + = 5.0 V 10 (cid:29)F 500 (cid:13) 2N2907 100 k(cid:13) VIN VOUT= 2.5 V VREF at 50 mA V0VIN OOnff LM– 421.540 + 10 (cid:29)F EN GND Copyright © 2016, Texas Instruments Incorporated Figure30. BoostedOutputCurrentSchematic 8.2.2.1 DesignRequirements Generateareferencevoltagethatcansupport50mA. 8.2.2.2 DetailedDesignProcedure The LM4140-2.5 sets the reference level at 2.5 V. A 2N2907 PNP transistor is added, where the base is tied to V through a 500-Ω resistor. The input current into the LM4140 increases with load current, which increases the IN voltage drop across the 500-Ω resistor until the PNP transistor turns on and supplements the load current. See Figure30forthecircuitdiagram. Copyright©2000–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:LM4140
LM4140 SNVS053F–JUNE2000–REVISEDSEPTEMBER2016 www.ti.com Typical Applications (continued) 8.2.3 BoostedOutputCurrentWithCurrentLimiter VIN 12 k(cid:13) = 4.5 V to 5.5 V + 1 k(cid:13) 10 (cid:29)F 2 X 2N2907 IN OUT VOUT= 2.5 V at 50 mA + VIN On LM– 421.540 10 (cid:29)F 0V Off EN GND Copyright © 2016, Texas Instruments Incorporated Figure31. BoostedOutputCurrentWithCurrentLimiterSchematic 8.2.3.1 DesignRequirements Generateareferencevoltagethatcansupport50mAwithcurrentlimiter. 8.2.3.2 DetailedDesignProcedure The LM4140-2.5 sets the reference level at 2.5 V. Similar to Boosted Output Current, a PNP transistor is added between V and the output. Another PNP transistor is added to sense the current between V and the load. IN IN Thisadditionaltransistorturnsonabove50mA,whichturnsoffthepasstransistortotheload. 8.2.4 ComplimentaryOutputs VREF VIN VREF R LM4140 – 1(cid:29)F EN + –VREF GND R/2 Copyright © 2016, Texas Instruments Incorporated *LowNoiseOpAmpsuchasOP-27 Figure32. ComplimentaryOutputsSchematic 8.2.4.1 DesignRequirements Generateapositiveandnegativevoltagereference. 8.2.4.2 DetailedDesignProcedure Use the LM4140 to generate the positive reference. Pass the reference into a unity gain inverting amplifier for a negativereferenceoutput. 16 SubmitDocumentationFeedback Copyright©2000–2016,TexasInstrumentsIncorporated ProductFolderLinks:LM4140
LM4140 www.ti.com SNVS053F–JUNE2000–REVISEDSEPTEMBER2016 Typical Applications (continued) 8.2.5 VoltageReferenceWithForceandSenseOutput VIN VREF + VREFForce LM4140 100 k(cid:13) – 1 (cid:29)F VREF Sense EN GND Copyright © 2016, Texas Instruments Incorporated Figure33. VoltageReferenceWithForceandSenseOutputSchematic 8.2.5.1 DesignRequirements Designavoltagereferencesourcethathasaforceandsenseoutput. 8.2.5.2 DetailedDesignProcedure Use the LM4140 to generate a reference voltage. Pass this into the positive input terminal of an operation amplifier,andusethenegativeinputasthesenseinputfromtheload. 8.2.6 PrecisionProgrammableCurrentSource VIN IN OUT LM4140 R1 2.45 k(cid:13) EN 1 (cid:29)F RSET GND 1k(cid:13) IREF RL V !I uR (cid:14)V IN OUT L REF 1k(cid:13) V I ( REF )(cid:14)I OUT (R (cid:14)R ) REF 1 SET R1 2.45k: for I 1mA using LM4120(cid:16)2.5 L Copyright © 2016, Texas Instruments Incorporated Figure34. PrecisionProgrammableCurrentSourceSchematic 8.2.6.1 DesignRequirements Createaprecision,adjustablecurrentsource. 8.2.6.2 DetailedDesignProcedure Use LM4140 to create reference voltage across an adjustable resistor, R1 + RSET. The voltage reference createsaconstantvoltagesource,andtheadjustableresistorgeneratesaproportionalcurrent. Copyright©2000–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 17 ProductFolderLinks:LM4140
LM4140 SNVS053F–JUNE2000–REVISEDSEPTEMBER2016 www.ti.com Typical Applications (continued) 8.2.7 StrainGaugeConditionerfor350-ΩBridge Figure35. StrainGaugeConditionerfor350-ΩBridgeSchematic 8.2.7.1 DesignRequirements Supplyastraingagewithaprecisionreferencevoltage. 8.2.7.2 DetailedDesignProcedure UseLM4140togenerate4.096-Vreferencevoltage.Usethereferencetodrivethestraingagebridge. 8.2.8 BipolarVoltageReferencesforLowPowerADC Figure36. BipolarVoltageReferencesforLowPowerADCSchematic 18 SubmitDocumentationFeedback Copyright©2000–2016,TexasInstrumentsIncorporated ProductFolderLinks:LM4140
LM4140 www.ti.com SNVS053F–JUNE2000–REVISEDSEPTEMBER2016 Typical Applications (continued) 8.2.8.1 DesignRequirements ProvidepositiveandnegativereferencevoltagesfortheADC1175lowpowerADC. 8.2.8.2 DetailedDesignProcedure Use LM4140 to generate a 2.5-V positive reference voltage. The reference voltage is passed into an opamp to act as a buffer and inverter, which yields a positive and negative reference. Transistors are used to drive the low impedanceinputsoftheADC1175. 8.2.9 Self-BiasedLowPowerADCReferenceWithTrimCurrentSources Figure37. Self-BiasedLowPowerADCReferenceWithTrimCurrentSourcesSchematic 8.2.9.1 DesignRequirements UseADC1175internalreference,butincreaseaccuracywithtrimmingcurrents. 8.2.9.2 DetailedDesignProcedure The LM4140-2.5 sets a stable voltage source which is buffered and inverted, and the opamps are used as force and sense amplifiers. This application does not require the transistor to drive low impedance nodes as the internal reference voltages are still being used. The external circuitry is to increase the accuracy of the internal reference. Copyright©2000–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 19 ProductFolderLinks:LM4140
LM4140 SNVS053F–JUNE2000–REVISEDSEPTEMBER2016 www.ti.com 9 Power Supply Recommendations Whileaninputcapacitorisnotrequired,TIrecommendsusinga0.1µForlargercapacitortoreducenoiseonthe inputandimprovetransientresponse. 10 Layout 10.1 Layout Guidelines Thesimplestwaystoreducethestressrelatedshiftsare: 1. Mounting the device near the edges or the corners of the board where mechanical stress is at its minimum. Thecenteroftheboardgenerallyhasthehighestmechanicalandthermalexpansionstress. 2. Mechanical isolation of the device by creating an island by cutting a U shape slot on the PCB for mounting thedevice.Thisapproachwouldalsoprovidesomethermalisolationfromtherestofthecircuit. Figure 39 is a recommended printed-circuit board layout with a slot cut on three sides of the circuit layout to serveasastrainrelief. 10.2 Layout Example Figure38. SuggestedSchematicandExternalComponents 2 6 VIN VOUT C1 U1 C2 LM4140 1 (cid:29)F TOUT 3 5 EN 1, 4 7 ,8 Copyright © 2016, Texas Instruments Incorporated Figure39. SuggestedPCBLayoutWithSlot 20 SubmitDocumentationFeedback Copyright©2000–2016,TexasInstrumentsIncorporated ProductFolderLinks:LM4140
LM4140 www.ti.com SNVS053F–JUNE2000–REVISEDSEPTEMBER2016 11 Device and Documentation Support 11.1 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed.Forchangedetails,reviewtherevisionhistoryincludedinanyreviseddocument. 11.2 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TIE2E™OnlineCommunity TI'sEngineer-to-Engineer(E2E)Community.Createdtofostercollaboration amongengineers.Ate2e.ti.com,youcanaskquestions,shareknowledge,exploreideasandhelp solveproblemswithfellowengineers. DesignSupport TI'sDesignSupport QuicklyfindhelpfulE2Eforumsalongwithdesignsupporttoolsand contactinformationfortechnicalsupport. 11.3 Trademarks E2EisatrademarkofTexasInstruments. Allothertrademarksarethepropertyoftheirrespectiveowners. 11.4 Electrostatic Discharge Caution Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. 11.5 Glossary SLYZ022—TIGlossary. Thisglossarylistsandexplainsterms,acronyms,anddefinitions. 12 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of thisdocument.Forbrowser-basedversionsofthisdatasheet,refertotheleft-handnavigation. Copyright©2000–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 21 ProductFolderLinks:LM4140
PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) LM4140ACM-1.0/NOPB ACTIVE SOIC D 8 95 Green (RoHS SN Level-1-260C-UNLIM 0 to 70 4140A & no Sb/Br) CM1.0 LM4140ACM-1.2/NOPB ACTIVE SOIC D 8 95 Green (RoHS SN Level-1-260C-UNLIM 0 to 70 4140A & no Sb/Br) CM1.2 LM4140ACM-2.0/NOPB ACTIVE SOIC D 8 95 Green (RoHS SN Level-1-260C-UNLIM 0 to 70 4140A & no Sb/Br) CM2.0 LM4140ACM-2.5/NOPB ACTIVE SOIC D 8 95 Green (RoHS SN Level-1-260C-UNLIM 0 to 70 4140A & no Sb/Br) CM2.5 LM4140ACM-4.1/NOPB ACTIVE SOIC D 8 95 Green (RoHS SN Level-1-260C-UNLIM 0 to 70 4140A & no Sb/Br) CM4.1 LM4140ACMX-2.5/NOPB ACTIVE SOIC D 8 2500 Green (RoHS SN Level-1-260C-UNLIM 0 to 70 4140A & no Sb/Br) CM2.5 LM4140ACMX-4.1/NOPB ACTIVE SOIC D 8 2500 Green (RoHS SN Level-1-260C-UNLIM 0 to 70 4140A & no Sb/Br) CM4.1 LM4140BCM-1.0/NOPB ACTIVE SOIC D 8 95 Green (RoHS SN Level-1-260C-UNLIM 0 to 70 4140B & no Sb/Br) CM1.0 LM4140BCM-1.2/NOPB ACTIVE SOIC D 8 95 Green (RoHS SN Level-1-260C-UNLIM 0 to 70 4140B & no Sb/Br) CM1.2 LM4140BCM-2.0/NOPB ACTIVE SOIC D 8 95 Green (RoHS SN Level-1-260C-UNLIM 0 to 70 4140B & no Sb/Br) CM2.0 LM4140BCM-2.5/NOPB ACTIVE SOIC D 8 95 Green (RoHS SN Level-1-260C-UNLIM 0 to 70 4140B & no Sb/Br) CM2.5 LM4140BCM-4.1/NOPB ACTIVE SOIC D 8 95 Green (RoHS SN Level-1-260C-UNLIM 0 to 70 4140B & no Sb/Br) CM4.1 LM4140BCMX-1.0/NOPB ACTIVE SOIC D 8 2500 Green (RoHS SN Level-1-260C-UNLIM 0 to 70 4140B & no Sb/Br) CM1.0 LM4140BCMX-2.5/NOPB ACTIVE SOIC D 8 2500 Green (RoHS SN Level-1-260C-UNLIM 0 to 70 4140B & no Sb/Br) CM2.5 LM4140BCMX-4.1/NOPB ACTIVE SOIC D 8 2500 Green (RoHS SN Level-1-260C-UNLIM 0 to 70 4140B & no Sb/Br) CM4.1 LM4140CCM-1.0/NOPB ACTIVE SOIC D 8 95 Green (RoHS SN Level-1-260C-UNLIM 0 to 70 4140C & no Sb/Br) CM1.0 LM4140CCM-1.2/NOPB ACTIVE SOIC D 8 95 Green (RoHS SN Level-1-260C-UNLIM 0 to 70 4140C & no Sb/Br) CM1.2 Addendum-Page 1
PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) LM4140CCM-2.0/NOPB ACTIVE SOIC D 8 95 Green (RoHS SN Level-1-260C-UNLIM 0 to 70 4140C & no Sb/Br) CM2.0 LM4140CCM-2.5/NOPB ACTIVE SOIC D 8 95 Green (RoHS SN Level-1-260C-UNLIM 0 to 70 4140C & no Sb/Br) CM2.5 LM4140CCM-4.1/NOPB ACTIVE SOIC D 8 95 Green (RoHS SN Level-1-260C-UNLIM 0 to 70 4140C & no Sb/Br) CM4.1 LM4140CCMX-1.0/NOPB ACTIVE SOIC D 8 2500 Green (RoHS SN Level-1-260C-UNLIM 0 to 70 4140C & no Sb/Br) CM1.0 LM4140CCMX-1.2/NOPB ACTIVE SOIC D 8 2500 Green (RoHS SN Level-1-260C-UNLIM 0 to 70 4140C & no Sb/Br) CM1.2 LM4140CCMX-2.5/NOPB ACTIVE SOIC D 8 2500 Green (RoHS SN Level-1-260C-UNLIM 0 to 70 4140C & no Sb/Br) CM2.5 LM4140CCMX-4.1/NOPB ACTIVE SOIC D 8 2500 Green (RoHS SN Level-1-260C-UNLIM 0 to 70 4140C & no Sb/Br) CM4.1 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. Addendum-Page 2
PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 3
PACKAGE MATERIALS INFORMATION www.ti.com 18-Feb-2016 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) LM4140ACMX-2.5/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LM4140ACMX-4.1/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LM4140BCMX-1.0/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LM4140BCMX-2.5/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LM4140BCMX-4.1/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LM4140CCMX-1.0/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LM4140CCMX-1.2/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LM4140CCMX-2.5/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LM4140CCMX-4.1/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 PackMaterials-Page1
PACKAGE MATERIALS INFORMATION www.ti.com 18-Feb-2016 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) LM4140ACMX-2.5/NOPB SOIC D 8 2500 367.0 367.0 35.0 LM4140ACMX-4.1/NOPB SOIC D 8 2500 367.0 367.0 35.0 LM4140BCMX-1.0/NOPB SOIC D 8 2500 367.0 367.0 35.0 LM4140BCMX-2.5/NOPB SOIC D 8 2500 367.0 367.0 35.0 LM4140BCMX-4.1/NOPB SOIC D 8 2500 367.0 367.0 35.0 LM4140CCMX-1.0/NOPB SOIC D 8 2500 367.0 367.0 35.0 LM4140CCMX-1.2/NOPB SOIC D 8 2500 367.0 367.0 35.0 LM4140CCMX-2.5/NOPB SOIC D 8 2500 367.0 367.0 35.0 LM4140CCMX-4.1/NOPB SOIC D 8 2500 367.0 367.0 35.0 PackMaterials-Page2
PACKAGE OUTLINE D0008A SOIC - 1.75 mm max height SCALE 2.800 SMALL OUTLINE INTEGRATED CIRCUIT C SEATING PLANE .228-.244 TYP [5.80-6.19] .004 [0.1] C A PIN 1 ID AREA 6X .050 [1.27] 8 1 2X .189-.197 [4.81-5.00] .150 NOTE 3 [3.81] 4X (0 -15 ) 4 5 8X .012-.020 B .150-.157 [0.31-0.51] .069 MAX [3.81-3.98] .010 [0.25] C A B [1.75] NOTE 4 .005-.010 TYP [0.13-0.25] 4X (0 -15 ) SEE DETAIL A .010 [0.25] .004-.010 0 - 8 [0.11-0.25] .016-.050 [0.41-1.27] DETAIL A (.041) TYPICAL [1.04] 4214825/C 02/2019 NOTES: 1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed .006 [0.15] per side. 4. This dimension does not include interlead flash. 5. Reference JEDEC registration MS-012, variation AA. www.ti.com
EXAMPLE BOARD LAYOUT D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM SEE DETAILS 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:8X SOLDER MASK SOLDER MASK METAL OPENING OPENING METAL UNDER SOLDER MASK EXPOSED METAL EXPOSED METAL .0028 MAX .0028 MIN [0.07] [0.07] ALL AROUND ALL AROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED SOLDER MASK DETAILS 4214825/C 02/2019 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com
EXAMPLE STENCIL DESIGN D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] SOLDER PASTE EXAMPLE BASED ON .005 INCH [0.125 MM] THICK STENCIL SCALE:8X 4214825/C 02/2019 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com
IMPORTANTNOTICEANDDISCLAIMER TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable standards, and any other safety, security, or other requirements. These resources are subject to change without notice. TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these resources. TI’s products are provided subject to TI’s Terms of Sale (www.ti.com/legal/termsofsale.html) or other applicable terms available either on ti.com or provided in conjunction with such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for TI products. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2020, Texas Instruments Incorporated