ICGOO在线商城 > 集成电路(IC) > PMIC - 稳压器 - DC DC 切换控制器 > LM3475MF/NOPB
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LM3475MF/NOPB产品简介:
ICGOO电子元器件商城为您提供LM3475MF/NOPB由Texas Instruments设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 LM3475MF/NOPB价格参考¥3.91-¥4.26。Texas InstrumentsLM3475MF/NOPB封装/规格:PMIC - 稳压器 - DC DC 切换控制器, 降压 稳压器 正 输出 降压 DC-DC 控制器 IC SOT-23-5。您可以下载LM3475MF/NOPB参考资料、Datasheet数据手册功能说明书,资料中有LM3475MF/NOPB 详细功能的应用电路图电压和使用方法及教程。
参数 | 数值 |
产品目录 | 集成电路 (IC)半导体 |
Cuk | 无 |
描述 | IC REG CTRLR BUCK PWM SOT23-5开关控制器 HYSTERETIC PFET BUCK CONTROLLER |
产品分类 | |
品牌 | Texas Instruments |
产品手册 | |
产品图片 | |
rohs | 符合RoHS无铅 / 符合限制有害物质指令(RoHS)规范要求 |
产品系列 | 电源管理 IC,开关控制器 ,Texas Instruments LM3475MF/NOPB- |
数据手册 | |
产品型号 | LM3475MF/NOPB |
PWM类型 | 混合物 |
产品目录页面 | |
产品种类 | 开关控制器 |
倍增器 | 无 |
其它名称 | LM3475MF/NOPBDKR |
分频器 | 无 |
包装 | Digi-Reel® |
升压 | 无 |
占空比 | 100% |
反向 | 无 |
反激式 | 无 |
商标 | Texas Instruments |
安装风格 | SMD/SMT |
封装 | Reel |
封装/外壳 | SC-74A,SOT-753 |
封装/箱体 | SOT-23-5 |
工作温度 | -40°C ~ 125°C |
工厂包装数量 | 1000 |
开关频率 | 1400 kHz |
最小工作温度 | - 40 C |
标准包装 | 1 |
电压-电源 | 2.7 V ~ 10 V |
系列 | LM3475 |
设计资源 | http://www.digikey.com/product-highlights/cn/zh/texas-instruments-webench-design-center/3176 |
输入电压 | 2.7 V to 10 V |
输出数 | 1 |
输出电流 | 5 A |
输出端数量 | 1 Output |
配用 | /product-detail/zh/LM3475EVAL/LM3475EVAL-ND/1640662 |
降压 | 是 |
隔离式 | 无 |
频率-最大值 | 2MHz |
Product Sample & Technical Tools & Support & Folder Buy Documents Software Community LM3475 SNVS239C–OCTOBER2004–REVISEDOCTOBER2015 LM3475 Hysteretic PFET Buck Controller 1 Features 3 Description • Easy-to-UseControlMethodology The LM3475 is a hysteretic P-FET buck controller 1 designed to support a wide range of high efficiency • 0.8VtoV AdjustableOutputRange IN applications in a very small SOT-23-5 package. The • HighEfficiency(90%Typical) hysteretic control scheme has several advantages, • ±0.9%(±1.5%OverTemperature)Feedback including simple system design with no external Voltage compensation, stable operation with a wide range of components, and extremely fast transient response. • 100%DutyCycleCapable Hysteretic control also provides high efficiency • MaximumOperatingFrequencyupto2MHz operation, even at light loads. The PFET architecture • InternalSoft-Start allows for low component count as well as 100% duty cycleandultra-lowdropoutoperation. • EnablePin DeviceInformation(1) 2 Applications PARTNUMBER PACKAGE BODYSIZE(NOM) • TFTMonitor LM3475 SOT-23(5) 1.60mm×2.90mm • AutoPC (1) For all available packages, see the orderable addendum at • VehicleSecurity theendofthedatasheet. • NavigationSystems • NotebookStandbySupply • BatteryPoweredPortableApplications • DistributedPowerSystems TypicalApplication L1 Q1 VIN = 5V Si2343 10 PH VOUT = 2.5V/2A COUT CIN 100 PF 10 PF 5 D1 PGATE 4 2 RFB1 VIN GND CFF 2.15k 1 nF LM3475 3 1 EN FB RFB2 1k 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA.
LM3475 SNVS239C–OCTOBER2004–REVISEDOCTOBER2015 www.ti.com Table of Contents 1 Features.................................................................. 1 7.4 DeviceFunctionalModes........................................10 2 Applications........................................................... 1 8 ApplicationandImplementation........................ 11 3 Description............................................................. 1 8.1 ApplicationInformation............................................11 4 RevisionHistory..................................................... 2 8.2 TypicalApplication .................................................11 5 PinConfigurationandFunctions......................... 3 9 PowerSupplyRecommendations...................... 16 6 Specifications......................................................... 4 10 Layout................................................................... 16 6.1 AbsoluteMaximumRatings......................................4 10.1 LayoutGuidelines.................................................16 6.2 ESDRatings..............................................................4 10.2 LayoutExample....................................................17 6.3 RecommendedOperatingRatings...........................4 11 DeviceandDocumentationSupport................. 18 6.4 ThermalInformation..................................................4 11.1 DeviceSupport......................................................18 6.5 ElectricalCharacteristics...........................................5 11.2 CommunityResources..........................................18 6.6 TypicalCharacteristics..............................................6 11.3 Trademarks...........................................................18 7 DetailedDescription.............................................. 8 11.4 ElectrostaticDischargeCaution............................18 7.1 Overview...................................................................8 11.5 Glossary................................................................18 7.2 FunctionalBlockDiagram.........................................8 12 Mechanical,Packaging,andOrderable Information........................................................... 18 7.3 FeatureDescription...................................................8 4 Revision History NOTE:Pagenumbersforpreviousrevisionsmaydifferfrompagenumbersinthecurrentversion. ChangesfromRevisionB(March2013)toRevisionC Page • AddedESDRatingstable,FeatureDescriptionsection,DeviceFunctionalModes,ApplicationandImplementation section,PowerSupplyRecommendationssection,Layoutsection,DeviceandDocumentationSupportsection,and Mechanical,Packaging,andOrderableInformationsection.................................................................................................. 1 ChangesfromRevisionA(March2013)toRevisionB Page • ChangedlayoutofNationalDataSheettoTIformat. ........................................................................................................... 1 2 SubmitDocumentationFeedback Copyright©2004–2015,TexasInstrumentsIncorporated ProductFolderLinks:LM3475
LM3475 www.ti.com SNVS239C–OCTOBER2004–REVISEDOCTOBER2015 5 Pin Configuration and Functions DBVPackage 5-PinSOT-23 TopView 1 5 FB PGATE 2 GND 3 EN 4 VIN PinFunctions PIN I/O DESCRIPTION NAME NO. FB 1 I Feedbackinput.ConnecttoaresistordividerbetweentheoutputandGND. GND 2 G Ground. Enable.Pullthispinabove1.5V(typical)fornormaloperation.WhenENislow,thedevice EN 3 O entersshutdownmode. VIN 4 P Powersupplyinput. PGATE 5 O GatedriveoutputfortheexternalPFET. Copyright©2004–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:LM3475
LM3475 SNVS239C–OCTOBER2004–REVISEDOCTOBER2015 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings See (1)(2) MIN MAX UNIT V −0.3 16 V IN PGATE −0.3 16 V FB −0.3 5 V EN −0.3 16 V Powerdissipation (3) 440 mW Vaporphase(60s) 215 Leadtemperature °C Infrared(15s) 220 T Storagetemperature −65 1150 °C stg (1) StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thesearestressratings only,whichdonotimplyfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderRecommended OperatingConditions.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. (2) IfMilitary/Aerospacespecifieddevicesarerequired,pleasecontacttheTexasInstrumentsSalesOffice/Distributorsforavailabilityand specifications. (3) Themaximumallowablepowerdissipationisafunctionofthemaximumjunctiontemperature,T ,thejunction-to-ambientthermal J_MAX resistance,θ andtheambienttemperature,T .Themaximumallowablepowerdissipationatanyambienttemperatureiscalculated JA A using:P =(T -T )/θ .Themaximumpowerdissipationof0.44WisdeterminedusingT =25°C,θ =225°C/W,and D_MAX J_MAX A JA A JA T =125°C. J_MAX 6.2 ESD Ratings overoperatingfree-airtemperaturerange(unlessotherwisenoted) VALUE UNIT V Electrostaticdischarge Human-bodymodel(HBM),perANSI/ESDA/JEDECJS-001(1) 2500 V (ESD) (1) JEDECdocumentJEP155statesthat500-VHBMallowssafemanufacturingwithastandardESDcontrolprocess. 6.3 Recommended Operating Ratings MIN NOM MAX UNIT Supplyvoltage 2.7 10 V T Operatingjunctiontemperature -40 125 °C J 6.4 Thermal Information LM3475 THERMALMETRIC(1) DBV(SOT-23) UNIT 5PINS R Junction-to-ambientthermalresistance 164.2 °C/W θJA R Junction-to-case(top)thermalresistance 115.3 °C/W θJC(top) R Junction-to-boardthermalresistance 27.0 °C/W θJB ψ Junction-to-topcharacterizationparameter 12.8 °C/W JT ψ Junction-to-boardcharacterizationparameter 26.5 °C/W JB R Junction-to-case(bottom)thermalresistance N/A °C/W θJC(bot) (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheSemiconductorandICPackageThermalMetricsapplication report,SPRA953. 4 SubmitDocumentationFeedback Copyright©2004–2015,TexasInstrumentsIncorporated ProductFolderLinks:LM3475
LM3475 www.ti.com SNVS239C–OCTOBER2004–REVISEDOCTOBER2015 6.5 Electrical Characteristics TypicallimitsareforT =25°C,unlessotherwisespecified,V =EN=5.0V.Maximumandminimumspecificationlimitsare J IN specifiedbydesign,test,orstatisticalanalysis. PARAMETER TESTCONDITIONS MIN TYP MAX UNIT I Quiescentcurrent EN=V (PGATE T =25°C 260 Q IN J Open) T =−40°Cto+125°C 170 320 J µA EN=0V T =25°C 7 J T =−40°Cto+125°C 4 10 J V T =25°C 0.8 FB J Feedbackvoltage V T =−40°Cto+125°C 0.788 0.812 J %ΔV /ΔV Feedbackvoltageline FB IN 2.7V<V <10V 0.01 %/V regulation IN V Comparatorhysteresis 2.7V<V <10V T =25°C 21 28 HYST IN J mV −40°Cto+125°C 21 32 I FBbiascurrent T =25°C 50 nA FB J −40°Cto+125°C 600 Enablethreshold Increasing T =25°C 1.5 J voltage V Vth −40°Cto+125°C 1.2 1.8 EN Hysteresis 365 mV I Enableleakagecurrent T =25°C 0.025 EN J EN=10V µA −40°Cto+125°C 1 Source 2.8 I =100mA SOURCE R Driverresistance Ω PGATE Sink 1.8 I =100mA Sink Source V =3.5V 0.475 PGATE C =1nF PGATE I Driveroutputcurrent A PGATE Sink V =3.5V 1.0 PGATE C =1nF PGATE T Soft-starttime 2.7V<V <10V(ENRising) 4 ms SS IN T Minimumon-time PGATEOpen 180 ns ONMIN V Undervoltagedetection MeasuredattheFB T =25°C 0.56 UVD J Pin V −40°Cto+125°C 0.487 0.613 Copyright©2004–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:LM3475
LM3475 SNVS239C–OCTOBER2004–REVISEDOCTOBER2015 www.ti.com 6.6 Typical Characteristics Unlessspecifiedotherwise,allcurvestakenatV =5V,V =2.5V,L=10µH,C =100µF,ESR=100mΩ,andT = IN OUT OUT A 25°C. Figure1.QuiescentCurrentvsInputVoltage Figure2.FeedbackVoltagevsTemperature Figure3.HysteresisVoltagevsInputVoltage Figure4.HysteresisVoltagevsTemperature 98 100 96 80 94 )% )% ( YC 92 ( YC 60 N N E E ICIF 90 ICIF 40 F F E 88 E 20 86 84 0 0.5 1 1.5 2 4 5 6 7 8 9 10 OUTPUT CURRENT (A) INPUT VOLTAGE (VIN) I =2A OUT Figure5.EfficiencyvsLoadCurrent Figure6.EfficiencyvsInputVoltage 6 SubmitDocumentationFeedback Copyright©2004–2015,TexasInstrumentsIncorporated ProductFolderLinks:LM3475
LM3475 www.ti.com SNVS239C–OCTOBER2004–REVISEDOCTOBER2015 Typical Characteristics (continued) Unlessspecifiedotherwise,allcurvestakenatV =5V,V =2.5V,L=10µH,C =100µF,ESR=100mΩ,andT = IN OUT OUT A 25°C. VNIVID/V2 VWSVID/V5.2 V VTUOVID/V1 VELPPIRID/Vm 0 2 1 ms/DIV 2 Ps/DIV Figure7.StartUp Figure8.OutputRippleVoltage Copyright©2004–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:LM3475
LM3475 SNVS239C–OCTOBER2004–REVISEDOCTOBER2015 www.ti.com 7 Detailed Description 7.1 Overview The LM3475 is a buck (step-down) DC-DC controller that uses a hysteretic control architecture, which results in Pulse Frequency Modulated (PFM) regulation. The hysteretic control scheme does not utilize an internal oscillator. Switching frequency depends on external components and operating conditions. Operating frequency decreases at light loads, resulting in excellent efficiency compared to PWM architectures. Because switching is directlycontrolledbytheoutputconditions,hystereticcontrolprovidesexceptionalloadtransientresponse. 7.2 Functional Block Diagram reset VIN en Pdrive PGATE Internal UVD-Disable Regulator - + VCC UVD Hysteretic Comp Comp Blanking + FB Level Timer - EN en Shift 70% VREF UVD-Disable Band Gap Reference VREF Vref Ramp Current Bias reset Soft-Start GND 7.3 Feature Description 7.3.1 HystereticControlCircuit The LM3475 uses a comparator-based voltage control loop. The voltage on the feedback pin is compared to a 0.8V reference with 21mV of hysteresis. When the FB input to the comparator falls below the reference voltage, the output of the comparator goes low. This results in the driver output, PGATE, pulling the gate of the PFET low andturningonthePFET. With the PFET on, the input supply charges C and supplies current to the load through the PFET and the OUT inductor. Current through the inductor ramps up linearly, and the output voltage increases. As the FB voltage reaches the upper threshold (reference voltage plus hysteresis) the output of the comparator goes high, and the PGATE turns the PFET off. When the PFET turns off, the catch diode turns on, and the current through the inductor ramps down. As the output voltage falls below the reference voltage, the cycle repeats. The resulting output,inductorcurrent,andswitchnodewaveformsareshowninFigure9. 8 SubmitDocumentationFeedback Copyright©2004–2015,TexasInstrumentsIncorporated ProductFolderLinks:LM3475
LM3475 www.ti.com SNVS239C–OCTOBER2004–REVISEDOCTOBER2015 Feature Description (continued) VIN tON tOFF -VD Switch Voltage Iout ’IL Inductor Current td VOUT VOUT ripple (DC) VHYST td Output Voltage Figure9. HystereticWaveforms 7.3.2 Soft-Start The LM3475 includes an internal soft-start function to protect components from excessive inrush current and output voltage overshoot. As V rises above 2.7 V (typical), the internal bias circuitry becomes active. When EN IN goes high, the device enters soft-start. During soft-start, the reference voltage is ramped up to the nominal value of0.8Vinapproximately4ms.Dutycycleandoutputvoltagewillincreaseasthereferencevoltageisrampedup. 7.3.3 UnderVoltageDetection When the output voltage falls below 70% (typical) of the normal voltage, as measured at the FB pin, the device turns off PFET and restarts a new soft-start cycle. In short circuit, the PFET is always on, and the converter is effectively a resistor divider from input to output to ground. Whether the part restarts depends on the power path resistance and the short circuit resistance. This feature should not be considered as overcurrent protection or outputshortcircuitprotection. 7.3.4 PGATE During switching, the PGATE pin swings from V (off) to ground (on). As input voltage increases, the time it IN takes to slew the gate of the PFET on and off also increases. Also, as the PFET gate voltage approaches V , IN the PGATE current driving capability decreases. This can cause a significant additional delay in turning the switch off when using a PFET with a low threshold voltage. These two effects will increase power dissipation and reduce efficiency. Therefore, a PFET with relatively high threshold voltage and low gate capacitance is recommended. 7.3.5 MinimumOnorOffTime To ensure accurate comparator switching, the LM3475 imposes a blanking time after each comparator state change. This blanking time is 180 ns typically. Immediately after the comparator goes high or low, it will be held in that state for the duration of the blanking time. This helps keep the hysteretic comparator from improperly responding to switching noise spikes (See Reducing Switching Noise) and ESL spikes (See Output Capacitor Selection)attheoutput. At very low or very high duty cycle operation, maximum frequency will be limited by the blanking time. The maximumoperatingfrequencycanbedeterminedbythefollowingequations: F =D/ton (1) MAX min F =(1-D)/toff MAX min where Copyright©2004–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:LM3475
LM3475 SNVS239C–OCTOBER2004–REVISEDOCTOBER2015 www.ti.com Feature Description (continued) • Disthedutycycle,definedasV /V ,andton OUT IN min • toff isthesumoftheblankingtime,thepropagationdelaytime,andthePFETdelaytime(seeFigure9) (2) min 7.3.6 EnablePin(EN) The LM3475 provides a shutdown function via the EN pin to disable the device. The device is active when the EN pin is pulled above 1.5 V (typ) and in shutdown mode when EN is below 1.135 V (typ). In shutdown mode, totalquiescentcurrentislessthan10 µA.TheENpincanbedirectlyconnectedtoV foralways-onoperation. IN 7.4 Device Functional Modes TheLM3475operatesindiscontinuousconductionmodeatlightloadcurrentandcontinuousconductionmodeat heavy load current. In discontinuous conduction mode, current through the inductor starts at zero and ramps up to the peak, then ramps down to zero. The next cycle starts when the FB voltage reaches the reference voltage. Until then, the inductor current remains zero. Operating frequency is low, as are switching losses. In continuous conductionmode,currentalwaysflowsthroughtheinductorandneverrampsdowntozero. 10 SubmitDocumentationFeedback Copyright©2004–2015,TexasInstrumentsIncorporated ProductFolderLinks:LM3475
LM3475 www.ti.com SNVS239C–OCTOBER2004–REVISEDOCTOBER2015 8 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validateandtesttheirdesignimplementationtoconfirmsystemfunctionality. 8.1 Application Information The LM3475 employs a hysteretic control architecture; which provides excellent load transient response and efficiencyevenatlightloads,ascomparedtoitsPWMarchitectures.Noexternalcompensationisrequiredwhich resultsinasimpledesignandlowcomponentcount.Atypicalschematicisdescribedinthenextsection. 8.2 Typical Application Q1 L1 VIN = 5V Si2343 10 PH VOUT = 2.5V/2A CIN COUT 10 PF 5 D1 100 PF 4 PGATE 2 RFB1 VIN GND CFF 2.15k LM3475 1 nF 3 1 EN FB RFB2 1k Figure10. FullDemoBoardSchematic 8.2.1 DesignRequirements To properly size the components for the application, the designer needs the following parameters: input voltage range,outputvoltage,outputcurrentrange,andrequiredswitchingfrequency.Thesefourmainparametersaffect the choices of component available to achieve a proper system behavior. Although hysteretic control is a simple control scheme, the operating frequency and other performance characteristics depend on external conditions and components. If the inductance, output capacitance, ESR, VIN, or Cff is changed, there will be a change in the operating frequency and possibly output ripple. Therefore, care must be taken to select components which willprovidethedesiredoperatingrange. 8.2.2 DetailedDesignProcedure Table1.BillofMaterials DESIGNATOR DESCRIPTION PARTNUMBER VENDOR C 10µF,16V,X5R EMK325BJ106MN TAIYOYUDEN IN C 100µF,6V,Ta TPSY107M006R0100 AVX OUT C 1nF,25V,X7R VJ1206Y102KXXA Vishay FF D1 Schottky,20V,2A CMSH2-20L CentralSemiconductor L1 10µH,3.1A CDRH103R100 Sumida Q1 30V,2.5A Si2343 Vishay R 1kΩ,0805,1% CRW08051001F Vishay FB2 R 2.15kΩ,0805,1% CRCW08052151F Vishay FB1 Copyright©2004–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:LM3475
LM3475 SNVS239C–OCTOBER2004–REVISEDOCTOBER2015 www.ti.com 8.2.2.1 SettingOutputVoltage The output voltage is programmed using a resistor divider between V and GND as shown in Figure 11. The OUT feedbackresistorscanbecalculatedasfollows: R +R 1 2 VOUT = x VFB R 2 where • Vfbis0.8Vtypically (3) The feedback resistor ratio, α = (R1+R2) / R2, will also be used below to calculate output ripple and operating frequency. PGATE PMOS_drv L VOUT + COUT R1 Cff FB + - R2 Hyst Comp + - Reference Voltage VHYST = 21 mV VFB = 0.8V PGATE Figure11. HystereticWindow 8.2.2.2 SettingOperatingFrequencyandOutputRipple Although hysteretic control is a simple control scheme, the operating frequency and other performance characteristics depend on external conditions and components. If the inductance, output capacitance, ESR, V , IN or C is changed, there will be a change in the operating frequency and possibly output ripple. Therefore, care ff must be taken to select components which will provide the desired operating range. The best approach is to determine what operating frequency is desirable in the application and then begin with the selection of the inductor and output capacitor ESR. The design process usually involves a few iterations to select appropriate standardvaluesthatwillresultinthedesiredfrequencyandripple. Without the feedforward capacitor (C ), the operating frequency (F) can be approximately calculated using the ff formula: VOUT (VIN - VOUT) x ESR F = x V (V x D x L) + (V x delay x ESR) IN HYST IN where • DelayisthesumoftheLM3475propagationdelaytimeandthePFETdelaytime • Thepropagationdelayis90nstypically (4) Minimumoutputripplevoltagecanbedeterminedusingthefollowingequation: V =V (R1+R2)/R2 (5) OUT_PP HYST 12 SubmitDocumentationFeedback Copyright©2004–2015,TexasInstrumentsIncorporated ProductFolderLinks:LM3475
LM3475 www.ti.com SNVS239C–OCTOBER2004–REVISEDOCTOBER2015 8.2.2.3 UsingaFeed-forwardCapacitor The operating frequency and output ripple voltage can also be significantly influenced using a speed up capacitor, C , as shown in Figure 11. C is connected in parallel with the high side feedback resistor, R1. The ff ff output ripple causes a current to be sourced or sunk through this capacitor. This current is essentially a square wave. Since the input to the feedback pin (FB) is a high impedance node, the bulk of the current flows through R2. This superimposes a square wave ripple voltage on the FB node. The end result is a reduction in output rippleandanincreaseinoperatingfrequency.WhenaddingC ,calculatetheformulaabovewithα=1.Thevalue ff of C depends on the desired operating frequency and the value of R2. A good starting point is 1nF ceramic at ff 100kHz decreasing linearly with increased operating frequency. Also note that as the output voltage is programmedbelow1.6V,theeffectofC willdecreasesignificantly. ff 8.2.2.4 InductorSelection The most important parameters for the inductor are the inductance and the current rating. The LM3475 operates over a wide frequency range and can use a wide range of inductance values. Minimum inductance can be calculatedusingthefollowingequation: V - V - V IN SD OUT D L = x ’I F where • Disthedutycycle,definedasV /V OUT IN • ΔIistheallowableinductorripplecurrent (6) Maximum allowable inductor ripple current should be calculated as a function of output current (I ) as shown OUT below: ΔI =I x0.3 max OUT Theinductormustalsoberatedtohandlethepeakcurrent(I )andRMScurrentgivenby: PK I =(I +ΔI/2)x1.1 (7) PK OUT ’I2 IRMS = IOUT2 + 3 (8) Theinductancevalueandtheresultingrippleisoneofthekeyparameterscontrollingoperatingfrequency. 8.2.2.5 OutputCapacitorSelection Once the desired operating frequency and inductance value are selected, ESR must be selected based on Equation4.ThisprocessmayinvolveafewiterationstoselectstandardESRandinductancevalues. In general, the ESR of the output capacitor and the inductor ripple current create the output ripple of the regulator. However, the comparator hysteresis sets the first order value of this ripple. Therefore, as ESR and ripplecurrentvary,operatingfrequencymustalsovarytokeeptheoutputripplevoltageregulated.Thehysteretic control topology is well suited to using ceramic output capacitors. However, ceramic capacitors have a very low ESR, resulting in a 90° phase shift of the output voltage ripple. This results in low operating frequency and increased output ripple. To fix this problem a low value resistor could be added in series with the ceramic output capacitor. Although counter intuitive, this combination of a ceramic capacitor and external series resistance provide highly accurate control over the output voltage ripple. Another method is to add an external ramp at the FB pin as shown in Figure 12. By proper selection of R1 and C2, the FB pin sees faster voltage change than the outputripplecancause.Asaresult,theswitchingfrequencyishigherwhiletheoutputripplebecomeslower.The switchingfrequencyisapproximately: V IN F = 2S x R x C x V 1 2 HYS (9) Other types of capacitor, such as Sanyo POSCAP, OS-CON, and Nichicon ’NA’ series are also recommended and may be used without additional series resistance. For all practical purposes, any type of output capacitor maybeusedwithpropercircuitverification. Copyright©2004–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:LM3475
LM3475 SNVS239C–OCTOBER2004–REVISEDOCTOBER2015 www.ti.com Capacitors with high ESL (equivalent series inductance) values should not be used. As shown in Figure 9, the output ripple voltage contains a small step at both the high and low peaks. This step is caused by and is directly proportional to the output capacitor’s ESL. A large ESL, such as in an electrolytic capacitor, can create a step largeenoughtocauseabnormalswitchingbehavior. 8.2.2.6 InputCapacitorSelection A bypass capacitor is required between V and ground. It must be placed near the source of the external PFET. IN The input capacitor prevents large voltage transients at the input and provides the instantaneous current when the PFET turns on. The important parameters for the input capacitor are the voltage rating and the RMS current rating. Follow the manufacturer’s recommended voltage de-rating. RMS current and power dissipation (PD) can becalculatedwiththeequationsbelow: I OUT IRMS_CIN = VOUT x (VIN - VOUT) V IN (10) Q1 L1 VIN Si2343 10 PH VOUT = 0.9V/2A CIN COUT 10 PF 5 D1 100 PF R1 4 PGATE 2 200k RFB1 VIN GND 1.27k C1 LM3475 3.9 nF 3 1 EN FB C2 RFB2 390 pF 10k Figure12. ExternalRamp 8.2.2.7 DiodeSelection The catch diode provides the current path to the load during the PFET off time. Therefore, the current rating of thediodemustbehigherthantheaveragecurrentthroughthediode,whichbecalculatedasshown: I =I x(1−D) (11) D_AVE OUT The peak voltage across the catch diode is approximately equal to the input voltage. Therefore, the diode’s peak reversevoltageratingshouldbegreaterthan1.3timestheinputvoltage. ASchottkydiodeisrecommended,sincealowforwardvoltagedropwillimproveefficiency. For high temperature applications, diode leakage current may become significant and require a higher reverse voltageratingtoachieveacceptableperformance. 8.2.2.8 P-ChannelMOSFETSelection The PFET switch should be selected based on the maximum Drain-Source voltage (VDS), Drain current rating (I ),maximumGate-Sourcevoltage(VGS),onresistance(R ),andGatecapacitance.Thevoltageacrossthe D DSON PFET when it is turned off is equal to the sum of the input voltage and the diode forward voltage. The VDS must beselectedtoprovidesomemarginbeyondthesumoftheinputvoltageandVd. Since the current flowing through the PFET is equal to the current through the inductor, I must be rated higher D than the maximum I . During switching, PGATE swings the PFET’s gate from V to ground. Therefore, A PFET PK IN mustbeselectedwithamaximumVGSlargerthanV .ToinsurethatthePFETturnsoncompletelyandquickly, IN refertothePGATE section. 14 SubmitDocumentationFeedback Copyright©2004–2015,TexasInstrumentsIncorporated ProductFolderLinks:LM3475
LM3475 www.ti.com SNVS239C–OCTOBER2004–REVISEDOCTOBER2015 The power loss in the PFET consists of switching losses and conducting losses. Although switching losses are difficult to precisely calculate, the equation below can be used to estimate total power dissipation. Increasing R will increase power losses and degrade efficiency. Note that switching losses will also increase with lower DSON gatethresholdvoltages. PD =R x(I )2xD+FxI xV x(t +t )/2 switch DSON OUT OUT IN on off where • t =FETturnontime on • t =FETturnofftime off • Avalueof10nsto50nsistypicalfortonandtoff (12) NotethattheR hasapositivetemperaturecoefficient.At100°C,theR maybeasmuchas150%higher DSON DSON thanthevalueat25°C. The Gate capacitance of the PFET has a direct impact on both PFET transition time and the power dissipation in the LM3475. Most of the power dissipated in the LM3475 is used to drive the PFET switch. This power can be calculatedasfollows: Theamountofaveragegatedrivercurrentrequiredduringswitching(I )is: G I =Q xF (13) G g Andthetotalpowerdissipatedinthedeviceis: I V +I V q IN G IN where • I istypically260µAasshowninElectricalCharacteristics (14) q As gate capacitance increases, operating frequency may need to be reduced, or additional heat sinking may be requiredtolowerthepowerdissipationinthedevice. In general, keeping the gate capacitance below 2000 pF is recommended to keep transition times (switching losses),andpowerlosseslow. 8.2.2.9 ReducingSwitchingNoise Although the LM3475 employs internal noise suppression circuitry, external noise may continue to be excessive. ThereareseveralmethodsavailabletoreducenoiseandEMI. MOSFETs are very fast switching devices. The fast increase in PFET current coupled with parasitic trace inductance can create unwanted noise spikes at both the switch node and at V . Switching noise will increase IN with load current and input voltage. This noise can also propagate through the ground plane, sometimes causing unpredictable device performance. Slowing the rise and fall times of the PFET can be very effective in reducing this noise. Referring to Figure 13, the PFET can be slowed down by placing a small (1-Ω to 10-Ω) resistor in serieswithPGATE.However,thisresistorwillincreasetheswitchinglossesinthePFETandwilllowerefficiency. Therefore it should be kept as small as possible and only used when necessary. Another method to reduce switching noise (other than good PCB layout, see Layout) is to use a small RC filter or snubber. The snubber should be placed in parallel with the catch diode, connected close to the drain of the PFET, as shown in Figure 13. Again, the snubber should be kept as small as possible to limit its impact on system efficiency. A typicalrangeisa10-Ω to100-Ω resistoranda470-pFto2.2-nFceramiccapacitor. 5 RPGATE Q1 PGATE 3.3: L1 CSNUB D1 RSNUB Figure13. PGATEResistorandSnubber Copyright©2004–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:LM3475
LM3475 SNVS239C–OCTOBER2004–REVISEDOCTOBER2015 www.ti.com 8.2.3 ApplicationCurves Figure14.LoadTransientResponsewithExternalRamp Figure15.LoadTransientResponse (CircuitfromFigure12) (TypicalApplicationCircuitfromFigure16) 9 Power Supply Recommendations The LM3475 controller is designed to operate from various DC power supplies. VIN input should be protected from reversal voltage and voltage dump over 16 volts. The impedance of the input supply rail should be low enough that the input current transient does not cause drop below VIN UVLO level. If the input supply is connectedbyusinglongwires,additionalbulkcapacitancemayberequiredinadditiontonormalinputcapacitor. 10 Layout 10.1 Layout Guidelines PCboardlayoutisveryimportantinallswitchingregulatordesigns.PoorlayoutcancauseEMIproblems,excess switchingnoiseandpooroperation. As shown in Figure 16, place the ground of the input capacitor as close as possible to the anode of the diode. ThispathalsocarriesalargeACcurrent.Theswitchnode,thenodeconnectingthediodecathode,inductor,and PFETdrain,shouldbekeptassmallaspossible.ThisnodeisoneofthemainsourcesforradiatedEMI. The feedback pin is a high impedance node and is therefore sensitive to noise. Be sure to keep all feedback traces away from the inductor and the switch node, which are sources of noise. Also, the resistor divider should beplacedclosetotheFBpin.ThegatepinoftheexternalPFETshouldbelocatedclosetothePGATEpin. TIalsorecommendsusingalarge,continuousgroundplane,particularlyinhighercurrentapplications. 16 SubmitDocumentationFeedback Copyright©2004–2015,TexasInstrumentsIncorporated ProductFolderLinks:LM3475
LM3475 www.ti.com SNVS239C–OCTOBER2004–REVISEDOCTOBER2015 10.2 Layout Example GND 1 n D Ci ut o C 1 Q RFB2 RFB1 CFF L1 0 Ω Vout EN Vin Figure16. LayoutExample(2:1Scale) Copyright©2004–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 17 ProductFolderLinks:LM3475
LM3475 SNVS239C–OCTOBER2004–REVISEDOCTOBER2015 www.ti.com 11 Device and Documentation Support 11.1 Device Support 11.1.1 Third-PartyProductsDisclaimer TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER ALONEORINCOMBINATIONWITHANYTIPRODUCTORSERVICE. 11.2 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TIE2E™OnlineCommunity TI'sEngineer-to-Engineer(E2E)Community.Createdtofostercollaboration amongengineers.Ate2e.ti.com,youcanaskquestions,shareknowledge,exploreideasandhelp solveproblemswithfellowengineers. DesignSupport TI'sDesignSupport QuicklyfindhelpfulE2Eforumsalongwithdesignsupporttoolsand contactinformationfortechnicalsupport. 11.3 Trademarks E2EisatrademarkofTexasInstruments. Allothertrademarksarethepropertyoftheirrespectiveowners. 11.4 Electrostatic Discharge Caution Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. 11.5 Glossary SLYZ022—TIGlossary. Thisglossarylistsandexplainsterms,acronyms,anddefinitions. 12 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of thisdocument.Forbrowser-basedversionsofthisdatasheet,refertotheleft-handnavigation. 18 SubmitDocumentationFeedback Copyright©2004–2015,TexasInstrumentsIncorporated ProductFolderLinks:LM3475
PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) LM3475MF/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 S65B & no Sb/Br) LM3475MFX/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 S65B & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1
PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Addendum-Page 2
PACKAGE MATERIALS INFORMATION www.ti.com 20-Dec-2016 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) LM3475MF/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3475MFX/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 PackMaterials-Page1
PACKAGE MATERIALS INFORMATION www.ti.com 20-Dec-2016 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) LM3475MF/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LM3475MFX/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 PackMaterials-Page2
PACKAGE OUTLINE DBV0005A SOT-23 - 1.45 mm max height SCALE 4.000 SMALL OUTLINE TRANSISTOR C 3.0 2.6 0.1 C 1.75 1.45 1.45 B A 0.90 PIN 1 INDEX AREA 1 5 2X 0.95 3.05 2.75 1.9 1.9 2 4 3 0.5 5X 0.3 0.15 0.2 C A B (1.1) TYP 0.00 0.25 GAGE PLANE 0.22 TYP 0.08 8 TYP 0.6 0 0.3 TYP SEATING PLANE 4214839/E 09/2019 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Refernce JEDEC MO-178. 4. Body dimensions do not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. www.ti.com
EXAMPLE BOARD LAYOUT DBV0005A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 5X (1.1) 1 5 5X (0.6) SYMM (1.9) 2 2X (0.95) 3 4 (R0.05) TYP (2.6) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:15X SOLDER MASK SOLDER MASK METAL UNDER METAL OPENING OPENING SOLDER MASK EXPOSED METAL EXPOSED METAL 0.07 MAX 0.07 MIN ARROUND ARROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED (PREFERRED) SOLDER MASK DETAILS 4214839/E 09/2019 NOTES: (continued) 5. Publication IPC-7351 may have alternate designs. 6. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com
EXAMPLE STENCIL DESIGN DBV0005A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 5X (1.1) 1 5 5X (0.6) SYMM 2 (1.9) 2X(0.95) 3 4 (R0.05) TYP (2.6) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:15X 4214839/E 09/2019 NOTES: (continued) 7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 8. Board assembly site may have different recommendations for stencil design. www.ti.com
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