Product Sample & Technical Tools & Support & Folder Buy Documents Software Community LM3243 SNVS782C–OCTOBER2010–REVISEDAUGUST2015 LM3243 High-Current Step-Down Converter for 2G, 3G, and 4G RF Power Amplifiers 1 Features 3 Description • InputVoltageRange:2.7Vto5.5V The LM3243 is a DC-DC converter optimized for 1 powering multi-mode 2G, 3G, and 4G RF power • High-EfficiencyPFMandPWMModesWith amplifiers (PAs) from a single Lithium-Ion cell. The InternalSynchronousRectification LM3243 steps down an input voltage from 2.7 V to • AnalogBypassFunctionwithLowDropout 5.5 V to a dynamically adjustable output voltage of Resistance(45mΩ Typical) 0.4 V to 3.6 V. The output voltage is set through a VCON analog input that adjusts the output voltage to • DynamicallyAdjustableOutputVoltage:0.4Vto ensure efficient operation at all power levels of the 3.6V(Typical)inPFMandPWMModes RFPA. • MaximumLoadCurrent:2.5AinPWMMode The LM3243 operates in constant frequency PWM • PWMSwitchingFrequency:2.7MHz(Average) mode producing a small and predictable amount of • ModulatedSwitchingFrequencytoAidRxBand output voltage ripple. This enables best ECTEL Compliance power requirements in GMSK and EDGE spectral • OperatesFromaSingleLi-ionCell compliance, with the minimal amount of filtering and (2.7Vto5.5V) excess headroom. When operating in PFM mode, the LM3243 enables the lowest DG09 current • CurrentandThermalOverloadProtection consumption and therefore maximizes system • ACBReducesInductorRequirementsandSize efficiency. • MinimumTotalSolutionSizebyUsingSmall The LM3243 has a unique Active Current assist and FootprintandCaseSizeInductorandCapacitors analog Bypass (ACB) feature to minimize inductor size without any loss of output regulation for the 2 Applications entire battery voltage and RF output power range, until dropout. ACB provides a parallel current path, • CellularPhones when needed, to limit the maximum inductor current • Hand-HeldRadios to 1.4 A (typical) while still driving a 2.5-A load. The • RFPCCards ACB also enables operation with minimal dropout • Battery-PoweredRFDevices voltage. When considering using the LM3243 in a system design, see the Layout section of this data sheet. DeviceInformation(1) PARTNUMBER PACKAGE BODYSIZE(MAX) LM3243 DSBGA(16) 2.049mm×2.049mm (1) For all available packages, see the orderable addendum at theendofthedatasheet. TypicalSystemApplicationDiagram VBATT 10 µF 1.5 µH EN PVIN VDD VOUT SW BP 10 µF GPO1 LM3243 FB VCC_PA_3G VCC_PA_2G GPO2 MODE ACB 1.0 µF 4.7 µF DAC VCON PGND SGND BGND BB or PA(s) PA RFIC 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA.

LM3243 SNVS782C–OCTOBER2010–REVISEDAUGUST2015 www.ti.com Table of Contents 1 Features.................................................................. 1 7.4 DeviceFunctionalModes........................................13 2 Applications........................................................... 1 8 ApplicationandImplementation........................ 15 3 Description............................................................. 1 8.1 ApplicationInformation............................................15 4 RevisionHistory..................................................... 2 8.2 TypicalApplication .................................................15 5 PinConfigurationandFunctions......................... 3 9 PowerSupplyRecommendations...................... 19 6 Specifications......................................................... 4 10 Layout................................................................... 20 6.1 AbsoluteMaximumRatings......................................4 10.1 LayoutGuidelines.................................................20 6.2 ESDRatings..............................................................4 10.2 LayoutExample....................................................21 6.3 RecommendedOperatingConditions.......................4 10.3 DSBGAPackageAssemblyandUse...................25 6.4 ThermalInformation..................................................5 11 DeviceandDocumentationSupport................. 26 6.5 ElectricalCharacteristics..........................................5 11.1 DeviceSupport......................................................26 6.6 SystemCharacteristics ............................................6 11.2 DocumentationSupport........................................26 6.7 TimingRequirements................................................7 11.3 CommunityResources..........................................26 6.8 TypicalCharacteristics..............................................8 11.4 Trademarks...........................................................26 7 DetailedDescription............................................ 11 11.5 ElectrostaticDischargeCaution............................26 7.1 Overview.................................................................11 11.6 Glossary................................................................26 7.2 FunctionalBlockDiagram.......................................12 12 Mechanical,Packaging,andOrderable Information........................................................... 26 7.3 FeatureDescription.................................................12 4 Revision History NOTE:Pagenumbersforpreviousrevisionsmaydifferfrompagenumbersinthecurrentversion. ChangesfromRevisionB(February2013)toRevisionC Page • AddedDeviceInformationandPinConfigurationandFunctionssections,ESDRatingtable,FeatureDescription, DeviceFunctionalModes,ApplicationandImplementation,PowerSupplyRecommendations,Layout,Deviceand DocumentationSupport,andMechanical,Packaging,andOrderableInformationsections................................................. 1 2 SubmitDocumentationFeedback Copyright©2010–2015,TexasInstrumentsIncorporated ProductFolderLinks:LM3243

LM3243 www.ti.com SNVS782C–OCTOBER2010–REVISEDAUGUST2015 5 Pin Configuration and Functions TMDPackage 16-PinDSBGA PGND SW PVIN ACB A A ACB PVIN SW PGND PGND SW PVIN ACB B B ACB PVIN SW PGND SGND EN BP BGND C C BGND BP EN SGND VDD VCON MODE FB D D FB MODE VCON VDD 1 2 3 4 4 3 2 1 Top View Bottom View PinFunctions PIN TYPE DESCRIPTION NO. NAME A1 PGND Ground PowergroundtotheinternalNFETswitch. B1 C1 SGND Ground Signalanalogandcontrolground(lowcurrent). D1 VDD Power Analogsupplyinput. A2 SwitchingnodeconnectiontotheinternalPFETswitchandNFETsynchronousrectifier.Connect SW Analog toaninductorwithasaturationcurrentratingthatexceedstheI currentlimit LIM,PFET,SteadyState B2 specificationoftheLM3243. Enableinput.SetthisdigitalinputHIGHfornormaloperation.Forshutdown,setlow.Pinhasan C2 EN Digital/Input 800-kΩinternalpulldownresistor. D2 VCON Analog Voltagecontrolanaloginput.V =2.5×VCON. OUT A3 PVIN Power PowersupplyvoltageinputtotheinternalPFETswitchandACB. B3 Bypassmodeinput.SetthepinHIGHforforcedBypassmodeoperation.SetthepinLOWfor C3 BP Digital automaticanalogbypassmode(recommended). PWM/PFMmodeselectioninput.SettingthepinHIGHallowsforPFMorPWM,dependingon D3 MODE Digital/Input theloadcurrent.SettingthepinLOWforcestheparttobeinPWMonly. A4 ACB Output AnalogCurrentBypass(ACB).Connecttotheoutputattheoutputfiltercapacitor. B4 C4 BGND Ground ACBground(highcurrent). D4 FB Analog Feedbackanaloginput.Connecttotheoutputattheoutputfiltercapacitor. Copyright©2010–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:LM3243

LM3243 SNVS782C–OCTOBER2010–REVISEDAUGUST2015 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings overoperatingfree-airtemperaturerange(unlessotherwisenoted)(1)(2)(3) MIN MAX UNIT VDD,PVINtoSGND −0.2 6 V PGNDtoSGND −0.2 0.2 V EN,FB,VCON,BP,MODE (SGND−0.2) (VDD+0.2) V SW,ACB (PGND−0.2) (PVIN+0.2) V PVINtoVDD −0.2 0.2 V Continuouspowerdissipation(4) Internallylimited Junctiontemperature,T 150 °C J-MAX Maximumleadtemperature (soldering,10sec) 150 °C Storagetemperature,T −65° 150 °C stg (1) StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thesearestressratings only,whichdonotimplyfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderRecommended OperatingConditions.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. (2) AbsoluteMaximumRatingsindicatelimitsbeyondwhichdamagetothecomponentmayoccur.RecommendedOperatingConditionsare conditionsunderwhichoperationofthedeviceisspecified.OperatingRatingsdonotimplyverifiedperformancelimits.Forperformance limitsandassociatedtestconditions,seeElectricalCharacteristics. (3) AllvoltagesarewithrespecttothepotentialattheGNDpins.TheLM3243isdesignedformobilephoneapplicationswhereturnonafter power-upiscontrolledbythesystemcontrollerandwhererequirementsforasmallpackagesizeoverruleincreaseddiesizeforinternal undervoltagelock-out(UVLO)circuitry.Thus,itshouldbekeptinshutdownbyholdingtheENpinLOWuntiltheinputvoltageexceeds 2.7V. (4) Internalthermalshutdowncircuitryprotectsthedevicefrompermanentdamage.ThermalshutdownengagesatT =150°C(typical)and J disengagesatT =130°C(typical). J 6.2 ESD Ratings VALUE UNIT V Electrostaticdischarge Human-bodymodel(HBM),perANSI/ESDA/JEDECJS-001(1) ±2000 V (ESD) (1) JEDECdocumentJEP155statesthat500-VHBMallowssafemanufacturingwithastandardESDcontrolprocess. 6.3 Recommended Operating Conditions overoperatingfree-airtemperaturerange(unlessotherwisenoted)(1)(2) MIN NOM MAX UNIT Inputvoltage 2.7 5.5 V Recommendedloadcurrent 2.5 A Junctiontemperature,T −30 125 °C J Ambienttemperature,T (3) −30 90 °C A (1) StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thesearestressratings only,whichdonotimplyfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderRecommended OperatingConditions.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. (2) AllvoltagesarewithrespecttothepotentialattheGNDpins.TheLM3243isdesignedformobilephoneapplicationswhereturnonafter powerupiscontrolledbythesystemcontrollerandwhererequirementsforasmallpackagesizeoverruleincreaseddiesizeforinternal undervoltagelock-out(UVLO)circuitry.Thus,itshouldbekeptinshutdownbyholdingtheENpinLOWuntiltheinputvoltageexceeds 2.7V. (3) Inapplicationswherehigh-powerdissipationand/orpoorpackagethermalresistanceispresent,themaximumambienttemperaturemay havetobede-rated.Maximumambienttemperature(T )isdependentonthemaximumoperatingjunctiontemperature(T = A-MAX J-MAX-OP 125°C),themaximumpowerdissipationofthedeviceintheapplication(P ),andthejunction-toambientthermalresistanceofthe D-MAX part/packageintheapplication(R ),asgivenbythefollowingequation:T =T –(R ×P ).Athigherpowerlevels θJA A-MAX J-MAX-OP θJA D-MAX dutycycleusageisassumedtodrop(thatis,maxpower12.5%usageisassumed)for2Gmode. 4 SubmitDocumentationFeedback Copyright©2010–2015,TexasInstrumentsIncorporated ProductFolderLinks:LM3243

LM3243 www.ti.com SNVS782C–OCTOBER2010–REVISEDAUGUST2015 6.4 Thermal Information LM3243 THERMALMETRIC(1) TMD(DSBGA) UNIT 16PINS R Junction-to-ambientthermalresistance 50 °C/W θJA (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheSemiconductorandICPackageThermalMetricsapplication report,SPRA953. 6.5 Electrical Characteristics Unlessotherwisenoted,allspecificationsapplytoTypicalSystemApplicationDiagramwith:PVIN=VDD=EN=3.8V, BP=0V.Alltypical(TYP)limitsapplyforT =T =25°C,andallminimum(MIN)andmaximum(MAX)applyoverthefull A J operatingambienttemperaturerange(−30°C≤T =T ≤+90°C),unlessotherwisespecified.(1)(2)(3) A J PARAMETER TESTCONDITIONS MIN TYP MAX UNIT V Feedbackvoltageatlow VCON=0.16V,MODE=LOW(3) 0.35 0.40 0.45 V FB,LOW setting Feedbackvoltageathigh VCON=1.44V,V =3.9V, VFB,HIGH setting MODE=LOW(3) IN 3.492 3.6 3.708 V I Shutdownsupplycurrent EN=SW=VCON=0V(4) 0.02 4 µA SHDN Noswitching(5) I DCbiascurrentintoVDD 260 310 µA q_PFM MODE=HIGH Noswitching(5) I DCbiascurrentintoVDD 975 1100 µA q_PWM MODE=LOW I Positivetransientpeak VCON=0.6V(6) 1.9 2.1 A LIM,PFET,Transient currentlimit Positivesteady-statepeak VACB=3.05V ILIM,PFET,SteadyState currentlimit VCON=0.6V(6) 1.34 1.45 1.65 A I Positiveactivecurrentassist VCON=0.6V,VACB=2.8V(6) 1.4 1.7 2 A LIM,P_ACB peakcurrentlimit I NFETswitchnegativepeak VCON=1V(6) −1.69 −1.50 −1.31 A LIM,NFET currentlimit AverageInternaloscillator F VCON=1V 2.43 2.7 2.97 MHz OSC frequency V LogicHIGHinputthreshold BP,EN,MODE 1.2 V IH V LogicLOWinputthreshold BP,EN,MODE 0.5 V IL I ENpinpulldowncurrent EN=3.6V 0 5 10 µA EN I Pininputcurrent BP,MODE –1 1 µA IN I VCONpinleakagecurrent VCON=1V –1 1 µA VCON Gain VCONtoV Gain 0.16V≤VCON≤1.44V(7) 2.5 V/V OUT (1) AllvoltagesarewithrespecttothepotentialattheGNDpins.TheLM3243isdesignedformobilephoneapplicationswhereturnonafter powerupiscontrolledbythesystemcontrollerandwhererequirementsforasmallpackagesizeoverruleincreaseddiesizeforinternal undervoltagelock-out(UVLO)circuitry.Thus,itshouldbekeptinshutdownbyholdingtheENpinLOWuntiltheinputvoltageexceeds 2.7V. (2) MinimumandMaximumlimitsarespecifiedbydesign,test,orstatisticalanalysis. (3) TheparametersintheelectricalcharacteristicstablearetestedunderopenloopconditionsatPVIN=VDD=3.8V.Forperformance overtheinputvoltagerangeandclosed-loopresults,refertothedatasheetcurves. (4) ShutdowncurrentincludesleakagecurrentofPFET. (5) I specifiedhereiswhenthepartisnotswitching.Foroperatinginputcurrentatnoload,refertodatasheetcurves. q (6) Currentlimitisbuilt-in,fixed,andnotadjustable. (7) Linearitylimitsare±3%or±50mV,whicheverislarger. Copyright©2010–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:LM3243

LM3243 SNVS782C–OCTOBER2010–REVISEDAUGUST2015 www.ti.com 6.6 System Characteristics ThefollowingspectableentriesarespecifiedbydesignandverificationsprovidingthecomponentvaluesintheTypical SystemApplicationDiagramareused(L=1.5µH,DCR=120mΩ,TOKODFE201610C-1R5N,C =10µF,6.3V,0402, IN SamsungCL05A106MQ5NUN,C =10µF+4.7µF+3×1µF+3300pF:6.3V,0402,SamsungCL05A106MQ5NUN, OUT CL05A475MQNRN;6.3V,0201SamsungCL03A105MQ3CSN;6.3V,01005MurataGRM022R60J332K).Theseparameters arenotverifiedbyproductiontesting.Minimum(MIN)andmaximum(MAX)valuesarespecifiedovertheambient temperaturerangeT =−30°Cto90°C.Typical(TYP)valuesarespecifiedatPVIN=VDD=EN=3.8V,BP=0VandT = A A 25°Cunlessotherwisestated. PARAMETER TESTCONDITIONS MIN TYP MAX UNIT VCON=1.5V Totaldropoutresistancein R MaxvalueatV =3.1V 45 55 mΩ tot_drop bypassmode IN InductorESR≤151mΩ PininputcapacitanceforBP, C Testfrequency=100KHz 5 pF IN EN,MODE Maximumloadcurrentin I Switcher+ACB 2.5 OUT PWMmode Maximumoutputtransient I 3 A OUT,PU pullupcurrentlimit Switcher+ACB(1) PWMmaximumoutput I −3 OUT,PD,PWM transientpulldowncurrentlimit Maximumoutputloadcurrent V =3.8V,VCON<1 IOUT,MAX-PFM inPFMmode MIONDE=HIGH(1) 85 mA Linearityincontrolrangeof V =4.2V(2) −3% 3% Linearity IN VCON=0.16Vto1.44V Monotonicinnature −50 50 mV V =3.8V,V =1.8V IN OUT I =10mA 79% 82% OUT MODE=HIGH(PFM) V =3.8V,V =0.5V IN OUT I =5mA 58% 60% OUT MODE=HIGH(PFM) V =3.8V,V =3.5V IN OUT I =1900mA 89% 92% OUT MODE=LOW(PWM) η Efficiency V =3.8V,V =2.5V IN OUT I =250mA 90% 93% OUT MODE=LOW(PWM) V =3.8V,V =1.6V IN OUT I =130mA 83% 86% OUT MODE=LOW(PWM) V =3.8V,V =1V IN OUT I =400mA 81% 84% OUT MODE=LOW(PWM) V =0.4Vto3.6V IN Ripplevoltageatnopulse V =0.4Vto3.6V, skippingcondition ROUT=1.9Ω(3) 1 3 OUT MODE=LOW Ripplevoltageatpulse V =5.5Vtodropout,V =3.6V, VRIPPLE skippingcondition RIONUT=1.9Ω(3) OUT 8 mVpp V =3.2V,V <1.125V IN OUT 50 I =10mA,MODE=HIGH OUT PFMripplevoltage V =3.2V,V ≤0.5V, IN OUT I =5mA 50 OUT MODE=HIGH V =3.6Vto4.2V,T =T =10µs, IN R F Line_tr Linetransientresponse V =1V 50 mVpk OUT I =600mA,MODE=LOW OUT (1) Currentlimitisbuilt-in,fixed,andnotadjustable. (2) Linearitylimitsare±3%or±50mV,whicheverislarger. (3) RipplevoltageshouldbemeasuredatC electrodeonawell-designedPCboardandusingthesuggestedinductorandcapacitors. OUT 6 SubmitDocumentationFeedback Copyright©2010–2015,TexasInstrumentsIncorporated ProductFolderLinks:LM3243

LM3243 www.ti.com SNVS782C–OCTOBER2010–REVISEDAUGUST2015 System Characteristics (continued) ThefollowingspectableentriesarespecifiedbydesignandverificationsprovidingthecomponentvaluesintheTypical SystemApplicationDiagramareused(L=1.5µH,DCR=120mΩ,TOKODFE201610C-1R5N,C =10µF,6.3V,0402, IN SamsungCL05A106MQ5NUN,C =10µF+4.7µF+3×1µF+3300pF:6.3V,0402,SamsungCL05A106MQ5NUN, OUT CL05A475MQNRN;6.3V,0201SamsungCL03A105MQ3CSN;6.3V,01005MurataGRM022R60J332K).Theseparameters arenotverifiedbyproductiontesting.Minimum(MIN)andmaximum(MAX)valuesarespecifiedovertheambient temperaturerangeT =−30°Cto90°C.Typical(TYP)valuesarespecifiedatPVIN=VDD=EN=3.8V,BP=0VandT = A A 25°Cunlessotherwisestated. PARAMETER TESTCONDITIONS MIN TYP MAX UNIT V =3V,T =T =10µs OUT R F Load_tr Loadtransientresponse I =0Ato1.2A 40 mVpk OUT MODE=LOW MaximumDuty Maximumdutycycle MODE=LOW 100% Cycle V =3.2V,V =1V IN OUT 100 160 I =10mA,MODE=HIGH OUT PFM_Freq MinimumPFMfrequency kHz V =3.2V,V =0.5V IN OUT 34 55 I =5mA,MODE=HIGH OUT 6.7 Timing Requirements MIN MAX UNIT t TimeforSWpintobecomeactiveuponpowerup;EN=LOW-to-HIGH 30 µs SETUP Turnontime(timeforoutputtoreach90%offinalvalueafterENLOW-to-HIGH t transition) 50 µs ON EN=LOW-to-HIGH,V =4.2V,VCON=1.36V,V =3.4V,I ≤1mA IN OUT OUT TimeforV torisefrom0Vto3V(90%or2.7V); OUT 20 V =4.2V,R =6.8Ω,VCON=0Vto1.2V IN LOAD TimeforV tofallfrom3.6Vto2.6V(10%or2.7V) OUT 20 V =4.2V,R =6.8Ω,VCON=1.44Vto1.04V IN LOAD TimeforV torisefrom1.8Vto2.8V(90%or2.7V) OUT 15 V =4.2V,R =1.9Ω,VCON=0.72Vto1.12V IN LOAD t µs RESPONSE TimeforV tofallfrom2.8Vto1.8V(10%or1.9V) OUT 15 V =4.2V,R =1.9Ω,VCON=1.12Vto0.72V IN LOAD TimeforV torisefrom0Vto3.4V(90%or3.1V) OUT 20 V =4.2V,R =1.9Ω,VCON=0Vto1.36V IN LOAD TimeforV tofallfrom3.4Vto0.4V(10%or0.7V) OUT 20 V =4.2V,R =1.9Ω,VCON=1.36Vto0.16V IN LOAD TimeforV torisefrom0VtoPVINafterBPLOW-to-HIGHtransition(90%) t OUT 20 µs Bypass VCON=0V,I ≤1mA OUT Bypassturnontime.TimeforV torisefrom0VtoPVINafterENLOW-to- OUT t HIGHtransition(90%or3.24) 50 µs Bypass,ON EN=V =3.8V,I ≤1mA IN OUT Copyright©2010–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:LM3243

LM3243 SNVS782C–OCTOBER2010–REVISEDAUGUST2015 www.ti.com 6.8 Typical Characteristics 3.6 4.0 3.5 3.4 OLTAGE (V) 33..02 DROPOUT OLTAGE (V) 223...050 UT V UT V 1.5 UTP 2.8 UTP 1.0 O O 2.6 0.5 2.5X GAIN IOUT= 1.5A 0.0 2.4 2.5 3.0 3.5 4.0 4.5 5.0 5.5 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 INPUT VOLTAGE (V) VCON (V) V =3.4V V =4.3VdowntoDropout V =4.2V R =6.8Ω 0.16V<VCON<1.4V OUT IN IN LOAD Figure1.OutputVoltagevs.SupplyVoltage Figure2.OutputVoltagevs.VCONVoltage 3.00 290 CY (MHz) 222...899505 (cid:29)NT (A) 227800 EN 2.80 RE 260 U R EQ 2.75 CU 250 G FR 2.70 ENT 240 N 2.65 C TCHI 2.60 UIES 230 WI 2.55 Q 220 S 2.50 210 3.0 3.5 4.0 4.5 5.0 5.5 6.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 INPUT VOLTAGE (V) INPUT VOLTAGE (V) V =3.8V V =2.5V I =700mA 2.7V<V <5.5V(NoLoad) V =1V IN OUT OUT IN OUT Figure3.Center-SwitchingFrequencyvs.SupplyVoltage Figure4.QuiescentCurrent(PFM)vs.SupplyVoltage 12 A) 10 m T ( VOUT 2V/DIV N 8 E R R U 6 C NT VCON 2V/DIV E 4 C S E UI 2 Q IOUT 500 mA/DIV 0 20 (cid:29)s/DIV 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 V =3.8V R =6.8Ω V =0Vto3V INPUT VOLTAGE (V) IN LOAD OUT 2.7V<V <5.5V(NoLoad) V =2.5V IN OUT Figure6.VCONTransient(3G/4G) Figure5.QuiescentCurrent(PWM)vs.SupplyVoltage 8 SubmitDocumentationFeedback Copyright©2010–2015,TexasInstrumentsIncorporated ProductFolderLinks:LM3243

LM3243 www.ti.com SNVS782C–OCTOBER2010–REVISEDAUGUST2015 Typical Characteristics (continued) VOUT 2V/DIV VOUT 5 mV/DIV VCON 2V/DIV IOUT 1A/DIV IOUT 50 mA/DIV 20 (cid:29)s/DIV 20 (cid:29)s/DIV V =4.2V R =1.9Ω V =1.4Vto3.4V V =3.6V V =1V I =0mAto60mA IN LOAD OUT IN OUT OUT Figure7.VCONTransient(PWM) Figure8.LoadTransientInPFMMode 20 mV/ 50 mV/ VOUT DIV VOUT DIV 200 mA/ 500 mA/ IOUT DIV IOUT DIV 100 Ps/DIV 100 Ps/DIV VIN=3.8V VOUT=2.5V IOUT=0mAto300mA VIN=3.8V VOUT=3V IOUT=0mAto700mA Figure9.LoadTransientInPWMMode Figure10.LoadTransientInPWMMode 100 mV/ VOUT DIV VOUT 50 mV/DIV VIN 1V/DIV 500 mA/ IOUT DIV 100 (cid:29)s/DIV 100 Ps/DIV V =3.6Vto4.2V R =6.8Ω V =2.5V V =4.2V V =3V I =0mAto1.2A IN LOAD OUT IN OUT OUT Figure12.LineTransient Figure11.LoadTransientInPWMMode Copyright©2010–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:LM3243

LM3243 SNVS782C–OCTOBER2010–REVISEDAUGUST2015 www.ti.com Typical Characteristics (continued) 2V/DIV VOUT 50 mV/DIV VSW 1V/DIV VOUT VIN 1V/DIV 2V/DIV EN 100 (cid:29)s/DIV 20 (cid:29)s/DIV V =3.6Vto4.2V R =6.8Ω V =1V V =3.8V V =1V Noload,EN=Low-to-High IN LOAD OUT IN OUT Figure13.LineTransient Figure14.Start-upinPFMMode VOUT 2V/DIV VSW 2V/DIV 2V/DIV VSW 2V/DIV VOUT 2V/DIV Inductor 1A/DIV EN Current 20 (cid:29)s/DIV 40 (cid:29)s/DIV V =4.2V V =3.4V Noload,EN=Low-to-High V =4.2V R =6.8ΩtoV Shorted V =2.5V IN OUT IN LOAD OUT OUT Figure15.Start-upInPWMMode Figure16.Timed-CurrentLimit 10 SubmitDocumentationFeedback Copyright©2010–2015,TexasInstrumentsIncorporated ProductFolderLinks:LM3243

LM3243 www.ti.com SNVS782C–OCTOBER2010–REVISEDAUGUST2015 7 Detailed Description 7.1 Overview The LM3243 is a high-efficiency step-down DC-DC converter optimized to power the RF power amplifier (PA) in cell phones, portable communication devices, or battery-powered RF devices with a single Li-Ion battery. It operates in fixed-frequency pulse width modulation (PWM) mode for 2G transmissions (with MODE = LOW), automatic mode transition between PFM and PWM mode for 3G/4G RF PA operation (with MODE = HIGH), forcedbypassmode(withBP=HIGH),orinshutdownmode(withEN=LOW). The fixed-frequency PWM mode provides high efficiency and very low output voltage ripple. In PFM mode, the converter operates with reduced switching frequencies and lower supply current to maintain high efficiencies. The forced bypass mode allows the user to drive the output directly from the input supply through a bypass FET. TheshutdownmodeturnstheLM3243offandreducescurrentconsumptionto0.02 µA(typical). In PWM and PFM modes of operation, the output voltage of the LM3243 can be dynamically programmed from 0.4 V to 3.6 V (typical) by adjusting the voltage on VCON. Current overload protection and thermal overload protectionarealsoprovided. The LM3243 was engineered with Active Current assist and analog Bypass (ACB). This unique feature allows the converter to support maximum load currents of 2.5 A (minimum) while keeping a small footprint inductor and meeting all of the transient behaviors required for operation of a multi-mode RF Power Amplifier. The ACB circuit provides an additional current path when the load current exceeds 1.4 A (typical) or as the switcher approaches dropout. Similarly, the ACB circuit allows the converter to respond with faster VCON output voltage transition times by providing extra output current on rising and falling output edges. The ACB circuit also performs the function of analog bypass. Depending upon the input voltage, output voltage and load current, the ACB circuit automatically and seamlessly transitions the converter into analog bypass while maintaining output voltage regulation and low output voltage ripple. Full bypass (100% duty cycle operation) will occur if the total dropout resistanceinbypassmode(R =45mΩ)isinsufficienttoregulatetheoutputvoltage. tot_drop The LM3243 device’s 16-pin DSBGA package is the best solution for space-constrained applications such as cell phones and other hand-held devices. The high switching frequency, 2.7 MHz (typical) in PWM mode, reduces the size of input capacitors, output capacitors and of the inductor. Use of a DSBGA package is best suited for opaque case applications and requires special design considerations for implementation. (Refer to DSBGA Package Assembly and Use.) Because the LM3243 does not implement UVLO, the system controller should set EN=LOWduringpower-upandUVLOconditions.(RefertoShutdownMode). Copyright©2010–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:LM3243

LM3243 SNVS782C–OCTOBER2010–REVISEDAUGUST2015 www.ti.com 7.2 Functional Block Diagram EN MODE BP VDD PVIN VCON PFM COMP. + - ACB CTL ACB SGND + - FB ERROR AMP. + CONTROL LOGIC - DRIVER SW PWM COMP. CURRENT SENSE SGND PGND BGND 7.3 Feature Description 7.3.1 ACB The 3GPP time mask requirement for 2G requires high current to be sourced by the LM3243. These high currents are required for a small time during transients or under a heavy load. Over-rating the switching inductor for these higher currents would increase the solution size and will not be an optimum solution. Thus, to allow an optimal inductor size for such a load, an alternate current path is provided from the input supply through the ACB pin. Once the switcher current limit I is reached, the ACB circuit starts providing the additional LIM,PFET,SteadyState current required to support the load. The ACB circuit also minimizes the dropout voltage by having the analog bypassFETinparallelwithV .TheLM3243canprovideupto2.5A(minimum)ofcurrentinbypassmodewith OUT a4-A(maximum)peakcurrentlimit. 7.3.2 BypassOperation The Bypass circuit provides an analog bypass function with very low dropout resistance (R = 45 mΩ tot_drop typical). When BP = LOW the part will be in automatic bypass mode which will automatically determine the amount of bypass needed to maintain voltage regulation. When the input supply voltage to the LM3243 is loweredtoalevelwherethecommandeddutycycleishigherthanwhattheconverteriscapableofproviding,the part will go into pulse-skipping mode. The switching frequency will be reduced to maintain a low and well- behaved output voltage ripple. The analog bypass circuit will allow the converter to stay in regulation until full bypass is reached (100% duty cycle operation). The converter comes out of full bypass and back into analog bypassregulationmodewithasimilarreverseprocess. To override the automatic bypass mode, either set VCON > (V )/(2.5) (but less than V ) or set BP = HIGH for IN IN forcedbypassfunction.Forcedbypassfunctionisvalidfor2.7V <V <5.5V. IN 12 SubmitDocumentationFeedback Copyright©2010–2015,TexasInstrumentsIncorporated ProductFolderLinks:LM3243

LM3243 www.ti.com SNVS782C–OCTOBER2010–REVISEDAUGUST2015 Feature Description (continued) 7.3.3 ModePin The MODE pin changes the state of the converter to one of the two allowed modes of operation. Setting the MODE pin HIGH (> 1.2 V) sets the device for automatic transition between pulse frequency modulation (PFM) and PWM mode operation. In this mode, the converter operates in PFM mode to maintain the output voltage regulation at very light loads and transitions into PWM mode at loads exceeding 95 mA (typical). The PWM switching frequency is 2.7 MHz (typical). Setting the MODE pin LOW (< 0.5 V) sets the device for PWM mode operation.TheswitchingoperationisinPWMmodeonly,andtheswitchingfrequencyisalso2.7MHz(typical). 7.3.4 DynamicAdjustmentOfOutputVoltage The output voltage of the LM3243 can be dynamically adjusted by changing the voltage on the VCON pin. In RF PA applications, peak power is required when the handset is far away from the base station. To maximize the power savings, the LM3243 output should be set just high enough to achieve the desired PA linearity. Hence, during low-power requirements, reduction of supply voltage to the PA can reduce power consumption from the PA, making the operation more efficient and promote longer battery life. Please refer to Setting The Output Voltage forfurtherdetails. 7.3.5 InternalSynchronousRectification The LM3243 uses an internal NFET as a synchronous rectifier to reduce rectifier forward voltage drop, thus increasing efficiency. The reduced forward voltage drop in the internal NFET synchronous rectifier significantly improves efficiency for low output voltage operation. The NFET is designed to conduct through its intrinsic body diodeduringthetransientintervals,eliminatingtheneedofanexternaldiode. 7.3.6 CurrentLimit The LM3243 current limit feature protects the converter during current overload conditions. Both SW and ACB pins have positive and negative current limits. The positive and negative current limits bound the SW and ACB currents in both directions. The SW pin has two positive current limits. The I current limit triggers LIM,PFET,SteadyState the ACB circuit. Once the peak inductor current exceeds I , the ACB circuit starts assisting the LIM,PFET,SteadyState switcher and provides just enough current to keep the inductor current from exceeding I allowing LIM,PFET,SteadyState the switcher to operate at maximum efficiency. Transiently a second current limit I of 1.9 A (typical) LIM,PFET,Transient or 2.1 A (maximum) limits the maximum peak inductor current possible. The output voltage will fall out of regulation only after both SW and ACB output pin currents reach their respective current limits of I LIM,PFET,Transient andI . LIM,P-ACB 7.3.7 TimedCurrentLimit If the load or output short circuit pulls the output voltage to 0.3 V or lower and the peak inductor current sustains I Transient more than 10 µs, the LM3243 switches to a timed current limit mode. In this mode, the LIM, PFET internalPFETswitchisturnedoff.Afterapproximately30 µs,thedevicewillreturntothenormaloperation. 7.3.8 ThermalOverloadProtection The LM3243 device has a thermal overload protection that protects itself from short-term misuse and overload conditions. If the junction temperature exceeds 150°C, the LM3243 shuts down. Normal operation resumes after the temperature drops below 130°C. Prolonged operation in thermal overload condition may damage the device andisthereforenotrecommended. 7.4 Device Functional Modes 7.4.1 PWMOperation When the LM3243 operates in PWM mode, the switching frequency is constant, and the switcher regulates the output voltage by changing the energy-per-cycle to support the load required. During the first portion of each switching cycle, the control block in the LM3243 turns on the internal PFET switch. This allows current to flow from the input through the inductor and to the output filter capacitor and load. The inductor limits the current to a rampwithaslopeof(V –V )/L,bystoringenergyinitsmagneticfield. IN OUT Copyright©2010–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:LM3243

LM3243 SNVS782C–OCTOBER2010–REVISEDAUGUST2015 www.ti.com Device Functional Modes (continued) During the second portion of each cycle, the control block turns the PFET switch off, blocking current flow from the input, and then turns the NFET synchronous rectifier on. The inductor draws current from ground through the NFET and to the output filter capacitor and load, which ramps the inductor current down with a slope of –V /L. OUT Theoutputfiltercapacitorstoreschargewhentheinductorcurrentisgreaterthantheloadcurrentandreleasesit whentheinductorcurrentislessthantheloadcurrent,smoothingthevoltageacrosstheload. At the next rising edge of the clock, the cycle repeats. An increase of load pulls the output voltage down, increasing the error signal. As the error signal increases, the peak inductor current becomes higher, thus increasingtheaverageinductorcurrent.TheoutputvoltageisthereforeregulatedbymodulatingthePFETswitch on-time to control the average current sent to the load. The circuit generates a duty-cycle modulated rectangular signal that is averaged using a low pass filter formed by the inductor and output capacitor. The output voltage is equaltotheaverageoftheduty-cyclemodulatedrectangularsignal. 7.4.2 PFMMode With MODE = HIGH, the LM3243 automatically transitions to from PWM into PFM operation if the average inductor current is less than 75 mA (typical) and V − V > 0.6 V. The switcher regulates the fixed output IN OUT voltage by transferring a fixed amount of energy during each cycle and modulating the frequency to control the total power delivered to the output. The converter switches only as needed to support the demand of the load current, therefore maximizing efficiency. If the load current should increase during PFM mode to more than 95 mA (typical), the part will automatically transition into constant frequency PWM mode. A 20 mA (typical) hysteresiswindowexistsbetweenPFMandPWMtransitions. After a transient event, the part temporarily operates in 2.7 MHz (typical) fixed-frequency PWM mode to quickly charge or discharge the output. This is true for start-up conditions or if MODE pin is toggled LOW-to-HIGH. Once the output reaches its target output voltage, and the load is less than 75 mA (typical), then the part will seamlesslytransitionintoPFMmode(assumingitisnotinforcedbypassorautobypasscondition). 7.4.3 ModeSelection Table1showstheLM3243parametersforthegivenmodes(PWMorPFM/PWM). Table1. ParametersUnderDifferentModes PARAMETER/MODE PWM PFM/PWM MODEpin LOW HIGH BPpin LOW LOW Frequencyatloads=75mA(typical) 2.7MHz(typical) Variable Frequencyatloads=95mA(typical) 2.7MHz(typical) 2.7MHz(typical) V 2.5×VCON 2.5×VCON OUT 75mA(minimuminPFM)or2.5A(minimumin Maximumloadsteadystate 2.5A(min.) PWM) 7.4.4 ShutdownMode ToshutdowntheLM3243pulltheENpinLOW(<0.5V).Inshutdownmode,thecurrentconsumptionis0.02 µA (typical) and the PFET switch, NFET synchronous rectifier, reference voltage source, control and bias circuit are turned OFF. To enable LM3243 pull EN HIGH (> 1.2V ), and the mode of operation will be dependent on the voltageappliedtotheMODEpin. SincetheLM3243doesnotfeatureaundervoltagelock-out(UVLO)circuit,theENpinshouldbesetLOWtoturn off the LM3243 during power up and during UVLO conditions. For cell-phone applications, the system controller determines the power supply sequence; thus, it is up to the system controller to ensure proper sequencing by usingalloftheavailablepinsandfunctionsproperly. 14 SubmitDocumentationFeedback Copyright©2010–2015,TexasInstrumentsIncorporated ProductFolderLinks:LM3243

LM3243 www.ti.com SNVS782C–OCTOBER2010–REVISEDAUGUST2015 8 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validateandtesttheirdesignimplementationtoconfirmsystemfunctionality. 8.1 Application Information The LM3243 DC-DC converter steps down an input voltage from 2.7 V to 5.5 V to a dynamically adjustable outputvoltageof0.4Vto3.6V. 8.2 Typical Application VBATT 10 µF 1.5 µH EN PVIN VDD VOUT SW BP 10 µF GPO1 LM3243 FB VCC_PA_3G VCC_PA_2G GPO2 MODE ACB 1.0 µF 4.7 µF DAC VCON PGND SGND BGND BB or PA(s) PA RFIC Figure17. LM3243TypicalApplication 8.2.1 DesignRequirements Fortypicalstep-downconverterapplications,usetheparameterslistedinTable2. Table2.DesignParameters DESIGNPARAMETER EXAMPLEVALUE Inputvoltage 2.7Vto5.5V Minimumoutputvoltage 0.4Vto3.6V Outputcurrentrange 0to2.5A 8.2.2 DetailedDesignProcedure 8.2.2.1 InductorSelection A 1.5 µH inductor is needed for optimum performance and functionality of the LM3243. In the case of 2G transmission current bursts, the effective overall RMS current requirements are reduced. Therefore, please consult with the inductor manufacturers to determine if some of their smaller components will meet your application needs even though the classical inductor specification does not appear to meet the LM3243 RMS currentspecifications. LM3243automaticallymanagestheinductorpeakandRMS(orsteadycurrentpeak)currentthroughtheSWpin. The SW pin has two positive current limits. The first is the 1.45 A typical (or 1.65 A maximum.) over-limit current protection. It sets the upper steady-state inductor peak current (as detailed in the Electrical Characteristics Table - I ). It is the dominant factor limiting the inductor's I requirement. The second is a over-limit LIM,PFET,SteadyState SAT current protection. It limits the maximum peak inductor current during large signal transients (that is, < 20 µs) to 1.9 A typical (or 2.1 A maximum). A minimum inductance of 0.3 µH should be maintained at the second current limit. Copyright©2010–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:LM3243

LM3243 SNVS782C–OCTOBER2010–REVISEDAUGUST2015 www.ti.com The ACB circuit automatically adjusts its output current to keep the steady-state inductor current below the steady-state peak current limit. Thus, the inductor RMS current will effectively always be less than the I during the transmit burst. In addition, as in the case with 2G where the output current comes in LIM,PFET,SteadyState bursts,theeffectiveoverallRMScurrentwouldbemuchlower. For good efficiency, the inductor’s resistance should be less than 0.2 Ω; low DCR inductors (< 0.2 Ω) are recommended.Table3suggestssomeinductorsandsuppliers. Table3. SuggestedInductorsandTheirSuppliers MODEL VENDOR SIZE(mm) I −30% DCR SAT DFE201610C-1R5M TOKO 2×1.6×1 2.2A 120mΩ (1285AS-H-1R5M) PSD20161T-1R5MS CYNTEC 2×1.6×1 1.6A 143mΩ TFM201610-1R5M TDK 2×1.6mm×1 2.2A 140mΩ 8.2.2.2 CapacitorSelection The LM3243 is designed to use ceramic capacitors for its input and output filters. Use a 10-µF capacitor for the input and approximately 10-µF total output capacitance. Capacitor types such as X5R, X7R are recommended for both filters. These provide an optimal balance between small size, cost, reliability and performance for cell phones and similar applications. Table 4 lists suggested part numbers and suppliers. DC bias characteristics of the capacitors must be considered while selecting the voltage rating and case size of the capacitor. Smaller case sizes for the output capacitor mitigate piezo-electric vibrations of the capacitor when the output voltage is stepped up and down at fast rates. However, they have a bigger percentage drop in value with DC bias. For even smaller total solution size, 0402 case size capacitors are recommended for filtering. Use of multiple 2.2-µF or 1-µF capacitors can also be considered. For RF Power Amplifier applications, split the output capacitor between DC-DC converter and RF Power Amplifiers: 10 µF (C ) + 4.7 µF (C ) + 3 × 1 µF (C ) is OUT1 OUT2 OUT3 recommended. The optimum capacitance split is application dependent, and for stability the actual total capacitance (taking into account effects of capacitor DC bias, temperature de-rating, aging and other capacitor tolerances) should target 10 µF with 2.5-V DC bias (measured at 0.5 V ). Place all the output capacitors very RMS close to the respective device. A high-frequency capacitor (3300 pF) is highly recommended to be placed next to C . OUT1 Table4. SuggestedCapacitorsAndTheirSuppliers CAPACITANCE MODEL SIZE(W×L)(mm) VENDOR 10µF GRM185R60J106M 1.6×0.8 Murata 10µF CL05A106MQ5NUN 1×0.5 Samsung 4.7µF CL05A475MQ5NRN 1×0.5 Samsung 1.0µF CL03A105MQ3CSN 0.6×0.3 Samsung 3300pF GRM022R60J332K 0.4×0.2 Murata 8.2.2.3 SettingTheOutputVoltage 8.2.2.3.1 DACControl An analog voltage to the VCON pin can dynamically program the output voltage from 0.4 V (typical) to 3.6 V (typical) in both PFM and PWM modes of operation, without the need for external resistors. The output voltage is governedbyTable5. Table5. OutputVoltageSelection VCON(V) V (V) OUT VCON=0.16Vto1.44V 2.5×VCON 16 SubmitDocumentationFeedback Copyright©2010–2015,TexasInstrumentsIncorporated ProductFolderLinks:LM3243

LM3243 www.ti.com SNVS782C–OCTOBER2010–REVISEDAUGUST2015 V IN 10 µF PVIN VDD 1.5 µH SW VOUT GPIO EN LM3243 FB 10 µF 4.7 µF GPIO MODE BP ACB DAC VCON SGND PGND BGND PDM Output Figure18. DynamicAdjustmentofOutputVoltageWithDACorPDM 8.2.2.3.2 PDM-BasedVCONSignal Figure 18 shows the application circuit that enables the LM3243 to dynamically adjust the output voltage using a GPIO pin from the system controller. Figure 19 shows the waveforms when adjusted dynamically. The PDM signal of the GPIO is filtered using a low-pass filter and fed to the VCON pin. As the bitstream of the PDM signal changes, the voltage on the VCON pin changes. Thus, the GPIO pin can be used to dynamically adjust the output voltage. The double low-pass filter reduces the ripple at VCON to avoid any excessive VCON-induced rippleattheoutputvoltage. EN VCON VCON = 0.4V 8 30 Ps 8 30 Ps 3.4V 3.4V 3.4V VOUT 1V 0V 7 20 Ps 7 20 Ps 1.7A 7 20 Ps ILOAD < 200 mA 7 20 Ps 0A Figure19. DynamicAdjustmentofOutputVoltageWithGPIO 8.2.2.3.3 VCONPin Figure 20 shows the equivalent CRC circuit for the VCON pin. This circuit is internal to the part and should be takenintoconsiderationwhendrivingthispin. Copyright©2010–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 17 ProductFolderLinks:LM3243

LM3243 SNVS782C–OCTOBER2010–REVISEDAUGUST2015 www.ti.com R1 = 100 k: C1 = 1.7 pF C2 = 9 pF Figure20. VCONPinEquivalentCRCCircuit 8.2.2.4 ENInputControl Use the system controller to drive the EN HIGH or LOW with a comparator, Schmitt trigger or logic gate. Set EN = HIGH (> 1.2 V) for normal operation and LOW (< 0.5 V) for shutdown mode to reduce current consumption to 0.02-µA(typical)current. 8.2.2.5 Start-Up The waveform Figure 21in shows the start-up condition. First, V should take on a value between 2.7 V and 5.5 IN V. Next, EN should go HIGH (> 1.2 V). Finally, VCON should be set to a value that corresponds to the required output voltage (V = VCON × 2.5). V will reach its steady-state value in less than 50 µs. To optimize the OUT OUT start-up time and behavior of the output voltage, the LM3243 will always start up in PWM mode (even when MODE=HIGHandoutputloadcurrent ≤ 75mA),thenseamlesslytransitionintoPFMmode. VIN EN VCON BP 8 30 µs VOUT 7 20 µs Figure21. Start-UpSequenceandConditions 18 SubmitDocumentationFeedback Copyright©2010–2015,TexasInstrumentsIncorporated ProductFolderLinks:LM3243

LM3243 www.ti.com SNVS782C–OCTOBER2010–REVISEDAUGUST2015 8.2.3 ApplicationCurves 100 100 95 95 90 90 %) %) Y ( 85 Y ( 85 C C EN 80 EN 80 CI C FI 75 FI 75 F F E VOUT = 1.0V E VOUT = 1.6V 70 VOUT = 1.5V 70 VOUT = 2.0V VOUT = 2.0V VOUT = 2.5V VOUT = 2.5V VOUT = 3.0V 65 65 VOUT = 3.0V VOUT = 3.5V 60 60 0 20 40 60 80 100 120 140 160 0 100 200 300 400 500 600 700 800 LOAD CURRENT (mA) LOAD CURRENT (mA) V =3.8V V =3.8V I =150mATo750mA IN IN OUT Figure22.Efficiencyvs.LoadCurrent Figure23.Efficiencyvs.LoadCurrent 100 100 90 95 80 %) 90 %) Y ( Y ( 70 C C EN 85 EN 60 CI CI FI FI 50 EF 80 VOUT = 1.6V EF VOUT = 2.0V VOUT = 2.0V 40 VOUT = 2.5V VOUT = 2.5V VOUT = 3.0V 75 VOUT = 3.0V VOUT = 3.5V 30 VOUT = 3.5V 70 20 0 200 400 600 800 1000 900 1200 1500 1800 2100 2400 2700 LOAD CURRENT (mA) LOAD CURRENT (mA) V =3.8V I =100mATo1A V =3.8V I =1ATo2.5A IN OUT IN OUT Figure24.Efficiencyvs.LoadCurrent Figure25.Efficiencyvs.LoadCurrent 9 Power Supply Recommendations The LM3243 device is designed to operate from an input voltage supply range between 2.7 V and 5.5 V. This input supply should be well-regulated and able to withstand maximum input current and maintain stable voltage withoutvoltagedropevenatloadtransitioncondition. Copyright©2010–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 19 ProductFolderLinks:LM3243

LM3243 SNVS782C–OCTOBER2010–REVISEDAUGUST2015 www.ti.com 10 Layout 10.1 Layout Guidelines PC board layout is critical to successfully designing a DC-DC converter into a product. A properly planned board layout optimizes the performance of a DC-DC converter and minimizes effects on surrounding circuitry while also addressingmanufacturingissuesthatcanhaveadverseimpactsonboardqualityandfinalproductyield. 10.1.1 PCBConsiderations Poor board layout can disrupt the performance of a DC-DC converter and surrounding circuitry by contributing to EMI, ground bounce, and resistive voltage loss in the traces. Erroneous signals could be sent to the DC-DC converter device, resulting in poor regulation or instability. Poor layout can also result in re-flow problems leading to poor solder joints between the DSBGA package and board pads. Poor solder joints can result in erratic or degradedperformanceoftheconverter. 10.1.1.1 EnergyEfficiency Minimize resistive losses by using wide traces between the power components and doubling up traces on multiplelayerswhenpossible 10.1.1.2 EMI By its very nature, any switching converter generates electrical noise. The circuit board designer’s challenge is to minimize,contain,orattenuatesuchswitcher-generatednoise.Ahigh-frequencyswitchingconverter,suchasthe LM3243, switches Ampere level currents within nanoseconds, and the traces interconnecting the associated components can act as radiating antennas. The following guidelines are offered to help to ensure that EMI is maintainedwithintolerablelevels. Tohelpminimizeradiatednoise: • Place the LM3243 switcher, its input capacitor, and output filter inductor and capacitor close together, and maketheinterconnectingtracesasshortaspossible. • Arrange the components so that the switching current loops curl in the same direction. During the first half of each cycle, current flows from the input filter capacitor, through the internal PFET of the LM3243 and the inductor, to the output filter capacitor, then back through ground, forming a current loop. In the second half of each cycle, current is pulled up from ground, through the internal synchronous NFET of the LM3243 by the inductor, to the output filter capacitor and then back through ground, forming a second current loop. Routing these loops so the current curls in the same direction prevents magnetic field reversal between the two half- cyclesandreducesradiatednoise. • Make the current loop area(s) as small as possible. Interleave doubled traces with ground planes or return paths,wherepossible,tofurtherminimizetraceinductances. Tohelpminimizeconductednoiseintheground-plane: • Reduce the amount of switching current that circulates through the ground plane: Connect the ground bumps of the LM3243 and its input filter capacitor together using generous component-side copper fill as a pseudo- ground plane. Then connect this copper fill to the system ground-plane (if one is used) by multiple vias located at the input filter capacitor ground terminal. The multiple vias help to minimize ground bounce at the LM3243bygivingitalow-impedancegroundconnection. TohelpminimizecouplingtotheDC-DCconvertervoltagefeedbacktrace: • Route noise sensitive traces, such as the voltage feedback path (FB), as directly as possible from the switcher FB pad to the VOUT pad of the output capacitor, but keep it away from noisy traces between the powercomponents. Tohelpminimizenoisecoupledbackintopowersupplies: • UseastarconnectiontoroutefromtheVBATTpowerinputtoSwitcherPVINandtoVBATT_PA. • Routetracesforminimuminductancebetweensupplypinsandbypasscapacitor(s). • Routetracestominimizeinductancebetweenbypasscapacitorsandthegroundplane. • Maximizepowersupplytraceinductance(s)toreducecouplingamongfunctionblocks. • Inserting a ferrite bead in-line with power supply traces can offer a favorable tradeoff in terms of board area, by attenuating noise that might otherwise propagate through the supply connections, allowing the use of 20 SubmitDocumentationFeedback Copyright©2010–2015,TexasInstrumentsIncorporated ProductFolderLinks:LM3243

LM3243 www.ti.com SNVS782C–OCTOBER2010–REVISEDAUGUST2015 Layout Guidelines (continued) fewerbypasscapacitors. VBATT Star Connection: It is critically important to use a ‘Star’ connection from VBATT supply to LM3243 PVIN and from VBATT to PA modules as implementing a ‘daisy chain’ supply connection may add noise to the PA output. Star connection at VBATT VBATT_PA VBATT_PA VIN DC-DC * * VIN + + + - - VBATT _ LM3243 *Proper decoupling on VBATT_PA is strongly recommended. Figure26. VBATTStarConnectiononVINAndVBATT_PA 10.1.2 ManufacturingConsiderations The LM3243 package employs a 16-pin (4 × 4) array of 0.24-mm solder balls, with a 0.4-mm pad pitch. A few simpledesignruleswillgoalongwaytoensuringagoodlayout. • Padsizeshouldbe0.225± 0.02mm.Soldermaskopeningshouldbe0.325 ± 0.02mm. • As a thermal relief, connect to each pad with 9 mil wide, 6 mil long traces and incrementally increase each trace to its optimal width. Symmetry is important to ensure the solder bumps re-flow evenly. Refer to TI ApplicationNoteAN-1112DSBGAWaferLevelChipScalePackage (SNVA009). 10.2 Layout Example Figure27. SimplifiedLM3243RFEvaluationBoardSchematic Copyright©2010–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 21 ProductFolderLinks:LM3243

LM3243 SNVS782C–OCTOBER2010–REVISEDAUGUST2015 www.ti.com Layout Example (continued) 10.2.1 LM3243RFEvaluationBoard Figure28. TopViewofRFEvaluationBoardWithPAs 10.2.2 DC-DCConverterSection Figure29. TopLayer 22 SubmitDocumentationFeedback Copyright©2010–2015,TexasInstrumentsIncorporated ProductFolderLinks:LM3243

LM3243 www.ti.com SNVS782C–OCTOBER2010–REVISEDAUGUST2015 Layout Example (continued) Figure30. BoardLayer2-FB,VDD,AdditionalRoutingForPGND,PVIN Figure31. BoardLayer2-SwitcherDetail Copyright©2010–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 23 ProductFolderLinks:LM3243

LM3243 SNVS782C–OCTOBER2010–REVISEDAUGUST2015 www.ti.com Layout Example (continued) Figure32. BoardLayer4-GNDPlaneVCC_PA Figure33. BoardLayer5-VBATT_SWConnection 24 SubmitDocumentationFeedback Copyright©2010–2015,TexasInstrumentsIncorporated ProductFolderLinks:LM3243

LM3243 www.ti.com SNVS782C–OCTOBER2010–REVISEDAUGUST2015 Layout Example (continued) 10.2.3 VBATTStarSupplyConnection Figure34. MultipleBoardLayers-VBATTSupplyStarConnection 10.3 DSBGA Package Assembly and Use Use of the DSBGA package requires specialized board layout, precision mounting and careful re-flow techniques, as detailed in TI Application Note AN-1112 DSBGA Wafer Level Chip Scale Package (SNVA009). Please refer to the section Surface Mount Assembly Considerations. For best results in assembly, local alignmentfiducialsonthePCboardshouldbeusedtofacilitateplacementofthedevice. The pad style used with DSBGA package must be the NSMD (non-solder mask defined) type. This means that the solder-mask opening is larger than the pad size. This prevents a lip that would otherwise form if the solder- mask and pad overlap, which would hold the device off the surface of the board and interfere with mounting. See SNVA009 forspecificinstructionshowtodothis. The 16-pin package used for LM3243 has 265 micron solder balls and requires 0.225-mm pads for mounting the circuit board. The trace to each pad should enter the pad with a 90°entry angle to prevent debris from being caught in deep corners. Initially, the trace to each pad should be 5.6 mil wide, for a section approximately 5 mil long, as a thermal relief. Then each trace should neck up or down to its optimal width. An important criterion is symmetry to insure the solder bumps on the LM3243 re-flow evenly and that the device solders level to the board. In particular, special attention must be paid to the pads for bumps A1, A3, B1, and B3 since PGND and PVIN are typically connected to large copper planes, inadequate thermal reliefs can result in inadequate re-flow ofthesebumps. The DSBGA package is optimized for the smallest possible size in applications with red-opaque or infrared- opaque cases. Because the DSBGA package lacks the plastic encapsulation characteristic of larger devices, it is vulnerable to light. Backside metallization and/or epoxy coating, along with front-side shading by the printed circuit board, reduce this sensitivity. However, the package has exposed die edges that are sensitive to light in thereadandinfraredrangeshiningonthepackage’sexposeddieedges. Copyright©2010–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 25 ProductFolderLinks:LM3243

LM3243 SNVS782C–OCTOBER2010–REVISEDAUGUST2015 www.ti.com 11 Device and Documentation Support 11.1 Device Support 11.1.1 Third-PartyProductsDisclaimer TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER ALONEORINCOMBINATIONWITHANYTIPRODUCTORSERVICE. 11.2 Documentation Support 11.2.1 RelatedDocumentation Foradditionalinformation,seethefollowing: TIApplicationNoteAN-1112DSBGAWaferLevelChipScalePackage (SNVA009). 11.3 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TIE2E™OnlineCommunity TI'sEngineer-to-Engineer(E2E)Community.Createdtofostercollaboration amongengineers.Ate2e.ti.com,youcanaskquestions,shareknowledge,exploreideasandhelp solveproblemswithfellowengineers. DesignSupport TI'sDesignSupport QuicklyfindhelpfulE2Eforumsalongwithdesignsupporttoolsand contactinformationfortechnicalsupport. 11.4 Trademarks E2EisatrademarkofTexasInstruments. Allothertrademarksarethepropertyoftheirrespectiveowners. 11.5 Electrostatic Discharge Caution Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. 11.6 Glossary SLYZ022—TIGlossary. Thisglossarylistsandexplainsterms,acronyms,anddefinitions. 12 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of thisdocument.Forbrowser-basedversionsofthisdatasheet,refertotheleft-handnavigation. 26 SubmitDocumentationFeedback Copyright©2010–2015,TexasInstrumentsIncorporated ProductFolderLinks:LM3243

PACKAGE OPTION ADDENDUM www.ti.com 15-Jul-2015 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) LM3243TME/NOPB ACTIVE DSBGA YFQ 16 250 Green (RoHS SNAGCU Level-1-260C-UNLIM -30 to 90 S57 & no Sb/Br) LM3243TMX/NOPB ACTIVE DSBGA YFQ 16 3000 Green (RoHS SNAGCU Level-1-260C-UNLIM -30 to 90 S57 & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 15-Jul-2015 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 31-May-2019 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) LM3243TME/NOPB DSBGA YFQ 16 250 178.0 8.4 2.08 2.08 0.76 4.0 8.0 Q1 LM3243TMX/NOPB DSBGA YFQ 16 3000 178.0 8.4 2.08 2.08 0.76 4.0 8.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 31-May-2019 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) LM3243TME/NOPB DSBGA YFQ 16 250 210.0 185.0 35.0 LM3243TMX/NOPB DSBGA YFQ 16 3000 210.0 185.0 35.0 PackMaterials-Page2

MECHANICALDATA YFQ0016xxx D 0.600±0.075 E TMD16XXX(RevA) D: Max = 2.049 mm, Min =1 .989 mm E: Max = 2.049 mm, Min =1 .989 mm 4215081/A 12/12 NOTES: A.Alllineardimensionsareinmillimeters.DimensioningandtolerancingperASMEY14.5M-1994. B.Thisdrawingissubjecttochangewithoutnotice. www.ti.com

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