LB11696V Direct PWM Drive Brushless Motor Predriver IC Monolithic Linear IC Overview www.onsemi.com The LB11696V is a direct PWM drive predriver IC designed for three-phase power brushless motors. A motor driver circuit with the desired output power (voltage and current) can be implemented by adding discrete transistors in the output circuits. Furthermore, the LB11696V provides a full complement of protection circuits allowing it to easily implement high-reliability drive circuits. This device is optimal for driving all types of large-scale motors such as those used in air conditioners and on-demand water heaters. SSOP30 Features • CASE 565AT Single-phase Full-wave Linear Drive with BTL Output (Gain Resistance 1k(cid:2)−360k(cid:2)): Most Appropriate for Consumer MARKING DIAGRAM Appliances Power Supply, Namely Equipment that Requires Silence because this has No Switching Noise • Three-phase Bipolar Drive • Direct PWM Drive (Controlled either by Control Voltage or PWM XXXXXXXX Variable Duty Pulse Input) YMDDD • Built−in Forward/Reverse Switching Circuit • Start/Stop Mode Switching Circuit (Stop Mode Power Saving Function) • Built-in Input Amplifier XXXX= Specific Device Code • Y = Year 5 V Regulator Output (VREG Pin) • M = Month Current Limiter Circuit (Supports 0.25V (Typical) Reference DDD = Additional Traceability Data Voltage Sensing Based High-precision Detection) • Undervoltage Protection Circuit ORDERING INFORMATION (The Operating Voltage can be Set with a Zener Diode) See detailed ordering and shipping information on page17 of • Automatic Recovery Type Constraint Protection Circuit with this data sheet. Protection Operating State Discrimination Output (RD Pin) • Four Types of Hall Signal Pulse Outputs • Supports Thermistor Based Thermal Protection of the Output Transistors © Semiconductor Components Industries, LLC, 2015 1 Publication Order Number: July, 2018 − Rev. 3 LB11696V/D

LB11696V SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS (TA = 25°C) Symbol Parameter Conditions Ratings Unit VCC max Supply Voltage 1 VCC pin 18 V IO max Output Current UL, VL, WL, UH, VH, and WH pins 30 mA LVS max LVS Pin Applied Voltage LVS pin 18 V Pd max 1 Allowable Power Dissipation 1 Independent IC 0.45 W Pd max 2 Allowable Power Dissipation 2 When mounted on a 114.3 × 76.1 × 1.6 mm 1.05 W glass epoxy board Topr Operating Temperature –20 to +100 °C Tstg Storage Temperature –55 to +150 °C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. ALLOWABLE OPERATING RANGES (TA = 25°C) Symbol Parameter Conditions Ratings Unit VCC1−1 Supply Voltage Range 1−1 VCC pin 8 to 17 V VCC1−2 Supply Voltage Range 1−2 VCC pin, when VCC is shorted to VREG 4.5 to 5.5 V IO Output Current UL, VL, WL, UH, VH, and WH pins 25 mA IREG 5 V Constant Voltage Output Current −30 mA VHP HP Pin Applied Voltage 0 to 17 V IHP HP Pin Output Current 0 to 15 mA VRD RD Pin Applied Voltage 0 to 17 V IRD RD Pin Output Current 0 to 15 mA Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. ELECTRICAL CHARACTERISTICS (TA = 25°C, VCC = 12 V) Symbol Parameter Conditions Min Typ Max Unit ICC1 Current Drain 1 − 12 16 mA ICC2 Current Drain 2 Stop mode − 2.5 4 mA 5 V CONSTANT VOLTAGE OUTPUT (VREG PIN) VREG Output Voltage 4.7 5.0 5.3 V (cid:3)VREG1 Line Regulation VCC = 8 to 17 V − 40 100 mV (cid:3)VREG2 Load Regulation IO = −5 to −20 mA − 10 30 mV (cid:3)VREG3 Temperature Coefficient Design target value − 0 − mV/°C OUTPUT BLOCK VOUT1−1 Output Voltage 1−1 Low level, IO = 400 (cid:4)A − 0.2 0.5 V VOUT1−2 Output Voltage 1−2 Low level, IO = 10 mA − 0.9 1.2 V VOUT2 Output Voltage 2 High level, IO = −20 mA VCC − 1.1 VCC − 0.9 − V IO Leak Output Leak Current − − 10 (cid:4)A HALL AMPLIFIER BLOCK IHB (HA) Input Bias Current −2 −0.5 − (cid:4)A VICM1 Common-mode Input Voltage Range 1 When a Hall element is used 0.5 − VCC − 2.0 V www.onsemi.com 2

LB11696V ELECTRICAL CHARACTERISTICS (TA = 25°C, VCC = 12 V) (continued) Symbol Parameter Conditions Min Typ Max Unit HALL AMPLIFIER BLOCK VICM2 Common-mode Input Voltage Range 2 Single-sided input bias mode 0 − VCC V (when a Hall IC is used) Hall Input Sensitivity 80 − − mVp-p (cid:3)VIN (HA) Hysteresis 15 24 40 mV VSLH (HA) Input Voltage Low → High 5 12 20 mV VSHL (HA) Input Voltage High → Low −20 −12 −5 mV CTL AMPLIFIER VIO (CTL) Input Offset Voltage −10 − 10 mV IB (CTL) Input Bias Current −1 − 1 (cid:4)A VICM Common-mode Input Voltage Range 0 − VREG − V 1.7 VOH (CTL) High-level Output Voltage ITOC = −0.2 mA VREG − VREG − − V 1.2 0.8 VOL (CTL) Low-level Output Voltage ITOC = 0.2 mA − 0.8 1.05 V G (CTL) Open-loop Gain f (CTL) = 1 kHz 45 51 − dB PWM OSCILLATOR (PWM PIN) VOH (PWM) High-level Output Voltage 2.75 3.0 3.25 V VOL (PWM) Low-level Output Voltage 1.2 1.35 1.5 V ICHG External Capacitor Charge Current VPWM = 2.1 V −120 −90 −65 (cid:4)A f (PWM) Oscillator Frequency C = 2000 pF − 22 − kHz V (PWM) Amplitude 1.4 1.6 1.9 Vp-p TOC PIN VTOC1 Input Voltage 1 Output duty: 100% 2.68 3.0 3.34 V VTOC2 Input Voltage 2 Output duty: 0% 1.2 1.35 1.5 V VTOC1L Input Voltage 1 Low Design target value, 2.68 2.82 2.96 V when VREG = 4.7 V, 100% VTOC2L Input Voltage 2 Low Design target value, 1.23 1.29 1.34 V when VREG = 4.7 V, 0% VTOC1H Input Voltage 1 High Design target value, 3.02 3.18 3.34 V when VREG = 5.3 V, 100% VTOC2H Input Voltage 2 High Design target value, 1.37 1.44 1.50 V when VREG = 5.3 V, 0% HP PIN VHPL Output Saturation Voltage IO = 10 mA − 0.2 0.5 V IHPleak Output Leakage Current VO = 18 V − − 10 (cid:4)A CSD OSCILLATOR (CSD PIN) VOH (CSD) High-level Output Voltage 2.7 3.0 3.3 V VOL (CSD) Low-level Output Voltage 0.7 1.0 1.3 V ICHG1 External Capacitor Charge Current VCSD = 2 V −3.15 −2.5 −1.85 (cid:4)A ICHG2 External Capacitor Discharge Current VCSD = 2 V 0.1 0.14 0.18 (cid:4)A RCSD Charge/Discharge Current Ratio (Change current) / (Discharge 15 18 21 times current) www.onsemi.com 3

LB11696V ELECTRICAL CHARACTERISTICS (TA = 25°C, VCC = 12 V) (continued) Symbol Parameter Conditions Min Typ Max Unit RD PIN VRDL Low-level Output Voltage IO = 10 mA − 0.2 0.5 V IL (RD) Output Leakage Current VO = 18 V − − 10 (cid:4)A CURRENT LIMITER CIRCUIT (RF PIN) VRF Limiter Voltage RF−RFGND 0.225 0.25 0.275 V UNDERVOLTAGE PROTECTION CIRCUIT (LVS PIN) VSDL Operating Voltage 3.5 3.7 3.9 V VSDH Release Voltage 3.95 4.15 4.35 V (cid:3)VSD Hysteresis 0.3 0.45 0.6 V PWMIN PIN f (PI) Input Frequency − − 50 kHz VIH (PI) High-level Input Voltage 2.0 − VREG V VIL (PI) Low-level Input Voltage 0 − 1.0 V VIO (PI) Input Open Voltage VREG − − VREG V 0.5 VIS (PI) Hysteresis 0.2 0.25 0.4 V IIH (PI) High-level Input Current VPWMIN = VREG −10 0 +10 (cid:4)A IIL (PI) Low-level Input Current VPWMIN = 0 V −130 −90 − (cid:4)A S/S PIN VIH (SS) High-level Input Voltage 2.0 − VREG V VIL (SS) Low-level Input Voltage 0 − 1.0 V VIS (SS) Hysteresis 0.2 0.25 0.4 V IIH (SS) High-level Input Current VS/S = VREG −10 0 +10 (cid:4)A IIL (SS) Low-level Input Current VS/S = 0 V −10 −1 − (cid:4)A F/R PIN VIH (FR) High-level Input Voltage 2.0 − VREG V VIL (FR) Low-level Input Voltage 0 − 1.0 V VIO (FR) Input Open Voltage VREG − − VREG V 0.5 VIS (FR) Hysteresis 0.2 0.25 0.4 V IIH (FR) High-level Input Current VF/R = VREG −10 0 +10 (cid:4)A IIL (FR) Low-level Input Current VF/R = 0 V −130 −90 − (cid:4)A N1 PIN VIH (N1) High-level Input Voltage 2.0 − VREG V VIL (N1) Low-level Input Voltage 0 − 1.0 V VIO (N1) Input Open Voltage VREG − VREG V −0.5 IIH (N1) High-level Input Current VN1 = VREG −10 0 +10 (cid:4)A IIL (N1) Low-level Input Current VN1 = 0 V −130 −100 − (cid:4)A www.onsemi.com 4

LB11696V ELECTRICAL CHARACTERISTICS (TA = 25°C, VCC = 12 V) (continued) Symbol Parameter Conditions Min Typ Max Unit N2 PIN VIH (N2) High-level Input Voltage 2.0 − VREG V VIL (N2) Low-level Input Voltage 0 − 1.0 V VIO (N2) Input Open Voltage VREG − − VREG V 0.5 IIH (N2) High-level Input Current VN2 = VREG −10 0 +10 (cid:4)A IIL (N2) Low-level Input Current VN2 = 0 V −130 −100 − (cid:4)A Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. THREE-PHASE LOGIC TRUTH TABLE (“IN = ‘H’” INDICATES THE STATE WHERE IN+ > IN−) F/R = L F/R = H Output IN1 IN2 IN3 IN1 IN2 IN3 PWM − 1 H L H L H L VH UL 2 H L L L H H WH UL 3 H H L L L H WH VL 4 L H L H L H UH VL 5 L H H H L L UH WL 6 L L H H H L VH WL S/S PIN PWMIN PIN Input State State Input State State H Stop High or Open Output Off L Start L Output On N1 AND N2 PINS Input State N1 Pin N2 Pin HP Output L L Single Hall sensor period divided by 2 L High or Open Single Hall sensor period High or Open L Three Hall sensor synthesized period divided by 2 High or Open High or Open Three Hall sensor synthesized period Since the S/S pin does not have at internal pull-up resistor, converted to a pulsed output (one-Hall output), the one-Hall an external pull-up resistor or equivalent is required to set output divided by two, the three-phase output synthesized the IC to the stop state. If either the S/S or PWMIN pins are from the Hall inputs (three-Hall synthesized output) or the not used, th unused pin input must be set to the low-level three-Hall synthesized output divided by two. voltage. The HP output can be selected (by the N1 an N2 settings) to be one of the following four functions: the IN1 Hall input www.onsemi.com 5

LB11696V W 1.2 x − 114.3 × 76.1 × 1.6 mm glass epoxy board a m 1.0 d P n, 0.8 o ati p si 0.6 s Di Independent er 0.42 w 0.4 o P e bl 0.2 wa 0.18 o All 0 −20 0 20 40 60 80 100 120 Ambient Temperature, TA − (cid:2)C Figure 1. P max − T d A PIN ASSIGNMENT Figure 2. Pin Assignment PIN FUNCTIONS Pin No. Pin Name Equivalent Circuit Description 1 GND Ground pin. 2 RF GND GND of output current detection, RF pin. Connect to GND of external RF resistor. www.onsemi.com 6

LB11696V PIN FUNCTIONS (continued) Pin No. Pin Name Equivalent Circuit Description 3 RF Output current detection. Implement small resistor between RF pin and RFGND. Set IOUT=0.25/Rf as amaximum current. 4 WH Outputs (active by external Tr). 6 VH UH, VH, WH control the duty. 8 UH 5 WL 7 VL 9 UL 10 IN1− Hall signal input pin. 11 NI1+ The state is “High” in IN+ > IN− and the state is 12 IN2− “Low” in opposite mode. 13 IN2+ If the Hall signal noise is problem, put the 14 IN3− capacitor between IN+ and IN−. 15 IN3+ 16 EI+ CTL amplifier. 17 EI− The PWMIN pin must be held at the “Low” to use this input for motor control. www.onsemi.com 7

LB11696V PIN FUNCTIONS (continued) Pin No. Pin Name Equivalent Circuit Description 18 TOC CTL amplifier output. When TOC voltage rises up, the PWM duty of UH, VH, WH is changed and the torque force rises up. 19 PWM The PWM oscillator frequency setting and the initial reset pulse setting pin. Connect a capacitor between this pin and GND. If C=2000pF, PWM set to about 22kHz. 20 RD Lock (motor constrained) detection state output. This output is turned on when the motor is turning and off when the lock protection function detects the motor stop. 21 CSD Sets the operating time for the lock protection circuit. Connect a capacitor between this pin and GND. Connect this pin to GND if the lock protection function is not used. www.onsemi.com 8

LB11696V PIN FUNCTIONS (continued) Pin No. Pin Name Equivalent Circuit Description 22 S/S Start/Stop input pin. “L” = start, “H” = stop. 23 PWM IN PWM pulse input pin. This pin is “Low”, the out- put goes to the drive state, and this pin is “High” or “OPEN”, the output is off state. To use this pin for the control, it is required that the CTL amplifier inputs to make the TOC pin voltage 100% duty state. 24 F/R Forward/reverse control input. 25 HP Hall signal output (HP output). Open collector type. This provides 4 output mode by the N1 and N2 settings. www.onsemi.com 9

LB11696V PIN FUNCTIONS (continued) Pin No. Pin Name Equivalent Circuit Description 26 N1 Hall signal output (HP output) selection pin. 27 N2 Hall signal output (HP output) selection pin. 28 LVS Low voltage protection detection. If the detec- tion voltage is over 5V, connect the Zener diode to VCC in series and adjust the detection voltage properly. 29 VREG 5V regulator output used as the control circuit power supply. Connect a capacitor between this pin and GND for 5V output stabilization (about 0.1(cid:4)F). 30 VCC Power supply. Connect a capacitor between this pin and GND for VCC stabilization. www.onsemi.com 10

LB11696V Hall Sensor Signal Input/Output Timing Chart F/R = “L” IN1 IN2 IN3 UH VH WH UL VL WL F/R = “H” IN1 IN2 IN3 UH VH WH UL VL WL Section shown in gray are PWM output periods Figure 3. Hall Sensor Signal Input/Output Timing Chart www.onsemi.com 11

LB11696V BLOCK DIAGRAM AND APPLICATION EXAMPLE 1 Bipolar transistor drive (high side PWM) using a 5V power supply. Figure 4. Application Example 1 www.onsemi.com 12

LB11696V APPLICATION EXAMPLE 2 MOS transistor drive (low side PWM) using a 12V single-voltage power supply. Figure 5. Application Example 2 www.onsemi.com 13

LB11696V APPLICATION EXAMPLE 3 N MOS transistor drive (low side PWM) using a V = 12V and Thermistor. CC Figure 6. Application Example 3 www.onsemi.com 14

LB11696V LB11696V FUNCTIONAL DESCRIPTION 1.Output Drive Circuit: To VREG The LB11696V adopts direct PWM drive to minimize power loss in the outputs. The output transistors are always saturated when on, and the motor drive power is adjusted by changing the on duty of the output. The output PWM switching is To S/S Hall performed on the UH, VH, and WH outputs. Since the UL to WL and UH to WH outputs have the same output form, applications can select either 4.Notes on the PWM Frequency: low side PWM or high side PWM drive by The PWM frequency is determined by the changing the way the external output transistors capacitor C (F) connected to the PWM pin. are connected. Since the reverse recovery time of f ≈ 1/(22500 × C) the diodes connected to the non-PWM side of the PWM If a 2000pF capacitor is used, the circuit will outputs is a problem, these devices must be oscillate at about 22kHz. If the PWM frequency is selected with care. (This is because through too low, switching noise will be audible from the currents will flow at the instant the PWM side motor, and if it is too high, the output power loss transistors turn on if diodes with a short reverse will increase. Thus a frequency in the range recovery time are not used.) 15kHz to 50kHz must be used. The capacitor’s 2.Current Limiter Circuit: ground terminal must be placed as close as The current limiter circuit limits the output current possible to the IC’s ground pin to minimize the peak value to a level determined by the equation influence of output noise and other noise sources. I = V /Rf (V = 0.25V typical, Rf: current FR RF 5.Control Methods: detection resistor). This circuit suppresses the The output duty can be controlled by either of the output current by reducing the output on duty. following methods: To get shorter the distance between Rf and RF pin • and RF GND, to get the measurement more Compare TOC Voltage and PWM Waveform: precisely. The low side output transistor duty is The current limiter circuit includes an internal determined by the result of comparing the TOC filter circuit to prevent incorrect current limiter pin voltage to the PWM oscillator waveform. circuit operation due to detecting the output diode When the TOC voltage is 1.35V or lower, the reverse recovery current due to PWM operation. duty is set to 0% and when the TOC voltage is Although there should be no problems with the 3.0V or higher, it is set to 100%. Because the internal filter circuit in normal applications, TOC pin is the output of the CTL amplifier, it is applications should add an external filter circuit not able to input the control voltage into it. (such as an RC low-pass filter) if incorrect Hence, CTL amplifier is used as an all feedback - operation occurs (if the diode reverse recovery amplifier (connect the EI and the TOC pin) and current flows for longer than 1(cid:4)s). DC voltage should be input through the EI+ pin (the EI+ pin = the TOC pin voltage). The increase of EI+ voltage increases the output duty and when EI+ is open, the motor is in To the RF Pin Current Detection rotation. To stop the motor rotation, the Resistor pull-down register should be connected to EI+ pin. When the TOC pin voltage control is used, 3.Power Save Circuit: alow-level input must be applied to the For this IC, the state of motor stop is power save PWMIN pin or that pin connected to GND. • mode to decrease the power consumption. In this Pulse Control Using the PWMIN Pin: mode, almost all of the circuit are off, though A pulse signal can be input to the PWMIN pin, VREG (5V) output is active. If the bias current of and the output can be controlled by the duty of Hall element should be off, connect Hall element that signal. and 5V through PNP Tr. The output is on when a low level is input to www.onsemi.com 15

LB11696V the PWMIN pin, and off when a high level is VCC Pin input. When the PWMIN pin is open, the pin goes to the high level and the output is turned To LVS Pin off. If inverted input logic is required, an external transistor (NPN) can allow it. When controlling motor operation from the - PWMIN pin, the EI pin must be connected to the GND and the EI+ pin must be connected to the TOC pin. The detection level of the protection voltage is 5V Note that since the PWM oscillator is also used system. If it is needed to go up the detection level, as the clock for internal circuits, a capacitor connect the Zenner diode to LVS pin in series to shift (about 2000pF) must be connected to the PWM the detection voltage level. The LVS input current pin even if the PWMIN pin is used for motor for the detection is about 75(cid:4)A. To increase the control. current of the Zenner diode to stabilize the rising 6.Hall Input Signals: voltage of it, insert the resistor between LVS pin and A signal input with an amplitude in excess of the GND. hysteresis (80mV maximum) is required for the When the LVS pin is open, it becomes GND level Hall inputs. and the output is off because of pull-down resistor Considering the possibility of noise and phase inside the circuit. Hence, when it turns off, the displacement, an even larger amplitude is voltage higher than 4.35V should be input to LVS desirable. pin as a release voltage. The maximum ratings of If disruptions to the output waveforms (during LVS pin is 18V. phase switching) or to the HP output (Hall signal 8.Constraint Protection Circuit: output) occur due to noise, this must be prevented When the motor is physically constrained (held by inserting capacitors across the inputs. stopped), the CSD pin external capacitor is The constraint protection circuit uses the Hall charged (to about 3.0V) by a constant current of inputs to discriminate the motor constraint state. about 2.5(cid:4)A and is then discharged (to about Although the circuit is designed to tolerate 1.0V) by a constant current of about 0.14(cid:4)A. acertain amount of noise, care is required when This process is repeated, generating a saw-tooth using the constraint protection circuit. waveform. The constraint protection circuit turns If all three phases of the Hall input signal system motor drive on and off repeatedly based on this go to the same input state, the outputs are all set to saw-tooth waveform. (The UH, VH, and WH side the off state (the UL, VL, WL, UH, VH, and WH outputs are turned on and off.) Motor drive is on outputs all go to the low level). during the period the CSD pin external capacitor is If the outputs from a Hall IC are used, fixing one being charged from about 1.0V to about 3.0V, side of the inputs (either the + or – side) at and motor drive is off during the period the CSD avoltage within the common-mode input voltage pin external capacitor is being discharged from range allows the other input side to be used as an about 3.0V to about 1.0V. input over the 0V to V range. CC The IC and the motor are protected by this 7.Under-voltage Protection Circuit: repeated drive on/off operation when the motor is The under-voltage protection monitors the LVS physically constrained. pin voltage and the circuit turns off the outputs The motor drive on and off times are determined (UH, VH, and WH) when the voltage falls below by the value of the connected capacitor C (in (cid:4)F). the minimum operation voltage (see the Electrical TCSD1 (drive on period) ≈ 0.8 × C (seconds) Characteristics). To prevent the reputation of the TCSD2 (drive off period) ≈ 14.3 × C (seconds) output on and off close to the protection threshold When a 0.47(cid:4)F capacitor is connected externally voltage, it has hysteresis which is 0.45V (typical). to the CSD pin, this iterated operation will have Hence to release the protection mode, plus 0.45V adrive on period of about 0.38 seconds and a drive (typ.) to the operation voltage is needed. www.onsemi.com 16

LB11696V off period of about 6.7 seconds. V pin to the VREG pin and connect them to the CC While the motor is turning, the discharge pulse external power supply. signal (generated once for each Hall input period) When this IC is operated from an externally that is created by combining the Hall inputs supplied 12V power supply (8 to 17V), connect internally in the IC discharges the CSD pin the V pin to the power supply. (The VREG pin CC external capacitor. Since the CSD pin voltage does will generate a 5V level to function as the control not rise, the constraint protection circuit does not circuit power supply.) operate. 11.Power Supply Stabilization: When the motor is physically constrained, the Hall Since this IC uses a switching drive technique, the inputs do not change and the discharge pulses are power supply line level can be disturbed easily. not generated. Therefore capacitors with adequate capacitance to As a result, the CSD pin external capacitor is stabilize the power supply line must be inserted charged by a constant current of 2.5(cid:4)A to about between V and ground. CC 3.0V, at which point the constraint protection If diodes are inserted in the power supply lines to circuit operates. When the constraint on the motor prevent destruction if the power supply is is released, the constraint protection function is connected with reverse polarity, the power supply released. lines are even more easily disrupted, and even Connect the CSD pin to ground if the constraint larger capacitors are required. protection circuit is not used. If the power supply is turned on and off by 9.Forward/Reverse Direction Switching: a switch, and if there is a significant distance This IC is designed so that through currents between that switch and the stabilization capacitor, (due to the output transistor off delay time when the supply voltage can be disrupted significantly switching) do not flow in the output when by the line inductance and surge current into the switching directions when the motor is turning. capacitor. As a result, the withstand voltage of the However, if the direction is switched when the device may be exceeded. In application such as motor is turning, current levels in excess of the this, the surge current must be suppressed and the current limiter value may flow in the output voltage rise prevented by not using ceramic transistors due to the motor coil resistance and the capacitors with a low series impedance, and by motor back EMF state when switching. Therefore, using electrolytic capacitors instead. designers must consider selecting external output 12.VREG Stabilization: transistors that are not destroyed by those current To stabilize the VREG voltage, which is the levels or only switching directions after the speed control circuit power supply, a 0.1(cid:4)F or larger has fallen below a certain speed. capacitor must be inserted between the VREG pin 10.Handling Different Power Supply Types: and ground. The ground side of this capacitor must When this IC is operated from an externally connected to the IC ground pin with a line that is supplied 5V power supply (4.5 to 5.5V), short the as short as possible. ORDERING INFORMATION Device Package Wire Bond Shipping† (Qty / Packing)† LB11696V−MPB−E SSOP30 (275mil) Au wire 48 / Fan-Fold (Pb−Free) LB11696V−TLM−E SSOP30 (275mil) Au wire 1,000 / Tape & Reel (Pb−Free) LB11696V−TRM−E SSOP30 (275mil) Au wire 1,000 / Tape & Reel (Pb−Free) LB11696V−TLM−H SSOP30 (275mil) Au wire 1,000 / Tape & Reel (Pb−Free / Halogen Free) LB11696V−W−AH SSOP30 (275mil) Cu wire 1,000 / Tape & Reel (Pb−Free / Halogen Free) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. www.onsemi.com 17

MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS SSOP30 (275mil) CASE 565AT ISSUE A DATE 31 OCT 2013 SOLDERING FOOTPRINT* 0 0 (Unit: mm) 1. GENERIC MARKING DIAGRAM* 0 0 XXXXXXXXXX 7. YMDDD XXXXX = Specific Device Code Y = Year 0.65 0.32 M = Month DDD = Additional Traceability Data NOTE:The measurements are not to guarantee but for reference only. *This information is generic. Please refer to *For additional information on our Pb−Free strategy and soldering device data sheet for actual part marking. details, please download the ON Semiconductor Soldering and Pb−Free indicator, “G” or microdot “ (cid:2)”, Mounting Techniques Reference Manual, SOLDERRM/D. may or may not be present. DOCUMENT NUMBER: 98AON66071E Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed STATUS: ON SEMICONDUCTOR STANDARD versions are uncontrolled except when stamped “CONTROLLED COPY” in red. NEW STANDARD: © Semiconductor Components Industries, LLC, 2002 http://onsemi.com Case Outline Number: October, D20E0S2C −R RIePvT. I0ON: SSOP30 (275MIL) 1 PAGE 1 OFX 2XX

DOCUMENT NUMBER: 98AON66071E PAGE 2 OF 2 ISSUE REVISION DATE O RELEASED FOR PRODUCTION FROM SANYO ENACT# S−013 TO ON 30 JAN 2012 SEMICONDUCTOR. REQ. BY D. TRUHITTE. A ADDED MARKING AND SOLDER FOOTPRINT INFORMATION. REQ. BY D. 31 OCT 2013 TRUHITTE ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. © Semiconductor Components Industries, LLC, 2013 Case Outline Number: October, 2013 − Rev. A 565AT

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